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@@ -38,6 +38,7 @@
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*
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*
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* CPUID_CACHE_AND_TLBD_INFO
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* CPUID_CACHE_AND_TLBD_INFO
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* Cache and TLBD Information.
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* Cache and TLBD Information.
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+ * For AMD: Use CPUID_EXTENDED_L2_CACHE_FEATURES
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*
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*
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* CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED:
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* CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED:
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* Highest extended function supported address.
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* Highest extended function supported address.
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@@ -51,6 +52,7 @@
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*
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*
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* CPUID_L1_CACHE_AND_TLB_IDS:
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* CPUID_L1_CACHE_AND_TLB_IDS:
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* L1 Cache and TLB Identifications.
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* L1 Cache and TLB Identifications.
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+ * AMD Only.
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*
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*
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* CPUID_EXTENDED_L2_CACHE_FEATURES:
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* CPUID_EXTENDED_L2_CACHE_FEATURES:
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* Extended L2 Cache features.
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* Extended L2 Cache features.
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@@ -217,29 +219,32 @@ uint32_t cpuid_highest_ext_func_supported(void);
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* buf[2]: Family
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* buf[2]: Family
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* buf[3]: Extended Model
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* buf[3]: Extended Model
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* buf[4]: Extended Family
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* buf[4]: Extended Family
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- * buf[5] and buf[6]:
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- * Feature flags
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- * buf[7]: Brand Index
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- * buf[8]: CL Flush Line Size
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- * buf[9]: Logical Processors
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- * buf[10]: Initial APICID
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+ * buf[5]: Brand Index
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+ * buf[6]: CL Flush Line Size
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+ * buf[7]: Logical Processors
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+ * buf[8]: Initial APICID
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*
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*
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* For CPUID_L1_CACHE_AND_TLB_IDS:
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* For CPUID_L1_CACHE_AND_TLB_IDS:
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- * buf[0]: (eax):
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- * - 7..0 Number of times to exec cpuid to get all descriptors.
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- * - 15..8 Instruction TLB: 4K Pages, 4-way set associtive, 128 entries.
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- * - 23..16 Data TLB: 4k Pages, 4-way set associtive, 128 entries.
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- * - 24..31 Instruction TLB: 4K Pages, 4-way set associtive, 2 entries.
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- * buf[1]: (ebx):
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- * - 7..0 64-byte prefetching
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- * - 8..31 Null descriptor
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- * buf[2]: (ecx):
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- * - 0..31 Null descriptor
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- * buf[3]: (edx):
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- * - 7..0 2nd-level cache, 2M, 8-way set associtive, 64-byte line size
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- * - 15..8 1st-level instruction cache: 32K, 8-way set associtive, 64 byte line size
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- * - 16..23 Data TLB: 4M Pages, 4-way set associtive, 8 entires.
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- * - 24..31 1st-level data cache: 32K, 8-way set associtive, 64 byte line size
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+ * buf[0] to buf[3]: 2M+4M page TLB info
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+ * 0: Inst count
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+ * 1: Inst Assoc
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+ * 2: Data Count
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+ * 3: Data Assoc
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+ * buf[4] to buf[7]: 4k page TLB info
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+ * 0: Inst count
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+ * 1: Inst Assoc
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+ * 2: Data Count
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+ * 3: Data Assoc
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+ * buf[8] to buf[11]: L1 data cache information
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+ * 0: Line Size
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+ * 1: LinesPerTag
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+ * 2: Associativity
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+ * 3: CacheSize
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+ * buf[12] to buf[15]: L1 instruction cache info
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+ * 0: Line Size
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+ * 1: LinesPerTag
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+ * 2: Associativity
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+ * 3: CacheSize
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*
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*
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* For CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED:
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* For CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED:
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* Returns the highest supported function in *buf (expects an integer ofc)
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* Returns the highest supported function in *buf (expects an integer ofc)
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