driver-cointerra.c 41 KB

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  1. /*
  2. * Copyright 2013-2014 Con Kolivas
  3. * Copyright 2014 Luke Dashjr
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the Free
  7. * Software Foundation; either version 3 of the License, or (at your option)
  8. * any later version. See COPYING for more details.
  9. */
  10. #include "config.h"
  11. #include <string.h>
  12. #include "miner.h"
  13. #include "deviceapi.h"
  14. #include "driver-cointerra.h"
  15. #include "lowlevel.h"
  16. #include "lowl-usb.h"
  17. #include <math.h>
  18. static const unsigned cointerra_desired_roll = 60;
  19. static const unsigned long cointerra_latest_result_usecs = (10 * 1000000);
  20. static const unsigned cointerra_max_nonce_diff = 0x20;
  21. #define COINTERRA_USB_TIMEOUT 500
  22. #define COINTERRA_PACKET_SIZE 0x40
  23. #define COINTERRA_START_SEQ 0x5a,0x5a
  24. #define COINTERRA_MSG_SIZE (COINTERRA_PACKET_SIZE - sizeof(cointerra_startseq))
  25. #define COINTERRA_MSGBODY_SIZE (COINTERRA_MSG_SIZE - 1)
  26. BFG_REGISTER_DRIVER(cointerra_drv)
  27. static const struct bfg_set_device_definition cointerra_set_device_funcs[];
  28. enum cointerra_msg_type_out {
  29. CMTO_RESET = 1,
  30. CMTO_WORK = 2,
  31. CMTO_REQUEST = 4,
  32. CMTO_HWERR = 5,
  33. CMTO_LEDCTL = 6,
  34. CMTO_HASHRATE = 7,
  35. CMTO_GET_INFO = 0x21,
  36. };
  37. static const uint8_t cointerra_startseq[] = {COINTERRA_START_SEQ};
  38. static const char *cointerra_hdr = "ZZ";
  39. static void cta_gen_message(char *msg, char type)
  40. {
  41. memset(msg, 0, CTA_MSG_SIZE);
  42. memcpy(msg, cointerra_hdr, 2);
  43. msg[CTA_MSG_TYPE] = type;
  44. }
  45. /* Find the number of leading zero bits in diff */
  46. static uint8_t diff_to_bits(double diff)
  47. {
  48. uint64_t diff64;
  49. uint8_t i;
  50. diff *= (double)2147483648.0;
  51. if (diff > 0x8000000000000000ULL)
  52. diff = 0x8000000000000000ULL;
  53. /* Convert it to an integer */
  54. diff64 = diff;
  55. for (i = 0; diff64; i++, diff64 >>= 1);
  56. return i;
  57. }
  58. static double bits_to_diff(uint8_t bits)
  59. {
  60. double ret = 1.0;
  61. if (likely(bits > 32))
  62. ret *= 1ull << (bits - 32);
  63. else if (unlikely(bits < 32))
  64. ret /= 1ull << (32 - bits);
  65. return ret;
  66. }
  67. static bool cta_reset_init(char *buf)
  68. {
  69. return ((buf[CTA_MSG_TYPE] == CTA_RECV_RDONE) && ((buf[CTA_RESET_TYPE]&0x3) == CTA_RESET_INIT));
  70. }
  71. static char *mystrstr(char *haystack, int size, const char *needle)
  72. {
  73. int loop = 0;
  74. while (loop < (size-1)) {
  75. if ((haystack[loop] == needle[0])&&
  76. (haystack[loop+1] == needle[1]))
  77. return &haystack[loop];
  78. loop++;
  79. }
  80. return NULL;
  81. }
  82. static
  83. bool cta_open(struct lowl_usb_endpoint * const ep, const char * const repr, struct cointerra_info * const devstate)
  84. {
  85. int amount, offset = 0;
  86. char buf[CTA_MSG_SIZE];
  87. cgtimer_t ts_start;
  88. bool ret = false;
  89. applog(LOG_INFO, "CTA_OPEN");
  90. cta_gen_message(buf, CTA_SEND_RESET);
  91. // set the initial difficulty
  92. buf[CTA_RESET_TYPE] = CTA_RESET_INIT | CTA_RESET_DIFF;
  93. buf[CTA_RESET_DIFF] = diff_to_bits(CTA_INIT_DIFF);
  94. buf[CTA_RESET_LOAD] = devstate->set_load ?: 255;
  95. buf[CTA_RESET_PSLOAD] = 0;
  96. amount = usb_write(ep, buf, CTA_MSG_SIZE);
  97. if (amount != CTA_MSG_SIZE) {
  98. applog(LOG_INFO, "Write error %s, wrote %d of %d",
  99. bfg_strerror(errno, BST_ERRNO),
  100. amount, CTA_MSG_SIZE);
  101. return ret;
  102. }
  103. cgtimer_time(&ts_start);
  104. /* Read from the device for up to 2 seconds discarding any data that
  105. * doesn't match a reset complete acknowledgement. */
  106. while (42) {
  107. cgtimer_t ts_now, ts_diff;
  108. char *msg;
  109. cgtimer_time(&ts_now);
  110. cgtimer_sub(&ts_now, &ts_start, &ts_diff);
  111. if (cgtimer_to_ms(&ts_diff) > 2000) {
  112. applog(LOG_DEBUG, "%s: Timed out waiting for response to reset init", repr);
  113. break;
  114. }
  115. amount = usb_read(ep, buf + offset, CTA_MSG_SIZE - offset);
  116. if (amount != (CTA_MSG_SIZE - offset) && amount != 0) {
  117. applog(LOG_INFO, "%s: Read error %s, read %d",
  118. repr, bfg_strerror(errno, BST_ERRNO), amount);
  119. break;
  120. }
  121. if (!amount)
  122. continue;
  123. msg = mystrstr(buf, amount, cointerra_hdr);
  124. if (!msg) {
  125. /* Keep the last byte in case it's the first byte of
  126. * the 2 byte header. */
  127. offset = 1;
  128. memmove(buf, buf + amount - 1, offset);
  129. continue;
  130. }
  131. if (msg > buf) {
  132. /* length of message = offset for next usb_read after moving */
  133. offset = CTA_MSG_SIZE - (msg - buf);
  134. memmove(buf, msg, offset);
  135. continue;
  136. }
  137. /* We have a full sized message starting with the header now */
  138. if (cta_reset_init(buf)) {
  139. /* We can't store any other data returned with this
  140. * reset since we have not allocated any memory for
  141. * a cointerra_info structure yet. */
  142. applog(LOG_INFO, "%s: Successful reset init received", repr);
  143. ret = true;
  144. break;
  145. }
  146. }
  147. return ret;
  148. }
  149. static
  150. bool cointerra_open(const struct lowlevel_device_info * const info, const char * const repr, struct libusb_device_handle ** const usbh_p, struct lowl_usb_endpoint ** const ep_p, struct cointerra_info * const devstate)
  151. {
  152. int e;
  153. if (libusb_open(info->lowl_data, usbh_p))
  154. applogr(false, LOG_DEBUG, "%s: USB open failed on %s",
  155. cointerra_drv.dname, info->devid);
  156. if ( (e = libusb_set_configuration(*usbh_p, 1)) )
  157. return_via_applog(fail, , LOG_ERR, "%s: Failed to %s on %s: %s", repr, "set configuration 1", info->devid, bfg_strerror(e, BST_LIBUSB));
  158. if ( (e = libusb_claim_interface(*usbh_p, 0)) )
  159. return_via_applog(fail, , LOG_ERR, "%s: Failed to %s on %s: %s", repr, "claim interface 0", info->devid, bfg_strerror(e, BST_LIBUSB));
  160. *ep_p = usb_open_ep_pair(*usbh_p, LIBUSB_ENDPOINT_IN | 1, 64, LIBUSB_ENDPOINT_OUT | 1, 64);
  161. if (!*ep_p)
  162. {
  163. applog(LOG_DEBUG, "%s: Endpoint open failed on %s",
  164. cointerra_drv.dname, info->devid);
  165. fail:
  166. libusb_close(*usbh_p);
  167. *usbh_p = NULL;
  168. return false;
  169. }
  170. if (!cta_open(*ep_p, repr, devstate))
  171. {
  172. usb_close_ep(*ep_p);
  173. *ep_p = NULL;
  174. goto fail;
  175. }
  176. return true;
  177. }
  178. static void cta_clear_work(struct cgpu_info *cgpu)
  179. {
  180. struct work *work, *tmp;
  181. wr_lock(&cgpu->qlock);
  182. HASH_ITER(hh, cgpu->queued_work, work, tmp) {
  183. __work_completed(cgpu, work);
  184. free_work(work);
  185. }
  186. wr_unlock(&cgpu->qlock);
  187. }
  188. static void cta_close(struct cgpu_info *cointerra)
  189. {
  190. struct cointerra_info *info = cointerra->device_data;
  191. if (info->ep)
  192. {
  193. /* Open does the same reset init followed by response as is required to
  194. * close the device. */
  195. if (!cta_open(info->ep, cointerra->dev_repr, info)) {
  196. applog(LOG_INFO, "%s %d: Reset on close failed", cointerra->drv->name,
  197. cointerra->device_id);
  198. }
  199. }
  200. mutex_destroy(&info->lock);
  201. mutex_destroy(&info->sendlock);
  202. /* Don't free info here to avoid trying to access dereferenced members
  203. * once a device is unplugged. */
  204. cta_clear_work(cointerra);
  205. }
  206. static void cta_parse_info(struct cgpu_info *, struct cointerra_info *, char *);
  207. static void msg_from_hu16(char *, int, uint16_t);
  208. static
  209. bool cointerra_wait_for_info(struct cointerra_info * const ctainfo, struct lowl_usb_endpoint * const ep)
  210. {
  211. char buf[CTA_MSG_SIZE];
  212. int amount;
  213. cta_gen_message(buf, CTA_SEND_REQUEST);
  214. msg_from_hu16(buf, CTA_REQ_MSGTYPE, CTA_RECV_INFO);
  215. msg_from_hu16(buf, CTA_REQ_INTERVAL, 0);
  216. amount = usb_write(ep, buf, CTA_MSG_SIZE);
  217. if (amount != CTA_MSG_SIZE)
  218. return false;
  219. do {
  220. amount = usb_read(ep, buf, CTA_MSG_SIZE);
  221. if (amount != CTA_MSG_SIZE)
  222. applogr(false, LOG_ERR, "%s: Read error %s, read %d",
  223. __func__, bfg_strerror(errno, BST_ERRNO), amount);
  224. if (memcmp(buf, cointerra_hdr, 2))
  225. applogr(false, LOG_ERR, "%s: Packet header mismatch", __func__);
  226. } while (buf[CTA_MSG_TYPE] != CTA_RECV_INFO);
  227. cta_parse_info(NULL, ctainfo, buf);
  228. return true;
  229. }
  230. static
  231. float cointerra_min_nonce_diff(struct cgpu_info * const proc, const struct mining_algorithm * const malgo)
  232. {
  233. return (malgo->algo == POW_SHA256D) ? CTA_INIT_DIFF : -1.;
  234. }
  235. static
  236. bool cointerra_lowl_probe(const struct lowlevel_device_info * const info)
  237. {
  238. struct cointerra_info ctainfo = { .set_load = 0, };
  239. struct libusb_device_handle *usbh;
  240. struct lowl_usb_endpoint *ep;
  241. bool b;
  242. if (info->lowl != &lowl_usb)
  243. {
  244. bfg_probe_result_flags = BPR_WRONG_DEVTYPE;
  245. return false;
  246. }
  247. if (!cointerra_open(info, cointerra_drv.dname, &usbh, &ep, &ctainfo))
  248. return false;
  249. mutex_init(&ctainfo.lock);
  250. b = cointerra_wait_for_info(&ctainfo, ep);
  251. mutex_destroy(&ctainfo.lock);
  252. usb_close_ep(ep);
  253. libusb_close(usbh);
  254. if (!b)
  255. return false;
  256. applog(LOG_DEBUG, "%s: Found %lu cores on %s",
  257. __func__, (unsigned long)ctainfo.cores, info->devid);
  258. libusb_device * const usbdev = info->lowl_data;
  259. if (bfg_claim_libusb(&cointerra_drv, true, usbdev))
  260. return false;
  261. struct cgpu_info * const dev = malloc(sizeof(*dev));
  262. *dev = (struct cgpu_info){
  263. .drv = &cointerra_drv,
  264. .set_device_funcs = cointerra_set_device_funcs,
  265. .procs = ctainfo.cores,
  266. .device_data = lowlevel_ref(info),
  267. .threads = 1,
  268. .device_path = strdup(info->devid),
  269. .dev_manufacturer = maybe_strdup(info->manufacturer),
  270. .dev_product = maybe_strdup(info->product),
  271. .dev_serial = maybe_strdup(info->serial),
  272. .deven = DEV_ENABLED,
  273. };
  274. const bool rv = add_cgpu(dev);
  275. applog(LOG_INFO, "%s: Successfully set up %s",
  276. cointerra_drv.dname, dev->dev_repr);
  277. return rv;
  278. }
  279. static
  280. void cointerra_set_queue_full(struct cgpu_info * const dev, const bool nv)
  281. {
  282. if (dev->thr[0]->queue_full == nv)
  283. return;
  284. for_each_managed_proc(proc, dev)
  285. proc->thr[0]->queue_full = nv;
  286. }
  287. static
  288. bool cointerra_lowl_match(const struct lowlevel_device_info * const info)
  289. {
  290. return lowlevel_match_lowlproduct(info, &lowl_usb, "GoldStrike");
  291. }
  292. /* This function will remove a work item from the hashtable if it matches the
  293. * id in work->subid and return a pointer to the work but it will not free the
  294. * work. It may return NULL if it cannot find matching work. */
  295. static struct work *take_work_by_id(struct cgpu_info *cgpu, uint16_t id)
  296. {
  297. struct work *work, *tmp, *ret = NULL;
  298. wr_lock(&cgpu->qlock);
  299. HASH_ITER(hh, cgpu->queued_work, work, tmp) {
  300. if (work->subid == id) {
  301. ret = work;
  302. break;
  303. }
  304. }
  305. if (ret)
  306. __work_completed(cgpu, ret);
  307. wr_unlock(&cgpu->qlock);
  308. return ret;
  309. }
  310. /* This function will look up a work item in the hashtable if it matches the
  311. * id in work->subid and return a cloned work item if it matches. It may return
  312. * NULL if it cannot find matching work. */
  313. static struct work *clone_work_by_id(struct cgpu_info *cgpu, uint16_t id)
  314. {
  315. struct work *work, *tmp, *ret = NULL;
  316. rd_lock(&cgpu->qlock);
  317. HASH_ITER(hh, cgpu->queued_work, work, tmp) {
  318. if (work->subid == id) {
  319. ret = work;
  320. break;
  321. }
  322. }
  323. if (ret)
  324. ret = copy_work(ret);
  325. rd_unlock(&cgpu->qlock);
  326. return ret;
  327. }
  328. static bool cta_send_msg(struct cgpu_info *cointerra, char *buf);
  329. static uint16_t hu16_from_msg(char *buf, int msg)
  330. {
  331. return le16toh(*(uint16_t *)&buf[msg]);
  332. }
  333. static uint32_t hu32_from_msg(char *buf, int msg)
  334. {
  335. return le32toh(*(uint32_t *)&buf[msg]);
  336. }
  337. static uint64_t hu64_from_msg(char *buf, int msg)
  338. {
  339. return le64toh(*(uint64_t *)&buf[msg]);
  340. }
  341. static uint8_t u8_from_msg(char *buf, int msg)
  342. {
  343. return *(uint8_t *)&buf[msg];
  344. }
  345. static void msg_from_hu16(char *buf, int msg, uint16_t val)
  346. {
  347. *(uint16_t *)&buf[msg] = htole16(val);
  348. }
  349. static void cta_parse_reqwork(struct cgpu_info *cointerra, struct cointerra_info *info,
  350. char *buf)
  351. {
  352. uint16_t retwork;
  353. retwork = hu16_from_msg(buf, CTA_REQWORK_REQUESTS);
  354. applog(LOG_DEBUG, "%s %d: Request work message for %u items received",
  355. cointerra->drv->name, cointerra->device_id, retwork);
  356. mutex_lock(&info->lock);
  357. info->requested = retwork;
  358. cointerra_set_queue_full(cointerra, !retwork);
  359. mutex_unlock(&info->lock);
  360. }
  361. static void cta_parse_recvmatch(struct thr_info *thr, struct cgpu_info *cointerra,
  362. struct cointerra_info *info, char *buf)
  363. {
  364. struct cgpu_info *corecgpu;
  365. struct thr_info *corethr;
  366. uint32_t timestamp_offset, mcu_tag;
  367. uint16_t retwork;
  368. struct work *work;
  369. uint8_t asic, core, pipe, coreno;
  370. int pipeno, bitchar, bitbit;
  371. /* No endian switch needs doing here since it's sent and returned as
  372. * the same 4 bytes */
  373. retwork = *(uint16_t *)(&buf[CTA_DRIVER_TAG]);
  374. mcu_tag = hu32_from_msg(buf, CTA_MCU_TAG);
  375. const uint8_t wdiffbits = u8_from_msg(buf, CTA_WORK_DIFFBITS);
  376. const uint32_t nonce = hu32_from_msg(buf, CTA_MATCH_NONCE);
  377. asic = u8_from_msg(buf, CTA_MCU_ASIC);
  378. core = u8_from_msg(buf, CTA_MCU_CORE);
  379. pipe = u8_from_msg(buf, CTA_MCU_PIPE);
  380. pipeno = asic * 512 + core * 128 + pipe;
  381. // For some reason, pipe numbers skip 0x?f
  382. const int bfg_pipeno = ((pipe >> 4) * 0xf) + (pipe & 0xf);
  383. const unsigned procno = (asic * 480) + (core * 120) + bfg_pipeno;
  384. corecgpu = device_proc_by_id(cointerra, procno) ?: cointerra;
  385. corethr = corecgpu->thr[0];
  386. applog(LOG_DEBUG, "%s %d: Match message for id 0x%04x MCU id 0x%08x received",
  387. cointerra->drv->name, cointerra->device_id, retwork, mcu_tag);
  388. work = clone_work_by_id(cointerra, retwork);
  389. if (likely(work)) {
  390. unsigned char rhash[32];
  391. char outhash[16];
  392. double wdiff;
  393. uint64_t hashes;
  394. bool ret;
  395. timestamp_offset = hu32_from_msg(buf, CTA_MATCH_NOFFSET);
  396. if (timestamp_offset) {
  397. struct work *base_work = work;
  398. work = copy_work_noffset(base_work, timestamp_offset);
  399. free_work(base_work);
  400. }
  401. /* Test against the difficulty we asked for along with the work */
  402. wdiff = bits_to_diff(wdiffbits);
  403. hashes = (uint64_t)wdiff * 0x100000000ull;
  404. ret = true; // TODO: test_nonce_diff(work, nonce, wdiff);
  405. if (opt_debug) {
  406. /* Debugging, remove me */
  407. swab256(rhash, work->hash);
  408. bin2hex(outhash, rhash, 8);
  409. applog(LOG_DEBUG, "submit work %s 0x%04x 0x%08x %d 0x%08x",
  410. outhash, retwork, mcu_tag, timestamp_offset, nonce);
  411. }
  412. hashes_done2(corethr, hashes, NULL);
  413. if (likely(ret)) {
  414. coreno = asic * 4 + core;
  415. if (unlikely(asic > 1 || core > 3 || pipe > 127 || pipeno > 1023)) {
  416. applog(LOG_WARNING, "%s %d: MCU invalid pipe asic %d core %d pipe %d",
  417. cointerra->drv->name, cointerra->device_id, asic, core, pipe);
  418. coreno = 0;
  419. } else {
  420. info->last_pipe_nonce[pipeno] = time(NULL);
  421. bitchar = pipeno / 8;
  422. bitbit = pipeno % 8;
  423. info->pipe_bitmap[bitchar] |= 0x80 >> bitbit;
  424. }
  425. applog(LOG_DEBUG, "%"PRIpreprv": Submitting tested work job_id %s work_id %u",
  426. corecgpu->proc_repr, work->job_id, work->subid);
  427. ret = submit_nonce(corethr, work, nonce);
  428. mutex_lock(&info->lock);
  429. info->share_hashes += hashes;
  430. info->tot_core_hashes[coreno] += hashes;
  431. info->hashes += nonce;
  432. mutex_unlock(&info->lock);
  433. } else {
  434. char sendbuf[CTA_MSG_SIZE];
  435. applog(LOG_DEBUG, "%s %d: Notify bad match work",
  436. cointerra->drv->name, cointerra->device_id);
  437. if (opt_debug) {
  438. unsigned char midstate[32], wdata[12];
  439. char hexmidstate[68], hexwdata[28];
  440. uint16_t wid;
  441. memcpy(&wid, &info->work_id, 2);
  442. flip32(midstate, work->midstate);
  443. bin2hex(hexmidstate, midstate, 32);
  444. flip12(wdata, &work->data[64]);
  445. bin2hex(hexwdata, wdata, 12);
  446. applog(LOG_DEBUG, "False match sent: work id %u midstate %s blkhdr %s",
  447. wid, hexmidstate, hexwdata);
  448. applog(LOG_DEBUG, "False match reports: work id 0x%04x MCU id 0x%08x work diff %.1f",
  449. retwork, mcu_tag, wdiff);
  450. applog(LOG_DEBUG, "False match tested: nonce 0x%08x noffset %d %s",
  451. nonce, timestamp_offset, outhash);
  452. }
  453. /* Tell the device we got a false match */
  454. cta_gen_message(sendbuf, CTA_SEND_FMATCH);
  455. memcpy(sendbuf + 3, buf, CTA_MSG_SIZE - 3);
  456. cta_send_msg(cointerra, sendbuf);
  457. }
  458. free_work(work);
  459. } else {
  460. applog(LOG_INFO, "%s %d: Matching work id 0x%X %d not found", cointerra->drv->name,
  461. cointerra->device_id, retwork, __LINE__);
  462. inc_hw_errors3(corethr, NULL, &nonce, bits_to_diff(wdiffbits));
  463. mutex_lock(&info->lock);
  464. info->no_matching_work++;
  465. mutex_unlock(&info->lock);
  466. }
  467. }
  468. static void cta_parse_wdone(struct thr_info *thr, struct cgpu_info *cointerra,
  469. struct cointerra_info *info, char *buf)
  470. {
  471. uint16_t retwork = *(uint16_t *)(&buf[CTA_DRIVER_TAG]);
  472. struct work *work = take_work_by_id(cointerra, retwork);
  473. uint64_t hashes;
  474. if (likely(work))
  475. free_work(work);
  476. else {
  477. applog(LOG_INFO, "%s %d: Done work not found id 0x%X %d",
  478. cointerra->drv->name, cointerra->device_id, retwork, __LINE__);
  479. inc_hw_errors_only(thr);
  480. }
  481. /* Removing hashes from work done message */
  482. hashes = hu64_from_msg(buf, CTA_WDONE_NONCES);
  483. if (unlikely(hashes > (61 * 0x100000000ull))) {
  484. applog(LOG_INFO, "%s Invalid hash returned %"PRIu64"x %"PRIu64"x %"PRIu64"X",
  485. __func__, info->hashes, hashes, hashes);
  486. hashes = 0;
  487. }
  488. mutex_lock(&info->lock);
  489. info->hashes += hashes;
  490. mutex_unlock(&info->lock);
  491. }
  492. static void u16array_from_msg(uint16_t *u16, int entries, int var, char *buf)
  493. {
  494. int i, j;
  495. for (i = 0, j = 0; i < entries; i++, j += sizeof(uint16_t))
  496. u16[i] = hu16_from_msg(buf, var + j);
  497. }
  498. static void cta_parse_statread(struct cgpu_info *cointerra, struct cointerra_info *info,
  499. char *buf)
  500. {
  501. int i;
  502. mutex_lock(&info->lock);
  503. u16array_from_msg(info->coretemp, CTA_CORES, CTA_STAT_CORETEMPS, buf);
  504. info->ambtemp_low = hu16_from_msg(buf, CTA_STAT_AMBTEMP_LOW);
  505. info->ambtemp_avg = hu16_from_msg(buf, CTA_STAT_AMBTEMP_AVG);
  506. info->ambtemp_high = hu16_from_msg(buf, CTA_STAT_AMBTEMP_HIGH);
  507. u16array_from_msg(info->pump_tachs, CTA_PUMPS, CTA_STAT_PUMP_TACHS, buf);
  508. u16array_from_msg(info->fan_tachs, CTA_FANS, CTA_STAT_FAN_TACHS, buf);
  509. u16array_from_msg(info->corevolts, CTA_CORES, CTA_STAT_CORE_VOLTS, buf);
  510. info->volts33 = hu16_from_msg(buf, CTA_STAT_VOLTS33);
  511. info->volts12 = hu16_from_msg(buf, CTA_STAT_VOLTS12);
  512. info->inactive = hu16_from_msg(buf, CTA_STAT_INACTIVE);
  513. info->active = hu16_from_msg(buf, CTA_STAT_ACTIVE);
  514. mutex_unlock(&info->lock);
  515. struct cgpu_info *proc = cointerra;
  516. for (i = 0; i < CTA_CORES; i++) {
  517. float temp = info->coretemp[i] / 100.;
  518. for (int j = 0; j < 120; (++j), (proc = proc->next_proc))
  519. proc->temp = temp;
  520. }
  521. }
  522. static void u8array_from_msg(uint8_t *u8, int entries, int var, char *buf)
  523. {
  524. int i;
  525. for (i = 0; i < entries; i++)
  526. u8[i] = u8_from_msg(buf, var + i);
  527. }
  528. static void cta_parse_statset(struct cointerra_info *info, char *buf)
  529. {
  530. mutex_lock(&info->lock);
  531. u8array_from_msg(info->coreperf, CTA_CORES, CTA_STAT_PERFMODE, buf);
  532. u8array_from_msg(info->fanspeed, CTA_FANS, CTA_STAT_FANSPEEDS, buf);
  533. info->dies_active = u8_from_msg(buf, CTA_STAT_DIES_ACTIVE);
  534. u8array_from_msg(info->pipes_enabled, CTA_CORES, CTA_STAT_PIPES_ENABLED, buf);
  535. u16array_from_msg(info->corefreqs, CTA_CORES, CTA_STAT_CORE_FREQS, buf);
  536. info->uptime = hu32_from_msg(buf,CTA_STAT_UPTIME);
  537. mutex_unlock(&info->lock);
  538. }
  539. static void cta_parse_info(struct cgpu_info *cointerra, struct cointerra_info *info,
  540. char *buf)
  541. {
  542. mutex_lock(&info->lock);
  543. info->hwrev = hu64_from_msg(buf, CTA_INFO_HWREV);
  544. info->serial = hu32_from_msg(buf, CTA_INFO_SERNO);
  545. info->asics = u8_from_msg(buf, CTA_INFO_NUMASICS);
  546. info->dies = u8_from_msg(buf, CTA_INFO_NUMDIES);
  547. info->cores = hu16_from_msg(buf, CTA_INFO_NUMCORES);
  548. info->board_number = u8_from_msg(buf, CTA_INFO_BOARDNUMBER);
  549. info->fwrev[0] = u8_from_msg(buf, CTA_INFO_FWREV_MAJ);
  550. info->fwrev[1] = u8_from_msg(buf, CTA_INFO_FWREV_MIN);
  551. info->fwrev[2] = u8_from_msg(buf, CTA_INFO_FWREV_MIC);
  552. info->fw_year = hu16_from_msg(buf, CTA_INFO_FWDATE_YEAR);
  553. info->fw_month = u8_from_msg(buf, CTA_INFO_FWDATE_MONTH);
  554. info->fw_day = u8_from_msg(buf, CTA_INFO_FWDATE_DAY);
  555. info->init_diffbits = u8_from_msg(buf, CTA_INFO_INITDIFFBITS);
  556. info->min_diffbits = u8_from_msg(buf, CTA_INFO_MINDIFFBITS);
  557. info->max_diffbits = u8_from_msg(buf, CTA_INFO_MAXDIFFBITS);
  558. mutex_unlock(&info->lock);
  559. #if 0
  560. if (!cointerra->unique_id) {
  561. uint32_t b32 = htobe32(info->serial);
  562. cointerra->unique_id = malloc((4 * 2) + 1);
  563. bin2hex(cointerra->unique_id, &b32, 4);
  564. }
  565. #endif
  566. }
  567. static void cta_parse_rdone(struct cgpu_info *cointerra, struct cointerra_info *info,
  568. char *buf)
  569. {
  570. uint8_t reset_type, diffbits;
  571. uint64_t wdone;
  572. reset_type = buf[CTA_RESET_TYPE];
  573. diffbits = buf[CTA_RESET_DIFF];
  574. wdone = hu64_from_msg(buf, CTA_WDONE_NONCES);
  575. applog(LOG_INFO, "%s %d: Reset done type %u message %u diffbits %"PRIu64" done received",
  576. cointerra->drv->name, cointerra->device_id, reset_type, diffbits, wdone);
  577. if (wdone) {
  578. applog(LOG_INFO, "%s %d: Reset done type %u message %u diffbits %"PRIu64" done received",
  579. cointerra->drv->name, cointerra->device_id, reset_type, diffbits, wdone);
  580. mutex_lock(&info->lock);
  581. info->hashes += wdone;
  582. mutex_unlock(&info->lock);
  583. }
  584. /* Note that the cgsem that is posted here must not be waited on while
  585. * holding the info->lock to not get into a livelock since this
  586. * function also grabs the lock first and it's always best to not sleep
  587. * while holding a lock. */
  588. if (reset_type == CTA_RESET_NEW) {
  589. cta_clear_work(cointerra);
  590. /* Tell reset sender that the reset is complete
  591. * and it may resume. */
  592. notifier_wake(info->reset_notifier);
  593. }
  594. }
  595. static void cta_zero_stats(struct cgpu_info *cointerra);
  596. static void cta_parse_debug(struct cointerra_info *info, char *buf)
  597. {
  598. mutex_lock(&info->lock);
  599. info->tot_underruns = hu16_from_msg(buf, CTA_STAT_UNDERRUNS);
  600. u16array_from_msg(info->tot_hw_errors, CTA_CORES, CTA_STAT_HW_ERRORS, buf);
  601. info->tot_hashes = hu64_from_msg(buf, CTA_STAT_HASHES);
  602. info->tot_flushed_hashes = hu64_from_msg(buf, CTA_STAT_FLUSHED_HASHES);
  603. info->autovoltage = u8_from_msg(buf, CTA_STAT_AUTOVOLTAGE);
  604. info->current_ps_percent = u8_from_msg(buf, CTA_STAT_POWER_PERCENT);
  605. info->power_used = hu16_from_msg(buf,CTA_STAT_POWER_USED);
  606. info->power_voltage = hu16_from_msg(buf,CTA_STAT_VOLTAGE);
  607. info->ipower_used = hu16_from_msg(buf,CTA_STAT_IPOWER_USED);
  608. info->ipower_voltage = hu16_from_msg(buf,CTA_STAT_IVOLTAGE);
  609. info->power_temps[0] = hu16_from_msg(buf,CTA_STAT_PS_TEMP1);
  610. info->power_temps[1] = hu16_from_msg(buf,CTA_STAT_PS_TEMP2);
  611. mutex_unlock(&info->lock);
  612. #if 0
  613. /* Autovoltage is positive only once at startup and eventually drops
  614. * to zero. After that time we reset the stats since they're unreliable
  615. * till then. */
  616. if (unlikely(!info->autovoltage_complete && !info->autovoltage)) {
  617. struct cgpu_info *cointerra = info->thr->cgpu;
  618. info->autovoltage_complete = true;
  619. cgtime(&cointerra->dev_start_tv);
  620. cta_zero_stats(cointerra);
  621. cointerra->total_mhashes = 0;
  622. cointerra->accepted = 0;
  623. cointerra->rejected = 0;
  624. cointerra->hw_errors = 0;
  625. cointerra->utility = 0.0;
  626. cointerra->last_share_pool_time = 0;
  627. cointerra->diff1 = 0;
  628. cointerra->diff_accepted = 0;
  629. cointerra->diff_rejected = 0;
  630. cointerra->last_share_diff = 0;
  631. }
  632. #endif
  633. }
  634. static void cta_parse_msg(struct thr_info *thr, struct cgpu_info *cointerra,
  635. struct cointerra_info *info, char *buf)
  636. {
  637. switch (buf[CTA_MSG_TYPE]) {
  638. default:
  639. case CTA_RECV_UNUSED:
  640. applog(LOG_INFO, "%s %d: Unidentified message type %u",
  641. cointerra->drv->name, cointerra->device_id, buf[CTA_MSG_TYPE]);
  642. break;
  643. case CTA_RECV_REQWORK:
  644. cta_parse_reqwork(cointerra, info, buf);
  645. break;
  646. case CTA_RECV_MATCH:
  647. cta_parse_recvmatch(thr, cointerra, info, buf);
  648. break;
  649. case CTA_RECV_WDONE:
  650. applog(LOG_DEBUG, "%s %d: Work done message received",
  651. cointerra->drv->name, cointerra->device_id);
  652. cta_parse_wdone(thr, cointerra, info, buf);
  653. break;
  654. case CTA_RECV_STATREAD:
  655. applog(LOG_DEBUG, "%s %d: Status readings message received",
  656. cointerra->drv->name, cointerra->device_id);
  657. cta_parse_statread(cointerra, info, buf);
  658. break;
  659. case CTA_RECV_STATSET:
  660. applog(LOG_DEBUG, "%s %d: Status settings message received",
  661. cointerra->drv->name, cointerra->device_id);
  662. cta_parse_statset(info, buf);
  663. break;
  664. case CTA_RECV_INFO:
  665. applog(LOG_DEBUG, "%s %d: Info message received",
  666. cointerra->drv->name, cointerra->device_id);
  667. cta_parse_info(cointerra, info, buf);
  668. break;
  669. case CTA_RECV_MSG:
  670. applog(LOG_NOTICE, "%s: Devlog: %.*s", cointerra->dev_repr, (int)COINTERRA_MSGBODY_SIZE, &buf[CTA_MSG_RECVD]);
  671. break;
  672. case CTA_RECV_RDONE:
  673. cta_parse_rdone(cointerra, info, buf);
  674. break;
  675. case CTA_RECV_STATDEBUG:
  676. cta_parse_debug(info, buf);
  677. break;
  678. }
  679. }
  680. static
  681. void cta_recv_thread(void *arg)
  682. {
  683. struct thr_info *thr = (struct thr_info *)arg;
  684. struct cgpu_info *cointerra = thr->cgpu;
  685. struct cointerra_info *info = cointerra->device_data;
  686. int offset = 0;
  687. while (likely(!cointerra->shutdown)) {
  688. char buf[CTA_READBUF_SIZE];
  689. int amount;
  690. if (unlikely(0))
  691. {
  692. applog(LOG_DEBUG, "%s %d: Device disappeared, disabling recv thread",
  693. cointerra->drv->name, cointerra->device_id);
  694. break;
  695. }
  696. amount = usb_read(info->ep, buf + offset, CTA_MSG_SIZE);
  697. if (amount != CTA_MSG_SIZE && amount != 0) {
  698. applog(LOG_ERR, "%s: Read error %s, read %d",
  699. cointerra->dev_repr, bfg_strerror(errno, BST_ERRNO), amount);
  700. break;
  701. }
  702. offset += amount;
  703. while (offset >= CTA_MSG_SIZE) {
  704. char *msg = mystrstr(buf, offset, cointerra_hdr);
  705. int begin;
  706. if (unlikely(!msg)) {
  707. applog(LOG_WARNING, "%s %d: No message header found, discarding buffer",
  708. cointerra->drv->name, cointerra->device_id);
  709. inc_hw_errors_only(thr);
  710. /* Save the last byte in case it's the fist
  711. * byte of a header. */
  712. begin = CTA_MSG_SIZE - 1;
  713. offset -= begin;
  714. memmove(buf, buf + begin, offset);
  715. continue;
  716. }
  717. if (unlikely(msg != buf)) {
  718. begin = msg - buf;
  719. applog(LOG_WARNING, "%s %d: Reads out of sync, discarding %d bytes",
  720. cointerra->drv->name, cointerra->device_id, begin);
  721. inc_hw_errors_only(thr);
  722. offset -= begin;
  723. memmove(buf, msg, offset);
  724. if (offset < CTA_MSG_SIZE)
  725. break;
  726. }
  727. /* We have enough buffer for a full message, parse now */
  728. cta_parse_msg(thr, cointerra, info, msg);
  729. offset -= CTA_MSG_SIZE;
  730. if (offset > 0)
  731. memmove(buf, buf + CTA_MSG_SIZE, offset);
  732. }
  733. break;
  734. }
  735. }
  736. static
  737. bool cointerra_write_msg(struct lowl_usb_endpoint * const ep, const char * const repr, const uint8_t msgtype, const void * const msgbody)
  738. {
  739. uint8_t buf[COINTERRA_PACKET_SIZE], *p;
  740. memcpy(buf, cointerra_startseq, sizeof(cointerra_startseq));
  741. p = &buf[sizeof(cointerra_startseq)];
  742. pk_u8(p, 0, msgtype);
  743. memcpy(&p[1], msgbody, COINTERRA_MSGBODY_SIZE);
  744. if (usb_write(ep, buf, sizeof(buf)) != sizeof(buf))
  745. return false;
  746. return true;
  747. }
  748. static bool cta_send_msg(struct cgpu_info *cointerra, char *buf)
  749. {
  750. struct cointerra_info *info = cointerra->device_data;
  751. int amount;
  752. /* Serialise usb writes to prevent overlap in case multiple threads
  753. * send messages */
  754. mutex_lock(&info->sendlock);
  755. amount = usb_write(info->ep, buf, CTA_MSG_SIZE);
  756. mutex_unlock(&info->sendlock);
  757. if (unlikely(amount != CTA_MSG_SIZE)) {
  758. applog(LOG_ERR, "%s: Write error %s, wrote %d of %d",
  759. cointerra->dev_repr, bfg_strerror(errno, BST_ERRNO), amount, CTA_MSG_SIZE);
  760. return false;
  761. }
  762. return true;
  763. }
  764. static bool cta_prepare(struct thr_info *thr)
  765. {
  766. struct cgpu_info *cointerra = thr->cgpu;
  767. struct lowlevel_device_info * const llinfo = cointerra->device_data;
  768. struct cointerra_info *info = calloc(sizeof(struct cointerra_info), 1);
  769. char buf[CTA_MSG_SIZE];
  770. sleep(1);
  771. if (unlikely(!info))
  772. quit(1, "Failed to calloc info in cta_detect_one");
  773. for_each_managed_proc(proc, cointerra)
  774. proc->device_data = info;
  775. /* Nominally set a requested value when starting, preempting the need
  776. * for a req-work message. */
  777. info->requested = CTA_MAX_QUEUE;
  778. cointerra_set_queue_full(cointerra, false);
  779. cgpu_set_defaults(cointerra);
  780. bool open_rv = cointerra_open(llinfo, cointerra->dev_repr, &info->usbh, &info->ep, info);
  781. lowlevel_devinfo_free(llinfo);
  782. if (!open_rv)
  783. return false;
  784. info->thr = thr;
  785. mutex_init(&info->lock);
  786. mutex_init(&info->sendlock);
  787. notifier_init(info->reset_notifier);
  788. /* Request a single status setting message */
  789. cta_gen_message(buf, CTA_SEND_REQUEST);
  790. msg_from_hu16(buf, CTA_REQ_MSGTYPE, CTA_RECV_STATSET);
  791. msg_from_hu16(buf, CTA_REQ_INTERVAL, 0);
  792. if (!cta_send_msg(cointerra, buf))
  793. return false;
  794. /* Request status debug messages every 60 seconds */
  795. cta_gen_message(buf, CTA_SEND_REQUEST);
  796. msg_from_hu16(buf, CTA_REQ_MSGTYPE, CTA_RECV_STATDEBUG);
  797. msg_from_hu16(buf, CTA_REQ_INTERVAL, 6000);
  798. if (!cta_send_msg(cointerra, buf))
  799. return false;
  800. cgtime(&info->core_hash_start);
  801. usb_ep_set_timeouts_ms(info->ep, COINTERRA_USB_TIMEOUT, COINTERRA_USB_TIMEOUT);
  802. timer_set_now(&thr->tv_poll);
  803. return true;
  804. }
  805. static void cta_send_reset(struct cgpu_info *cointerra, struct cointerra_info *info,
  806. uint8_t reset_type, uint8_t diffbits);
  807. static void cta_flush_work(struct cgpu_info *cointerra);
  808. static
  809. bool cointerra_queue_append(struct thr_info * const thr, struct work * const work)
  810. {
  811. struct cgpu_info * const dev = thr->cgpu->device;
  812. // struct thr_info * const master_thr = dev->thr[0];
  813. struct cointerra_info * const devstate = dev->device_data;
  814. struct timeval tv_now, tv_latest;
  815. uint8_t buf[COINTERRA_MSGBODY_SIZE] = {0};
  816. uint16_t ntimeroll, zerobits;
  817. if (unlikely(!devstate->requested))
  818. {
  819. applog(LOG_DEBUG, "%s: Attempt to queue work while none requested; rejecting", dev->dev_repr);
  820. cointerra_set_queue_full(dev, true);
  821. return false;
  822. }
  823. timer_set_now(&tv_now);
  824. timer_set_delay(&tv_latest, &tv_now, cointerra_latest_result_usecs);
  825. ntimeroll = max(0, work_ntime_range(work, &tv_now, &tv_latest, cointerra_desired_roll));
  826. if (unlikely(!devstate->work_id))
  827. ++devstate->work_id;
  828. work->device_id = devstate->work_id;
  829. pk_u16be(buf, 0, work->device_id);
  830. work->subid = htobe16(work->device_id);
  831. swap32yes(&buf[ 6], work->midstate , 0x20 / 4);
  832. swap32yes(&buf[0x26], &work->data[0x40], 0xc / 4);
  833. pk_u16le(buf, 50, ntimeroll);
  834. // Use the real share difficulty up to cointerra_max_nonce_diff
  835. if (work->work_difficulty >= cointerra_max_nonce_diff)
  836. work->nonce_diff = cointerra_max_nonce_diff;
  837. else
  838. work->nonce_diff = work->work_difficulty;
  839. zerobits = log2(floor(work->nonce_diff));
  840. work->nonce_diff = pow(2, zerobits);
  841. zerobits += 0x20;
  842. pk_u16le(buf, 52, zerobits);
  843. if (!cointerra_write_msg(devstate->ep, cointerra_drv.dname, CMTO_WORK, buf))
  844. return false;
  845. // HASH_ADD_INT(master_thr->work, device_id, work);
  846. {
  847. ++dev->queued_count;
  848. timer_set_now(&work->tv_work_start);
  849. HASH_ADD_INT(dev->queued_work, id, work);
  850. }
  851. ++devstate->work_id;
  852. if (!--devstate->requested)
  853. {
  854. applog(LOG_DEBUG, "%s: Sent all requested works, queue full", dev->dev_repr);
  855. cointerra_set_queue_full(dev, true);
  856. }
  857. return true;
  858. }
  859. static
  860. void cointerra_queue_flush(struct thr_info * const thr)
  861. {
  862. }
  863. static void cta_send_reset(struct cgpu_info *cointerra, struct cointerra_info *info,
  864. uint8_t reset_type, uint8_t diffbits)
  865. {
  866. char buf[CTA_MSG_SIZE];
  867. int ret, retries = 0;
  868. /* Clear any accumulated messages in case we've gotten out of sync. */
  869. notifier_reset(info->reset_notifier);
  870. resend:
  871. cta_gen_message(buf, CTA_SEND_RESET);
  872. buf[CTA_RESET_TYPE] = reset_type;
  873. buf[CTA_RESET_LOAD] = info->set_load ?: 255;
  874. buf[CTA_RESET_PSLOAD] = 0;
  875. applog(LOG_INFO, "%s %d: Sending Reset type %u with diffbits %u", cointerra->drv->name,
  876. cointerra->device_id, reset_type, diffbits);
  877. cta_send_msg(cointerra, buf);
  878. /* Wait for read thread to parse a reset message and signal us we may
  879. * return to submitting other messages. Use a timeout in case we have
  880. * a problem and the reset done message never returns. */
  881. if (reset_type == CTA_RESET_NEW) {
  882. ret = notifier_wait_us(info->reset_notifier, CTA_RESET_TIMEOUT * 1000);
  883. if (ret) {
  884. if (++retries < 3) {
  885. applog(LOG_INFO, "%s %d: Timed out waiting for reset done msg, retrying",
  886. cointerra->drv->name, cointerra->device_id);
  887. goto resend;
  888. }
  889. applog(LOG_WARNING, "%s %d: Timed out waiting for reset done msg",
  890. cointerra->drv->name, cointerra->device_id);
  891. }
  892. /* Good place to flush any work we have */
  893. flush_queue(cointerra);
  894. }
  895. }
  896. static void cta_update_work(struct cgpu_info *);
  897. static void cta_flush_work(struct cgpu_info *cointerra)
  898. {
  899. struct cointerra_info *info = cointerra->device_data;
  900. if (1)
  901. cta_update_work(cointerra);
  902. else
  903. {
  904. applog(LOG_INFO, "%s %d: cta_flush_work %d", cointerra->drv->name, cointerra->device_id,
  905. __LINE__);
  906. cta_send_reset(cointerra, info, CTA_RESET_NEW, 0);
  907. }
  908. info->thr->work_restart = false;
  909. }
  910. static void cta_update_work(struct cgpu_info *cointerra)
  911. {
  912. struct cointerra_info *info = cointerra->device_data;
  913. applog(LOG_INFO, "%s %d: Update work", cointerra->drv->name, cointerra->device_id);
  914. cta_send_reset(cointerra, info, CTA_RESET_UPDATE, 0);
  915. }
  916. static void cta_zero_corehashes(struct cointerra_info *info)
  917. {
  918. int i;
  919. for (i = 0; i < CTA_CORES; i++)
  920. info->tot_core_hashes[i] = 0;
  921. cgtime(&info->core_hash_start);
  922. }
  923. /* Send per core hashrate calculations at regular intervals ~every 5 minutes */
  924. static void cta_send_corehashes(struct cgpu_info *cointerra, struct cointerra_info *info,
  925. double corehash_time)
  926. {
  927. uint16_t core_ghs[CTA_CORES];
  928. double k[CTA_CORES];
  929. char buf[CTA_MSG_SIZE];
  930. int i, offset;
  931. for (i = 0; i < CTA_CORES; i++) {
  932. k[i] = (double)info->tot_core_hashes[i] / ((double)32 * (double)0x100000000ull);
  933. k[i] = sqrt(k[i]) + 1;
  934. k[i] *= k[i];
  935. k[i] = k[i] * 32 * ((double)0x100000000ull / (double)1000000000) / corehash_time;
  936. core_ghs[i] = k[i];
  937. }
  938. cta_gen_message(buf, CTA_SEND_COREHASHRATE);
  939. offset = CTA_CORE_HASHRATES;
  940. for (i = 0; i < CTA_CORES; i++) {
  941. msg_from_hu16(buf, offset, core_ghs[i]);
  942. offset += 2; // uint16_t
  943. }
  944. cta_send_msg(cointerra, buf);
  945. }
  946. static void cta_scanwork(struct thr_info *thr)
  947. {
  948. struct cgpu_info *cointerra = thr->cgpu;
  949. struct cointerra_info *info = cointerra->device_data;
  950. double corehash_time;
  951. struct timeval now;
  952. cgtime(&now);
  953. if (unlikely(thr->work_restart)) {
  954. applog(LOG_INFO, "%s %d: Flush work line %d",
  955. cointerra->drv->name, cointerra->device_id,__LINE__);
  956. cta_flush_work(cointerra);
  957. } else {
  958. time_t now_t;
  959. int i;
  960. /* Discard work that was started more than 5 minutes ago as
  961. * a safety precaution backup in case the hardware failed to
  962. * return a work done message for some work items. */
  963. age_queued_work(cointerra, 300.0);
  964. /* Each core should be 1.7MH so at max diff of 32 should
  965. * average a share every ~80 seconds.Use this opportunity to
  966. * unset the bits in any pipes that have not returned a valid
  967. * nonce for over 30 full nonce ranges or 2400s. */
  968. now_t = time(NULL);
  969. for (i = 0; i < 1024; i++) {
  970. if (unlikely(now_t > info->last_pipe_nonce[i] + 2400)) {
  971. int bitchar = i / 8, bitbit = i % 8;
  972. info->pipe_bitmap[bitchar] &= ~(0x80 >> bitbit);
  973. }
  974. }
  975. /* Sleep for up to 0.5 seconds, waking if we need work or
  976. * have received a restart message. */
  977. cta_recv_thread(thr);
  978. if (thr->work_restart) {
  979. applog(LOG_INFO, "%s %d: Flush work line %d",
  980. cointerra->drv->name, cointerra->device_id,__LINE__);
  981. cta_flush_work(cointerra);
  982. }
  983. }
  984. corehash_time = tdiff(&now, &info->core_hash_start);
  985. if (corehash_time > 300) {
  986. cta_send_corehashes(cointerra, info, corehash_time);
  987. cta_zero_corehashes(info);
  988. }
  989. mutex_lock(&info->lock);
  990. info->tot_share_hashes += info->share_hashes;
  991. info->tot_calc_hashes += info->hashes;
  992. info->hashes = info->share_hashes = 0;
  993. mutex_unlock(&info->lock);
  994. }
  995. static void cta_shutdown(struct thr_info *thr)
  996. {
  997. struct cgpu_info *cointerra = thr->cgpu;
  998. cta_close(cointerra);
  999. }
  1000. static void cta_zero_stats(struct cgpu_info *cointerra)
  1001. {
  1002. struct cointerra_info *info = cointerra->device_data;
  1003. info->tot_calc_hashes = 0;
  1004. info->tot_reset_hashes = info->tot_hashes;
  1005. info->tot_share_hashes = 0;
  1006. cta_zero_corehashes(info);
  1007. }
  1008. static int bits_set(char v)
  1009. {
  1010. int c;
  1011. for (c = 0; v; c++)
  1012. v &= v - 1;
  1013. return c;
  1014. }
  1015. static struct api_data *cta_api_stats(struct cgpu_info *cgpu)
  1016. {
  1017. struct api_data *root = NULL;
  1018. struct cointerra_info *info = cgpu->device_data;
  1019. double dev_runtime = cgpu_runtime(cgpu);
  1020. int i, asic, core, coreno = 0;
  1021. struct timeval now;
  1022. char bitmaphex[36];
  1023. uint64_t ghs, val;
  1024. char buf[64];
  1025. asic = cgpu->proc_id / 480;
  1026. int coreabs = cgpu->proc_id / 120;
  1027. core = coreabs % 4;
  1028. /* Info data */
  1029. root = api_add_uint16(root, "HW Revision", &info->hwrev, false);
  1030. root = api_add_uint32(root, "Serial", &info->serial, false);
  1031. root = api_add_uint8(root, "Asics", &info->asics, false);
  1032. root = api_add_uint8(root, "Dies", &info->dies, false);
  1033. root = api_add_uint16(root, "Cores", &info->cores, false);
  1034. root = api_add_uint8(root, "Board number", &info->board_number, false);
  1035. sprintf(buf, "%u.%u.%u", info->fwrev[0], info->fwrev[1], info->fwrev[2]);
  1036. root = api_add_string(root, "FW Revision", buf, true);
  1037. sprintf(buf, "%04u-%02u-%02u", info->fw_year, info->fw_month, info->fw_day);
  1038. root = api_add_string(root, "FW Date", buf, true);
  1039. root = api_add_uint8(root, "Init diffbits", &info->init_diffbits, false);
  1040. root = api_add_uint8(root, "Min diffbits", &info->min_diffbits, false);
  1041. root = api_add_uint8(root, "Max diffbits", &info->max_diffbits, false);
  1042. /* Status readings */
  1043. {
  1044. i = coreabs;
  1045. sprintf(buf, "CoreTemp%d", i);
  1046. root = api_add_int16(root, buf, &info->coretemp[i], false);
  1047. }
  1048. root = api_add_int16(root, "Ambient Low", &info->ambtemp_low, false);
  1049. root = api_add_int16(root, "Ambient Avg", &info->ambtemp_avg, false);
  1050. root = api_add_int16(root, "Ambient High", &info->ambtemp_high, false);
  1051. for (i = 0; i < CTA_PUMPS; i++) {
  1052. sprintf(buf, "PumpRPM%d", i);
  1053. root = api_add_uint16(root, buf, &info->pump_tachs[i], false);
  1054. }
  1055. for (i = 0; i < CTA_FANS; i++) {
  1056. sprintf(buf, "FanRPM%d", i);
  1057. root = api_add_uint16(root, buf, &info->fan_tachs[i], false);
  1058. }
  1059. {
  1060. i = coreabs;
  1061. sprintf(buf, "CoreFreqs%d", i);
  1062. root = api_add_uint16(root, buf, &info->corefreqs[i], false);
  1063. }
  1064. {
  1065. i = coreabs;
  1066. sprintf(buf, "CoreVolts%d", i);
  1067. root = api_add_uint16(root, buf, &info->corevolts[i], false);
  1068. }
  1069. root = api_add_uint16(root, "Volts3.3", &info->volts33, false);
  1070. root = api_add_uint16(root, "Volts12", &info->volts12, false);
  1071. root = api_add_uint16(root, "Inactive", &info->inactive, false);
  1072. root = api_add_uint16(root, "Active", &info->active, false);
  1073. /* Status settings */
  1074. {
  1075. i = coreabs;
  1076. sprintf(buf, "CorePerfMode%d", i);
  1077. root = api_add_uint8(root, buf, &info->coreperf[i], false);
  1078. }
  1079. for (i = 0; i < CTA_FANS; i++) {
  1080. sprintf(buf, "FanSpeed%d", i);
  1081. root = api_add_uint8(root, buf, &info->fanspeed[i], false);
  1082. }
  1083. root = api_add_uint8(root, "DiesActive", &info->dies_active, false);
  1084. {
  1085. i = coreabs;
  1086. sprintf(buf, "PipesEnabled%d", i);
  1087. root = api_add_uint8(root, buf, &info->pipes_enabled[i], false);
  1088. }
  1089. /* Status debug */
  1090. root = api_add_int(root, "Underruns", &info->tot_underruns, false);
  1091. {
  1092. i = coreabs;
  1093. sprintf(buf, "HWErrors%d", i);
  1094. root = api_add_uint16(root, buf, &info->tot_hw_errors[i], false);
  1095. }
  1096. ghs = info->tot_calc_hashes / dev_runtime;
  1097. root = api_add_uint64(root, "Calc hashrate", &ghs, true);
  1098. ghs = (info->tot_hashes - info->tot_reset_hashes) / dev_runtime;
  1099. root = api_add_uint64(root, "Hashrate", &ghs, true);
  1100. ghs = info->tot_share_hashes / dev_runtime;
  1101. root = api_add_uint64(root, "Share hashrate", &ghs, true);
  1102. root = api_add_uint64(root, "Total calc hashes", &info->tot_calc_hashes, false);
  1103. ghs = info->tot_hashes - info->tot_reset_hashes;
  1104. root = api_add_uint64(root, "Total hashes", &ghs, true);
  1105. root = api_add_uint64(root, "Total raw hashes", &info->tot_hashes, false);
  1106. root = api_add_uint64(root, "Total share hashes", &info->tot_share_hashes, false);
  1107. root = api_add_uint64(root, "Total flushed hashes", &info->tot_flushed_hashes, false);
  1108. val = cgpu->diff_accepted * 0x100000000ull;
  1109. root = api_add_uint64(root, "Accepted hashes", &val, true);
  1110. ghs = val / dev_runtime;
  1111. root = api_add_uint64(root, "Accepted hashrate", &ghs, true);
  1112. val = cgpu->diff_rejected * 0x100000000ull;
  1113. root = api_add_uint64(root, "Rejected hashes", &val, true);
  1114. ghs = val / dev_runtime;
  1115. root = api_add_uint64(root, "Rejected hashrate", &ghs, true);
  1116. cgtime(&now);
  1117. dev_runtime = tdiff(&now, &info->core_hash_start);
  1118. if (dev_runtime < 1)
  1119. dev_runtime = 1;
  1120. {
  1121. i = coreabs;
  1122. sprintf(buf, "Core%d hashrate", i);
  1123. ghs = info->tot_core_hashes[i] / dev_runtime;
  1124. root = api_add_uint64(root, buf, &ghs, true);
  1125. }
  1126. root = api_add_uint32(root, "Uptime",&info->uptime,false);
  1127. {
  1128. char bitmapcount[40], asiccore[12];
  1129. int count = 0;
  1130. sprintf(asiccore, "Asic%dCore%d", asic, core);
  1131. bin2hex(bitmaphex, &info->pipe_bitmap[coreno], 16);
  1132. for (i = coreno; i < coreno + 16; i++)
  1133. count += bits_set(info->pipe_bitmap[i]);
  1134. snprintf(bitmapcount, 40, "%d:%s", count, bitmaphex);
  1135. root = api_add_string(root, asiccore, bitmapcount, true);
  1136. coreno += 16;
  1137. }
  1138. root = api_add_uint8(root, "AV", &info->autovoltage, false);
  1139. root = api_add_uint8(root, "Power Supply Percent", &info->current_ps_percent, false);
  1140. root = api_add_uint16(root, "Power Used", &info->power_used, false);
  1141. root = api_add_uint16(root, "IOUT", &info->power_used, false);
  1142. root = api_add_uint16(root, "VOUT", &info->power_voltage, false);
  1143. root = api_add_uint16(root, "IIN", &info->ipower_used, false);
  1144. root = api_add_uint16(root, "VIN", &info->ipower_voltage, false);
  1145. root = api_add_uint16(root, "PSTemp1", &info->power_temps[0], false);
  1146. root = api_add_uint16(root, "PSTemp2", &info->power_temps[1], false);
  1147. return root;
  1148. }
  1149. static
  1150. const char *cointerra_set_load(struct cgpu_info *proc, const char *optname, const char *newvalue, char *replybuf, enum bfg_set_device_replytype *out_success)
  1151. {
  1152. struct cointerra_info * const devstate = proc->device_data;
  1153. const int nv = atoi(newvalue);
  1154. if (nv <= 0 || nv > 0xff)
  1155. return "Invalid power stepping value";
  1156. devstate->set_load = nv;
  1157. return NULL;
  1158. }
  1159. static const struct bfg_set_device_definition cointerra_set_device_funcs[] = {
  1160. {"load", cointerra_set_load, "power stepping (1-255)"},
  1161. {NULL},
  1162. };
  1163. struct device_drv cointerra_drv = {
  1164. .dname = "cointerra",
  1165. .name = "CTA",
  1166. .drv_min_nonce_diff = cointerra_min_nonce_diff,
  1167. .lowl_match = cointerra_lowl_match,
  1168. .lowl_probe = cointerra_lowl_probe,
  1169. .thread_init = cta_prepare,
  1170. .minerloop = minerloop_queue,
  1171. .queue_append = cointerra_queue_append,
  1172. .queue_flush = cointerra_queue_flush,
  1173. // TODO .update_work = cta_update_work,
  1174. .poll = cta_scanwork,
  1175. .get_api_stats = cta_api_stats,
  1176. .thread_shutdown = cta_shutdown,
  1177. .zero_stats = cta_zero_stats,
  1178. };