libbitfury.c 21 KB

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  1. /*
  2. * Copyright 2013 bitfury
  3. * Copyright 2013 legkodymov
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a copy
  6. * of this software and associated documentation files (the "Software"), to deal
  7. * in the Software without restriction, including without limitation the rights
  8. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  9. * copies of the Software, and to permit persons to whom the Software is
  10. * furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice shall be included in
  13. * all copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  18. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  21. * THE SOFTWARE.
  22. */
  23. #include "config.h"
  24. #include <stdio.h>
  25. #include <unistd.h>
  26. #include <string.h>
  27. #include "miner.h"
  28. #include "tm_i2c.h"
  29. #include "libbitfury.h"
  30. #include "spidevc.h"
  31. #include "sha2.h"
  32. #include <time.h>
  33. #define BITFURY_REFRESH_DELAY 100
  34. #define BITFURY_DETECT_TRIES 3000 / BITFURY_REFRESH_DELAY
  35. // 0 .... 31 bit
  36. // 1000 0011 0101 0110 1001 1010 1100 0111
  37. // 1100 0001 0110 1010 0101 1001 1110 0011
  38. // C16A59E3
  39. unsigned char enaconf[4] = { 0xc1, 0x6a, 0x59, 0xe3 };
  40. unsigned char disconf[4] = { 0, 0, 0, 0 };
  41. unsigned decnonce(unsigned in);
  42. /* Configuration registers - control oscillators and such stuff. PROGRAMMED when magic number is matches, UNPROGRAMMED (default) otherwise */
  43. void config_reg(int cfgreg, int ena)
  44. {
  45. if (ena) spi_emit_data(0x7000+cfgreg*32, (void*)enaconf, 4);
  46. else spi_emit_data(0x7000+cfgreg*32, (void*)disconf, 4);
  47. }
  48. #define FIRST_BASE 61
  49. #define SECOND_BASE 4
  50. char counters[16] = { 64, 64,
  51. SECOND_BASE, SECOND_BASE+4, SECOND_BASE+2, SECOND_BASE+2+16, SECOND_BASE, SECOND_BASE+1,
  52. (FIRST_BASE)%65, (FIRST_BASE+1)%65, (FIRST_BASE+3)%65, (FIRST_BASE+3+16)%65, (FIRST_BASE+4)%65, (FIRST_BASE+4+4)%65, (FIRST_BASE+3+3)%65, (FIRST_BASE+3+1+3)%65};
  53. //char counters[16] = { 64, 64,
  54. // SECOND_BASE, SECOND_BASE+4, SECOND_BASE+2, SECOND_BASE+2+16, SECOND_BASE, SECOND_BASE+1,
  55. // (FIRST_BASE)%65, (FIRST_BASE+1)%65, (FIRST_BASE+3)%65, (FIRST_BASE+3+16)%65, (FIRST_BASE+4)%65, (FIRST_BASE+4+4)%65, (FIRST_BASE+3+3)%65, (FIRST_BASE+3+1+3)%65};
  56. char *buf = "Hello, World!\x55\xaa";
  57. char outbuf[16];
  58. /* Oscillator setup variants (maybe more), values inside of chip ANDed to not allow by programming errors work it at higher speeds */
  59. /* WARNING! no chip temperature control limits, etc. It may self-fry and make fried chips with great ease :-) So if trying to overclock */
  60. /* Do not place chip near flammable objects, provide adequate power protection and better wear eye protection ! */
  61. /* Thermal runaway in this case could produce nice flames of chippy fries */
  62. // Thermometer code from left to right - more ones ==> faster clock!
  63. /* Test vectors to calculate (using address-translated loads) */
  64. unsigned atrvec[] = {
  65. 0xb0e72d8e, 0x1dc5b862, 0xe9e7c4a6, 0x3050f1f5, 0x8a1a6b7e, 0x7ec384e8, 0x42c1c3fc, 0x8ed158a1, /* MIDSTATE */
  66. 0,0,0,0,0,0,0,0,
  67. 0x8a0bb7b7, 0x33af304f, 0x0b290c1a, 0xf0c4e61f, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  68. 0x9c4dfdc0, 0xf055c9e1, 0xe60f079d, 0xeeada6da, 0xd459883d, 0xd8049a9d, 0xd49f9a96, 0x15972fed, /* MIDSTATE */
  69. 0,0,0,0,0,0,0,0,
  70. 0x048b2528, 0x7acb2d4f, 0x0b290c1a, 0xbe00084a, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  71. 0x0317b3ea, 0x1d227d06, 0x3cca281e, 0xa6d0b9da, 0x1a359fe2, 0xa7287e27, 0x8b79c296, 0xc4d88274, /* MIDSTATE */
  72. 0,0,0,0,0,0,0,0,
  73. 0x328bcd4f, 0x75462d4f, 0x0b290c1a, 0x002c6dbc, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  74. 0xac4e38b6, 0xba0e3b3b, 0x649ad6f8, 0xf72e4c02, 0x93be06fb, 0x366d1126, 0xf4aae554, 0x4ff19c5b, /* MIDSTATE */
  75. 0,0,0,0,0,0,0,0,
  76. 0x72698140, 0x3bd62b4f, 0x3fd40c1a, 0x801e43e9, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  77. 0x9dbf91c9, 0x12e5066c, 0xf4184b87, 0x8060bc4d, 0x18f9c115, 0xf589d551, 0x0f7f18ae, 0x885aca59, /* MIDSTATE */
  78. 0,0,0,0,0,0,0,0,
  79. 0x6f3806c3, 0x41f82a4f, 0x3fd40c1a, 0x00334b39, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  80. };
  81. #define rotrFixed(x,y) (((x) >> (y)) | ((x) << (32-(y))))
  82. #define s0(x) (rotrFixed(x,7)^rotrFixed(x,18)^(x>>3))
  83. #define s1(x) (rotrFixed(x,17)^rotrFixed(x,19)^(x>>10))
  84. #define Ch(x,y,z) (z^(x&(y^z)))
  85. #define Maj(x,y,z) (y^((x^y)&(y^z)))
  86. #define S0(x) (rotrFixed(x,2)^rotrFixed(x,13)^rotrFixed(x,22))
  87. #define S1(x) (rotrFixed(x,6)^rotrFixed(x,11)^rotrFixed(x,25))
  88. /* SHA256 CONSTANTS */
  89. static const unsigned SHA_K[64] = {
  90. 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
  91. 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
  92. 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
  93. 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
  94. 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
  95. 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
  96. 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
  97. 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
  98. };
  99. void t_print(struct timespec d_time) {
  100. printf(" %ds %.2fms\n", (int)d_time.tv_sec, (double)d_time.tv_nsec / 1000000.0);
  101. }
  102. struct timespec t_add(struct timespec time1, struct timespec time2) {
  103. struct timespec result ;
  104. result.tv_sec = time1.tv_sec + time2.tv_sec ;
  105. result.tv_nsec = time1.tv_nsec + time2.tv_nsec ;
  106. if (result.tv_nsec >= 1000000000L) {
  107. result.tv_sec++ ; result.tv_nsec = result.tv_nsec - 1000000000L ;
  108. }
  109. return (result) ;
  110. }
  111. struct timespec t_diff(struct timespec start, struct timespec end)
  112. {
  113. struct timespec temp;
  114. if (end.tv_nsec < start.tv_nsec) {
  115. temp.tv_sec = end.tv_sec-start.tv_sec-1;
  116. temp.tv_nsec = 1000000000LU;
  117. temp.tv_nsec -= start.tv_nsec;
  118. temp.tv_nsec += end.tv_nsec;
  119. } else {
  120. temp.tv_sec = end.tv_sec-start.tv_sec;
  121. temp.tv_nsec = end.tv_nsec-start.tv_nsec;
  122. }
  123. return temp;
  124. }
  125. void ms3_compute(unsigned *p)
  126. {
  127. unsigned a,b,c,d,e,f,g,h, ne, na, i;
  128. a = p[0]; b = p[1]; c = p[2]; d = p[3]; e = p[4]; f = p[5]; g = p[6]; h = p[7];
  129. for (i = 0; i < 3; i++) {
  130. ne = p[i+16] + SHA_K[i] + h + Ch(e,f,g) + S1(e) + d;
  131. na = p[i+16] + SHA_K[i] + h + Ch(e,f,g) + S1(e) + S0(a) + Maj(a,b,c);
  132. d = c; c = b; b = a; a = na;
  133. h = g; g = f; f = e; e = ne;
  134. }
  135. p[15] = a; p[14] = b; p[13] = c; p[12] = d; p[11] = e; p[10] = f; p[9] = g; p[8] = h;
  136. }
  137. void send_conf() {
  138. config_reg(7,0); config_reg(8,0); config_reg(9,0); config_reg(10,0); config_reg(11,0);
  139. config_reg(6,0); /* disable OUTSLK */
  140. config_reg(4,1); /* Enable slow oscillator */
  141. config_reg(1,0); config_reg(2,0); config_reg(3,0);
  142. spi_emit_data(0x0100, (void*)counters, 16); /* Program counters correctly for rounds processing, here baby should start consuming power */
  143. }
  144. void send_init() {
  145. /* Prepare internal buffers */
  146. /* PREPARE BUFFERS (INITIAL PROGRAMMING) */
  147. unsigned w[16];
  148. unsigned atrvec[] = {
  149. 0xb0e72d8e, 0x1dc5b862, 0xe9e7c4a6, 0x3050f1f5, 0x8a1a6b7e, 0x7ec384e8, 0x42c1c3fc, 0x8ed158a1, /* MIDSTATE */
  150. 0,0,0,0,0,0,0,0,
  151. 0x8a0bb7b7, 0x33af304f, 0x0b290c1a, 0xf0c4e61f, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  152. };
  153. ms3_compute(&atrvec[0]);
  154. memset(&w, 0, sizeof(w)); w[3] = 0xffffffff; w[4] = 0x80000000; w[15] = 0x00000280;
  155. spi_emit_data(0x1000, (void*)w, 16*4);
  156. spi_emit_data(0x1400, (void*)w, 8*4);
  157. memset(w, 0, sizeof(w)); w[0] = 0x80000000; w[7] = 0x100;
  158. spi_emit_data(0x1900, (void*)&w[0],8*4); /* Prepare MS and W buffers! */
  159. spi_emit_data(0x3000, (void*)&atrvec[0], 19*4);
  160. }
  161. void set_freq(int bits) {
  162. uint64_t freq;
  163. unsigned char *osc6;
  164. osc6 = (unsigned char *)&freq;
  165. freq = (1ULL << bits) - 1ULL;
  166. spi_emit_data(0x6000, (void*)osc6, 8); /* Program internal on-die slow oscillator frequency */
  167. config_reg(4,1); /* Enable slow oscillator */
  168. }
  169. void send_reinit(int slot, int chip_n, int n) {
  170. spi_clear_buf();
  171. spi_emit_break();
  172. spi_emit_fasync(chip_n);
  173. set_freq(n);
  174. send_conf();
  175. send_init();
  176. tm_i2c_set_oe(slot);
  177. spi_txrx(spi_gettxbuf(), spi_getrxbuf(), spi_getbufsz());
  178. tm_i2c_clear_oe(slot);
  179. }
  180. void send_shutdown(int slot, int chip_n) {
  181. spi_clear_buf();
  182. spi_emit_break();
  183. spi_emit_fasync(chip_n);
  184. config_reg(4,0); /* Disable slow oscillator */
  185. tm_i2c_set_oe(slot);
  186. spi_txrx(spi_gettxbuf(), spi_getrxbuf(), spi_getbufsz());
  187. tm_i2c_clear_oe(slot);
  188. }
  189. void send_freq(int slot, int chip_n, int bits) {
  190. spi_clear_buf();
  191. spi_emit_break();
  192. spi_emit_fasync(chip_n);
  193. set_freq(bits);
  194. tm_i2c_set_oe(slot);
  195. spi_txrx(spi_gettxbuf(), spi_getrxbuf(), spi_getbufsz());
  196. tm_i2c_clear_oe(slot);
  197. }
  198. unsigned int c_diff(unsigned ocounter, unsigned counter) {
  199. return counter > ocounter ? counter - ocounter : (0x003FFFFF - ocounter) + counter;
  200. }
  201. int get_counter(unsigned int *newbuf, unsigned int *oldbuf) {
  202. int j;
  203. for(j = 0; j < 16; j++) {
  204. if (newbuf[j] != oldbuf[j]) {
  205. unsigned counter = decnonce(newbuf[j]);
  206. if ((counter & 0xFFC00000) == 0xdf800000) {
  207. counter -= 0xdf800000;
  208. return counter;
  209. }
  210. }
  211. }
  212. return 0;
  213. }
  214. int detect_chip(int chip_n) {
  215. int i;
  216. unsigned newbuf[17], oldbuf[17];
  217. unsigned ocounter;
  218. int odiff;
  219. struct timespec t1;
  220. memset(newbuf, 0, 17 * 4);
  221. memset(oldbuf, 0, 17 * 4);
  222. ms3_compute(&atrvec[0]);
  223. ms3_compute(&atrvec[20]);
  224. ms3_compute(&atrvec[40]);
  225. if (!spi_init())
  226. return 0;
  227. spi_clear_buf();
  228. spi_emit_break(); /* First we want to break chain! Otherwise we'll get all of traffic bounced to output */
  229. spi_emit_fasync(chip_n);
  230. set_freq(52); //54 - 3F, 53 - 1F
  231. send_conf();
  232. send_init();
  233. spi_txrx(spi_gettxbuf(), spi_getrxbuf(), spi_getbufsz());
  234. ocounter = 0;
  235. for (i = 0; i < BITFURY_DETECT_TRIES; i++) {
  236. int counter;
  237. spi_clear_buf();
  238. spi_emit_break();
  239. spi_emit_fasync(chip_n);
  240. spi_emit_data(0x3000, (void*)&atrvec[0], 19*4);
  241. spi_txrx(spi_gettxbuf(), spi_getrxbuf(), spi_getbufsz());
  242. memcpy(newbuf, spi_getrxbuf() + 4 + chip_n, 17*4);
  243. clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &t1);
  244. counter = get_counter(newbuf, oldbuf);
  245. if (ocounter) {
  246. unsigned int cdiff = c_diff(ocounter, counter);
  247. if (cdiff > 5000 && cdiff < 100000 && odiff > 5000 && odiff < 100000)
  248. return 1;
  249. odiff = cdiff;
  250. }
  251. ocounter = counter;
  252. if (newbuf[16] != 0 && newbuf[16] != 0xFFFFFFFF) {
  253. return 0;
  254. }
  255. cgsleep_ms(BITFURY_REFRESH_DELAY / 10);
  256. memcpy(oldbuf, newbuf, 17 * 4);
  257. }
  258. return 0;
  259. }
  260. int libbitfury_detectChips(struct bitfury_device *devices) {
  261. int n = 0;
  262. int i;
  263. static bool slot_on[32];
  264. struct timespec t1, t2;
  265. if (tm_i2c_init() < 0) {
  266. printf("I2C init error\n");
  267. return(1);
  268. }
  269. clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &t1);
  270. for (i = 0; i < 32; i++) {
  271. int slot_detected = tm_i2c_detect(i) != -1;
  272. slot_on[i] = slot_detected;
  273. tm_i2c_clear_oe(i);
  274. cgsleep_ms(1);
  275. }
  276. for (i = 0; i < 32; i++) {
  277. if (slot_on[i]) {
  278. int chip_n = 0;
  279. int chip_detected;
  280. tm_i2c_set_oe(i);
  281. do {
  282. chip_detected = detect_chip(chip_n);
  283. if (chip_detected) {
  284. applog(LOG_WARNING, "BITFURY slot: %d, chip #%d detected", i, n);
  285. devices[n].slot = i;
  286. devices[n].fasync = chip_n;
  287. n++;
  288. chip_n++;
  289. }
  290. } while (chip_detected);
  291. tm_i2c_clear_oe(i);
  292. }
  293. }
  294. clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &t2);
  295. return n; //!!!
  296. //return 1;
  297. }
  298. void libbitfury_shutdownChips(struct bitfury_device *devices, int chip_n) {
  299. int i;
  300. for (i = 0; i < chip_n; i++) {
  301. send_shutdown(devices[i].slot, devices[i].fasync);
  302. }
  303. tm_i2c_close();
  304. }
  305. unsigned decnonce(unsigned in)
  306. {
  307. unsigned out;
  308. /* First part load */
  309. out = (in & 0xFF) << 24; in >>= 8;
  310. /* Byte reversal */
  311. in = (((in & 0xaaaaaaaa) >> 1) | ((in & 0x55555555) << 1));
  312. in = (((in & 0xcccccccc) >> 2) | ((in & 0x33333333) << 2));
  313. in = (((in & 0xf0f0f0f0) >> 4) | ((in & 0x0f0f0f0f) << 4));
  314. out |= (in >> 2)&0x3FFFFF;
  315. /* Extraction */
  316. if (in & 1) out |= (1 << 23);
  317. if (in & 2) out |= (1 << 22);
  318. out -= 0x800004;
  319. return out;
  320. }
  321. int rehash(unsigned char *midstate, unsigned m7,
  322. unsigned ntime, unsigned nbits, unsigned nnonce) {
  323. unsigned char in[16];
  324. unsigned int *in32 = (unsigned int *)in;
  325. unsigned int *mid32 = (unsigned int *)midstate;
  326. unsigned out32[8];
  327. unsigned char *out = (unsigned char *) out32;
  328. #ifdef BITFURY_REHASH_DEBUG
  329. static unsigned history[512];
  330. static unsigned history_p;
  331. #endif
  332. sha256_ctx ctx;
  333. memset( &ctx, 0, sizeof( sha256_ctx ) );
  334. memcpy(ctx.h, mid32, 8*4);
  335. ctx.tot_len = 64;
  336. ctx.len = 0;
  337. nnonce = bswap_32(nnonce);
  338. in32[0] = bswap_32(m7);
  339. in32[1] = bswap_32(ntime);
  340. in32[2] = bswap_32(nbits);
  341. in32[3] = nnonce;
  342. sha256_update(&ctx, in, 16);
  343. sha256_final(&ctx, out);
  344. sha256(out, 32, out);
  345. if (out32[7] == 0) {
  346. #ifdef BITFURY_REHASH_DEBUG
  347. char hex[65];
  348. bin2hex(hex, out, 32);
  349. applog(LOG_INFO, "! MS0: %08x, m7: %08x, ntime: %08x, nbits: %08x, nnonce: %08x\n\t\t\t out: %s\n", mid32[0], m7, ntime, nbits, nnonce, hex);
  350. history[history_p] = nnonce;
  351. history_p++; history_p &= 512 - 1;
  352. #endif
  353. return 1;
  354. }
  355. return 0;
  356. }
  357. void work_to_payload(struct bitfury_payload *p, struct work *w) {
  358. unsigned char flipped_data[80];
  359. memset(p, 0, sizeof(struct bitfury_payload));
  360. swap32yes(flipped_data, w->data, 80 / 4);
  361. memcpy(p->midstate, w->midstate, 32);
  362. p->m7 = bswap_32(*(unsigned *)(flipped_data + 64));
  363. p->ntime = bswap_32(*(unsigned *)(flipped_data + 68));
  364. p->nbits = bswap_32(*(unsigned *)(flipped_data + 72));
  365. }
  366. void libbitfury_sendHashData(struct bitfury_device *bf, int chip_n) {
  367. int chip_id;
  368. static unsigned second_run;
  369. for (chip_id = 0; chip_id < chip_n; chip_id++) {
  370. struct bitfury_device *d = bf + chip_id;
  371. unsigned *newbuf = d->newbuf;
  372. unsigned *oldbuf = d->oldbuf;
  373. struct bitfury_payload *p = &(d->payload);
  374. struct bitfury_payload *op = &(d->opayload);
  375. struct bitfury_payload *o2p = &(d->o2payload);
  376. struct timespec d_time;
  377. struct timespec time;
  378. int smart = 0;
  379. int chip = d->fasync;
  380. int slot = d->slot;
  381. memcpy(atrvec, p, 20*4);
  382. ms3_compute(atrvec);
  383. clock_gettime(CLOCK_REALTIME, &(time));
  384. if (!second_run) {
  385. d->predict2 = d->predict1 = time;
  386. d->counter1 = d->counter2 = 0;
  387. d->req2_done = 0;
  388. };
  389. d_time = t_diff(time, d->predict1);
  390. if (d_time.tv_sec < 0 && (d->req2_done || !smart)) {
  391. d->otimer1 = d->timer1;
  392. d->timer1 = time;
  393. /* Programming next value */
  394. spi_clear_buf(); spi_emit_break();
  395. spi_emit_fasync(chip);
  396. spi_emit_data(0x3000, (void*)&atrvec[0], 19*4);
  397. if (smart) {
  398. config_reg(3,0);
  399. }
  400. tm_i2c_set_oe(slot);
  401. clock_gettime(CLOCK_REALTIME, &(time));
  402. d_time = t_diff(time, d->predict1);
  403. spi_txrx(spi_gettxbuf(), spi_getrxbuf(), spi_getbufsz());
  404. tm_i2c_clear_oe(slot);
  405. memcpy(newbuf, spi_getrxbuf()+4 + chip, 17*4);
  406. d->job_switched = newbuf[16] != oldbuf[16];
  407. int i;
  408. int results_num = 0;
  409. int found = 0;
  410. unsigned * results = d->results;
  411. d->old_nonce = 0;
  412. d->future_nonce = 0;
  413. for (i = 0; i < 16; i++) {
  414. if (oldbuf[i] != newbuf[i] && op && o2p) {
  415. unsigned pn; //possible nonce
  416. unsigned int s = 0; //TODO zero may be solution
  417. if ((newbuf[i] & 0xFF) == 0xE0)
  418. continue;
  419. pn = decnonce(newbuf[i]);
  420. s |= rehash(op->midstate, op->m7, op->ntime, op->nbits, pn) ? pn : 0;
  421. s |= rehash(op->midstate, op->m7, op->ntime, op->nbits, pn-0x00400000) ? pn - 0x00400000 : 0;
  422. s |= rehash(op->midstate, op->m7, op->ntime, op->nbits, pn-0x00800000) ? pn - 0x00800000 : 0;
  423. s |= rehash(op->midstate, op->m7, op->ntime, op->nbits, pn+0x02800000) ? pn + 0x02800000 : 0;
  424. s |= rehash(op->midstate, op->m7, op->ntime, op->nbits, pn+0x02C00000) ? pn + 0x02C00000 : 0;
  425. s |= rehash(op->midstate, op->m7, op->ntime, op->nbits, pn+0x00400000) ? pn + 0x00400000 : 0;
  426. if (s) {
  427. int k;
  428. int dup = 0;
  429. for (k = 0; k < results_num; k++) {
  430. if (results[k] == bswap_32(s)) {
  431. dup = 1;
  432. }
  433. }
  434. if (!dup) {
  435. results[results_num++] = bswap_32(s);
  436. found++;
  437. }
  438. }
  439. s = 0;
  440. pn = decnonce(newbuf[i]);
  441. s |= rehash(o2p->midstate, o2p->m7, o2p->ntime, o2p->nbits, pn) ? pn : 0;
  442. s |= rehash(o2p->midstate, o2p->m7, o2p->ntime, o2p->nbits, pn-0x400000) ? pn - 0x400000 : 0;
  443. s |= rehash(o2p->midstate, o2p->m7, o2p->ntime, o2p->nbits, pn-0x800000) ? pn - 0x800000 : 0;
  444. s |= rehash(o2p->midstate, o2p->m7, o2p->ntime, o2p->nbits, pn+0x2800000)? pn + 0x2800000 : 0;
  445. s |= rehash(o2p->midstate, o2p->m7, o2p->ntime, o2p->nbits, pn+0x2C00000)? pn + 0x2C00000 : 0;
  446. s |= rehash(o2p->midstate, o2p->m7, o2p->ntime, o2p->nbits, pn+0x400000) ? pn + 0x400000 : 0;
  447. if (s) {
  448. d->old_nonce = bswap_32(s);
  449. found++;
  450. }
  451. s = 0;
  452. pn = decnonce(newbuf[i]);
  453. s |= rehash(p->midstate, p->m7, p->ntime, p->nbits, pn) ? pn : 0;
  454. s |= rehash(p->midstate, p->m7, p->ntime, p->nbits, pn-0x400000) ? pn - 0x400000 : 0;
  455. s |= rehash(p->midstate, p->m7, p->ntime, p->nbits, pn-0x800000) ? pn - 0x800000 : 0;
  456. s |= rehash(p->midstate, p->m7, p->ntime, p->nbits, pn+0x2800000)? pn + 0x2800000 : 0;
  457. s |= rehash(p->midstate, p->m7, p->ntime, p->nbits, pn+0x2C00000)? pn + 0x2C00000 : 0;
  458. s |= rehash(p->midstate, p->m7, p->ntime, p->nbits, pn+0x400000) ? pn + 0x400000 : 0;
  459. if (s) {
  460. d->future_nonce = bswap_32(s);
  461. found++;
  462. }
  463. if (!found) {
  464. printf("AAA Strange: %08x, chip_id: %d\n", pn, chip_id);
  465. }
  466. }
  467. }
  468. d->results_n = results_num;
  469. if (smart) {
  470. d_time = t_diff(d->timer2, d->timer1);
  471. } else {
  472. d_time = t_diff(d->otimer1, d->timer1);
  473. }
  474. d->ocounter1 = d->counter1;
  475. d->counter1 = get_counter(newbuf, oldbuf);
  476. if (d->counter2 || !smart) {
  477. int shift;
  478. int cycles;
  479. int req1_cycles;
  480. long long unsigned int period;
  481. double ns;
  482. unsigned full_cycles, half_cycles;
  483. double full_delay, half_delay;
  484. long long unsigned delta;
  485. struct timespec t_delta;
  486. double mhz;
  487. int ccase;
  488. shift = 800000;
  489. if (smart) {
  490. cycles = d->counter1 < d->counter2 ? 0x00400000 - d->counter2 + d->counter1 : d->counter1 - d->counter2; // + 0x003FFFFF;
  491. } else {
  492. if (d->counter1 > (0x00400000 - shift * 2) && d->ocounter1 > (0x00400000 - shift)) {
  493. cycles = 0x00400000 - d->ocounter1 + d->counter1; // + 0x003FFFFF;
  494. ccase = 1;
  495. } else {
  496. cycles = d->counter1 - d->ocounter1;
  497. ccase = 2;
  498. }
  499. }
  500. req1_cycles = 0x003FFFFF - d->counter1;
  501. period = (long long unsigned int)d_time.tv_sec * 1000000000ULL + (long long unsigned int)d_time.tv_nsec;
  502. ns = (double)period / (double)(cycles);
  503. mhz = 1.0 / ns * 65.0 * 1000.0;
  504. if (d->counter1 > 0 && d->counter1 < 0x001FFFFF)
  505. printf("AAA chip_id %2d: %llu ms, req1_cycles: %08u, counter1: %08d, ocounter1: %08d, counter2: %08d, cycles: %08d, ns: %.2f, mhz: %.2f \n", chip_id, period / 1000000ULL, req1_cycles, d->counter1, d->ocounter1, d->counter2, cycles, ns, mhz);
  506. if (ns > 2000.0 || ns < 20) {
  507. printf("AAA %d!Stupid ns chip_id %2d: %llu ms, req1_cycles: %08u, counter1: %08d, ocounter1: %08d, counter2: %08d, cycles: %08d, ns: %.2f, mhz: %.2f \n", ccase, chip_id, period / 1000000ULL, req1_cycles, d->counter1, d->ocounter1, d->counter2, cycles, ns, mhz);
  508. ns = 200.0;
  509. } else {
  510. d->ns = ns;
  511. d->mhz = mhz;
  512. }
  513. if (smart) {
  514. half_cycles = req1_cycles + shift;
  515. full_cycles = 0x003FFFFF - 2 * shift;
  516. } else {
  517. half_cycles = 0;
  518. full_cycles = req1_cycles > shift ? req1_cycles - shift : req1_cycles + 0x00400000 - shift;
  519. }
  520. half_delay = (double)half_cycles * ns * (1 +0.92);
  521. full_delay = (double)full_cycles * ns;
  522. delta = (long long unsigned)(full_delay + half_delay);
  523. t_delta.tv_sec = delta / 1000000000ULL;
  524. t_delta.tv_nsec = delta - t_delta.tv_sec * 1000000000ULL;
  525. d->predict1 = t_add(time, t_delta);
  526. if (smart) {
  527. half_cycles = req1_cycles + shift;
  528. full_cycles = 0;
  529. } else {
  530. full_cycles = req1_cycles + shift;
  531. }
  532. half_delay = (double)half_cycles * ns * (1 + 0.92);
  533. full_delay = (double)full_cycles * ns;
  534. delta = (long long unsigned)(full_delay + half_delay);
  535. t_delta.tv_sec = delta / 1000000000ULL;
  536. t_delta.tv_nsec = delta - t_delta.tv_sec * 1000000000ULL;
  537. d->predict2 = t_add(time, t_delta);
  538. d->req2_done = 0; d->req1_done = 0;
  539. }
  540. if (d->job_switched) {
  541. memcpy(o2p, op, sizeof(struct bitfury_payload));
  542. memcpy(op, p, sizeof(struct bitfury_payload));
  543. memcpy(oldbuf, newbuf, 17 * 4);
  544. }
  545. }
  546. clock_gettime(CLOCK_REALTIME, &(time));
  547. d_time = t_diff(time, d->predict2);
  548. if (d_time.tv_sec < 0 && !d->req2_done) {
  549. if(smart) {
  550. d->otimer2 = d->timer2;
  551. d->timer2 = time;
  552. spi_clear_buf();
  553. spi_emit_break();
  554. spi_emit_fasync(chip);
  555. spi_emit_data(0x3000, (void*)&atrvec[0], 19*4);
  556. if (smart) {
  557. config_reg(3,1);
  558. }
  559. tm_i2c_set_oe(slot);
  560. spi_txrx(spi_gettxbuf(), spi_getrxbuf(), spi_getbufsz());
  561. tm_i2c_clear_oe(slot);
  562. memcpy(newbuf, spi_getrxbuf()+4 + chip, 17*4);
  563. d->counter2 = get_counter(newbuf, oldbuf);
  564. d->req2_done = 1;
  565. } else {
  566. d->req2_done = 1;
  567. }
  568. }
  569. }
  570. second_run = 1;
  571. return;
  572. }
  573. int libbitfury_readHashData(unsigned int *res) {
  574. return 0;
  575. }