driver-aan.c 13 KB

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  1. /*
  2. * Copyright 2014 Luke Dashjr
  3. * Copyright 2013 Zefir Kurtisi
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the Free
  7. * Software Foundation; either version 3 of the License, or (at your option)
  8. * any later version. See COPYING for more details.
  9. */
  10. #include "config.h"
  11. #include <stdbool.h>
  12. #include <stdint.h>
  13. #include <string.h>
  14. #include "deviceapi.h"
  15. #include "driver-aan.h"
  16. #include "logging.h"
  17. #include "lowl-spi.h"
  18. #include "miner.h"
  19. #include "util.h"
  20. #define AAN_DEFAULT_NONCE_PDIFF 8
  21. #define AAN_PROBE_TIMEOUT_US 3750000
  22. #define AAN_INIT_TIMEOUT_US 5000000
  23. #define AAN_READ_INTERVAL_US 100000
  24. #define AAN_REGISTER_SIZE 6
  25. enum aan_cmd {
  26. AAN_BIST_START = 0x01,
  27. AAN_BIST_FIX = 0x03,
  28. AAN_RESET = 0x04,
  29. AAN_WRITE_JOB = 0x07,
  30. AAN_READ_RESULT = 0x08,
  31. AAN_WRITE_REG = 0x09,
  32. AAN_READ_REG = 0x0a,
  33. AAN_READ_REG_RESP = 0x1a,
  34. };
  35. static void aan_spi_parse_rx(struct spi_port *);
  36. static
  37. void aan_spi_cmd_queue(struct spi_port * const spi, const uint8_t cmd, const uint8_t chip, const void * const data, const size_t datalen)
  38. {
  39. const struct aan_hooks * const hooks = spi->userp;
  40. const uint8_t cmdbuf[2] = {cmd, chip};
  41. hooks->precmd(spi);
  42. spi_emit_buf(spi, cmdbuf, sizeof(cmdbuf));
  43. if (datalen)
  44. spi_emit_buf(spi, data, datalen);
  45. }
  46. static
  47. bool aan_spi_txrx(struct spi_port * const spi)
  48. {
  49. if (unlikely(!spi_txrx(spi)))
  50. return false;
  51. aan_spi_parse_rx(spi);
  52. return true;
  53. }
  54. static
  55. bool aan_spi_cmd_send(struct spi_port * const spi, const uint8_t cmd, const uint8_t chip, const void * const data, const size_t datalen)
  56. {
  57. aan_spi_cmd_queue(spi, cmd, chip, data, datalen);
  58. return aan_spi_txrx(spi);
  59. }
  60. static
  61. bool aan_spi_cmd_resp(struct spi_port * const spi, const uint8_t cmd, const uint8_t chip, const struct timeval * const tvp_timeout)
  62. {
  63. const uint8_t cmdbuf[2] = {cmd, chip};
  64. uint8_t * const rx = spi_getrxbuf(spi);
  65. while (true)
  66. {
  67. spi_emit_nop(spi, 2);
  68. if (unlikely(!spi_txrx(spi)))
  69. return false;
  70. if (!memcmp(rx, cmdbuf, 2))
  71. break;
  72. aan_spi_parse_rx(spi);
  73. if (unlikely(tvp_timeout && timer_passed(tvp_timeout, NULL)))
  74. return false;
  75. }
  76. spi_clear_buf(spi);
  77. return true;
  78. }
  79. static
  80. bool aan_spi_cmd(struct spi_port * const spi, const uint8_t cmd, const uint8_t chip, const void * const data, const size_t datalen, const struct timeval * const tvp_timeout)
  81. {
  82. if (!aan_spi_cmd_send(spi, cmd, chip, data, datalen))
  83. return false;
  84. if (!aan_spi_cmd_resp(spi, cmd, chip, tvp_timeout))
  85. return false;
  86. return true;
  87. }
  88. bool aan_read_reg_direct(struct spi_port * const spi, const uint8_t chip, void * const out_buf, const struct timeval * const tvp_timeout)
  89. {
  90. if (!aan_spi_cmd_send(spi, AAN_READ_REG, chip, NULL, 0))
  91. return false;
  92. if (!aan_spi_cmd_resp(spi, AAN_READ_REG_RESP, chip, tvp_timeout))
  93. return false;
  94. spi_emit_nop(spi, AAN_REGISTER_SIZE);
  95. if (!spi_txrx(spi))
  96. applogr(false, LOG_DEBUG, "%s: %s failed", __func__, "spi_txrx");
  97. uint8_t * const rx = spi_getrxbuf(spi);
  98. memcpy(out_buf, rx, AAN_REGISTER_SIZE);
  99. return true;
  100. }
  101. static inline
  102. bool aan_read_reg(struct spi_port * const spi, const uint8_t chip, void * const out_buf, const struct timeval * const tvp_timeout)
  103. {
  104. const struct aan_hooks * const hooks = spi->userp;
  105. return hooks->read_reg(spi, chip, out_buf, tvp_timeout);
  106. }
  107. int aan_detect_spi(int * const out_chipcount, struct spi_port * const * const spi_a, const int spi_n)
  108. {
  109. struct timeval tv_timeout;
  110. timer_set_delay_from_now(&tv_timeout, AAN_PROBE_TIMEOUT_US);
  111. int state[spi_n];
  112. int completed = 0;
  113. for (int i = 0; i < spi_n; ++i)
  114. {
  115. struct spi_port * const spi = spi_a[i];
  116. aan_spi_cmd_send(spi, state[i] = AAN_RESET, AAN_ALL_CHIPS, NULL, 0);
  117. out_chipcount[i] = -1;
  118. }
  119. do {
  120. for (int i = 0; i < spi_n; ++i)
  121. {
  122. if (state[i] == -1)
  123. continue;
  124. struct spi_port * const spi = spi_a[i];
  125. spi_emit_nop(spi, 2);
  126. if (unlikely(!spi_txrx(spi)))
  127. {
  128. spifail:
  129. state[i] = -1;
  130. continue;
  131. }
  132. uint8_t * const rx = spi_getrxbuf(spi);
  133. if (rx[0] == state[i] && rx[1] == AAN_ALL_CHIPS)
  134. {
  135. switch (state[i])
  136. {
  137. case AAN_RESET:
  138. applog(LOG_DEBUG, "%s: Reset complete", spi->repr);
  139. spi_clear_buf(spi);
  140. aan_spi_cmd_send(spi, state[i] = AAN_BIST_START, AAN_ALL_CHIPS, NULL, 0);
  141. spi_emit_nop(spi, 2);
  142. break;
  143. case AAN_BIST_START:
  144. if (unlikely(!spi_txrx(spi)))
  145. goto spifail;
  146. out_chipcount[i] = rx[1];
  147. state[i] = -1;
  148. ++completed;
  149. applog(LOG_DEBUG, "%s: BIST_START complete (%d chips)", spi->repr, rx[1]);
  150. break;
  151. }
  152. spi_clear_buf(spi);
  153. continue;
  154. }
  155. aan_spi_parse_rx(spi);
  156. }
  157. } while (completed < spi_n && likely(!timer_passed(&tv_timeout, NULL)));
  158. applog(LOG_DEBUG, "%s completed for %d out of %d SPI ports", __func__, completed, spi_n);
  159. return completed;
  160. }
  161. bool aan_init(struct thr_info * const master_thr)
  162. {
  163. struct cgpu_info * const master_dev = master_thr->cgpu, *dev = NULL;
  164. struct aan_board_data *board;
  165. struct timeval tv_timeout, tv_now;
  166. int chipid;
  167. for_each_managed_proc(proc, master_dev)
  168. {
  169. struct spi_port * const spi = proc->device_data;
  170. struct thr_info * const thr = proc->thr[0];
  171. if (dev != proc->device)
  172. {
  173. dev = proc->device;
  174. chipid = 0;
  175. timer_set_now(&tv_now);
  176. board = malloc(sizeof(*board));
  177. *board = (struct aan_board_data){
  178. .master_dev = master_dev,
  179. .spi = spi,
  180. .tv_next_poll = tv_now,
  181. };
  182. spi->cgpu = dev;
  183. while (true)
  184. {
  185. timer_set_delay(&tv_timeout, &tv_now, AAN_INIT_TIMEOUT_US);
  186. if (aan_spi_cmd(spi, AAN_BIST_FIX, AAN_ALL_CHIPS, NULL, 0, &tv_timeout))
  187. break;
  188. applog(LOG_ERR, "%s: Failed to %s", proc->dev_repr, "BIST_FIX");
  189. }
  190. }
  191. proc->device_data = board;
  192. struct aan_chip_data * const chip = malloc(sizeof(*chip));
  193. thr->cgpu_data = chip;
  194. thr->queue_full = true;
  195. *chip = (struct aan_chip_data){
  196. .chipid = ++chipid,
  197. .desired_nonce_pdiff = AAN_DEFAULT_NONCE_PDIFF,
  198. };
  199. }
  200. master_thr->tv_poll = tv_now;
  201. return true;
  202. }
  203. static
  204. bool aan_spi_send_work(struct spi_port * const spi, const uint8_t chipid, const uint8_t jobid, const struct work * const work)
  205. {
  206. uint8_t buf[0x38];
  207. swab256(&buf[0], work->midstate);
  208. swap32yes(&buf[0x20], &work->data[0x40], 3);
  209. memset(&buf[0x2c], 0, 4); // start nonce
  210. uint32_t compressed_target = (uint32_t)(0x10000 / work->nonce_diff) | (/*exponent*/ 0x1d << 24);
  211. pk_u32le(buf, 0x30, compressed_target);
  212. memset(&buf[0x34], 0xff, 4); // end nonce
  213. return aan_spi_cmd_send(spi, AAN_WRITE_JOB | (jobid << 4), chipid, buf, sizeof(buf));
  214. }
  215. static bool set_work(struct cgpu_info *, uint8_t, struct work *);
  216. bool aan_queue_append(struct thr_info * const thr, struct work * const work)
  217. {
  218. struct cgpu_info *proc = thr->cgpu;
  219. struct aan_chip_data * const chip = thr->cgpu_data;
  220. struct cgpu_info *dev = proc->device;
  221. struct aan_board_data *board = dev->device_data;
  222. struct cgpu_info * const master_dev = board->master_dev;
  223. struct aan_board_data * const master_board = master_dev->device_data;
  224. applog(LOG_DEBUG, "%s: queue_append queues_empty=%d", proc->proc_repr, master_board->queues_empty-1);
  225. work->nonce_diff = work->work_difficulty;
  226. if (work->nonce_diff > chip->desired_nonce_pdiff)
  227. work->nonce_diff = chip->desired_nonce_pdiff;
  228. chip->current_nonce_pdiff = work->nonce_diff;
  229. if (set_work(dev, proc->proc_id + 1, work))
  230. hashes_done2(thr, 0x100000000, NULL);
  231. thr->queue_full = true;
  232. if (!--master_board->queues_empty)
  233. {
  234. struct thr_info * const master_thr = master_dev->thr[0];
  235. // Reactivate polling
  236. dev = NULL;
  237. for_each_managed_proc(proc, master_dev)
  238. {
  239. if (dev == proc->device)
  240. continue;
  241. dev = proc->device;
  242. board = dev->device_data;
  243. reduce_timeout_to(&master_thr->tv_poll, &board->tv_next_poll);
  244. }
  245. }
  246. return true;
  247. }
  248. void aan_queue_flush(struct thr_info * const thr)
  249. {
  250. // TODO
  251. }
  252. static
  253. struct cgpu_info *aan_proc_for_chipid(struct cgpu_info * const dev, const int chipid)
  254. {
  255. struct cgpu_info *proc = dev;
  256. for (int i = 1; i < chipid; ++i)
  257. {
  258. proc = proc->next_proc;
  259. if (unlikely((!proc) || proc->device != dev))
  260. {
  261. badchipid:
  262. inc_hw_errors_only(dev->thr[0]);
  263. applogr(NULL, LOG_ERR, "%s: Chip number %d out of range", dev->dev_repr, chipid);
  264. }
  265. }
  266. if (unlikely(!chipid))
  267. goto badchipid;
  268. return proc;
  269. }
  270. static
  271. void aan_spi_parse_rx(struct spi_port * const spi)
  272. {
  273. spi_clear_buf(spi);
  274. }
  275. #define MAX_POLL_NUM 20
  276. /* set work for given chip, returns true if a nonce range was finished */
  277. static
  278. bool set_work(struct cgpu_info * const dev, const uint8_t chip_id, struct work * const work)
  279. {
  280. struct aan_board_data * const board = dev->device_data;
  281. struct spi_port * const spi = board->spi;
  282. struct cgpu_info * const proc = aan_proc_for_chipid(dev, chip_id);
  283. struct thr_info * const thr = proc->thr[0];
  284. struct aan_chip_data * const chip = thr->cgpu_data;
  285. bool retval = false;
  286. ++chip->last_jobid;
  287. chip->last_jobid &= 3;
  288. if (chip->works[chip->last_jobid] != NULL)
  289. {
  290. free_work(chip->works[chip->last_jobid]);
  291. chip->works[chip->last_jobid] = NULL;
  292. retval = true;
  293. }
  294. if (!aan_spi_send_work(spi, chip_id, chip->last_jobid + 1, work))
  295. {
  296. free_work(work);
  297. applog(LOG_ERR, "%"PRIpreprv": Failed to set work %d", proc->proc_repr, chip->last_jobid + 1);
  298. }
  299. else
  300. chip->works[chip->last_jobid] = work;
  301. spi_clear_buf(spi);
  302. return retval;
  303. }
  304. /* check for pending results in a chain, returns false if output queue empty */
  305. static
  306. bool get_nonce(struct cgpu_info * const dev, uint8_t * const nonce, uint8_t * const chip, uint8_t * const job_id)
  307. {
  308. struct aan_board_data * const board = dev->device_data;
  309. struct spi_port * const spi = board->spi;
  310. int pollLen = MAX_POLL_NUM * dev->procs;
  311. if (pollLen <= 0)
  312. pollLen = MAX_POLL_NUM;
  313. if (!aan_spi_cmd_send(spi, AAN_READ_RESULT, AAN_ALL_CHIPS, NULL, 0))
  314. return false;
  315. for (int i = 0; i < pollLen; ++i)
  316. {
  317. spi_clear_buf(spi);
  318. spi_emit_nop(spi, 2);
  319. if (!spi_txrx(spi))
  320. applogr(false, LOG_ERR, "%s: SPI error in get_nonce", dev->dev_repr);
  321. uint8_t * const spi_rx = spi_getrxbuf(spi);
  322. if (spi_rx[0] == AAN_READ_RESULT && spi_rx[1] == 0x00)
  323. applogr(false, LOG_DEBUG, "%s: Output queue empty", dev->dev_repr);
  324. if ((spi_rx[0] & 0x0f) == AAN_READ_RESULT && spi_rx[1] != 0)
  325. {
  326. *job_id = spi_rx[0] >> 4;
  327. *chip = spi_rx[1];
  328. spi_emit_nop(spi, 2);
  329. if (!spi_txrx(spi))
  330. applogr(false, LOG_ERR, "SPI Err(%s):get_nonce", dev->dev_repr);
  331. memcpy(nonce, spi_rx, 4);
  332. applog(LOG_DEBUG, "%s: Got nonce for chip %d / job_id %d", dev->dev_repr, *chip, *job_id);
  333. return true;
  334. }
  335. }
  336. return false;
  337. }
  338. static
  339. void aan_scanwork(struct cgpu_info * const dev, struct thr_info * const master_thr)
  340. {
  341. struct aan_board_data * const board = dev->device_data;
  342. struct spi_port * const spi = board->spi;
  343. uint32_t nonce;
  344. uint8_t chip_id;
  345. uint8_t job_id;
  346. bool work_updated = false;
  347. if (!timer_passed(&board->tv_next_poll, NULL))
  348. goto out;
  349. while (get_nonce(dev, (uint8_t*)&nonce, &chip_id, &job_id))
  350. {
  351. nonce = bswap_32(nonce);
  352. work_updated = true;
  353. struct cgpu_info * const proc = aan_proc_for_chipid(dev, chip_id);
  354. if (!proc)
  355. continue;
  356. struct thr_info * const thr = proc->thr[0];
  357. struct aan_chip_data * const chip = thr->cgpu_data;
  358. if (job_id < 1 || job_id > 4)
  359. {
  360. badjob:
  361. inc_hw_errors3(thr, NULL, &nonce, chip->current_nonce_pdiff);
  362. continue;
  363. }
  364. struct work * const work = chip->works[job_id - 1];
  365. if (!work)
  366. goto badjob;
  367. submit_nonce(thr, work, nonce);
  368. }
  369. /* check for completed works */
  370. for_each_logical_proc(proc, dev)
  371. {
  372. struct thr_info * const thr = proc->thr[0];
  373. const int i = proc->proc_id;
  374. uint8_t spi_rx[8];
  375. if (!aan_read_reg(spi, i + 1, &spi_rx[2], NULL))
  376. {
  377. applog(LOG_ERR, "%"PRIpreprv": Failed to read reg", proc->proc_repr);
  378. continue;
  379. }
  380. if ((spi_rx[5] & 2) != 2)
  381. {
  382. struct cgpu_info * const master_dev = board->master_dev;
  383. struct aan_board_data * const master_board = master_dev->device_data;
  384. work_updated = true;
  385. thr->queue_full = false;
  386. ++master_board->queues_empty;
  387. applog(LOG_DEBUG, "%s: queue_full=false queues_empty=%d", proc->proc_repr, master_board->queues_empty);
  388. }
  389. }
  390. if (!work_updated)
  391. timer_set_delay_from_now(&board->tv_next_poll, AAN_READ_INTERVAL_US);
  392. out:
  393. reduce_timeout_to(&master_thr->tv_poll, &board->tv_next_poll);
  394. }
  395. void aan_poll(struct thr_info * const master_thr)
  396. {
  397. struct cgpu_info * const master_dev = master_thr->cgpu, *dev = NULL;
  398. struct aan_board_data * const master_board = master_dev->device_data;
  399. timer_unset(&master_thr->tv_poll);
  400. for_each_managed_proc(proc, master_dev)
  401. {
  402. if (dev == proc->device)
  403. continue;
  404. dev = proc->device;
  405. aan_scanwork(dev, master_thr);
  406. }
  407. if (master_board->queues_empty)
  408. // Avoid polling when we have queues to fill
  409. timer_unset(&master_thr->tv_poll);
  410. }
  411. const char *aan_set_diff(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const success)
  412. {
  413. struct thr_info * const thr = proc->thr[0];
  414. struct aan_chip_data * const chip = thr->cgpu_data;
  415. const double nv = atof(newvalue);
  416. if (nv <= 0)
  417. return "Invalid difficulty";
  418. chip->desired_nonce_pdiff = nv;
  419. return NULL;
  420. }
  421. const struct bfg_set_device_definition aan_set_device_funcs[] = {
  422. {"diff", aan_set_diff, "desired nonce difficulty"},
  423. {NULL},
  424. };