driver-icarus.c 45 KB

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  1. /*
  2. * Copyright 2012-2015 Luke Dashjr
  3. * Copyright 2012 Xiangfu
  4. * Copyright 2014 Nate Woolls
  5. * Copyright 2012 Andrew Smith
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the Free
  9. * Software Foundation; either version 3 of the License, or (at your option)
  10. * any later version. See COPYING for more details.
  11. */
  12. /*
  13. * Those code should be works fine with V2 and V3 bitstream of Icarus.
  14. * Operation:
  15. * No detection implement.
  16. * Input: 64B = 32B midstate + 20B fill bytes + last 12 bytes of block head.
  17. * Return: send back 32bits immediately when Icarus found a valid nonce.
  18. * no query protocol implemented here, if no data send back in ~11.3
  19. * seconds (full cover time on 32bit nonce range by 380MH/s speed)
  20. * just send another work.
  21. * Notice:
  22. * 1. Icarus will start calculate when you push a work to them, even they
  23. * are busy.
  24. * 2. The 2 FPGAs on Icarus will distribute the job, one will calculate the
  25. * 0 ~ 7FFFFFFF, another one will cover the 80000000 ~ FFFFFFFF.
  26. * 3. It's possible for 2 FPGAs both find valid nonce in the meantime, the 2
  27. * valid nonce will all be send back.
  28. * 4. Icarus will stop work when: a valid nonce has been found or 32 bits
  29. * nonce range is completely calculated.
  30. */
  31. #include "config.h"
  32. #include "miner.h"
  33. #include <limits.h>
  34. #include <pthread.h>
  35. #include <stdbool.h>
  36. #include <stdint.h>
  37. #include <stdio.h>
  38. #include <sys/time.h>
  39. #include <sys/types.h>
  40. #include <dirent.h>
  41. #include <unistd.h>
  42. #ifndef WIN32
  43. #include <termios.h>
  44. #include <sys/stat.h>
  45. #include <fcntl.h>
  46. #ifndef O_CLOEXEC
  47. #define O_CLOEXEC 0
  48. #endif
  49. #else
  50. #include <windows.h>
  51. #include <io.h>
  52. #endif
  53. #ifdef HAVE_SYS_EPOLL_H
  54. #include <sys/epoll.h>
  55. #define HAVE_EPOLL
  56. #endif
  57. #include "compat.h"
  58. #include "dynclock.h"
  59. #include "driver-icarus.h"
  60. #include "lowl-vcom.h"
  61. // The serial I/O speed - Linux uses a define 'B115200' in bits/termios.h
  62. #define ICARUS_IO_SPEED 115200
  63. // The number of bytes in a nonce (always 4)
  64. // This is NOT the read-size for the Icarus driver
  65. // That is defined in ICARUS_INFO->read_size
  66. #define ICARUS_NONCE_SIZE 4
  67. #define ASSERT1(condition) __maybe_unused static char sizeof_uint32_t_must_be_4[(condition)?1:-1]
  68. ASSERT1(sizeof(uint32_t) == 4);
  69. #define ICARUS_READ_TIME(baud, read_size) ((double)read_size * (double)8.0 / (double)(baud))
  70. // Defined in deciseconds
  71. // There's no need to have this bigger, since the overhead/latency of extra work
  72. // is pretty small once you get beyond a 10s nonce range time and 10s also
  73. // means that nothing slower than 429MH/s can go idle so most icarus devices
  74. // will always mine without idling
  75. #define ICARUS_READ_COUNT_LIMIT_MAX 100
  76. // In timing mode: Default starting value until an estimate can be obtained
  77. #define ICARUS_READ_COUNT_TIMING_MS 75
  78. // For a standard Icarus REV3
  79. #define ICARUS_REV3_HASH_TIME 0.00000000264083
  80. // Icarus Rev3 doesn't send a completion message when it finishes
  81. // the full nonce range, so to avoid being idle we must abort the
  82. // work (by starting a new work) shortly before it finishes
  83. //
  84. // Thus we need to estimate 2 things:
  85. // 1) How many hashes were done if the work was aborted
  86. // 2) How high can the timeout be before the Icarus is idle,
  87. // to minimise the number of work started
  88. // We set 2) to 'the calculated estimate' - 1
  89. // to ensure the estimate ends before idle
  90. //
  91. // The simple calculation used is:
  92. // Tn = Total time in seconds to calculate n hashes
  93. // Hs = seconds per hash
  94. // Xn = number of hashes
  95. // W = code overhead per work
  96. //
  97. // Rough but reasonable estimate:
  98. // Tn = Hs * Xn + W (of the form y = mx + b)
  99. //
  100. // Thus:
  101. // Line of best fit (using least squares)
  102. //
  103. // Hs = (n*Sum(XiTi)-Sum(Xi)*Sum(Ti))/(n*Sum(Xi^2)-Sum(Xi)^2)
  104. // W = Sum(Ti)/n - (Hs*Sum(Xi))/n
  105. //
  106. // N.B. W is less when aborting work since we aren't waiting for the reply
  107. // to be transferred back (ICARUS_READ_TIME)
  108. // Calculating the hashes aborted at n seconds is thus just n/Hs
  109. // (though this is still a slight overestimate due to code delays)
  110. //
  111. // Both below must be exceeded to complete a set of data
  112. // Minimum how long after the first, the last data point must be
  113. #define HISTORY_SEC 60
  114. // Minimum how many points a single ICARUS_HISTORY should have
  115. #define MIN_DATA_COUNT 5
  116. // The value above used is doubled each history until it exceeds:
  117. #define MAX_MIN_DATA_COUNT 100
  118. static struct timeval history_sec = { HISTORY_SEC, 0 };
  119. static const char *MODE_DEFAULT_STR = "default";
  120. static const char *MODE_SHORT_STR = "short";
  121. static const char *MODE_SHORT_STREQ = "short=";
  122. static const char *MODE_LONG_STR = "long";
  123. static const char *MODE_LONG_STREQ = "long=";
  124. static const char *MODE_VALUE_STR = "value";
  125. static const char *MODE_UNKNOWN_STR = "unknown";
  126. #define END_CONDITION 0x0000ffff
  127. #define DEFAULT_DETECT_THRESHOLD 1
  128. BFG_REGISTER_DRIVER(icarus_drv)
  129. extern const struct bfg_set_device_definition icarus_set_device_funcs[];
  130. extern const struct bfg_set_device_definition icarus_set_device_funcs_live[];
  131. extern void convert_icarus_to_cairnsmore(struct cgpu_info *);
  132. static inline
  133. uint32_t icarus_nonce32toh(const struct ICARUS_INFO * const info, const uint32_t nonce)
  134. {
  135. return info->nonce_littleendian ? le32toh(nonce) : be32toh(nonce);
  136. }
  137. #define icarus_open2(devpath, baud, purge) serial_open(devpath, baud, ICARUS_READ_FAULT_DECISECONDS, purge)
  138. #define icarus_open(devpath, baud) icarus_open2(devpath, baud, false)
  139. static
  140. void icarus_log_protocol(const char * const repr, const void *buf, size_t bufLen, const char *prefix)
  141. {
  142. char hex[(bufLen * 2) + 1];
  143. bin2hex(hex, buf, bufLen);
  144. applog(LOG_DEBUG, "%"PRIpreprv": DEVPROTO: %s %s", repr, prefix, hex);
  145. }
  146. int icarus_read(const char * const repr, uint8_t *buf, const int fd, struct timeval * const tvp_finish, struct thr_info * const thr, const struct timeval * const tvp_timeout, struct timeval * const tvp_now, int read_size)
  147. {
  148. int rv;
  149. long remaining_ms;
  150. ssize_t ret;
  151. struct timeval tv_start = *tvp_now;
  152. bool first = true;
  153. // If there is no thr, then there's no work restart to watch..
  154. #ifdef HAVE_EPOLL
  155. bool watching_work_restart = !thr;
  156. int epollfd;
  157. struct epoll_event evr[2];
  158. epollfd = epoll_create(2);
  159. if (epollfd != -1) {
  160. struct epoll_event ev = {
  161. .events = EPOLLIN,
  162. .data.fd = fd,
  163. };
  164. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, fd, &ev)) {
  165. applog(LOG_DEBUG, "%"PRIpreprv": Error adding %s fd to epoll", "device", repr);
  166. close(epollfd);
  167. epollfd = -1;
  168. }
  169. else
  170. if (thr && thr->work_restart_notifier[1] != -1)
  171. {
  172. ev.data.fd = thr->work_restart_notifier[0];
  173. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, thr->work_restart_notifier[0], &ev))
  174. applog(LOG_DEBUG, "%"PRIpreprv": Error adding %s fd to epoll", "work restart", repr);
  175. else
  176. watching_work_restart = true;
  177. }
  178. }
  179. else
  180. applog(LOG_DEBUG, "%"PRIpreprv": Error creating epoll", repr);
  181. if (epollfd == -1 && (remaining_ms = timer_remaining_us(tvp_timeout, tvp_now)) < 100000)
  182. applog(LOG_WARNING, "%"PRIpreprv": Failed to use epoll, and very short read timeout (%ldms)", repr, remaining_ms);
  183. #endif
  184. while (true) {
  185. remaining_ms = timer_remaining_us(tvp_timeout, tvp_now) / 1000;
  186. #ifdef HAVE_EPOLL
  187. if (epollfd != -1)
  188. {
  189. if ((!watching_work_restart) && remaining_ms > 100)
  190. remaining_ms = 100;
  191. ret = epoll_wait(epollfd, evr, 2, remaining_ms);
  192. timer_set_now(tvp_now);
  193. switch (ret)
  194. {
  195. case -1:
  196. if (unlikely(errno != EINTR))
  197. return_via(out, rv = ICA_GETS_ERROR);
  198. ret = 0;
  199. break;
  200. case 0: // timeout
  201. // handled after switch
  202. break;
  203. case 1:
  204. if (evr[0].data.fd != fd) // must be work restart notifier
  205. {
  206. notifier_read(thr->work_restart_notifier);
  207. ret = 0;
  208. break;
  209. }
  210. // fallthru to...
  211. case 2: // device has data
  212. ret = read(fd, buf, read_size);
  213. break;
  214. default:
  215. return_via(out, rv = ICA_GETS_ERROR);
  216. }
  217. }
  218. else
  219. #endif
  220. {
  221. if (remaining_ms > 100)
  222. remaining_ms = 100;
  223. else
  224. if (remaining_ms < 1)
  225. remaining_ms = 1;
  226. vcom_set_timeout_ms(fd, remaining_ms);
  227. // Read first byte alone to get earliest tv_finish
  228. ret = read(fd, buf, first ? 1 : read_size);
  229. timer_set_now(tvp_now);
  230. }
  231. if (first)
  232. *tvp_finish = *tvp_now;
  233. if (ret)
  234. {
  235. if (unlikely(ret < 0))
  236. return_via(out, rv = ICA_GETS_ERROR);
  237. first = false;
  238. if (opt_dev_protocol && opt_debug)
  239. icarus_log_protocol(repr, buf, ret, "RECV");
  240. if (ret >= read_size)
  241. return_via(out, rv = ICA_GETS_OK);
  242. read_size -= ret;
  243. buf += ret;
  244. // Always continue reading while data is coming in, ignoring the timeout
  245. continue;
  246. }
  247. if (thr && thr->work_restart)
  248. return_via_applog(out, rv = ICA_GETS_RESTART, LOG_DEBUG, "%"PRIpreprv": Interrupted by work restart", repr);
  249. if (timer_passed(tvp_timeout, tvp_now))
  250. return_via_applog(out, rv = ICA_GETS_TIMEOUT, LOG_DEBUG, "%"PRIpreprv": No data in %.3f seconds", repr, timer_elapsed_us(&tv_start, tvp_now) / 1e6);
  251. }
  252. out:
  253. #ifdef HAVE_EPOLL
  254. if (epollfd != -1)
  255. close(epollfd);
  256. #endif
  257. return rv;
  258. }
  259. int icarus_write(const char * const repr, int fd, const void *buf, size_t bufLen)
  260. {
  261. size_t ret;
  262. if (opt_dev_protocol && opt_debug)
  263. icarus_log_protocol(repr, buf, bufLen, "SEND");
  264. if (unlikely(fd == -1))
  265. return 1;
  266. ret = write(fd, buf, bufLen);
  267. if (unlikely(ret != bufLen))
  268. return 1;
  269. return 0;
  270. }
  271. #define icarus_close(fd) serial_close(fd)
  272. void do_icarus_close(struct thr_info *thr)
  273. {
  274. struct cgpu_info *icarus = thr->cgpu;
  275. const int fd = icarus->device_fd;
  276. if (fd == -1)
  277. return;
  278. icarus_close(fd);
  279. icarus->device_fd = -1;
  280. }
  281. static const char *timing_mode_str(enum timing_mode timing_mode)
  282. {
  283. switch(timing_mode) {
  284. case MODE_DEFAULT:
  285. return MODE_DEFAULT_STR;
  286. case MODE_SHORT:
  287. return MODE_SHORT_STR;
  288. case MODE_LONG:
  289. return MODE_LONG_STR;
  290. case MODE_VALUE:
  291. return MODE_VALUE_STR;
  292. default:
  293. return MODE_UNKNOWN_STR;
  294. }
  295. }
  296. static
  297. const char *_icarus_set_timing(struct ICARUS_INFO * const info, const char * const repr, const struct device_drv * const drv, const char * const buf)
  298. {
  299. double Hs;
  300. char *eq;
  301. if (strcasecmp(buf, MODE_SHORT_STR) == 0) {
  302. // short
  303. info->read_timeout_ms = ICARUS_READ_COUNT_TIMING_MS;
  304. info->read_count_limit = 0; // 0 = no limit
  305. info->timing_mode = MODE_SHORT;
  306. info->do_icarus_timing = true;
  307. } else if (strncasecmp(buf, MODE_SHORT_STREQ, strlen(MODE_SHORT_STREQ)) == 0) {
  308. // short=limit
  309. info->read_timeout_ms = ICARUS_READ_COUNT_TIMING_MS;
  310. info->timing_mode = MODE_SHORT;
  311. info->do_icarus_timing = true;
  312. info->read_count_limit = atoi(&buf[strlen(MODE_SHORT_STREQ)]);
  313. if (info->read_count_limit < 0)
  314. info->read_count_limit = 0;
  315. if (info->read_count_limit > ICARUS_READ_COUNT_LIMIT_MAX)
  316. info->read_count_limit = ICARUS_READ_COUNT_LIMIT_MAX;
  317. } else if (strcasecmp(buf, MODE_LONG_STR) == 0) {
  318. // long
  319. info->read_timeout_ms = ICARUS_READ_COUNT_TIMING_MS;
  320. info->read_count_limit = 0; // 0 = no limit
  321. info->timing_mode = MODE_LONG;
  322. info->do_icarus_timing = true;
  323. } else if (strncasecmp(buf, MODE_LONG_STREQ, strlen(MODE_LONG_STREQ)) == 0) {
  324. // long=limit
  325. info->read_timeout_ms = ICARUS_READ_COUNT_TIMING_MS;
  326. info->timing_mode = MODE_LONG;
  327. info->do_icarus_timing = true;
  328. info->read_count_limit = atoi(&buf[strlen(MODE_LONG_STREQ)]);
  329. if (info->read_count_limit < 0)
  330. info->read_count_limit = 0;
  331. if (info->read_count_limit > ICARUS_READ_COUNT_LIMIT_MAX)
  332. info->read_count_limit = ICARUS_READ_COUNT_LIMIT_MAX;
  333. } else if ((Hs = atof(buf)) != 0) {
  334. // ns[=read_count]
  335. info->Hs = Hs / NANOSEC;
  336. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  337. info->read_timeout_ms = 0;
  338. if ((eq = strchr(buf, '=')) != NULL)
  339. info->read_timeout_ms = atof(&eq[1]) * 100;
  340. if (info->read_timeout_ms < 1)
  341. {
  342. info->read_timeout_ms = info->fullnonce * 1000;
  343. if (unlikely(info->read_timeout_ms < 2))
  344. info->read_timeout_ms = 1;
  345. else
  346. --info->read_timeout_ms;
  347. }
  348. info->read_count_limit = 0; // 0 = no limit
  349. info->timing_mode = MODE_VALUE;
  350. info->do_icarus_timing = false;
  351. } else {
  352. // Anything else in buf just uses DEFAULT mode
  353. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  354. info->read_timeout_ms = 0;
  355. if ((eq = strchr(buf, '=')) != NULL)
  356. info->read_timeout_ms = atof(&eq[1]) * 100;
  357. unsigned def_read_timeout_ms = ICARUS_READ_COUNT_TIMING_MS;
  358. if (info->timing_mode == MODE_DEFAULT) {
  359. if (drv == &icarus_drv) {
  360. info->do_default_detection = 0x10;
  361. } else {
  362. def_read_timeout_ms = info->fullnonce * 1000;
  363. if (def_read_timeout_ms > 0)
  364. --def_read_timeout_ms;
  365. }
  366. info->do_icarus_timing = false;
  367. }
  368. if (info->read_timeout_ms < 1)
  369. info->read_timeout_ms = def_read_timeout_ms;
  370. info->read_count_limit = 0; // 0 = no limit
  371. }
  372. info->min_data_count = MIN_DATA_COUNT;
  373. applog(LOG_DEBUG, "%"PRIpreprv": Init: mode=%s read_timeout_ms=%u limit=%dms Hs=%e",
  374. repr,
  375. timing_mode_str(info->timing_mode),
  376. info->read_timeout_ms, info->read_count_limit, info->Hs);
  377. return NULL;
  378. }
  379. const char *icarus_set_timing(struct cgpu_info * const proc, const char * const optname, const char * const buf, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  380. {
  381. struct ICARUS_INFO * const info = proc->device_data;
  382. return _icarus_set_timing(info, proc->proc_repr, proc->drv, buf);
  383. }
  384. static uint32_t mask(int work_division)
  385. {
  386. return 0xffffffff / work_division;
  387. }
  388. // Number of bytes remaining after reading a nonce from Icarus
  389. int icarus_excess_nonce_size(int fd, struct ICARUS_INFO *info)
  390. {
  391. // How big a buffer?
  392. int excess_size = info->read_size - ICARUS_NONCE_SIZE;
  393. // Try to read one more to ensure the device doesn't return
  394. // more than we want for this driver
  395. excess_size++;
  396. unsigned char excess_bin[excess_size];
  397. // Read excess_size from Icarus
  398. struct timeval tv_now;
  399. timer_set_now(&tv_now);
  400. int bytes_read = read(fd, excess_bin, excess_size);
  401. // Number of bytes that were still available
  402. return bytes_read;
  403. }
  404. int icarus_probe_work_division(const int fd, const char * const repr, struct ICARUS_INFO * const info)
  405. {
  406. struct timeval tv_now, tv_timeout;
  407. struct timeval tv_finish;
  408. // For reading the nonce from Icarus
  409. unsigned char res_bin[info->read_size];
  410. // For storing the the 32-bit nonce
  411. uint32_t res;
  412. int work_division = 0;
  413. applog(LOG_DEBUG, "%s: Work division not specified - autodetecting", repr);
  414. // Special packet to probe work_division
  415. unsigned char pkt[64] =
  416. "\x2e\x4c\x8f\x91\xfd\x59\x5d\x2d\x7e\xa2\x0a\xaa\xcb\x64\xa2\xa0"
  417. "\x43\x82\x86\x02\x77\xcf\x26\xb6\xa1\xee\x04\xc5\x6a\x5b\x50\x4a"
  418. "WDiv\0\0\0\0BFGMiner"
  419. "BFG\0\x64\x61\x01\x1a\xc9\x06\xa9\x51\xfb\x9b\x3c\x73";
  420. icarus_write(repr, fd, pkt, sizeof(pkt));
  421. memset(res_bin, 0, sizeof(res_bin));
  422. timer_set_now(&tv_now);
  423. timer_set_delay(&tv_timeout, &tv_now, info->read_timeout_ms * 1000);
  424. if (ICA_GETS_OK == icarus_read(repr, res_bin, fd, &tv_finish, NULL, &tv_timeout, &tv_now, info->read_size))
  425. {
  426. memcpy(&res, res_bin, sizeof(res));
  427. res = icarus_nonce32toh(info, res);
  428. }
  429. else
  430. res = 0;
  431. switch (res) {
  432. case 0x04C0FDB4:
  433. work_division = 1;
  434. break;
  435. case 0x82540E46:
  436. work_division = 2;
  437. break;
  438. case 0x417C0F36:
  439. work_division = 4;
  440. break;
  441. case 0x60C994D5:
  442. work_division = 8;
  443. break;
  444. default:
  445. applog(LOG_ERR, "%s: Work division autodetection failed (assuming 2): got %08x", repr, res);
  446. work_division = 2;
  447. }
  448. applog(LOG_DEBUG, "%s: Work division autodetection got %08x (=%d)", repr, res, work_division);
  449. return work_division;
  450. }
  451. struct cgpu_info *icarus_detect_custom(const char *devpath, struct device_drv *api, struct ICARUS_INFO *info)
  452. {
  453. struct timeval tv_start, tv_finish;
  454. int fd;
  455. unsigned char nonce_bin[ICARUS_NONCE_SIZE];
  456. char nonce_hex[(sizeof(nonce_bin) * 2) + 1];
  457. drv_set_defaults(api, icarus_set_device_funcs, info, devpath, detectone_meta_info.serial, 1);
  458. int baud = info->baud;
  459. int work_division = info->work_division;
  460. int fpga_count = info->fpga_count;
  461. applog(LOG_DEBUG, "%s: Attempting to open %s", api->dname, devpath);
  462. fd = icarus_open2(devpath, baud, true);
  463. if (unlikely(fd == -1)) {
  464. applog(LOG_DEBUG, "%s: Failed to open %s", api->dname, devpath);
  465. return NULL;
  466. }
  467. // Set a default so that individual drivers need not specify
  468. // e.g. Cairnsmore
  469. BFGINIT(info->probe_read_count, 1);
  470. if (info->read_size == 0)
  471. info->read_size = ICARUS_DEFAULT_READ_SIZE;
  472. if (!info->golden_ob)
  473. {
  474. // Block 171874 nonce = (0xa2870100) = 0x000187a2
  475. // NOTE: this MUST take less time to calculate
  476. // than the timeout set in icarus_open()
  477. // This one takes ~0.53ms on Rev3 Icarus
  478. info->golden_ob =
  479. "4679ba4ec99876bf4bfe086082b40025"
  480. "4df6c356451471139a3afa71e48f544a"
  481. "00000000000000000000000000000000"
  482. "0000000087320b1a1426674f2fa722ce";
  483. /* NOTE: This gets sent to basically every port specified in --scan-serial,
  484. * even ones that aren't Icarus; be sure they can all handle it, when
  485. * this is changed...
  486. * BitForce: Ignores entirely
  487. * ModMiner: Starts (useless) work, gets back to clean state
  488. */
  489. info->golden_nonce = "000187a2";
  490. }
  491. if (info->detect_init_func)
  492. info->detect_init_func(devpath, fd, info);
  493. int ob_size = strlen(info->golden_ob) / 2;
  494. unsigned char ob_bin[ob_size];
  495. BFGINIT(info->ob_size, ob_size);
  496. if (!info->ignore_golden_nonce)
  497. {
  498. hex2bin(ob_bin, info->golden_ob, sizeof(ob_bin));
  499. icarus_write(devpath, fd, ob_bin, sizeof(ob_bin));
  500. cgtime(&tv_start);
  501. memset(nonce_bin, 0, sizeof(nonce_bin));
  502. // Do not use info->read_size here, instead read exactly ICARUS_NONCE_SIZE
  503. // We will then compare the bytes left in fd with info->read_size to determine
  504. // if this is a valid device
  505. struct timeval tv_now, tv_timeout;
  506. timer_set_now(&tv_now);
  507. timer_set_delay(&tv_timeout, &tv_now, info->probe_read_count * 100000);
  508. icarus_read(devpath, nonce_bin, fd, &tv_finish, NULL, &tv_timeout, &tv_now, ICARUS_NONCE_SIZE);
  509. // How many bytes were left after reading the above nonce
  510. int bytes_left = icarus_excess_nonce_size(fd, info);
  511. icarus_close(fd);
  512. bin2hex(nonce_hex, nonce_bin, sizeof(nonce_bin));
  513. if (strncmp(nonce_hex, info->golden_nonce, 8))
  514. {
  515. applog(LOG_DEBUG,
  516. "%s: "
  517. "Test failed at %s: get %s, should: %s",
  518. api->dname,
  519. devpath, nonce_hex, info->golden_nonce);
  520. return NULL;
  521. }
  522. if (info->read_size - ICARUS_NONCE_SIZE != bytes_left)
  523. {
  524. applog(LOG_DEBUG,
  525. "%s: "
  526. "Test failed at %s: expected %d bytes, got %d",
  527. api->dname,
  528. devpath, info->read_size, ICARUS_NONCE_SIZE + bytes_left);
  529. return NULL;
  530. }
  531. }
  532. else
  533. icarus_close(fd);
  534. applog(LOG_DEBUG,
  535. "%s: "
  536. "Test succeeded at %s: got %s",
  537. api->dname,
  538. devpath, nonce_hex);
  539. if (serial_claim_v(devpath, api))
  540. return NULL;
  541. _icarus_set_timing(info, api->dname, api, "");
  542. if (!info->fpga_count)
  543. {
  544. if (!info->work_division)
  545. {
  546. fd = icarus_open2(devpath, baud, true);
  547. info->work_division = icarus_probe_work_division(fd, api->dname, info);
  548. icarus_close(fd);
  549. }
  550. info->fpga_count = info->work_division;
  551. }
  552. // Lock fpga_count from set_work_division
  553. info->user_set |= IUS_FPGA_COUNT;
  554. /* We have a real Icarus! */
  555. struct cgpu_info *icarus;
  556. icarus = calloc(1, sizeof(struct cgpu_info));
  557. icarus->drv = api;
  558. icarus->device_path = strdup(devpath);
  559. icarus->device_fd = -1;
  560. icarus->threads = 1;
  561. icarus->procs = info->fpga_count;
  562. icarus->device_data = info;
  563. icarus->set_device_funcs = icarus_set_device_funcs_live;
  564. add_cgpu(icarus);
  565. applog(LOG_INFO, "Found %"PRIpreprv" at %s",
  566. icarus->proc_repr,
  567. devpath);
  568. applog(LOG_DEBUG, "%"PRIpreprv": Init: baud=%d work_division=%d fpga_count=%d",
  569. icarus->proc_repr,
  570. baud, work_division, fpga_count);
  571. timersub(&tv_finish, &tv_start, &(info->golden_tv));
  572. return icarus;
  573. }
  574. static bool icarus_detect_one(const char *devpath)
  575. {
  576. struct ICARUS_INFO *info = calloc(1, sizeof(struct ICARUS_INFO));
  577. if (unlikely(!info))
  578. quit(1, "Failed to malloc ICARUS_INFO");
  579. // TODO: try some higher speeds with the Icarus and BFL to see
  580. // if they support them and if setting them makes any difference
  581. // N.B. B3000000 doesn't work on Icarus
  582. info->baud = ICARUS_IO_SPEED;
  583. info->reopen_mode = IRM_TIMEOUT;
  584. info->Hs = ICARUS_REV3_HASH_TIME;
  585. info->timing_mode = MODE_DEFAULT;
  586. info->read_size = ICARUS_DEFAULT_READ_SIZE;
  587. if (!icarus_detect_custom(devpath, &icarus_drv, info)) {
  588. free(info);
  589. return false;
  590. }
  591. return true;
  592. }
  593. static
  594. bool icarus_lowl_probe(const struct lowlevel_device_info * const info)
  595. {
  596. return vcom_lowl_probe_wrapper(info, icarus_detect_one);
  597. }
  598. static bool icarus_prepare(struct thr_info *thr)
  599. {
  600. struct cgpu_info *icarus = thr->cgpu;
  601. struct icarus_state *state;
  602. thr->cgpu_data = state = calloc(1, sizeof(*state));
  603. state->firstrun = true;
  604. #ifdef HAVE_EPOLL
  605. int epollfd = epoll_create(2);
  606. if (epollfd != -1)
  607. {
  608. close(epollfd);
  609. notifier_init(thr->work_restart_notifier);
  610. }
  611. #endif
  612. icarus->status = LIFE_INIT2;
  613. return true;
  614. }
  615. bool icarus_init(struct thr_info *thr)
  616. {
  617. struct cgpu_info *icarus = thr->cgpu;
  618. struct ICARUS_INFO *info = icarus->device_data;
  619. struct icarus_state * const state = thr->cgpu_data;
  620. int fd = icarus_open2(icarus->device_path, info->baud, true);
  621. icarus->device_fd = fd;
  622. if (unlikely(-1 == fd)) {
  623. applog(LOG_ERR, "%s: Failed to open %s",
  624. icarus->dev_repr,
  625. icarus->device_path);
  626. return false;
  627. }
  628. applog(LOG_INFO, "%s: Opened %s", icarus->dev_repr, icarus->device_path);
  629. BFGINIT(info->job_start_func, icarus_job_start);
  630. BFGINIT(state->ob_bin, calloc(1, info->ob_size));
  631. if (!info->work_division)
  632. info->work_division = icarus_probe_work_division(fd, icarus->proc_repr, info);
  633. if (!is_power_of_two(info->work_division))
  634. info->work_division = upper_power_of_two_u32(info->work_division);
  635. info->nonce_mask = mask(info->work_division);
  636. return true;
  637. }
  638. static
  639. struct thr_info *icarus_thread_for_nonce(const struct cgpu_info * const icarus, const uint32_t nonce)
  640. {
  641. struct ICARUS_INFO * const info = icarus->device_data;
  642. unsigned proc_id = 0;
  643. for (int i = info->work_division, j = 0; i /= 2; ++j)
  644. if (nonce & (1 << (31 - j)))
  645. proc_id |= (1 << j);
  646. const struct cgpu_info * const proc = device_proc_by_id(icarus, proc_id) ?: icarus;
  647. return proc->thr[0];
  648. }
  649. static bool icarus_reopen(struct cgpu_info *icarus, struct icarus_state *state, int *fdp)
  650. {
  651. struct ICARUS_INFO *info = icarus->device_data;
  652. // Reopen the serial port to workaround a USB-host-chipset-specific issue with the Icarus's buggy USB-UART
  653. do_icarus_close(icarus->thr[0]);
  654. *fdp = icarus->device_fd = icarus_open(icarus->device_path, info->baud);
  655. if (unlikely(-1 == *fdp)) {
  656. applog(LOG_ERR, "%"PRIpreprv": Failed to reopen on %s", icarus->proc_repr, icarus->device_path);
  657. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  658. state->firstrun = true;
  659. return false;
  660. }
  661. return true;
  662. }
  663. static
  664. bool icarus_job_prepare(struct thr_info *thr, struct work *work, __maybe_unused uint64_t max_nonce)
  665. {
  666. struct cgpu_info * const icarus = thr->cgpu;
  667. struct icarus_state * const state = thr->cgpu_data;
  668. uint8_t * const ob_bin = state->ob_bin;
  669. swab256(ob_bin, work->midstate);
  670. bswap_96p(&ob_bin[0x34], &work->data[0x40]);
  671. if (!(memcmp(&ob_bin[56], "\xff\xff\xff\xff", 4)
  672. || memcmp(&ob_bin, "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0", 32))) {
  673. // This sequence is used on cairnsmore bitstreams for commands, NEVER send it otherwise
  674. applog(LOG_WARNING, "%"PRIpreprv": Received job attempting to send a command, corrupting it!",
  675. icarus->proc_repr);
  676. ob_bin[56] = 0;
  677. }
  678. return true;
  679. }
  680. bool icarus_job_start(struct thr_info *thr)
  681. {
  682. struct cgpu_info *icarus = thr->cgpu;
  683. struct ICARUS_INFO *info = icarus->device_data;
  684. struct icarus_state *state = thr->cgpu_data;
  685. const uint8_t * const ob_bin = state->ob_bin;
  686. int fd = icarus->device_fd;
  687. int ret;
  688. // Handle dynamic clocking for "subclass" devices
  689. // This needs to run before sending next job, since it hashes the command too
  690. if (info->dclk.freqM && likely(!state->firstrun)) {
  691. dclk_preUpdate(&info->dclk);
  692. dclk_updateFreq(&info->dclk, info->dclk_change_clock_func, thr);
  693. }
  694. cgtime(&state->tv_workstart);
  695. ret = icarus_write(icarus->proc_repr, fd, ob_bin, info->ob_size);
  696. if (ret) {
  697. do_icarus_close(thr);
  698. applog(LOG_ERR, "%"PRIpreprv": Comms error (werr=%d)", icarus->proc_repr, ret);
  699. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  700. return false; /* This should never happen */
  701. }
  702. if (opt_debug) {
  703. char ob_hex[(info->ob_size * 2) + 1];
  704. bin2hex(ob_hex, ob_bin, info->ob_size);
  705. applog(LOG_DEBUG, "%"PRIpreprv" sent: %s",
  706. icarus->proc_repr,
  707. ob_hex);
  708. }
  709. return true;
  710. }
  711. static
  712. struct work *icarus_process_worknonce(const struct ICARUS_INFO * const info, struct icarus_state *state, uint32_t *nonce)
  713. {
  714. *nonce = icarus_nonce32toh(info, *nonce);
  715. if (test_nonce(state->last_work, *nonce, false))
  716. return state->last_work;
  717. if (likely(state->last2_work && test_nonce(state->last2_work, *nonce, false)))
  718. return state->last2_work;
  719. return NULL;
  720. }
  721. static
  722. void handle_identify(struct thr_info * const thr, int ret, const bool was_first_run)
  723. {
  724. const struct cgpu_info * const icarus = thr->cgpu;
  725. const struct ICARUS_INFO * const info = icarus->device_data;
  726. struct icarus_state * const state = thr->cgpu_data;
  727. int fd = icarus->device_fd;
  728. struct timeval tv_now;
  729. struct timeval tv_timeout, tv_finish;
  730. double delapsed;
  731. // For reading the nonce from Icarus
  732. unsigned char nonce_bin[info->read_size];
  733. // For storing the the 32-bit nonce
  734. uint32_t nonce;
  735. if (fd == -1)
  736. return;
  737. // If identify is requested (block erupters):
  738. // 1. Don't start the next job right away (above)
  739. // 2. Wait for the current job to complete 100%
  740. if (!was_first_run)
  741. {
  742. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Waiting for current job to finish", icarus->proc_repr);
  743. while (true)
  744. {
  745. cgtime(&tv_now);
  746. delapsed = tdiff(&tv_now, &state->tv_workstart);
  747. if (delapsed + 0.1 > info->fullnonce)
  748. break;
  749. // Try to get more nonces (ignoring work restart)
  750. memset(nonce_bin, 0, sizeof(nonce_bin));
  751. timer_set_delay(&tv_timeout, &tv_now, (uint64_t)(info->fullnonce - delapsed) * 1000000);
  752. ret = icarus_read(icarus->proc_repr, nonce_bin, fd, &tv_finish, NULL, &tv_timeout, &tv_now, info->read_size);
  753. if (ret == ICA_GETS_OK)
  754. {
  755. memcpy(&nonce, nonce_bin, sizeof(nonce));
  756. nonce = icarus_nonce32toh(info, nonce);
  757. submit_nonce(icarus_thread_for_nonce(icarus, nonce), state->last_work, nonce);
  758. }
  759. }
  760. }
  761. else
  762. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Current job should already be finished", icarus->proc_repr);
  763. // 3. Delay 3 more seconds
  764. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Leaving idle for 3 seconds", icarus->proc_repr);
  765. cgsleep_ms(3000);
  766. // Check for work restart in the meantime
  767. if (thr->work_restart)
  768. {
  769. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Work restart requested during delay", icarus->proc_repr);
  770. goto no_job_start;
  771. }
  772. // 4. Start next job
  773. if (!state->firstrun)
  774. {
  775. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Starting next job", icarus->proc_repr);
  776. if (!info->job_start_func(thr))
  777. no_job_start:
  778. state->firstrun = true;
  779. }
  780. state->identify = false;
  781. }
  782. static
  783. void icarus_transition_work(struct icarus_state *state, struct work *work)
  784. {
  785. if (state->last2_work)
  786. free_work(state->last2_work);
  787. state->last2_work = state->last_work;
  788. state->last_work = copy_work(work);
  789. }
  790. static int64_t icarus_scanhash(struct thr_info *thr, struct work *work,
  791. __maybe_unused int64_t max_nonce)
  792. {
  793. struct cgpu_info *icarus;
  794. int fd;
  795. int ret;
  796. struct ICARUS_INFO *info;
  797. struct work *nonce_work;
  798. int64_t hash_count;
  799. struct timeval tv_start = {.tv_sec=0}, elapsed;
  800. struct timeval tv_history_start, tv_history_finish;
  801. struct timeval tv_now, tv_timeout;
  802. double Ti, Xi;
  803. int i;
  804. bool was_hw_error = false;
  805. bool was_first_run;
  806. struct ICARUS_HISTORY *history0, *history;
  807. int count;
  808. double Hs, W, fullnonce;
  809. int read_timeout_ms;
  810. bool limited;
  811. uint32_t values;
  812. int64_t hash_count_range;
  813. elapsed.tv_sec = elapsed.tv_usec = 0;
  814. icarus = thr->cgpu;
  815. struct icarus_state *state = thr->cgpu_data;
  816. was_first_run = state->firstrun;
  817. icarus->drv->job_prepare(thr, work, max_nonce);
  818. // Wait for the previous run's result
  819. fd = icarus->device_fd;
  820. info = icarus->device_data;
  821. // For reading the nonce from Icarus
  822. unsigned char nonce_bin[info->read_size];
  823. // For storing the the 32-bit nonce
  824. uint32_t nonce;
  825. if (unlikely(fd == -1) && !icarus_reopen(icarus, state, &fd))
  826. return -1;
  827. if (!state->firstrun) {
  828. if (state->changework)
  829. {
  830. state->changework = false;
  831. ret = ICA_GETS_RESTART;
  832. }
  833. else
  834. {
  835. read_timeout_ms = info->read_timeout_ms;
  836. keepwaiting:
  837. /* Icarus will return info->read_size bytes nonces or nothing */
  838. memset(nonce_bin, 0, sizeof(nonce_bin));
  839. timer_set_now(&tv_now);
  840. timer_set_delay(&tv_timeout, &tv_now, read_timeout_ms * 1000);
  841. ret = icarus_read(icarus->proc_repr, nonce_bin, fd, &state->tv_workfinish, thr, &tv_timeout, &tv_now, info->read_size);
  842. switch (ret) {
  843. case ICA_GETS_RESTART:
  844. // The prepared work is invalid, and the current work is abandoned
  845. // Go back to the main loop to get the next work, and stuff
  846. // Returning to the main loop will clear work_restart, so use a flag...
  847. state->changework = true;
  848. return 0;
  849. case ICA_GETS_ERROR:
  850. do_icarus_close(thr);
  851. applog(LOG_ERR, "%"PRIpreprv": Comms error (rerr)", icarus->proc_repr);
  852. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  853. if (!icarus_reopen(icarus, state, &fd))
  854. return -1;
  855. break;
  856. case ICA_GETS_TIMEOUT:
  857. if (info->reopen_mode == IRM_TIMEOUT && !icarus_reopen(icarus, state, &fd))
  858. return -1;
  859. case ICA_GETS_OK:
  860. break;
  861. }
  862. }
  863. tv_start = state->tv_workstart;
  864. timersub(&state->tv_workfinish, &tv_start, &elapsed);
  865. }
  866. else
  867. {
  868. if (fd == -1 && !icarus_reopen(icarus, state, &fd))
  869. return -1;
  870. // First run; no nonce, no hashes done
  871. ret = ICA_GETS_ERROR;
  872. }
  873. #ifndef WIN32
  874. tcflush(fd, TCOFLUSH);
  875. #endif
  876. if (ret == ICA_GETS_OK)
  877. {
  878. memcpy(&nonce, nonce_bin, sizeof(nonce));
  879. nonce_work = icarus_process_worknonce(info, state, &nonce);
  880. if (likely(nonce_work))
  881. {
  882. if (nonce_work == state->last2_work)
  883. {
  884. // nonce was for the last job; submit and keep processing the current one
  885. submit_nonce(icarus_thread_for_nonce(icarus, nonce), nonce_work, nonce);
  886. goto keepwaiting;
  887. }
  888. if (info->continue_search)
  889. {
  890. read_timeout_ms = info->read_timeout_ms - ((timer_elapsed_us(&state->tv_workstart, NULL) / 1000) + 1);
  891. if (read_timeout_ms)
  892. {
  893. submit_nonce(icarus_thread_for_nonce(icarus, nonce), nonce_work, nonce);
  894. goto keepwaiting;
  895. }
  896. }
  897. }
  898. else
  899. was_hw_error = true;
  900. }
  901. // Handle dynamic clocking for "subclass" devices
  902. // This needs to run before sending next job, since it hashes the command too
  903. if (info->dclk.freqM && likely(ret == ICA_GETS_OK || ret == ICA_GETS_TIMEOUT)) {
  904. int qsec = ((4 * elapsed.tv_sec) + (elapsed.tv_usec / 250000)) ?: 1;
  905. for (int n = qsec; n; --n)
  906. dclk_gotNonces(&info->dclk);
  907. if (was_hw_error)
  908. dclk_errorCount(&info->dclk, qsec);
  909. }
  910. // Force a USB close/reopen on any hw error (or on request, eg for baud change)
  911. if (was_hw_error || info->reopen_now)
  912. {
  913. info->reopen_now = false;
  914. if (info->reopen_mode == IRM_CYCLE)
  915. {} // Do nothing here, we reopen after sending the job
  916. else
  917. if (!icarus_reopen(icarus, state, &fd))
  918. state->firstrun = true;
  919. }
  920. if (unlikely(state->identify))
  921. {
  922. // Delay job start until later...
  923. }
  924. else
  925. if (unlikely(icarus->deven != DEV_ENABLED || !info->job_start_func(thr)))
  926. state->firstrun = true;
  927. if (info->reopen_mode == IRM_CYCLE && !icarus_reopen(icarus, state, &fd))
  928. state->firstrun = true;
  929. work->blk.nonce = 0xffffffff;
  930. if (ret == ICA_GETS_ERROR) {
  931. state->firstrun = false;
  932. icarus_transition_work(state, work);
  933. hash_count = 0;
  934. goto out;
  935. }
  936. // OK, done starting Icarus's next job... now process the last run's result!
  937. if (ret == ICA_GETS_OK && !was_hw_error)
  938. {
  939. submit_nonce(icarus_thread_for_nonce(icarus, nonce), nonce_work, nonce);
  940. icarus_transition_work(state, work);
  941. hash_count = (nonce & info->nonce_mask);
  942. hash_count++;
  943. hash_count *= info->fpga_count;
  944. applog(LOG_DEBUG, "%"PRIpreprv" nonce = 0x%08x = 0x%08" PRIx64 " hashes (%"PRId64".%06lus)",
  945. icarus->proc_repr,
  946. nonce,
  947. (uint64_t)hash_count,
  948. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  949. }
  950. else
  951. {
  952. double estimate_hashes = elapsed.tv_sec;
  953. estimate_hashes += ((double)elapsed.tv_usec) / 1000000.;
  954. if (ret == ICA_GETS_OK)
  955. {
  956. // We can't be sure which processor got the error, but at least this is a decent guess
  957. inc_hw_errors(icarus_thread_for_nonce(icarus, nonce), state->last_work, nonce);
  958. estimate_hashes -= ICARUS_READ_TIME(info->baud, info->read_size);
  959. }
  960. icarus_transition_work(state, work);
  961. estimate_hashes /= info->Hs;
  962. // If some Serial-USB delay allowed the full nonce range to
  963. // complete it can't have done more than a full nonce
  964. if (unlikely(estimate_hashes > 0xffffffff))
  965. estimate_hashes = 0xffffffff;
  966. if (unlikely(estimate_hashes < 0))
  967. estimate_hashes = 0;
  968. applog(LOG_DEBUG, "%"PRIpreprv" %s nonce = 0x%08"PRIx64" hashes (%"PRId64".%06lus)",
  969. icarus->proc_repr,
  970. (ret == ICA_GETS_OK) ? "bad" : "no",
  971. (uint64_t)estimate_hashes,
  972. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  973. hash_count = estimate_hashes;
  974. if (ret != ICA_GETS_OK)
  975. goto out;
  976. }
  977. // Only ICA_GETS_OK gets here
  978. if (info->do_default_detection && elapsed.tv_sec >= DEFAULT_DETECT_THRESHOLD) {
  979. int MHs = (double)hash_count / ((double)elapsed.tv_sec * 1e6 + (double)elapsed.tv_usec);
  980. --info->do_default_detection;
  981. applog(LOG_DEBUG, "%"PRIpreprv": Autodetect device speed: %d MH/s", icarus->proc_repr, MHs);
  982. if (MHs <= 370 || MHs > 420) {
  983. // Not a real Icarus: enable short timing
  984. applog(LOG_WARNING, "%"PRIpreprv": Seems too %s to be an Icarus; calibrating with short timing", icarus->proc_repr, MHs>380?"fast":"slow");
  985. info->timing_mode = MODE_SHORT;
  986. info->do_icarus_timing = true;
  987. info->do_default_detection = 0;
  988. }
  989. else
  990. if (MHs <= 380) {
  991. // Real Icarus?
  992. if (!info->do_default_detection) {
  993. applog(LOG_DEBUG, "%"PRIpreprv": Seems to be a real Icarus", icarus->proc_repr);
  994. info->read_timeout_ms = info->fullnonce * 1000;
  995. if (info->read_timeout_ms > 0)
  996. --info->read_timeout_ms;
  997. }
  998. }
  999. else
  1000. if (MHs <= 420) {
  1001. // Enterpoint Cairnsmore1
  1002. size_t old_repr_len = strlen(icarus->proc_repr);
  1003. char old_repr[old_repr_len + 1];
  1004. strcpy(old_repr, icarus->proc_repr);
  1005. convert_icarus_to_cairnsmore(icarus);
  1006. info->do_default_detection = 0;
  1007. applog(LOG_WARNING, "%"PRIpreprv": Detected Cairnsmore1 device, upgrading driver to %"PRIpreprv, old_repr, icarus->proc_repr);
  1008. }
  1009. }
  1010. // Ignore possible end condition values ... and hw errors
  1011. // TODO: set limitations on calculated values depending on the device
  1012. // to avoid crap values caused by CPU/Task Switching/Swapping/etc
  1013. if (info->do_icarus_timing
  1014. && !was_hw_error
  1015. && ((nonce & info->nonce_mask) > END_CONDITION)
  1016. && ((nonce & info->nonce_mask) < (info->nonce_mask & ~END_CONDITION))) {
  1017. cgtime(&tv_history_start);
  1018. history0 = &(info->history[0]);
  1019. if (history0->values == 0)
  1020. timeradd(&tv_start, &history_sec, &(history0->finish));
  1021. Ti = (double)(elapsed.tv_sec)
  1022. + ((double)(elapsed.tv_usec))/((double)1000000)
  1023. - ((double)ICARUS_READ_TIME(info->baud, info->read_size));
  1024. Xi = (double)hash_count;
  1025. history0->sumXiTi += Xi * Ti;
  1026. history0->sumXi += Xi;
  1027. history0->sumTi += Ti;
  1028. history0->sumXi2 += Xi * Xi;
  1029. history0->values++;
  1030. if (history0->hash_count_max < hash_count)
  1031. history0->hash_count_max = hash_count;
  1032. if (history0->hash_count_min > hash_count || history0->hash_count_min == 0)
  1033. history0->hash_count_min = hash_count;
  1034. if (history0->values >= info->min_data_count
  1035. && timercmp(&tv_start, &(history0->finish), >)) {
  1036. for (i = INFO_HISTORY; i > 0; i--)
  1037. memcpy(&(info->history[i]),
  1038. &(info->history[i-1]),
  1039. sizeof(struct ICARUS_HISTORY));
  1040. // Initialise history0 to zero for summary calculation
  1041. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  1042. // We just completed a history data set
  1043. // So now recalc read_count based on the whole history thus we will
  1044. // initially get more accurate until it completes INFO_HISTORY
  1045. // total data sets
  1046. count = 0;
  1047. for (i = 1 ; i <= INFO_HISTORY; i++) {
  1048. history = &(info->history[i]);
  1049. if (history->values >= MIN_DATA_COUNT) {
  1050. count++;
  1051. history0->sumXiTi += history->sumXiTi;
  1052. history0->sumXi += history->sumXi;
  1053. history0->sumTi += history->sumTi;
  1054. history0->sumXi2 += history->sumXi2;
  1055. history0->values += history->values;
  1056. if (history0->hash_count_max < history->hash_count_max)
  1057. history0->hash_count_max = history->hash_count_max;
  1058. if (history0->hash_count_min > history->hash_count_min || history0->hash_count_min == 0)
  1059. history0->hash_count_min = history->hash_count_min;
  1060. }
  1061. }
  1062. // All history data
  1063. Hs = (history0->values*history0->sumXiTi - history0->sumXi*history0->sumTi)
  1064. / (history0->values*history0->sumXi2 - history0->sumXi*history0->sumXi);
  1065. W = history0->sumTi/history0->values - Hs*history0->sumXi/history0->values;
  1066. hash_count_range = history0->hash_count_max - history0->hash_count_min;
  1067. values = history0->values;
  1068. // Initialise history0 to zero for next data set
  1069. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  1070. fullnonce = W + Hs * (((double)0xffffffff) + 1);
  1071. read_timeout_ms = fullnonce * 1000;
  1072. if (read_timeout_ms > 0)
  1073. --read_timeout_ms;
  1074. if (info->read_count_limit > 0 && read_timeout_ms > info->read_count_limit * 100) {
  1075. read_timeout_ms = info->read_count_limit * 100;
  1076. limited = true;
  1077. } else
  1078. limited = false;
  1079. info->Hs = Hs;
  1080. info->read_timeout_ms = read_timeout_ms;
  1081. info->fullnonce = fullnonce;
  1082. info->count = count;
  1083. info->W = W;
  1084. info->values = values;
  1085. info->hash_count_range = hash_count_range;
  1086. if (info->min_data_count < MAX_MIN_DATA_COUNT)
  1087. info->min_data_count *= 2;
  1088. else if (info->timing_mode == MODE_SHORT)
  1089. info->do_icarus_timing = false;
  1090. // applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: read_count=%d%s fullnonce=%fs history count=%d Hs=%e W=%e values=%d hash range=0x%08lx min data count=%u", icarus->proc_repr, read_count, limited ? " (limited)" : "", fullnonce, count, Hs, W, values, hash_count_range, info->min_data_count);
  1091. applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: Hs=%e W=%e read_timeout_ms=%u%s fullnonce=%.3fs",
  1092. icarus->proc_repr,
  1093. Hs, W, read_timeout_ms,
  1094. limited ? " (limited)" : "", fullnonce);
  1095. }
  1096. info->history_count++;
  1097. cgtime(&tv_history_finish);
  1098. timersub(&tv_history_finish, &tv_history_start, &tv_history_finish);
  1099. timeradd(&tv_history_finish, &(info->history_time), &(info->history_time));
  1100. }
  1101. out:
  1102. if (unlikely(state->identify))
  1103. handle_identify(thr, ret, was_first_run);
  1104. int hash_count_per_proc = hash_count / icarus->procs;
  1105. if (hash_count_per_proc > 0)
  1106. {
  1107. for_each_managed_proc(proc, icarus)
  1108. {
  1109. struct thr_info * const proc_thr = proc->thr[0];
  1110. hashes_done2(proc_thr, hash_count_per_proc, NULL);
  1111. hash_count -= hash_count_per_proc;
  1112. }
  1113. }
  1114. return hash_count;
  1115. }
  1116. static struct api_data *icarus_drv_stats(struct cgpu_info *cgpu)
  1117. {
  1118. struct api_data *root = NULL;
  1119. //use cgpu->device to handle multiple processors
  1120. struct ICARUS_INFO * const info = cgpu->device->device_data;
  1121. // Warning, access to these is not locked - but we don't really
  1122. // care since hashing performance is way more important than
  1123. // locking access to displaying API debug 'stats'
  1124. // If locking becomes an issue for any of them, use copy_data=true also
  1125. const unsigned read_count_ds = info->read_timeout_ms / 100;
  1126. root = api_add_uint(root, "read_count", &read_count_ds, true);
  1127. root = api_add_uint(root, "read_timeout_ms", &(info->read_timeout_ms), false);
  1128. root = api_add_int(root, "read_count_limit", &(info->read_count_limit), false);
  1129. root = api_add_double(root, "fullnonce", &(info->fullnonce), false);
  1130. root = api_add_int(root, "count", &(info->count), false);
  1131. root = api_add_hs(root, "Hs", &(info->Hs), false);
  1132. root = api_add_double(root, "W", &(info->W), false);
  1133. root = api_add_uint(root, "total_values", &(info->values), false);
  1134. root = api_add_uint64(root, "range", &(info->hash_count_range), false);
  1135. root = api_add_uint64(root, "history_count", &(info->history_count), false);
  1136. root = api_add_timeval(root, "history_time", &(info->history_time), false);
  1137. root = api_add_uint(root, "min_data_count", &(info->min_data_count), false);
  1138. root = api_add_uint(root, "timing_values", &(info->history[0].values), false);
  1139. root = api_add_const(root, "timing_mode", timing_mode_str(info->timing_mode), false);
  1140. root = api_add_bool(root, "is_timing", &(info->do_icarus_timing), false);
  1141. root = api_add_int(root, "baud", &(info->baud), false);
  1142. root = api_add_int(root, "work_division", &(info->work_division), false);
  1143. root = api_add_int(root, "fpga_count", &(info->fpga_count), false);
  1144. return root;
  1145. }
  1146. const char *icarus_set_baud(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1147. {
  1148. struct ICARUS_INFO * const info = proc->device_data;
  1149. const int baud = atoi(newvalue);
  1150. if (!valid_baud(baud))
  1151. return "Invalid baud setting";
  1152. if (info->baud != baud)
  1153. {
  1154. info->baud = baud;
  1155. info->reopen_now = true;
  1156. }
  1157. return NULL;
  1158. }
  1159. static
  1160. const char *icarus_set_probe_timeout(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1161. {
  1162. struct ICARUS_INFO * const info = proc->device_data;
  1163. info->probe_read_count = atof(newvalue) * 10.0 / ICARUS_READ_FAULT_DECISECONDS;
  1164. return NULL;
  1165. }
  1166. const char *icarus_set_work_division(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1167. {
  1168. struct ICARUS_INFO * const info = proc->device_data;
  1169. const int work_division = atoi(newvalue);
  1170. if (!is_power_of_two(work_division))
  1171. return "Invalid work_division: must be a power of two";
  1172. if (info->user_set & IUS_FPGA_COUNT)
  1173. {
  1174. if (info->fpga_count > work_division)
  1175. return "work_division must be >= fpga_count";
  1176. }
  1177. else
  1178. info->fpga_count = work_division;
  1179. info->user_set |= IUS_WORK_DIVISION;
  1180. info->work_division = work_division;
  1181. info->nonce_mask = mask(work_division);
  1182. return NULL;
  1183. }
  1184. static
  1185. const char *icarus_set_fpga_count(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1186. {
  1187. struct ICARUS_INFO * const info = proc->device_data;
  1188. const int fpga_count = atoi(newvalue);
  1189. if (fpga_count < 1 || (fpga_count > info->work_division && info->work_division))
  1190. return "Invalid fpga_count: must be >0 and <=work_division";
  1191. info->fpga_count = fpga_count;
  1192. return NULL;
  1193. }
  1194. const char *icarus_set_reopen(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1195. {
  1196. struct ICARUS_INFO * const info = proc->device_data;
  1197. if ((!strcasecmp(newvalue, "never")) || !strcasecmp(newvalue, "-r"))
  1198. info->reopen_mode = IRM_NEVER;
  1199. else
  1200. if (!strcasecmp(newvalue, "timeout"))
  1201. info->reopen_mode = IRM_TIMEOUT;
  1202. else
  1203. if ((!strcasecmp(newvalue, "cycle")) || !strcasecmp(newvalue, "r"))
  1204. info->reopen_mode = IRM_CYCLE;
  1205. else
  1206. if (!strcasecmp(newvalue, "now"))
  1207. info->reopen_now = true;
  1208. else
  1209. return "Invalid reopen mode";
  1210. return NULL;
  1211. }
  1212. static void icarus_shutdown(struct thr_info *thr)
  1213. {
  1214. do_icarus_close(thr);
  1215. free(thr->cgpu_data);
  1216. }
  1217. const struct bfg_set_device_definition icarus_set_device_funcs[] = {
  1218. // NOTE: Order of parameters below is important for --icarus-options
  1219. {"baud" , icarus_set_baud , "serial baud rate"},
  1220. {"work_division", icarus_set_work_division, "number of pieces work is split into"},
  1221. {"fpga_count" , icarus_set_fpga_count , "number of chips working on pieces"},
  1222. {"reopen" , icarus_set_reopen , "how often to reopen device: never, timeout, cycle, (or now for a one-shot reopen)"},
  1223. // NOTE: Below here, order is irrelevant
  1224. {"probe_timeout", icarus_set_probe_timeout},
  1225. {"timing" , icarus_set_timing , "timing of device; see README.FPGA"},
  1226. {NULL},
  1227. };
  1228. const struct bfg_set_device_definition icarus_set_device_funcs_live[] = {
  1229. {"baud" , icarus_set_baud , "serial baud rate"},
  1230. {"work_division", icarus_set_work_division, "number of pieces work is split into"},
  1231. {"reopen" , icarus_set_reopen , "how often to reopen device: never, timeout, cycle, (or now for a one-shot reopen)"},
  1232. {"timing" , icarus_set_timing , "timing of device; see README.FPGA"},
  1233. {NULL},
  1234. };
  1235. struct device_drv icarus_drv = {
  1236. .dname = "icarus",
  1237. .name = "ICA",
  1238. .probe_priority = -115,
  1239. .lowl_probe = icarus_lowl_probe,
  1240. .get_api_stats = icarus_drv_stats,
  1241. .thread_prepare = icarus_prepare,
  1242. .thread_init = icarus_init,
  1243. .scanhash = icarus_scanhash,
  1244. .job_prepare = icarus_job_prepare,
  1245. .thread_disable = close_device_fd,
  1246. .thread_shutdown = icarus_shutdown,
  1247. };