driver-aan.c 12 KB

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  1. /*
  2. * Copyright 2014 Luke Dashjr
  3. * Copyright 2013 Zefir Kurtisi
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the Free
  7. * Software Foundation; either version 3 of the License, or (at your option)
  8. * any later version. See COPYING for more details.
  9. */
  10. #include "config.h"
  11. #include <stdbool.h>
  12. #include <stdint.h>
  13. #include <string.h>
  14. #include "deviceapi.h"
  15. #include "driver-aan.h"
  16. #include "logging.h"
  17. #include "lowl-spi.h"
  18. #include "miner.h"
  19. #include "util.h"
  20. #define AAN_DEFAULT_NONCE_PDIFF 8
  21. #define AAN_PROBE_TIMEOUT_US 3750000
  22. #define AAN_INIT_TIMEOUT_US 5000000
  23. #define AAN_READ_INTERVAL_US 100000
  24. #define AAN_REGISTER_SIZE 6
  25. enum aan_cmd {
  26. AAN_BIST_START = 0x01,
  27. AAN_BIST_FIX = 0x03,
  28. AAN_RESET = 0x04,
  29. AAN_WRITE_JOB = 0x07,
  30. AAN_READ_RESULT = 0x08,
  31. AAN_WRITE_REG = 0x09,
  32. AAN_READ_REG = 0x0a,
  33. AAN_READ_REG_RESP = 0x1a,
  34. };
  35. static void aan_spi_parse_rx(struct spi_port *);
  36. static
  37. void aan_spi_cmd_queue(struct spi_port * const spi, const uint8_t cmd, const uint8_t chip, const void * const data, const size_t datalen)
  38. {
  39. const struct aan_hooks * const hooks = spi->userp;
  40. const uint8_t cmdbuf[2] = {cmd, chip};
  41. hooks->precmd(spi);
  42. spi_emit_buf(spi, cmdbuf, sizeof(cmdbuf));
  43. if (datalen)
  44. spi_emit_buf(spi, data, datalen);
  45. }
  46. static
  47. bool aan_spi_txrx(struct spi_port * const spi)
  48. {
  49. if (unlikely(!spi_txrx(spi)))
  50. return false;
  51. aan_spi_parse_rx(spi);
  52. return true;
  53. }
  54. static
  55. bool aan_spi_cmd_send(struct spi_port * const spi, const uint8_t cmd, const uint8_t chip, const void * const data, const size_t datalen)
  56. {
  57. aan_spi_cmd_queue(spi, cmd, chip, data, datalen);
  58. return aan_spi_txrx(spi);
  59. }
  60. static
  61. bool aan_spi_cmd_resp(struct spi_port * const spi, const uint8_t cmd, const uint8_t chip, const struct timeval * const tvp_timeout)
  62. {
  63. const uint8_t cmdbuf[2] = {cmd, chip};
  64. uint8_t * const rx = spi_getrxbuf(spi);
  65. while (true)
  66. {
  67. spi_emit_nop(spi, 2);
  68. if (unlikely(!spi_txrx(spi)))
  69. return false;
  70. if (!memcmp(rx, cmdbuf, 2))
  71. break;
  72. aan_spi_parse_rx(spi);
  73. if (unlikely(tvp_timeout && timer_passed(tvp_timeout, NULL)))
  74. return false;
  75. }
  76. spi_clear_buf(spi);
  77. return true;
  78. }
  79. static
  80. bool aan_spi_cmd(struct spi_port * const spi, const uint8_t cmd, const uint8_t chip, const void * const data, const size_t datalen, const struct timeval * const tvp_timeout)
  81. {
  82. if (!aan_spi_cmd_send(spi, cmd, chip, data, datalen))
  83. return false;
  84. if (!aan_spi_cmd_resp(spi, cmd, chip, tvp_timeout))
  85. return false;
  86. return true;
  87. }
  88. static
  89. bool aan_read_reg(struct spi_port * const spi, const uint8_t chip, void * const out_buf, const struct timeval * const tvp_timeout)
  90. {
  91. if (!aan_spi_cmd_send(spi, AAN_READ_REG, chip, NULL, 0))
  92. return false;
  93. if (!aan_spi_cmd_resp(spi, AAN_READ_REG_RESP, chip, tvp_timeout))
  94. return false;
  95. spi_emit_nop(spi, AAN_REGISTER_SIZE);
  96. if (!spi_txrx(spi))
  97. applogr(false, LOG_DEBUG, "%s: %s failed", __func__, "spi_txrx");
  98. uint8_t * const rx = spi_getrxbuf(spi);
  99. memcpy(out_buf, rx, AAN_REGISTER_SIZE);
  100. return true;
  101. }
  102. int aan_detect_spi(int * const out_chipcount, struct spi_port * const * const spi_a, const int spi_n)
  103. {
  104. struct timeval tv_timeout;
  105. timer_set_delay_from_now(&tv_timeout, AAN_PROBE_TIMEOUT_US);
  106. int state[spi_n];
  107. int completed = 0;
  108. for (int i = 0; i < spi_n; ++i)
  109. {
  110. struct spi_port * const spi = spi_a[i];
  111. aan_spi_cmd_send(spi, state[i] = AAN_RESET, AAN_ALL_CHIPS, NULL, 0);
  112. out_chipcount[i] = -1;
  113. }
  114. do {
  115. for (int i = 0; i < spi_n; ++i)
  116. {
  117. if (state[i] == -1)
  118. continue;
  119. struct spi_port * const spi = spi_a[i];
  120. spi_emit_nop(spi, 2);
  121. if (unlikely(!spi_txrx(spi)))
  122. {
  123. spifail:
  124. state[i] = -1;
  125. continue;
  126. }
  127. uint8_t * const rx = spi_getrxbuf(spi);
  128. if (rx[0] == state[i] && rx[1] == AAN_ALL_CHIPS)
  129. {
  130. switch (state[i])
  131. {
  132. case AAN_RESET:
  133. applog(LOG_DEBUG, "%s: Reset complete", spi->repr);
  134. spi_clear_buf(spi);
  135. aan_spi_cmd_send(spi, state[i] = AAN_BIST_START, AAN_ALL_CHIPS, NULL, 0);
  136. spi_emit_nop(spi, 2);
  137. break;
  138. case AAN_BIST_START:
  139. if (unlikely(!spi_txrx(spi)))
  140. goto spifail;
  141. out_chipcount[i] = rx[1];
  142. state[i] = -1;
  143. ++completed;
  144. applog(LOG_DEBUG, "%s: BIST_START complete (%d chips)", spi->repr, rx[1]);
  145. break;
  146. }
  147. spi_clear_buf(spi);
  148. continue;
  149. }
  150. aan_spi_parse_rx(spi);
  151. }
  152. } while (completed < spi_n && likely(!timer_passed(&tv_timeout, NULL)));
  153. applog(LOG_DEBUG, "%s completed for %d out of %d SPI ports", __func__, completed, spi_n);
  154. return completed;
  155. }
  156. bool aan_init(struct thr_info * const master_thr)
  157. {
  158. struct cgpu_info * const master_dev = master_thr->cgpu, *dev = NULL;
  159. struct aan_board_data *board;
  160. struct timeval tv_timeout, tv_now;
  161. int chipid;
  162. for_each_managed_proc(proc, master_dev)
  163. {
  164. struct spi_port * const spi = proc->device_data;
  165. struct thr_info * const thr = proc->thr[0];
  166. if (dev != proc->device)
  167. {
  168. dev = proc->device;
  169. chipid = 0;
  170. timer_set_now(&tv_now);
  171. board = malloc(sizeof(*board));
  172. *board = (struct aan_board_data){
  173. .master_dev = master_dev,
  174. .spi = spi,
  175. .tv_next_poll = tv_now,
  176. };
  177. spi->cgpu = dev;
  178. while (true)
  179. {
  180. timer_set_delay(&tv_timeout, &tv_now, AAN_INIT_TIMEOUT_US);
  181. if (aan_spi_cmd(spi, AAN_BIST_FIX, AAN_ALL_CHIPS, NULL, 0, &tv_timeout))
  182. break;
  183. applog(LOG_ERR, "%s: Failed to %s", proc->dev_repr, "BIST_FIX");
  184. }
  185. }
  186. proc->device_data = board;
  187. struct aan_chip_data * const chip = malloc(sizeof(*chip));
  188. thr->cgpu_data = chip;
  189. thr->queue_full = true;
  190. *chip = (struct aan_chip_data){
  191. .chipid = ++chipid,
  192. .desired_nonce_pdiff = AAN_DEFAULT_NONCE_PDIFF,
  193. };
  194. }
  195. master_thr->tv_poll = tv_now;
  196. return true;
  197. }
  198. static
  199. bool aan_spi_send_work(struct spi_port * const spi, const uint8_t chipid, const uint8_t jobid, const struct work * const work)
  200. {
  201. uint8_t buf[0x38];
  202. swab256(&buf[0], work->midstate);
  203. swap32yes(&buf[0x20], &work->data[0x40], 3);
  204. memset(&buf[0x2c], 0, 4); // start nonce
  205. uint32_t compressed_target = (uint32_t)(0x10000 / work->nonce_diff) | (/*exponent*/ 0x1d << 24);
  206. pk_u32le(buf, 0x30, compressed_target);
  207. memset(&buf[0x34], 0xff, 4); // end nonce
  208. return aan_spi_cmd_send(spi, AAN_WRITE_JOB | (jobid << 4), chipid, buf, sizeof(buf));
  209. }
  210. static bool set_work(struct cgpu_info *, uint8_t, struct work *);
  211. bool aan_queue_append(struct thr_info * const thr, struct work * const work)
  212. {
  213. struct cgpu_info *proc = thr->cgpu;
  214. struct aan_chip_data * const chip = thr->cgpu_data;
  215. struct cgpu_info *dev = proc->device;
  216. struct aan_board_data *board = dev->device_data;
  217. struct cgpu_info * const master_dev = board->master_dev;
  218. struct aan_board_data * const master_board = master_dev->device_data;
  219. applog(LOG_DEBUG, "%s: queue_append queues_empty=%d", proc->proc_repr, master_board->queues_empty-1);
  220. work->nonce_diff = work->work_difficulty;
  221. if (work->nonce_diff > chip->desired_nonce_pdiff)
  222. work->nonce_diff = chip->desired_nonce_pdiff;
  223. chip->current_nonce_pdiff = work->nonce_diff;
  224. if (set_work(dev, proc->proc_id + 1, work))
  225. hashes_done2(thr, 0x100000000, NULL);
  226. thr->queue_full = true;
  227. if (!--master_board->queues_empty)
  228. {
  229. struct thr_info * const master_thr = master_dev->thr[0];
  230. // Reactivate polling
  231. dev = NULL;
  232. for_each_managed_proc(proc, master_dev)
  233. {
  234. if (dev == proc->device)
  235. continue;
  236. dev = proc->device;
  237. board = dev->device_data;
  238. reduce_timeout_to(&master_thr->tv_poll, &board->tv_next_poll);
  239. }
  240. }
  241. return true;
  242. }
  243. void aan_queue_flush(struct thr_info * const thr)
  244. {
  245. // TODO
  246. }
  247. static
  248. struct cgpu_info *aan_proc_for_chipid(struct cgpu_info * const dev, const int chipid)
  249. {
  250. struct cgpu_info *proc = dev;
  251. for (int i = 1; i < chipid; ++i)
  252. {
  253. proc = proc->next_proc;
  254. if (unlikely((!proc) || proc->device != dev))
  255. {
  256. badchipid:
  257. inc_hw_errors_only(dev->thr[0]);
  258. applogr(NULL, LOG_ERR, "%s: Chip number %d out of range", dev->dev_repr, chipid);
  259. }
  260. }
  261. if (unlikely(!chipid))
  262. goto badchipid;
  263. return proc;
  264. }
  265. static
  266. void aan_spi_parse_rx(struct spi_port * const spi)
  267. {
  268. spi_clear_buf(spi);
  269. }
  270. #define MAX_POLL_NUM 20
  271. /* set work for given chip, returns true if a nonce range was finished */
  272. static
  273. bool set_work(struct cgpu_info * const dev, const uint8_t chip_id, struct work * const work)
  274. {
  275. struct aan_board_data * const board = dev->device_data;
  276. struct spi_port * const spi = board->spi;
  277. struct cgpu_info * const proc = aan_proc_for_chipid(dev, chip_id);
  278. struct thr_info * const thr = proc->thr[0];
  279. struct aan_chip_data * const chip = thr->cgpu_data;
  280. bool retval = false;
  281. ++chip->last_jobid;
  282. chip->last_jobid &= 3;
  283. if (chip->works[chip->last_jobid] != NULL)
  284. {
  285. free_work(chip->works[chip->last_jobid]);
  286. chip->works[chip->last_jobid] = NULL;
  287. retval = true;
  288. }
  289. if (!aan_spi_send_work(spi, chip_id, chip->last_jobid + 1, work))
  290. {
  291. free_work(work);
  292. applog(LOG_ERR, "%"PRIpreprv": Failed to set work %d", proc->proc_repr, chip->last_jobid + 1);
  293. }
  294. else
  295. chip->works[chip->last_jobid] = work;
  296. spi_clear_buf(spi);
  297. return retval;
  298. }
  299. /* check for pending results in a chain, returns false if output queue empty */
  300. static
  301. bool get_nonce(struct cgpu_info * const dev, uint8_t * const nonce, uint8_t * const chip, uint8_t * const job_id)
  302. {
  303. struct aan_board_data * const board = dev->device_data;
  304. struct spi_port * const spi = board->spi;
  305. int pollLen = MAX_POLL_NUM * dev->procs;
  306. if (pollLen <= 0)
  307. pollLen = MAX_POLL_NUM;
  308. if (!aan_spi_cmd_send(spi, AAN_READ_RESULT, AAN_ALL_CHIPS, NULL, 0))
  309. return false;
  310. for (int i = 0; i < pollLen; ++i)
  311. {
  312. spi_clear_buf(spi);
  313. spi_emit_nop(spi, 2);
  314. if (!spi_txrx(spi))
  315. applogr(false, LOG_ERR, "%s: SPI error in get_nonce", dev->dev_repr);
  316. uint8_t * const spi_rx = spi_getrxbuf(spi);
  317. if (spi_rx[0] == AAN_READ_RESULT && spi_rx[1] == 0x00)
  318. applogr(false, LOG_DEBUG, "%s: Output queue empty", dev->dev_repr);
  319. if ((spi_rx[0] & 0x0f) == AAN_READ_RESULT && spi_rx[1] != 0)
  320. {
  321. *job_id = spi_rx[0] >> 4;
  322. *chip = spi_rx[1];
  323. spi_emit_nop(spi, 2);
  324. if (!spi_txrx(spi))
  325. applogr(false, LOG_ERR, "SPI Err(%s):get_nonce", dev->dev_repr);
  326. memcpy(nonce, spi_rx, 4);
  327. applog(LOG_DEBUG, "%s: Got nonce for chip %d / job_id %d", dev->dev_repr, *chip, *job_id);
  328. return true;
  329. }
  330. }
  331. return false;
  332. }
  333. static
  334. void aan_scanwork(struct cgpu_info * const dev, struct thr_info * const master_thr)
  335. {
  336. struct aan_board_data * const board = dev->device_data;
  337. struct spi_port * const spi = board->spi;
  338. uint32_t nonce;
  339. uint8_t chip_id;
  340. uint8_t job_id;
  341. bool work_updated = false;
  342. if (!timer_passed(&board->tv_next_poll, NULL))
  343. goto out;
  344. while (get_nonce(dev, (uint8_t*)&nonce, &chip_id, &job_id))
  345. {
  346. nonce = bswap_32(nonce);
  347. work_updated = true;
  348. struct cgpu_info * const proc = aan_proc_for_chipid(dev, chip_id);
  349. if (!proc)
  350. continue;
  351. struct thr_info * const thr = proc->thr[0];
  352. struct aan_chip_data * const chip = thr->cgpu_data;
  353. if (job_id < 1 || job_id > 4)
  354. {
  355. badjob:
  356. inc_hw_errors3(thr, NULL, &nonce, chip->current_nonce_pdiff);
  357. continue;
  358. }
  359. struct work * const work = chip->works[job_id - 1];
  360. if (!work)
  361. goto badjob;
  362. submit_nonce(thr, work, nonce);
  363. }
  364. /* check for completed works */
  365. for_each_logical_proc(proc, dev)
  366. {
  367. struct thr_info * const thr = proc->thr[0];
  368. const int i = proc->proc_id;
  369. uint8_t spi_rx[8];
  370. if (!aan_read_reg(spi, i + 1, &spi_rx[2], NULL))
  371. {
  372. applog(LOG_ERR, "%"PRIpreprv": Failed to read reg", proc->proc_repr);
  373. continue;
  374. }
  375. if ((spi_rx[5] & 2) != 2)
  376. {
  377. struct cgpu_info * const master_dev = board->master_dev;
  378. struct aan_board_data * const master_board = master_dev->device_data;
  379. work_updated = true;
  380. thr->queue_full = false;
  381. ++master_board->queues_empty;
  382. applog(LOG_DEBUG, "%s: queue_full=false queues_empty=%d", proc->proc_repr, master_board->queues_empty);
  383. }
  384. }
  385. if (!work_updated)
  386. timer_set_delay_from_now(&board->tv_next_poll, AAN_READ_INTERVAL_US);
  387. out:
  388. reduce_timeout_to(&master_thr->tv_poll, &board->tv_next_poll);
  389. }
  390. void aan_poll(struct thr_info * const master_thr)
  391. {
  392. struct cgpu_info * const master_dev = master_thr->cgpu, *dev = NULL;
  393. struct aan_board_data * const master_board = master_dev->device_data;
  394. timer_unset(&master_thr->tv_poll);
  395. for_each_managed_proc(proc, master_dev)
  396. {
  397. if (dev == proc->device)
  398. continue;
  399. dev = proc->device;
  400. aan_scanwork(dev, master_thr);
  401. }
  402. if (master_board->queues_empty)
  403. // Avoid polling when we have queues to fill
  404. timer_unset(&master_thr->tv_poll);
  405. }