driver-bitmain.c 71 KB

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  1. /*
  2. * Copyright 2012-2014 Lingchao Xu
  3. * Copyright 2015 Luke Dashjr
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the Free
  7. * Software Foundation; either version 3 of the License, or (at your option)
  8. * any later version. See COPYING for more details.
  9. */
  10. #include "config.h"
  11. #include <limits.h>
  12. #include <math.h>
  13. #include <pthread.h>
  14. #include <stdio.h>
  15. #include <sys/time.h>
  16. #include <sys/types.h>
  17. #include <dirent.h>
  18. #include <unistd.h>
  19. #ifndef WIN32
  20. #include <sys/select.h>
  21. #include <termios.h>
  22. #include <sys/stat.h>
  23. #include <fcntl.h>
  24. #ifndef O_CLOEXEC
  25. #define O_CLOEXEC 0
  26. #endif
  27. #else
  28. #include "compat.h"
  29. #include <windows.h>
  30. #include <io.h>
  31. #endif
  32. #include <uthash.h>
  33. #include "deviceapi.h"
  34. #include "miner.h"
  35. #include "driver-bitmain.h"
  36. #include "lowl-vcom.h"
  37. #include "util.h"
  38. const bool opt_bitmain_hwerror = true;
  39. BFG_REGISTER_DRIVER(bitmain_drv)
  40. static const struct bfg_set_device_definition bitmain_set_device_funcs_init[];
  41. static inline unsigned int bfg_work_block(struct work * const work)
  42. {
  43. return *((unsigned int*)(&work->data[4]));
  44. }
  45. #define htole8(x) (x)
  46. struct cgpu_info *btm_alloc_cgpu(struct device_drv *drv, int threads)
  47. {
  48. struct cgpu_info *cgpu = calloc(1, sizeof(*cgpu));
  49. if (unlikely(!cgpu))
  50. quit(1, "Failed to calloc cgpu for %s in usb_alloc_cgpu", drv->dname);
  51. cgpu->drv = drv;
  52. cgpu->deven = DEV_ENABLED;
  53. cgpu->threads = threads;
  54. cgpu->device_fd = -1;
  55. struct bitmain_info *info = malloc(sizeof(*info));
  56. if (unlikely(!info))
  57. quit(1, "Failed to calloc bitmain_info data");
  58. cgpu->device_data = info;
  59. *info = (struct bitmain_info){
  60. .baud = BITMAIN_IO_SPEED,
  61. .chain_num = BITMAIN_DEFAULT_CHAIN_NUM,
  62. .asic_num = BITMAIN_DEFAULT_ASIC_NUM,
  63. .timeout = BITMAIN_DEFAULT_TIMEOUT,
  64. .frequency = BITMAIN_DEFAULT_FREQUENCY,
  65. .voltage[0] = BITMAIN_DEFAULT_VOLTAGE0,
  66. .voltage[1] = BITMAIN_DEFAULT_VOLTAGE1,
  67. };
  68. sprintf(info->frequency_t, "%d", BITMAIN_DEFAULT_FREQUENCY),
  69. strcpy(info->voltage_t, BITMAIN_DEFAULT_VOLTAGE_T);
  70. return cgpu;
  71. }
  72. struct cgpu_info *btm_free_cgpu(struct cgpu_info *cgpu)
  73. {
  74. if(cgpu->device_path) {
  75. free((char*)cgpu->device_path);
  76. }
  77. free(cgpu);
  78. return NULL;
  79. }
  80. bool btm_init(struct cgpu_info *cgpu, const char * devpath)
  81. {
  82. applog(LOG_DEBUG, "btm_init cgpu->device_fd=%d", cgpu->device_fd);
  83. int fd = -1;
  84. if(cgpu->device_fd >= 0) {
  85. return false;
  86. }
  87. fd = serial_open(devpath, 115200, 1, true);
  88. if(fd == -1) {
  89. applog(LOG_DEBUG, "%s open %s error %d",
  90. cgpu->drv->dname, devpath, errno);
  91. return false;
  92. }
  93. cgpu->device_path = strdup(devpath);
  94. cgpu->device_fd = fd;
  95. applog(LOG_DEBUG, "btm_init open device fd = %d", cgpu->device_fd);
  96. return true;
  97. }
  98. void btm_uninit(struct cgpu_info *cgpu)
  99. {
  100. applog(LOG_DEBUG, "BTM uninit %s%i", cgpu->drv->name, cgpu->device_fd);
  101. // May have happened already during a failed initialisation
  102. // if release_cgpu() was called due to a USB NODEV(err)
  103. if (cgpu->device_fd >= 0) {
  104. serial_close(cgpu->device_fd);
  105. cgpu->device_fd = -1;
  106. }
  107. if(cgpu->device_path) {
  108. free((char*)cgpu->device_path);
  109. cgpu->device_path = NULL;
  110. }
  111. }
  112. int btm_read(struct cgpu_info * const cgpu, void * const buf, const size_t bufsize)
  113. {
  114. int err = 0;
  115. //applog(LOG_DEBUG, "btm_read ----- %d -----", bufsize);
  116. err = read(cgpu->device_fd, buf, bufsize);
  117. return err;
  118. }
  119. int btm_write(struct cgpu_info * const cgpu, void * const buf, const size_t bufsize)
  120. {
  121. int err = 0;
  122. //applog(LOG_DEBUG, "btm_write ----- %d -----", bufsize);
  123. err = write(cgpu->device_fd, buf, bufsize);
  124. return err;
  125. }
  126. #define BITMAIN_CALC_DIFF1 1
  127. #ifdef WIN32
  128. #define BITMAIN_TEST
  129. #endif
  130. #define BITMAIN_TEST_PRINT_WORK 0
  131. #ifdef BITMAIN_TEST
  132. #define BITMAIN_TEST_NUM 19
  133. #define BITMAIN_TEST_USENUM 1
  134. int g_test_index = 0;
  135. const char btm_work_test_data[BITMAIN_TEST_NUM][256] = {
  136. "00000002ddc1ce5579dbec17f17fbb8f31ae218a814b2a0c1900f0d90000000100000000b58aa6ca86546b07a5a46698f736c7ca9c0eedc756d8f28ac33c20cc24d792675276f879190afc85b6888022000000800000000000000000000000000000000000000000000000000000000000000000",
  137. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000eb2d45233c5b02de50ddcb9049ba16040e0ba00e9750a474eec75891571d925b52dfda4a190266667145b02f000000800000000000000000000000000000000000000000000000000000000000000000",
  138. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000090c7d3743e0b0562e4f56d3dd35cece3c5e8275d0abb21bf7e503cb72bd7ed3b52dfda4a190266667bbb58d7000000800000000000000000000000000000000000000000000000000000000000000000",
  139. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000006e0561da06022bfbb42c5ecd74a46bfd91934f201b777e9155cc6c3674724ec652dfda4a19026666a0cd827b000000800000000000000000000000000000000000000000000000000000000000000000",
  140. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000000312f42ce4964cc23f2d8c039f106f25ddd58e10a1faed21b3bba4b0e621807b52dfda4a1902666629c9497d000000800000000000000000000000000000000000000000000000000000000000000000",
  141. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000033093a6540dbe8f7f3d19e3d2af05585ac58dafad890fa9a942e977334a23d6e52dfda4a190266665ae95079000000800000000000000000000000000000000000000000000000000000000000000000",
  142. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000bd7893057d06e69705bddf9a89c7bac6b40c5b32f15e2295fc8c5edf491ea24952dfda4a190266664b89b4d3000000800000000000000000000000000000000000000000000000000000000000000000",
  143. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000075e66f533e53837d14236a793ee4e493985642bc39e016b9e63adf14a584a2aa52dfda4a19026666ab5d638d000000800000000000000000000000000000000000000000000000000000000000000000",
  144. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d936f90c5db5f0fe1d017344443854fbf9e40a07a9b7e74fedc8661c23162bff52dfda4a19026666338e79cb000000800000000000000000000000000000000000000000000000000000000000000000",
  145. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d2c1a7d279a4355b017bc0a4b0a9425707786729f21ee18add3fda4252a31a4152dfda4a190266669bc90806000000800000000000000000000000000000000000000000000000000000000000000000",
  146. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000ad36d19f33d04ca779942843890bc3b083cec83a4b60b6c45cf7d21fc187746552dfda4a1902666675d81ab7000000800000000000000000000000000000000000000000000000000000000000000000",
  147. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000093b809cf82b76082eacb55bc35b79f31882ed0976fd102ef54783cd24341319b52dfda4a1902666642ab4e42000000800000000000000000000000000000000000000000000000000000000000000000",
  148. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000007411ff315430a7bbf41de8a685d457e82d5177c05640d6a4436a40f39e99667852dfda4a190266662affa4b5000000800000000000000000000000000000000000000000000000000000000000000000",
  149. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000001ad0db5b9e1e2b57c8d3654c160f5a51067521eab7e340a270639d97f00a3fa252dfda4a1902666601a47bb6000000800000000000000000000000000000000000000000000000000000000000000000",
  150. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000022e055c442c46bbe16df68603a26891f6e4cf85b90102b39fd7cadb602b4e34552dfda4a1902666695d33cea000000800000000000000000000000000000000000000000000000000000000000000000",
  151. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000009c8baf5a8a1e16de2d6ae949d5fec3ed751f10dcd4c99810f2ce08040fb9e31d52dfda4a19026666fe78849d000000800000000000000000000000000000000000000000000000000000000000000000",
  152. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000e5655532b414887f35eb4652bc7b11ebac12891f65bc08cbe0ce5b277b9e795152dfda4a19026666fcc0d1d1000000800000000000000000000000000000000000000000000000000000000000000000",
  153. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000f272c5508704e2b62dd1c30ea970372c40bf00f9203f9bf69d456b4a7fbfffe352dfda4a19026666c03d4399000000800000000000000000000000000000000000000000000000000000000000000000",
  154. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000fca3b4531ba627ad9b0e23cdd84c888952c23810df196e9c6db0bcecba6a830952dfda4a19026666c14009cb000000800000000000000000000000000000000000000000000000000000000000000000"
  155. };
  156. const char btm_work_test_midstate[BITMAIN_TEST_NUM][256] = {
  157. "2d8738e7f5bcf76dcb8316fec772e20e240cd58c88d47f2d3f5a6a9547ed0a35",
  158. "d31b6ce09c0bfc2af6f3fe3a03475ebefa5aa191fa70a327a354b2c22f9692f1",
  159. "84a8c8224b80d36caeb42eff2a100f634e1ff873e83fd02ef1306a34abef9dbe",
  160. "059882159439b9b32968c79a93c5521e769dbea9d840f56c2a17b9ad87e530b8",
  161. "17fa435d05012574f8f1da26994cc87b6cb9660b5e82072dc6a0881cec150a0d",
  162. "92a28cc5ec4ba6a2688471dfe2032b5fe97c805ca286c503e447d6749796c6af",
  163. "1677a03516d6e9509ac37e273d2482da9af6e077abe8392cdca6a30e916a7ae9",
  164. "50bbe09f1b8ac18c97aeb745d5d2c3b5d669b6ac7803e646f65ac7b763a392d1",
  165. "e46a0022ebdc303a7fb1a0ebfa82b523946c312e745e5b8a116b17ae6b4ce981",
  166. "8f2f61e7f5b4d76d854e6d266acfff4d40347548216838ccc4ef3b9e43d3c9ea",
  167. "0a450588ae99f75d676a08d0326e1ea874a3497f696722c78a80c7b6ee961ea6",
  168. "3c4c0fc2cf040b806c51b46de9ec0dcc678a7cc5cf3eff11c6c03de3bc7818cc",
  169. "f6c7c785ab5daddb8f98e5f854f2cb41879fcaf47289eb2b4196fefc1b28316f",
  170. "005312351ccb0d0794779f5023e4335b5cad221accf0dfa3da7b881266fa9f5a",
  171. "7b26d189c6bba7add54143179aadbba7ccaeff6887bd8d5bec9597d5716126e6",
  172. "a4718f4c801e7ddf913a9474eb71774993525684ffea1915f767ab16e05e6889",
  173. "6b6226a8c18919d0e55684638d33a6892a00d22492cc2f5906ca7a4ac21c74a7",
  174. "383114dccd1cb824b869158aa2984d157fcb02f46234ceca65943e919329e697",
  175. "d4d478df3016852b27cb1ae9e1e98d98617f8d0943bf9dc1217f47f817236222"
  176. };
  177. #endif
  178. bool opt_bitmain_checkall = false;
  179. bool opt_bitmain_nobeeper = false;
  180. bool opt_bitmain_notempoverctrl = false;
  181. bool opt_bitmain_homemode = false;
  182. int opt_bitmain_temp = BITMAIN_TEMP_TARGET;
  183. int opt_bitmain_overheat = BITMAIN_TEMP_OVERHEAT;
  184. int opt_bitmain_fan_min = BITMAIN_DEFAULT_FAN_MIN_PWM;
  185. int opt_bitmain_fan_max = BITMAIN_DEFAULT_FAN_MAX_PWM;
  186. int opt_bitmain_freq_min = BITMAIN_MIN_FREQUENCY;
  187. int opt_bitmain_freq_max = BITMAIN_MAX_FREQUENCY;
  188. bool opt_bitmain_auto;
  189. // --------------------------------------------------------------
  190. // CRC16 check table
  191. // --------------------------------------------------------------
  192. const uint8_t chCRCHTalbe[] = // CRC high byte table
  193. {
  194. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  195. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  196. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  197. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  198. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  199. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  200. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  201. 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  202. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  203. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  204. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  205. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  206. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  207. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  208. 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  209. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  210. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  211. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  212. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  213. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  214. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  215. 0x00, 0xC1, 0x81, 0x40
  216. };
  217. const uint8_t chCRCLTalbe[] = // CRC low byte table
  218. {
  219. 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7,
  220. 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E,
  221. 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9,
  222. 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC,
  223. 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
  224. 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32,
  225. 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D,
  226. 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38,
  227. 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF,
  228. 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
  229. 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1,
  230. 0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4,
  231. 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB,
  232. 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA,
  233. 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
  234. 0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0,
  235. 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97,
  236. 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E,
  237. 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89,
  238. 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
  239. 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83,
  240. 0x41, 0x81, 0x80, 0x40
  241. };
  242. static uint16_t CRC16(const uint8_t* p_data, uint16_t w_len)
  243. {
  244. uint8_t chCRCHi = 0xFF; // CRC high byte initialize
  245. uint8_t chCRCLo = 0xFF; // CRC low byte initialize
  246. uint16_t wIndex = 0; // CRC cycling index
  247. while (w_len--) {
  248. wIndex = chCRCLo ^ *p_data++;
  249. chCRCLo = chCRCHi ^ chCRCHTalbe[wIndex];
  250. chCRCHi = chCRCLTalbe[wIndex];
  251. }
  252. return ((chCRCHi << 8) | chCRCLo);
  253. }
  254. static uint32_t num2bit(int num) {
  255. return 1L << (31 - num);
  256. }
  257. static int bitmain_set_txconfig(struct bitmain_txconfig_token *bm,
  258. uint8_t reset, uint8_t fan_eft, uint8_t timeout_eft, uint8_t frequency_eft,
  259. uint8_t voltage_eft, uint8_t chain_check_time_eft, uint8_t chip_config_eft, uint8_t hw_error_eft,
  260. uint8_t beeper_ctrl, uint8_t temp_over_ctrl,uint8_t fan_home_mode,
  261. uint8_t chain_num, uint8_t asic_num, uint8_t fan_pwm_data, uint8_t timeout_data,
  262. uint16_t frequency, uint8_t * voltage, uint8_t chain_check_time,
  263. uint8_t chip_address, uint8_t reg_address, uint8_t * reg_data)
  264. {
  265. uint16_t crc = 0;
  266. int datalen = 0;
  267. uint8_t version = 0;
  268. uint8_t * sendbuf = (uint8_t *)bm;
  269. if (unlikely(!bm)) {
  270. applog(LOG_WARNING, "bitmain_set_txconfig bitmain_txconfig_token is null");
  271. return -1;
  272. }
  273. if (unlikely(timeout_data <= 0 || asic_num <= 0 || chain_num <= 0)) {
  274. applog(LOG_WARNING, "bitmain_set_txconfig parameter invalid timeout_data(%d) asic_num(%d) chain_num(%d)",
  275. timeout_data, asic_num, chain_num);
  276. return -1;
  277. }
  278. datalen = sizeof(struct bitmain_txconfig_token);
  279. memset(bm, 0, datalen);
  280. bm->token_type = BITMAIN_TOKEN_TYPE_TXCONFIG;
  281. bm->version = version;
  282. bm->length = datalen-4;
  283. bm->length = htole16(bm->length);
  284. bm->reset = reset;
  285. bm->fan_eft = fan_eft;
  286. bm->timeout_eft = timeout_eft;
  287. bm->frequency_eft = frequency_eft;
  288. bm->voltage_eft = voltage_eft;
  289. bm->chain_check_time_eft = chain_check_time_eft;
  290. bm->chip_config_eft = chip_config_eft;
  291. bm->hw_error_eft = hw_error_eft;
  292. bm->beeper_ctrl = beeper_ctrl;
  293. bm->temp_over_ctrl = temp_over_ctrl;
  294. bm->fan_home_mode = fan_home_mode;
  295. sendbuf[4] = htole8(sendbuf[4]);
  296. sendbuf[5] = htole8(sendbuf[5]);
  297. bm->chain_num = chain_num;
  298. bm->asic_num = asic_num;
  299. bm->fan_pwm_data = fan_pwm_data;
  300. bm->timeout_data = timeout_data;
  301. bm->frequency = htole16(frequency);
  302. memcpy(bm->voltage, voltage, 2);
  303. bm->chain_check_time = chain_check_time;
  304. memcpy(bm->reg_data, reg_data, 4);
  305. bm->chip_address = chip_address;
  306. bm->reg_address = reg_address;
  307. crc = CRC16((uint8_t *)bm, datalen-2);
  308. bm->crc = htole16(crc);
  309. applog(LOG_ERR, "BTM TxConfigToken:v(%d) reset(%d) fan_e(%d) tout_e(%d) fq_e(%d) vt_e(%d) chainc_e(%d) chipc_e(%d) hw_e(%d) b_c(%d) t_c(%d) f_m(%d) mnum(%d) anum(%d) fanpwmdata(%d) toutdata(%d) freq(%d) volt(%02x%02x) chainctime(%d) regdata(%02x%02x%02x%02x) chipaddr(%02x) regaddr(%02x) crc(%04x)",
  310. version, reset, fan_eft, timeout_eft, frequency_eft, voltage_eft,
  311. chain_check_time_eft, chip_config_eft, hw_error_eft, beeper_ctrl, temp_over_ctrl,fan_home_mode,chain_num, asic_num,
  312. fan_pwm_data, timeout_data, frequency, voltage[0], voltage[1],
  313. chain_check_time, reg_data[0], reg_data[1], reg_data[2], reg_data[3], chip_address, reg_address, crc);
  314. return datalen;
  315. }
  316. static int bitmain_set_txtask(uint8_t * sendbuf,
  317. unsigned int * last_work_block, struct work **works, int work_array_size, int work_array, int sendworkcount, int * sendcount)
  318. {
  319. uint16_t crc = 0;
  320. uint32_t work_id = 0;
  321. uint8_t version = 0;
  322. int datalen = 0;
  323. int i = 0;
  324. int index = work_array;
  325. uint8_t new_block= 0;
  326. struct bitmain_txtask_token *bm = (struct bitmain_txtask_token *)sendbuf;
  327. *sendcount = 0;
  328. int cursendcount = 0;
  329. int diff = 0;
  330. unsigned int difftmp = 0;
  331. unsigned int pooldiff = 0;
  332. int netdiff = 0;
  333. if (unlikely(!bm)) {
  334. applog(LOG_WARNING, "bitmain_set_txtask bitmain_txtask_token is null");
  335. return -1;
  336. }
  337. if (unlikely(!works)) {
  338. applog(LOG_WARNING, "bitmain_set_txtask work is null");
  339. return -1;
  340. }
  341. memset(bm, 0, sizeof(struct bitmain_txtask_token));
  342. bm->token_type = BITMAIN_TOKEN_TYPE_TXTASK;
  343. bm->version = version;
  344. datalen = 10;
  345. applog(LOG_DEBUG, "BTM send work count %d -----", sendworkcount);
  346. pooldiff = 0x100;
  347. unsigned lowest_goal_diff = UINT_MAX;
  348. for (i = 0; i < sendworkcount; ++i) {
  349. if (index > work_array_size) {
  350. index = 0;
  351. }
  352. if (!works[index]) {
  353. continue;
  354. }
  355. struct work * const work = works[index];
  356. if (work->work_difficulty < pooldiff)
  357. pooldiff = work->work_difficulty;
  358. const struct pool * const pool = work->pool;
  359. const struct mining_goal_info * const goal = pool->goal;
  360. if (goal->current_diff < lowest_goal_diff)
  361. lowest_goal_diff = goal->current_diff;
  362. }
  363. {
  364. difftmp = pooldiff;
  365. while(1) {
  366. difftmp = difftmp >> 1;
  367. if(difftmp > 0) {
  368. diff++;
  369. if(diff >= 255) {
  370. break;
  371. }
  372. } else {
  373. break;
  374. }
  375. }
  376. for (uint64_t netdifftmp = lowest_goal_diff; netdifftmp > 0; netdifftmp >>= 1) {
  377. ++netdiff;
  378. }
  379. pooldiff = pow(2, diff);
  380. }
  381. applog(LOG_DEBUG, "bitmain_set_txtask using nonce_diff=%u (log2=%d) and goal_diff=%u (log2=%d)", pooldiff, diff, lowest_goal_diff, netdiff);
  382. for(i = 0; i < sendworkcount; i++) {
  383. if(index > work_array_size) {
  384. index = 0;
  385. }
  386. if(works[index]) {
  387. const unsigned int work_block = bfg_work_block(works[index]);
  388. if(work_block != *last_work_block) {
  389. applog(LOG_ERR, "BTM send task new block %d old(%d)", work_block, *last_work_block);
  390. new_block = 1;
  391. *last_work_block = work_block;
  392. }
  393. #ifdef BITMAIN_TEST
  394. if(!hex2bin(works[index]->data, btm_work_test_data[g_test_index], 128)) {
  395. applog(LOG_DEBUG, "BTM send task set test data error");
  396. }
  397. if(!hex2bin(works[index]->midstate, btm_work_test_midstate[g_test_index], 32)) {
  398. applog(LOG_DEBUG, "BTM send task set test midstate error");
  399. }
  400. g_test_index++;
  401. if(g_test_index >= BITMAIN_TEST_USENUM) {
  402. g_test_index = 0;
  403. }
  404. applog(LOG_DEBUG, "BTM test index = %d", g_test_index);
  405. #endif
  406. work_id = works[index]->id;
  407. bm->works[cursendcount].work_id = htole32(work_id);
  408. applog(LOG_DEBUG, "BTM send task work id:%d %d", bm->works[cursendcount].work_id, work_id);
  409. memcpy(bm->works[cursendcount].midstate, works[index]->midstate, 32);
  410. memcpy(bm->works[cursendcount].data2, works[index]->data + 64, 12);
  411. works[index]->nonce_diff = pooldiff;
  412. if(BITMAIN_TEST_PRINT_WORK) {
  413. char ob_hex[(76 * 2) + 1];
  414. bin2hex(ob_hex, works[index]->data, 76);
  415. applog(LOG_ERR, "work %d data: %s", works[index]->id, ob_hex);
  416. }
  417. cursendcount++;
  418. }
  419. index++;
  420. }
  421. if(cursendcount <= 0) {
  422. applog(LOG_ERR, "BTM send work count %d", cursendcount);
  423. return 0;
  424. }
  425. datalen += 48*cursendcount;
  426. bm->length = datalen-4;
  427. bm->length = htole16(bm->length);
  428. //len = datalen-3;
  429. //len = htole16(len);
  430. //memcpy(sendbuf+1, &len, 2);
  431. bm->new_block = new_block;
  432. bm->diff = diff;
  433. bm->net_diff = htole16(netdiff);
  434. sendbuf[4] = htole8(sendbuf[4]);
  435. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  436. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  437. *sendcount = cursendcount;
  438. crc = CRC16(sendbuf, datalen-2);
  439. crc = htole16(crc);
  440. memcpy(sendbuf+datalen-2, &crc, 2);
  441. applog(LOG_DEBUG, "BitMain TxTask Token: v(%d) new_block(%d) diff(%d pool:%d net:%d) work_num(%d) crc(%04x)",
  442. version, new_block, diff, pooldiff,netdiff, cursendcount, crc);
  443. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  444. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  445. return datalen;
  446. }
  447. static int bitmain_set_rxstatus(struct bitmain_rxstatus_token *bm,
  448. uint8_t chip_status_eft, uint8_t detect_get, uint8_t chip_address, uint8_t reg_address)
  449. {
  450. uint16_t crc = 0;
  451. uint8_t version = 0;
  452. int datalen = 0;
  453. uint8_t * sendbuf = (uint8_t *)bm;
  454. if (unlikely(!bm)) {
  455. applog(LOG_WARNING, "bitmain_set_rxstatus bitmain_rxstatus_token is null");
  456. return -1;
  457. }
  458. datalen = sizeof(struct bitmain_rxstatus_token);
  459. memset(bm, 0, datalen);
  460. bm->token_type = BITMAIN_TOKEN_TYPE_RXSTATUS;
  461. bm->version = version;
  462. bm->length = datalen-4;
  463. bm->length = htole16(bm->length);
  464. bm->chip_status_eft = chip_status_eft;
  465. bm->detect_get = detect_get;
  466. sendbuf[4] = htole8(sendbuf[4]);
  467. bm->chip_address = chip_address;
  468. bm->reg_address = reg_address;
  469. crc = CRC16((uint8_t *)bm, datalen-2);
  470. bm->crc = htole16(crc);
  471. applog(LOG_ERR, "BitMain RxStatus Token: v(%d) chip_status_eft(%d) detect_get(%d) chip_address(%02x) reg_address(%02x) crc(%04x)",
  472. version, chip_status_eft, detect_get, chip_address, reg_address, crc);
  473. return datalen;
  474. }
  475. static int bitmain_parse_rxstatus(const uint8_t * data, int datalen, struct bitmain_rxstatus_data *bm)
  476. {
  477. uint16_t crc = 0;
  478. uint8_t version = 0;
  479. int i = 0, j = 0;
  480. int asic_num = 0;
  481. int dataindex = 0;
  482. uint8_t tmp = 0x01;
  483. if (unlikely(!bm)) {
  484. applog(LOG_WARNING, "bitmain_parse_rxstatus bitmain_rxstatus_data is null");
  485. return -1;
  486. }
  487. if (unlikely(!data || datalen <= 0)) {
  488. applog(LOG_WARNING, "bitmain_parse_rxstatus parameter invalid data is null or datalen(%d) error", datalen);
  489. return -1;
  490. }
  491. memset(bm, 0, sizeof(struct bitmain_rxstatus_data));
  492. memcpy(bm, data, 28);
  493. if (bm->data_type != BITMAIN_DATA_TYPE_RXSTATUS) {
  494. applog(LOG_ERR, "bitmain_parse_rxstatus datatype(%02x) error", bm->data_type);
  495. return -1;
  496. }
  497. if (bm->version != version) {
  498. applog(LOG_ERR, "bitmain_parse_rxstatus version(%02x) error", bm->version);
  499. return -1;
  500. }
  501. bm->length = htole16(bm->length);
  502. if (bm->length+4 != datalen) {
  503. applog(LOG_ERR, "bitmain_parse_rxstatus length(%d) datalen(%d) error", bm->length, datalen);
  504. return -1;
  505. }
  506. crc = CRC16(data, datalen-2);
  507. memcpy(&(bm->crc), data+datalen-2, 2);
  508. bm->crc = htole16(bm->crc);
  509. if(crc != bm->crc) {
  510. applog(LOG_ERR, "bitmain_parse_rxstatus check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  511. return -1;
  512. }
  513. bm->fifo_space = htole16(bm->fifo_space);
  514. bm->fan_exist = htole16(bm->fan_exist);
  515. bm->temp_exist = htole32(bm->temp_exist);
  516. bm->nonce_error = htole32(bm->nonce_error);
  517. if(bm->chain_num > BITMAIN_MAX_CHAIN_NUM) {
  518. applog(LOG_ERR, "bitmain_parse_rxstatus chain_num=%d error", bm->chain_num);
  519. return -1;
  520. }
  521. dataindex = 28;
  522. if(bm->chain_num > 0) {
  523. memcpy(bm->chain_asic_num, data+datalen-2-bm->chain_num-bm->temp_num-bm->fan_num, bm->chain_num);
  524. }
  525. for(i = 0; i < bm->chain_num; i++) {
  526. asic_num = bm->chain_asic_num[i];
  527. if(asic_num <= 0) {
  528. asic_num = 1;
  529. } else {
  530. if(asic_num % 32 == 0) {
  531. asic_num = asic_num / 32;
  532. } else {
  533. asic_num = asic_num / 32 + 1;
  534. }
  535. }
  536. memcpy((uint8_t *)bm->chain_asic_exist+i*32, data+dataindex, asic_num*4);
  537. dataindex += asic_num*4;
  538. }
  539. for(i = 0; i < bm->chain_num; i++) {
  540. asic_num = bm->chain_asic_num[i];
  541. if(asic_num <= 0) {
  542. asic_num = 1;
  543. } else {
  544. if(asic_num % 32 == 0) {
  545. asic_num = asic_num / 32;
  546. } else {
  547. asic_num = asic_num / 32 + 1;
  548. }
  549. }
  550. memcpy((uint8_t *)bm->chain_asic_status+i*32, data+dataindex, asic_num*4);
  551. dataindex += asic_num*4;
  552. }
  553. dataindex += bm->chain_num;
  554. if(dataindex + bm->temp_num + bm->fan_num + 2 != datalen) {
  555. applog(LOG_ERR, "bitmain_parse_rxstatus dataindex(%d) chain_num(%d) temp_num(%d) fan_num(%d) not match datalen(%d)",
  556. dataindex, bm->chain_num, bm->temp_num, bm->fan_num, datalen);
  557. return -1;
  558. }
  559. for(i = 0; i < bm->chain_num; i++) {
  560. //bm->chain_asic_status[i] = swab32(bm->chain_asic_status[i]);
  561. for(j = 0; j < 8; j++) {
  562. bm->chain_asic_exist[i*8+j] = htole32(bm->chain_asic_exist[i*8+j]);
  563. bm->chain_asic_status[i*8+j] = htole32(bm->chain_asic_status[i*8+j]);
  564. }
  565. }
  566. if(bm->temp_num > 0) {
  567. memcpy(bm->temp, data+dataindex, bm->temp_num);
  568. dataindex += bm->temp_num;
  569. }
  570. if(bm->fan_num > 0) {
  571. memcpy(bm->fan, data+dataindex, bm->fan_num);
  572. dataindex += bm->fan_num;
  573. }
  574. if(!opt_bitmain_checkall){
  575. if(tmp != htole8(tmp)){
  576. applog(LOG_ERR, "BitMain RxStatus byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  577. memcpy(&tmp,data+4,1);
  578. bm->chip_value_eft = tmp >>7;
  579. bm->get_blk_num = tmp >> 4;
  580. bm->reserved1 = ((tmp << 4) & 0xff) >> 5;
  581. }
  582. found_blocks = bm->get_blk_num;
  583. applog(LOG_ERR, "BitMain RxStatus tmp :0x%02x byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",tmp,*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  584. }
  585. applog(LOG_DEBUG, "BitMain RxStatusData: chipv_e(%d) chainnum(%d) fifos(%d) v1(%d) v2(%d) v3(%d) v4(%d) fann(%d) tempn(%d) fanet(%04x) tempet(%08x) ne(%d) regvalue(%d) crc(%04x)",
  586. bm->chip_value_eft, bm->chain_num, bm->fifo_space, bm->hw_version[0], bm->hw_version[1], bm->hw_version[2], bm->hw_version[3], bm->fan_num, bm->temp_num, bm->fan_exist, bm->temp_exist, bm->nonce_error, bm->reg_value, bm->crc);
  587. applog(LOG_DEBUG, "BitMain RxStatus Data chain info:");
  588. for(i = 0; i < bm->chain_num; i++) {
  589. applog(LOG_DEBUG, "BitMain RxStatus Data chain(%d) asic num=%d asic_exist=%08x asic_status=%08x", i+1, bm->chain_asic_num[i], bm->chain_asic_exist[i*8], bm->chain_asic_status[i*8]);
  590. }
  591. applog(LOG_DEBUG, "BitMain RxStatus Data temp info:");
  592. for(i = 0; i < bm->temp_num; i++) {
  593. applog(LOG_DEBUG, "BitMain RxStatus Data temp(%d) temp=%d", i+1, bm->temp[i]);
  594. }
  595. applog(LOG_DEBUG, "BitMain RxStatus Data fan info:");
  596. for(i = 0; i < bm->fan_num; i++) {
  597. applog(LOG_DEBUG, "BitMain RxStatus Data fan(%d) fan=%d", i+1, bm->fan[i]);
  598. }
  599. return 0;
  600. }
  601. static int bitmain_parse_rxnonce(const uint8_t * data, int datalen, struct bitmain_rxnonce_data *bm, int * nonce_num)
  602. {
  603. int i = 0;
  604. uint16_t crc = 0;
  605. uint8_t version = 0;
  606. int curnoncenum = 0;
  607. if (unlikely(!bm)) {
  608. applog(LOG_ERR, "bitmain_parse_rxnonce bitmain_rxstatus_data null");
  609. return -1;
  610. }
  611. if (unlikely(!data || datalen <= 0)) {
  612. applog(LOG_ERR, "bitmain_parse_rxnonce data null or datalen(%d) error", datalen);
  613. return -1;
  614. }
  615. memcpy(bm, data, sizeof(struct bitmain_rxnonce_data));
  616. if (bm->data_type != BITMAIN_DATA_TYPE_RXNONCE) {
  617. applog(LOG_ERR, "bitmain_parse_rxnonce datatype(%02x) error", bm->data_type);
  618. return -1;
  619. }
  620. if (bm->version != version) {
  621. applog(LOG_ERR, "bitmain_parse_rxnonce version(%02x) error", bm->version);
  622. return -1;
  623. }
  624. bm->length = htole16(bm->length);
  625. if (bm->length+4 != datalen) {
  626. applog(LOG_ERR, "bitmain_parse_rxnonce length(%d) error", bm->length);
  627. return -1;
  628. }
  629. crc = CRC16(data, datalen-2);
  630. memcpy(&(bm->crc), data+datalen-2, 2);
  631. bm->crc = htole16(bm->crc);
  632. if(crc != bm->crc) {
  633. applog(LOG_ERR, "bitmain_parse_rxnonce check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  634. return -1;
  635. }
  636. bm->fifo_space = htole16(bm->fifo_space);
  637. bm->diff = htole16(bm->diff);
  638. bm->total_nonce_num = htole64(bm->total_nonce_num);
  639. curnoncenum = (datalen-14)/8;
  640. applog(LOG_DEBUG, "BitMain RxNonce Data: nonce_num(%d) fifo_space(%d) diff(%d) tnn(%"PRIu64")", curnoncenum, bm->fifo_space, bm->diff, bm->total_nonce_num);
  641. for(i = 0; i < curnoncenum; i++) {
  642. bm->nonces[i].work_id = htole32(bm->nonces[i].work_id);
  643. bm->nonces[i].nonce = htole32(bm->nonces[i].nonce);
  644. applog(LOG_DEBUG, "BitMain RxNonce Data %d: work_id(%d) nonce(%08x)(%d)",
  645. i, bm->nonces[i].work_id, bm->nonces[i].nonce, bm->nonces[i].nonce);
  646. }
  647. *nonce_num = curnoncenum;
  648. return 0;
  649. }
  650. static int bitmain_read(struct cgpu_info *bitmain, unsigned char *buf,
  651. size_t bufsize, int timeout)
  652. {
  653. int err = 0;
  654. size_t total = 0;
  655. if(bitmain == NULL || buf == NULL || bufsize <= 0) {
  656. applog(LOG_WARNING, "bitmain_read parameter error bufsize(%llu)", (unsigned long long)bufsize);
  657. return -1;
  658. }
  659. {
  660. err = btm_read(bitmain, buf, bufsize);
  661. total = err;
  662. }
  663. return total;
  664. }
  665. static int bitmain_write(struct cgpu_info *bitmain, char *buf, ssize_t len)
  666. {
  667. int err;
  668. {
  669. int havelen = 0;
  670. while(havelen < len) {
  671. err = btm_write(bitmain, buf+havelen, len-havelen);
  672. if(err < 0) {
  673. applog(LOG_DEBUG, "%s%i: btm_write got err %d", bitmain->drv->name,
  674. bitmain->device_id, err);
  675. applog(LOG_WARNING, "usb_write error on bitmain_write");
  676. return BTM_SEND_ERROR;
  677. } else {
  678. havelen += err;
  679. }
  680. }
  681. }
  682. return BTM_SEND_OK;
  683. }
  684. static int bitmain_send_data(const uint8_t * data, int datalen, struct cgpu_info *bitmain)
  685. {
  686. int ret;
  687. if(datalen <= 0) {
  688. return 0;
  689. }
  690. //struct bitmain_info *info = bitmain->device_data;
  691. //int delay;
  692. //delay = datalen * 10 * 1000000;
  693. //delay = delay / info->baud;
  694. //delay += 4000;
  695. if(opt_debug) {
  696. char hex[(datalen * 2) + 1];
  697. bin2hex(hex, data, datalen);
  698. applog(LOG_DEBUG, "BitMain: Sent(%d): %s", datalen, hex);
  699. }
  700. //cgtimer_t ts_start;
  701. //cgsleep_prepare_r(&ts_start);
  702. //applog(LOG_DEBUG, "----bitmain_send_data start");
  703. ret = bitmain_write(bitmain, (char *)data, datalen);
  704. applog(LOG_DEBUG, "----bitmain_send_data stop ret=%d datalen=%d", ret, datalen);
  705. //cgsleep_us_r(&ts_start, delay);
  706. //applog(LOG_DEBUG, "BitMain: Sent: Buffer delay: %dus", delay);
  707. return ret;
  708. }
  709. static void bitmain_inc_nvw(struct bitmain_info *info, struct thr_info *thr)
  710. {
  711. applog(LOG_INFO, "%s%d: No matching work - HW error",
  712. thr->cgpu->drv->name, thr->cgpu->device_id);
  713. inc_hw_errors_only(thr);
  714. info->no_matching_work++;
  715. }
  716. static inline void record_temp_fan(struct bitmain_info *info, struct bitmain_rxstatus_data *bm, float *temp_avg)
  717. {
  718. int i = 0;
  719. int maxfan = 0, maxtemp = 0;
  720. *temp_avg = 0;
  721. info->fan_num = bm->fan_num;
  722. for(i = 0; i < bm->fan_num; i++) {
  723. info->fan[i] = bm->fan[i] * BITMAIN_FAN_FACTOR;
  724. if(info->fan[i] > maxfan)
  725. maxfan = info->fan[i];
  726. }
  727. info->temp_num = bm->temp_num;
  728. for(i = 0; i < bm->temp_num; i++) {
  729. info->temp[i] = bm->temp[i];
  730. /*
  731. if(bm->temp[i] & 0x80) {
  732. bm->temp[i] &= 0x7f;
  733. info->temp[i] = 0 - ((~bm->temp[i] & 0x7f) + 1);
  734. }*/
  735. *temp_avg += info->temp[i];
  736. if(info->temp[i] > info->temp_max) {
  737. info->temp_max = info->temp[i];
  738. }
  739. if(info->temp[i] > maxtemp)
  740. maxtemp = info->temp[i];
  741. }
  742. if(bm->temp_num > 0) {
  743. *temp_avg = *temp_avg / bm->temp_num;
  744. info->temp_avg = *temp_avg;
  745. }
  746. // inc_dev_status
  747. mutex_lock(&stats_lock);
  748. info->g_max_fan = maxfan;
  749. info->g_max_temp = maxtemp;
  750. mutex_unlock(&stats_lock);
  751. }
  752. static void bitmain_update_temps(struct cgpu_info *bitmain, struct bitmain_info *info,
  753. struct bitmain_rxstatus_data *bm)
  754. {
  755. char tmp[64] = {0};
  756. char msg[10240] = {0};
  757. int i = 0;
  758. record_temp_fan(info, bm, &(bitmain->temp));
  759. strcpy(msg, "BitMain: ");
  760. for(i = 0; i < bm->fan_num; i++) {
  761. if(i != 0) {
  762. strcat(msg, ", ");
  763. }
  764. sprintf(tmp, "Fan%d: %d/m", i+1, info->fan[i]);
  765. strcat(msg, tmp);
  766. }
  767. strcat(msg, "\t");
  768. for(i = 0; i < bm->temp_num; i++) {
  769. if(i != 0) {
  770. strcat(msg, ", ");
  771. }
  772. sprintf(tmp, "Temp%d: %dC", i+1, info->temp[i]);
  773. strcat(msg, tmp);
  774. }
  775. sprintf(tmp, ", TempMAX: %dC", info->temp_max);
  776. strcat(msg, tmp);
  777. applog(LOG_INFO, "%s", msg);
  778. info->temp_history_index++;
  779. info->temp_sum += bitmain->temp;
  780. applog(LOG_DEBUG, "BitMain: temp_index: %d, temp_count: %d, temp_old: %d",
  781. info->temp_history_index, info->temp_history_count, info->temp_old);
  782. if (info->temp_history_index == info->temp_history_count) {
  783. info->temp_history_index = 0;
  784. info->temp_sum = 0;
  785. }
  786. if (unlikely(info->temp_old >= opt_bitmain_overheat)) {
  787. applog(LOG_WARNING, "BTM%d overheat! Idling", bitmain->device_id);
  788. info->overheat = true;
  789. } else if (info->overheat && info->temp_old <= opt_bitmain_temp) {
  790. applog(LOG_WARNING, "BTM%d cooled, restarting", bitmain->device_id);
  791. info->overheat = false;
  792. }
  793. }
  794. extern void cg_logwork_uint32(struct work *work, uint32_t nonce, bool ok);
  795. static void bitmain_parse_results(struct cgpu_info *bitmain, struct bitmain_info *info,
  796. struct thr_info *thr, uint8_t *buf, int *offset)
  797. {
  798. int i, j, n, m, r, errordiff, spare = BITMAIN_READ_SIZE;
  799. uint32_t checkbit = 0x00000000;
  800. bool found = false;
  801. struct work *work = NULL;
  802. struct bitmain_packet_head packethead;
  803. int asicnum = 0;
  804. int idiff = 0;
  805. int mod = 0,tmp = 0;
  806. for (i = 0; i <= spare; i++) {
  807. if(buf[i] == 0xa1) {
  808. struct bitmain_rxstatus_data rxstatusdata;
  809. applog(LOG_DEBUG, "bitmain_parse_results RxStatus Data");
  810. if(*offset < 4) {
  811. return;
  812. }
  813. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  814. packethead.length = htole16(packethead.length);
  815. if(packethead.length > 1130) {
  816. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus datalen=%d error", packethead.length+4);
  817. continue;
  818. }
  819. if(*offset < packethead.length + 4) {
  820. return;
  821. }
  822. if(bitmain_parse_rxstatus(buf+i, packethead.length+4, &rxstatusdata) != 0) {
  823. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus error len=%d", packethead.length+4);
  824. } else {
  825. mutex_lock(&info->qlock);
  826. info->chain_num = rxstatusdata.chain_num;
  827. info->fifo_space = rxstatusdata.fifo_space;
  828. info->hw_version[0] = rxstatusdata.hw_version[0];
  829. info->hw_version[1] = rxstatusdata.hw_version[1];
  830. info->hw_version[2] = rxstatusdata.hw_version[2];
  831. info->hw_version[3] = rxstatusdata.hw_version[3];
  832. info->nonce_error = rxstatusdata.nonce_error;
  833. errordiff = info->nonce_error-info->last_nonce_error;
  834. //sprintf(g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  835. applog(LOG_ERR, "bitmain_parse_results v=%d chain=%d fifo=%d hwv1=%d hwv2=%d hwv3=%d hwv4=%d nerr=%d-%d freq=%d chain info:",
  836. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  837. info->last_nonce_error, info->nonce_error, info->frequency);
  838. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  839. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  840. for(n = 0; n < rxstatusdata.chain_num; n++) {
  841. info->chain_asic_num[n] = rxstatusdata.chain_asic_num[n];
  842. memset(info->chain_asic_status_t[n], 0, 320);
  843. j = 0;
  844. mod = 0;
  845. if(info->chain_asic_num[n] <= 0) {
  846. asicnum = 0;
  847. } else {
  848. mod = info->chain_asic_num[n] % 32;
  849. if(mod == 0) {
  850. asicnum = info->chain_asic_num[n] / 32;
  851. } else {
  852. asicnum = info->chain_asic_num[n] / 32 + 1;
  853. }
  854. }
  855. if(asicnum > 0) {
  856. for(m = asicnum-1; m >= 0; m--) {
  857. tmp = mod ? (32-mod): 0;
  858. for(r = tmp;r < 32;r++){
  859. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  860. info->chain_asic_status_t[n][j] = ' ';
  861. j++;
  862. }
  863. checkbit = num2bit(r);
  864. if(rxstatusdata.chain_asic_exist[n*8+m] & checkbit) {
  865. if(rxstatusdata.chain_asic_status[n*8+m] & checkbit) {
  866. info->chain_asic_status_t[n][j] = 'o';
  867. } else {
  868. info->chain_asic_status_t[n][j] = 'x';
  869. }
  870. } else {
  871. info->chain_asic_status_t[n][j] = '-';
  872. }
  873. j++;
  874. }
  875. info->chain_asic_status_t[n][j] = ' ';
  876. j++;
  877. mod = 0;
  878. }
  879. }
  880. applog(LOG_DEBUG, "bitmain_parse_results chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  881. n, info->chain_asic_num[n],
  882. info->chain_asic_exist[n*8+0], info->chain_asic_exist[n*8+1], info->chain_asic_exist[n*8+2], info->chain_asic_exist[n*8+3], info->chain_asic_exist[n*8+4], info->chain_asic_exist[n*8+5], info->chain_asic_exist[n*8+6], info->chain_asic_exist[n*8+7],
  883. info->chain_asic_status[n*8+0], info->chain_asic_status[n*8+1], info->chain_asic_status[n*8+2], info->chain_asic_status[n*8+3], info->chain_asic_status[n*8+4], info->chain_asic_status[n*8+5], info->chain_asic_status[n*8+6], info->chain_asic_status[n*8+7]);
  884. applog(LOG_ERR, "bitmain_parse_results chain(%d) asic_num=%d asic_status=%s", n, info->chain_asic_num[n], info->chain_asic_status_t[n]);
  885. }
  886. mutex_unlock(&info->qlock);
  887. if(errordiff > 0) {
  888. for(j = 0; j < errordiff; j++) {
  889. bitmain_inc_nvw(info, thr);
  890. }
  891. mutex_lock(&info->qlock);
  892. info->last_nonce_error += errordiff;
  893. mutex_unlock(&info->qlock);
  894. }
  895. bitmain_update_temps(bitmain, info, &rxstatusdata);
  896. }
  897. found = true;
  898. spare = packethead.length + 4 + i;
  899. if(spare > *offset) {
  900. applog(LOG_ERR, "bitmain_parse_rxresults space(%d) > offset(%d)", spare, *offset);
  901. spare = *offset;
  902. }
  903. break;
  904. } else if(buf[i] == 0xa2) {
  905. struct bitmain_rxnonce_data rxnoncedata;
  906. int nonce_num = 0;
  907. applog(LOG_DEBUG, "bitmain_parse_results RxNonce Data");
  908. if(*offset < 4) {
  909. return;
  910. }
  911. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  912. packethead.length = htole16(packethead.length);
  913. if(packethead.length > 1030) {
  914. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce datalen=%d error", packethead.length+4);
  915. continue;
  916. }
  917. if(*offset < packethead.length + 4) {
  918. return;
  919. }
  920. if(bitmain_parse_rxnonce(buf+i, packethead.length+4, &rxnoncedata, &nonce_num) != 0) {
  921. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce error len=%d", packethead.length+4);
  922. } else {
  923. for(j = 0; j < nonce_num; j++) {
  924. const int work_id = rxnoncedata.nonces[j].work_id;
  925. HASH_FIND_INT(bitmain->queued_work, &work_id, work);
  926. if(work) {
  927. if(BITMAIN_TEST_PRINT_WORK) {
  928. applog(LOG_ERR, "bitmain_parse_results nonce find work(%d-%d)(%08x)", work->id, rxnoncedata.nonces[j].work_id, rxnoncedata.nonces[j].nonce);
  929. char ob_hex[(32 * 2) + 1];
  930. bin2hex(ob_hex, work->midstate, 32);
  931. applog(LOG_ERR, "work %d midstate: %s", work->id, ob_hex);
  932. bin2hex(ob_hex, &work->data[64], 12);
  933. applog(LOG_ERR, "work %d data2: %s", work->id, ob_hex);
  934. }
  935. {
  936. const uint32_t nonce = rxnoncedata.nonces[j].nonce;
  937. applog(LOG_DEBUG, "BitMain: submit nonce = %08lx", (unsigned long)nonce);
  938. if (submit_nonce(thr, work, nonce)) {
  939. mutex_lock(&info->qlock);
  940. info->nonces++;
  941. info->auto_nonces++;
  942. mutex_unlock(&info->qlock);
  943. } else {
  944. //bitmain_inc_nvw(info, thr);
  945. applog(LOG_ERR, "BitMain: bitmain_decode_nonce error work(%d)", rxnoncedata.nonces[j].work_id);
  946. }
  947. }
  948. } else {
  949. //bitmain_inc_nvw(info, thr);
  950. applog(LOG_ERR, "BitMain: Nonce not find work(%d)", rxnoncedata.nonces[j].work_id);
  951. }
  952. }
  953. #ifdef BITMAIN_CALC_DIFF1
  954. if(opt_bitmain_hwerror) {
  955. int difftmp = 0;
  956. difftmp = rxnoncedata.diff;
  957. idiff = 1;
  958. while(difftmp > 0) {
  959. difftmp--;
  960. idiff = idiff << 1;
  961. }
  962. mutex_lock(&info->qlock);
  963. difftmp = idiff*(rxnoncedata.total_nonce_num-info->total_nonce_num);
  964. if(difftmp < 0)
  965. difftmp = 0;
  966. info->nonces = info->nonces+difftmp;
  967. info->auto_nonces = info->auto_nonces+difftmp;
  968. info->total_nonce_num = rxnoncedata.total_nonce_num;
  969. info->fifo_space = rxnoncedata.fifo_space;
  970. mutex_unlock(&info->qlock);
  971. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d diff=%d rxtnn=%"PRIu64" tnn=%"PRIu64, info->fifo_space, idiff, rxnoncedata.total_nonce_num, info->total_nonce_num);
  972. } else {
  973. mutex_lock(&info->qlock);
  974. info->fifo_space = rxnoncedata.fifo_space;
  975. mutex_unlock(&info->qlock);
  976. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  977. }
  978. #else
  979. mutex_lock(&info->qlock);
  980. info->fifo_space = rxnoncedata.fifo_space;
  981. mutex_unlock(&info->qlock);
  982. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  983. #endif
  984. #ifndef WIN32
  985. if(nonce_num < BITMAIN_MAX_NONCE_NUM)
  986. cgsleep_ms(5);
  987. #endif
  988. }
  989. found = true;
  990. spare = packethead.length + 4 + i;
  991. if(spare > *offset) {
  992. applog(LOG_ERR, "bitmain_parse_rxnonce space(%d) > offset(%d)", spare, *offset);
  993. spare = *offset;
  994. }
  995. break;
  996. } else {
  997. applog(LOG_ERR, "bitmain_parse_results data type error=%02x", buf[i]);
  998. }
  999. }
  1000. if (!found) {
  1001. spare = *offset - BITMAIN_READ_SIZE;
  1002. /* We are buffering and haven't accumulated one more corrupt
  1003. * work result. */
  1004. if (spare < (int)BITMAIN_READ_SIZE)
  1005. return;
  1006. bitmain_inc_nvw(info, thr);
  1007. }
  1008. *offset -= spare;
  1009. memmove(buf, buf + spare, *offset);
  1010. }
  1011. static void bitmain_running_reset(struct cgpu_info *bitmain, struct bitmain_info *info)
  1012. {
  1013. bitmain->results = 0;
  1014. info->reset = false;
  1015. }
  1016. static void *bitmain_get_results(void *userdata)
  1017. {
  1018. struct cgpu_info *bitmain = (struct cgpu_info *)userdata;
  1019. struct bitmain_info *info = bitmain->device_data;
  1020. int offset = 0, ret = 0;
  1021. const int rsize = BITMAIN_FTDI_READSIZE;
  1022. uint8_t readbuf[BITMAIN_READBUF_SIZE];
  1023. struct thr_info *thr = info->thr;
  1024. char threadname[24];
  1025. int errorcount = 0;
  1026. snprintf(threadname, 24, "btm_recv/%d", bitmain->device_id);
  1027. RenameThread(threadname);
  1028. while (likely(!bitmain->shutdown)) {
  1029. unsigned char buf[rsize];
  1030. //applog(LOG_DEBUG, "+++++++bitmain_get_results offset=%d", offset);
  1031. if (offset >= (int)BITMAIN_READ_SIZE) {
  1032. //applog(LOG_DEBUG, "======start bitmain_get_results ");
  1033. bitmain_parse_results(bitmain, info, thr, readbuf, &offset);
  1034. //applog(LOG_DEBUG, "======stop bitmain_get_results ");
  1035. }
  1036. if (unlikely(offset + rsize >= BITMAIN_READBUF_SIZE)) {
  1037. /* This should never happen */
  1038. applog(LOG_DEBUG, "BitMain readbuf overflow, resetting buffer");
  1039. offset = 0;
  1040. }
  1041. if (unlikely(info->reset)) {
  1042. bitmain_running_reset(bitmain, info);
  1043. /* Discard anything in the buffer */
  1044. offset = 0;
  1045. }
  1046. /* As the usb read returns after just 1ms, sleep long enough
  1047. * to leave the interface idle for writes to occur, but do not
  1048. * sleep if we have been receiving data as more may be coming. */
  1049. //if (offset == 0) {
  1050. // cgsleep_ms_r(&ts_start, BITMAIN_READ_TIMEOUT);
  1051. //}
  1052. //cgsleep_prepare_r(&ts_start);
  1053. //applog(LOG_DEBUG, "======start bitmain_get_results bitmain_read");
  1054. ret = bitmain_read(bitmain, buf, rsize, BITMAIN_READ_TIMEOUT);
  1055. //applog(LOG_DEBUG, "======stop bitmain_get_results bitmain_read=%d", ret);
  1056. if ((ret < 1) || (ret == 18)) {
  1057. errorcount++;
  1058. #ifdef WIN32
  1059. if(errorcount > 200) {
  1060. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1061. cgsleep_ms(20);
  1062. errorcount = 0;
  1063. }
  1064. #else
  1065. if(errorcount > 3) {
  1066. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1067. cgsleep_ms(20);
  1068. errorcount = 0;
  1069. }
  1070. #endif
  1071. if(ret < 1)
  1072. continue;
  1073. }
  1074. if (opt_debug) {
  1075. char hex[(ret * 2) + 1];
  1076. bin2hex(hex, buf, ret);
  1077. applog(LOG_DEBUG, "BitMain: get: %s", hex);
  1078. }
  1079. memcpy(readbuf+offset, buf, ret);
  1080. offset += ret;
  1081. }
  1082. return NULL;
  1083. }
  1084. static void bitmain_init(struct cgpu_info *bitmain)
  1085. {
  1086. applog(LOG_INFO, "BitMain: Opened on %s", bitmain->device_path);
  1087. }
  1088. static bool bitmain_prepare(struct thr_info *thr)
  1089. {
  1090. struct cgpu_info *bitmain = thr->cgpu;
  1091. struct bitmain_info *info = bitmain->device_data;
  1092. free(bitmain->works);
  1093. bitmain->works = calloc(BITMAIN_MAX_WORK_NUM * sizeof(struct work *),
  1094. BITMAIN_ARRAY_SIZE);
  1095. if (!bitmain->works)
  1096. quit(1, "Failed to calloc bitmain works in bitmain_prepare");
  1097. info->thr = thr;
  1098. mutex_init(&info->lock);
  1099. mutex_init(&info->qlock);
  1100. if (unlikely(pthread_cond_init(&info->qcond, NULL)))
  1101. quit(1, "Failed to pthread_cond_init bitmain qcond");
  1102. if (pthread_create(&info->read_thr, NULL, bitmain_get_results, (void *)bitmain))
  1103. quit(1, "Failed to create bitmain read_thr");
  1104. bitmain_init(bitmain);
  1105. return true;
  1106. }
  1107. static int bitmain_initialize(struct cgpu_info *bitmain)
  1108. {
  1109. uint8_t data[BITMAIN_READBUF_SIZE];
  1110. struct bitmain_info *info = NULL;
  1111. int ret = 0;
  1112. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1113. int readlen = 0;
  1114. int sendlen = 0;
  1115. int trycount = 3;
  1116. struct timespec p;
  1117. struct bitmain_rxstatus_data rxstatusdata;
  1118. int i = 0, j = 0, m = 0, r = 0, statusok = 0;
  1119. uint32_t checkbit = 0x00000000;
  1120. int hwerror_eft = 0;
  1121. int beeper_ctrl = 1;
  1122. int tempover_ctrl = 1;
  1123. int home_mode = 0;
  1124. struct bitmain_packet_head packethead;
  1125. int asicnum = 0;
  1126. int mod = 0,tmp = 0;
  1127. /* Send reset, then check for result */
  1128. if(!bitmain) {
  1129. applog(LOG_WARNING, "bitmain_initialize cgpu_info is null");
  1130. return -1;
  1131. }
  1132. info = bitmain->device_data;
  1133. /* clear read buf */
  1134. ret = bitmain_read(bitmain, data, BITMAIN_READBUF_SIZE,
  1135. BITMAIN_RESET_TIMEOUT);
  1136. if(ret > 0) {
  1137. if (opt_debug) {
  1138. char hex[(ret * 2) + 1];
  1139. bin2hex(hex, data, ret);
  1140. applog(LOG_DEBUG, "BTM%d Clear Read(%d): %s", bitmain->device_id, ret, hex);
  1141. }
  1142. }
  1143. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *)sendbuf, 0, 1, 0, 0);
  1144. if(sendlen <= 0) {
  1145. applog(LOG_ERR, "bitmain_initialize bitmain_set_rxstatus error(%d)", sendlen);
  1146. return -1;
  1147. }
  1148. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1149. if (unlikely(ret == BTM_SEND_ERROR)) {
  1150. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1151. return -1;
  1152. }
  1153. while(trycount >= 0) {
  1154. ret = bitmain_read(bitmain, data+readlen, BITMAIN_READBUF_SIZE, BITMAIN_RESET_TIMEOUT);
  1155. if(ret > 0) {
  1156. readlen += ret;
  1157. if(readlen > BITMAIN_READ_SIZE) {
  1158. for(i = 0; i < readlen; i++) {
  1159. if(data[i] == 0xa1) {
  1160. if (opt_debug) {
  1161. char hex[(readlen * 2) + 1];
  1162. bin2hex(hex, data, readlen);
  1163. applog(LOG_DEBUG, "%s%d initset: get: %s", bitmain->drv->name, bitmain->device_id, hex);
  1164. }
  1165. memcpy(&packethead, data+i, sizeof(struct bitmain_packet_head));
  1166. packethead.length = htole16(packethead.length);
  1167. if(packethead.length > 1130) {
  1168. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d error", packethead.length+4);
  1169. continue;
  1170. }
  1171. if(readlen-i < packethead.length+4) {
  1172. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d<%d low", readlen-i, packethead.length+4);
  1173. continue;
  1174. }
  1175. if (bitmain_parse_rxstatus(data+i, packethead.length+4, &rxstatusdata) != 0) {
  1176. applog(LOG_ERR, "bitmain_initialize bitmain_parse_rxstatus error");
  1177. continue;
  1178. }
  1179. info->chain_num = rxstatusdata.chain_num;
  1180. info->fifo_space = rxstatusdata.fifo_space;
  1181. info->hw_version[0] = rxstatusdata.hw_version[0];
  1182. info->hw_version[1] = rxstatusdata.hw_version[1];
  1183. info->hw_version[2] = rxstatusdata.hw_version[2];
  1184. info->hw_version[3] = rxstatusdata.hw_version[3];
  1185. info->nonce_error = 0;
  1186. info->last_nonce_error = 0;
  1187. sprintf(info->g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  1188. applog(LOG_ERR, "bitmain_initialize rxstatus v(%d) chain(%d) fifo(%d) hwv1(%d) hwv2(%d) hwv3(%d) hwv4(%d) nerr(%d) freq=%d",
  1189. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  1190. rxstatusdata.nonce_error, info->frequency);
  1191. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  1192. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  1193. for(i = 0; i < rxstatusdata.chain_num; i++) {
  1194. info->chain_asic_num[i] = rxstatusdata.chain_asic_num[i];
  1195. memset(info->chain_asic_status_t[i], 0, 320);
  1196. j = 0;
  1197. mod = 0;
  1198. if(info->chain_asic_num[i] <= 0) {
  1199. asicnum = 0;
  1200. } else {
  1201. mod = info->chain_asic_num[i] % 32;
  1202. if(mod == 0) {
  1203. asicnum = info->chain_asic_num[i] / 32;
  1204. } else {
  1205. asicnum = info->chain_asic_num[i] / 32 + 1;
  1206. }
  1207. }
  1208. if(asicnum > 0) {
  1209. for(m = asicnum-1; m >= 0; m--) {
  1210. tmp = mod ? (32-mod):0;
  1211. for(r = tmp;r < 32;r++){
  1212. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  1213. info->chain_asic_status_t[i][j] = ' ';
  1214. j++;
  1215. }
  1216. checkbit = num2bit(r);
  1217. if(rxstatusdata.chain_asic_exist[i*8+m] & checkbit) {
  1218. if(rxstatusdata.chain_asic_status[i*8+m] & checkbit) {
  1219. info->chain_asic_status_t[i][j] = 'o';
  1220. } else {
  1221. info->chain_asic_status_t[i][j] = 'x';
  1222. }
  1223. } else {
  1224. info->chain_asic_status_t[i][j] = '-';
  1225. }
  1226. j++;
  1227. }
  1228. info->chain_asic_status_t[i][j] = ' ';
  1229. j++;
  1230. mod = 0;
  1231. }
  1232. }
  1233. applog(LOG_DEBUG, "bitmain_initialize chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  1234. i, info->chain_asic_num[i],
  1235. info->chain_asic_exist[i*8+0], info->chain_asic_exist[i*8+1], info->chain_asic_exist[i*8+2], info->chain_asic_exist[i*8+3], info->chain_asic_exist[i*8+4], info->chain_asic_exist[i*8+5], info->chain_asic_exist[i*8+6], info->chain_asic_exist[i*8+7],
  1236. info->chain_asic_status[i*8+0], info->chain_asic_status[i*8+1], info->chain_asic_status[i*8+2], info->chain_asic_status[i*8+3], info->chain_asic_status[i*8+4], info->chain_asic_status[i*8+5], info->chain_asic_status[i*8+6], info->chain_asic_status[i*8+7]);
  1237. applog(LOG_ERR, "bitmain_initialize chain(%d) asic_num=%d asic_status=%s", i, info->chain_asic_num[i], info->chain_asic_status_t[i]);
  1238. }
  1239. bitmain_update_temps(bitmain, info, &rxstatusdata);
  1240. statusok = 1;
  1241. break;
  1242. }
  1243. }
  1244. if(statusok) {
  1245. break;
  1246. }
  1247. }
  1248. }
  1249. trycount--;
  1250. p.tv_sec = 0;
  1251. p.tv_nsec = BITMAIN_RESET_PITCH;
  1252. nanosleep(&p, NULL);
  1253. }
  1254. p.tv_sec = 0;
  1255. p.tv_nsec = BITMAIN_RESET_PITCH;
  1256. nanosleep(&p, NULL);
  1257. cgtime(&info->last_status_time);
  1258. if(statusok) {
  1259. applog(LOG_ERR, "bitmain_initialize start send txconfig");
  1260. if(opt_bitmain_hwerror)
  1261. hwerror_eft = 1;
  1262. else
  1263. hwerror_eft = 0;
  1264. if(opt_bitmain_nobeeper)
  1265. beeper_ctrl = 0;
  1266. else
  1267. beeper_ctrl = 1;
  1268. if(opt_bitmain_notempoverctrl)
  1269. tempover_ctrl = 0;
  1270. else
  1271. tempover_ctrl = 1;
  1272. if(opt_bitmain_homemode)
  1273. home_mode= 1;
  1274. else
  1275. home_mode= 0;
  1276. sendlen = bitmain_set_txconfig((struct bitmain_txconfig_token *)sendbuf, 1, 1, 1, 1, 1, 0, 1, hwerror_eft, beeper_ctrl, tempover_ctrl,home_mode,
  1277. info->chain_num, info->asic_num, BITMAIN_DEFAULT_FAN_MAX_PWM, info->timeout,
  1278. info->frequency, info->voltage, 0, 0, 0x04, info->reg_data);
  1279. if(sendlen <= 0) {
  1280. applog(LOG_ERR, "bitmain_initialize bitmain_set_txconfig error(%d)", sendlen);
  1281. return -1;
  1282. }
  1283. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1284. if (unlikely(ret == BTM_SEND_ERROR)) {
  1285. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1286. return -1;
  1287. }
  1288. applog(LOG_WARNING, "BMM%d: InitSet succeeded", bitmain->device_id);
  1289. } else {
  1290. applog(LOG_WARNING, "BMS%d: InitSet error", bitmain->device_id);
  1291. return -1;
  1292. }
  1293. return 0;
  1294. }
  1295. static bool bitmain_detect_one(const char * devpath)
  1296. {
  1297. struct bitmain_info *info;
  1298. struct cgpu_info *bitmain;
  1299. int ret;
  1300. bitmain = btm_alloc_cgpu(&bitmain_drv, BITMAIN_MINER_THREADS);
  1301. info = bitmain->device_data;
  1302. drv_set_defaults(&bitmain_drv, bitmain_set_device_funcs_init, info, devpath, NULL, 1);
  1303. if (!btm_init(bitmain, devpath))
  1304. goto shin;
  1305. applog(LOG_ERR, "bitmain_detect_one btm init ok");
  1306. info->fan_pwm = BITMAIN_DEFAULT_FAN_MIN_PWM;
  1307. info->temp_max = 0;
  1308. /* This is for check the temp/fan every 3~4s */
  1309. info->temp_history_count = (4 / (float)((float)info->timeout * ((float)1.67/0x32))) + 1;
  1310. if (info->temp_history_count <= 0)
  1311. info->temp_history_count = 1;
  1312. info->temp_history_index = 0;
  1313. info->temp_sum = 0;
  1314. info->temp_old = 0;
  1315. if (!add_cgpu(bitmain))
  1316. goto unshin;
  1317. ret = bitmain_initialize(bitmain);
  1318. applog(LOG_ERR, "bitmain_detect_one stop bitmain_initialize %d", ret);
  1319. if (ret)
  1320. goto unshin;
  1321. info->errorcount = 0;
  1322. applog(LOG_ERR, "BitMain Detected: %s "
  1323. "(chain_num=%d asic_num=%d timeout=%d freq=%d-%s volt=%02x%02x-%s)",
  1324. bitmain->device_path, info->chain_num, info->asic_num, info->timeout,
  1325. info->frequency, info->frequency_t, info->voltage[0], info->voltage[1], info->voltage_t);
  1326. return true;
  1327. unshin:
  1328. btm_uninit(bitmain);
  1329. shin:
  1330. free(bitmain->device_data);
  1331. bitmain->device_data = NULL;
  1332. free(bitmain);
  1333. return false;
  1334. }
  1335. static int bitmain_detect_auto(void)
  1336. {
  1337. const char * const auto_bitmain_dev = "/dev/bitmain-asic";
  1338. applog(LOG_DEBUG, "BTM detect dev: %s", auto_bitmain_dev);
  1339. return bitmain_detect_one(auto_bitmain_dev) ? 1 : 0;
  1340. }
  1341. static void bitmain_detect()
  1342. {
  1343. generic_detect(&bitmain_drv, bitmain_detect_one, bitmain_detect_auto, GDF_REQUIRE_DNAME | GDF_DEFAULT_NOAUTO);
  1344. }
  1345. static void do_bitmain_close(struct thr_info *thr)
  1346. {
  1347. struct cgpu_info *bitmain = thr->cgpu;
  1348. struct bitmain_info *info = bitmain->device_data;
  1349. pthread_join(info->read_thr, NULL);
  1350. bitmain_running_reset(bitmain, info);
  1351. info->no_matching_work = 0;
  1352. }
  1353. /* We use a replacement algorithm to only remove references to work done from
  1354. * the buffer when we need the extra space for new work. */
  1355. static bool bitmain_fill(struct cgpu_info *bitmain)
  1356. {
  1357. struct bitmain_info *info = bitmain->device_data;
  1358. int subid, slot;
  1359. struct work *work;
  1360. bool ret = true;
  1361. int sendret = 0, sendcount = 0, neednum = 0, queuednum = 0, sendnum = 0, sendlen = 0;
  1362. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1363. int senderror = 0;
  1364. struct timeval now;
  1365. int timediff = 0;
  1366. //applog(LOG_DEBUG, "BTM bitmain_fill start--------");
  1367. mutex_lock(&info->qlock);
  1368. if(info->fifo_space <= 0) {
  1369. //applog(LOG_DEBUG, "BTM bitmain_fill fifo space empty--------");
  1370. ret = true;
  1371. goto out_unlock;
  1372. }
  1373. if (bitmain->queued >= BITMAIN_MAX_WORK_QUEUE_NUM) {
  1374. ret = true;
  1375. } else {
  1376. ret = false;
  1377. }
  1378. while(info->fifo_space > 0) {
  1379. neednum = info->fifo_space<BITMAIN_MAX_WORK_NUM?info->fifo_space:BITMAIN_MAX_WORK_NUM;
  1380. queuednum = bitmain->queued;
  1381. applog(LOG_DEBUG, "BTM: Work task queued(%d) fifo space(%d) needsend(%d)", queuednum, info->fifo_space, neednum);
  1382. if(queuednum < neednum) {
  1383. while(true) {
  1384. work = get_queued(bitmain);
  1385. if (unlikely(!work)) {
  1386. break;
  1387. } else {
  1388. applog(LOG_DEBUG, "BTM get work queued number:%d neednum:%d", queuednum, neednum);
  1389. subid = bitmain->queued++;
  1390. work->subid = subid;
  1391. slot = bitmain->work_array + subid;
  1392. if (slot > BITMAIN_ARRAY_SIZE) {
  1393. applog(LOG_DEBUG, "bitmain_fill array cyc %d", BITMAIN_ARRAY_SIZE);
  1394. slot = 0;
  1395. }
  1396. if (likely(bitmain->works[slot])) {
  1397. applog(LOG_DEBUG, "bitmain_fill work_completed %d", slot);
  1398. work_completed(bitmain, bitmain->works[slot]);
  1399. }
  1400. bitmain->works[slot] = work;
  1401. queuednum++;
  1402. if(queuednum >= neednum) {
  1403. break;
  1404. }
  1405. }
  1406. }
  1407. }
  1408. if(queuednum < BITMAIN_MAX_DEAL_QUEUE_NUM) {
  1409. if(queuednum < neednum) {
  1410. applog(LOG_DEBUG, "BTM: No enough work to send, queue num=%d", queuednum);
  1411. break;
  1412. }
  1413. }
  1414. sendnum = queuednum < neednum ? queuednum : neednum;
  1415. sendlen = bitmain_set_txtask(sendbuf, &(info->last_work_block), bitmain->works, BITMAIN_ARRAY_SIZE, bitmain->work_array, sendnum, &sendcount);
  1416. bitmain->queued -= sendnum;
  1417. info->send_full_space += sendnum;
  1418. if (bitmain->queued < 0)
  1419. bitmain->queued = 0;
  1420. if (bitmain->work_array + sendnum > BITMAIN_ARRAY_SIZE) {
  1421. bitmain->work_array = bitmain->work_array + sendnum-BITMAIN_ARRAY_SIZE;
  1422. } else {
  1423. bitmain->work_array += sendnum;
  1424. }
  1425. applog(LOG_DEBUG, "BTM: Send work array %d", bitmain->work_array);
  1426. if (sendlen > 0) {
  1427. info->fifo_space -= sendcount;
  1428. if (info->fifo_space < 0)
  1429. info->fifo_space = 0;
  1430. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1431. if (unlikely(sendret == BTM_SEND_ERROR)) {
  1432. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  1433. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  1434. info->reset = true;
  1435. info->errorcount++;
  1436. senderror = 1;
  1437. if (info->errorcount > 1000) {
  1438. info->errorcount = 0;
  1439. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  1440. bitmain->shutdown = true;
  1441. }
  1442. break;
  1443. } else {
  1444. applog(LOG_DEBUG, "bitmain_send_data send ret=%d", sendret);
  1445. info->errorcount = 0;
  1446. }
  1447. } else {
  1448. applog(LOG_DEBUG, "BTM: Send work bitmain_set_txtask error: %d", sendlen);
  1449. break;
  1450. }
  1451. }
  1452. out_unlock:
  1453. cgtime(&now);
  1454. timediff = now.tv_sec - info->last_status_time.tv_sec;
  1455. if(timediff < 0) timediff = -timediff;
  1456. if (timediff > BITMAIN_SEND_STATUS_TIME) {
  1457. applog(LOG_DEBUG, "BTM: Send RX Status Token fifo_space(%d) timediff(%d)", info->fifo_space, timediff);
  1458. copy_time(&(info->last_status_time), &now);
  1459. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *) sendbuf, 0, 0, 0, 0);
  1460. if (sendlen > 0) {
  1461. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1462. if (unlikely(sendret == BTM_SEND_ERROR)) {
  1463. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  1464. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  1465. info->reset = true;
  1466. info->errorcount++;
  1467. senderror = 1;
  1468. if (info->errorcount > 1000) {
  1469. info->errorcount = 0;
  1470. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  1471. bitmain->shutdown = true;
  1472. }
  1473. } else {
  1474. info->errorcount = 0;
  1475. if (info->fifo_space <= 0) {
  1476. senderror = 1;
  1477. }
  1478. }
  1479. }
  1480. }
  1481. if(info->send_full_space > BITMAIN_SEND_FULL_SPACE) {
  1482. info->send_full_space = 0;
  1483. ret = true;
  1484. cgsleep_ms(1);
  1485. }
  1486. mutex_unlock(&info->qlock);
  1487. if(senderror) {
  1488. ret = true;
  1489. applog(LOG_DEBUG, "bitmain_fill send task sleep");
  1490. //cgsleep_ms(1);
  1491. }
  1492. return ret;
  1493. }
  1494. static int64_t bitmain_scanhash(struct thr_info *thr)
  1495. {
  1496. struct cgpu_info *bitmain = thr->cgpu;
  1497. struct bitmain_info *info = bitmain->device_data;
  1498. const int chain_num = info->chain_num;
  1499. int64_t hash_count;
  1500. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock start");
  1501. mutex_lock(&info->qlock);
  1502. hash_count = 0xffffffffull * (uint64_t)info->nonces;
  1503. bitmain->results += info->nonces + info->idle;
  1504. if (bitmain->results > chain_num)
  1505. bitmain->results = chain_num;
  1506. if (!info->reset)
  1507. bitmain->results--;
  1508. info->nonces = info->idle = 0;
  1509. mutex_unlock(&info->qlock);
  1510. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock stop");
  1511. /* Check for nothing but consecutive bad results or consistently less
  1512. * results than we should be getting and reset the FPGA if necessary */
  1513. //if (bitmain->results < -chain_num && !info->reset) {
  1514. // applog(LOG_ERR, "BTM%d: Result return rate low, resetting!",
  1515. // bitmain->device_id);
  1516. // info->reset = true;
  1517. //}
  1518. /* This hashmeter is just a utility counter based on returned shares */
  1519. return hash_count;
  1520. }
  1521. static void bitmain_flush_work(struct cgpu_info *bitmain)
  1522. {
  1523. struct bitmain_info *info = bitmain->device_data;
  1524. mutex_lock(&info->qlock);
  1525. /* Will overwrite any work queued */
  1526. applog(LOG_ERR, "bitmain_flush_work queued=%d array=%d", bitmain->queued, bitmain->work_array);
  1527. if(bitmain->queued > 0) {
  1528. if (bitmain->work_array + bitmain->queued > BITMAIN_ARRAY_SIZE) {
  1529. bitmain->work_array = bitmain->work_array + bitmain->queued-BITMAIN_ARRAY_SIZE;
  1530. } else {
  1531. bitmain->work_array += bitmain->queued;
  1532. }
  1533. }
  1534. bitmain->queued = 0;
  1535. //bitmain->work_array = 0;
  1536. //for (int i = 0; i < BITMAIN_ARRAY_SIZE; ++i) {
  1537. // bitmain->works[i] = NULL;
  1538. //}
  1539. //pthread_cond_signal(&info->qcond);
  1540. mutex_unlock(&info->qlock);
  1541. }
  1542. static struct api_data *bitmain_api_stats(struct cgpu_info *cgpu)
  1543. {
  1544. struct api_data *root = NULL;
  1545. struct bitmain_info *info = cgpu->device_data;
  1546. double hwp = (cgpu->hw_errors + cgpu->diff1) ?
  1547. (double)(cgpu->hw_errors) / (double)(cgpu->hw_errors + cgpu->diff1) : 0;
  1548. root = api_add_int(root, "baud", &(info->baud), false);
  1549. root = api_add_int(root, "miner_count", &(info->chain_num), false);
  1550. root = api_add_int(root, "asic_count", &(info->asic_num), false);
  1551. root = api_add_int(root, "timeout", &(info->timeout), false);
  1552. root = api_add_string(root, "frequency", info->frequency_t, false);
  1553. root = api_add_string(root, "voltage", info->voltage_t, false);
  1554. root = api_add_int(root, "hwv1", &(info->hw_version[0]), false);
  1555. root = api_add_int(root, "hwv2", &(info->hw_version[1]), false);
  1556. root = api_add_int(root, "hwv3", &(info->hw_version[2]), false);
  1557. root = api_add_int(root, "hwv4", &(info->hw_version[3]), false);
  1558. root = api_add_int(root, "fan_num", &(info->fan_num), false);
  1559. root = api_add_int(root, "fan1", &(info->fan[0]), false);
  1560. root = api_add_int(root, "fan2", &(info->fan[1]), false);
  1561. root = api_add_int(root, "fan3", &(info->fan[2]), false);
  1562. root = api_add_int(root, "fan4", &(info->fan[3]), false);
  1563. root = api_add_int(root, "fan5", &(info->fan[4]), false);
  1564. root = api_add_int(root, "fan6", &(info->fan[5]), false);
  1565. root = api_add_int(root, "fan7", &(info->fan[6]), false);
  1566. root = api_add_int(root, "fan8", &(info->fan[7]), false);
  1567. root = api_add_int(root, "fan9", &(info->fan[8]), false);
  1568. root = api_add_int(root, "fan10", &(info->fan[9]), false);
  1569. root = api_add_int(root, "fan11", &(info->fan[10]), false);
  1570. root = api_add_int(root, "fan12", &(info->fan[11]), false);
  1571. root = api_add_int(root, "fan13", &(info->fan[12]), false);
  1572. root = api_add_int(root, "fan14", &(info->fan[13]), false);
  1573. root = api_add_int(root, "fan15", &(info->fan[14]), false);
  1574. root = api_add_int(root, "fan16", &(info->fan[15]), false);
  1575. root = api_add_int(root, "temp_num", &(info->temp_num), false);
  1576. root = api_add_int(root, "temp1", &(info->temp[0]), false);
  1577. root = api_add_int(root, "temp2", &(info->temp[1]), false);
  1578. root = api_add_int(root, "temp3", &(info->temp[2]), false);
  1579. root = api_add_int(root, "temp4", &(info->temp[3]), false);
  1580. root = api_add_int(root, "temp5", &(info->temp[4]), false);
  1581. root = api_add_int(root, "temp6", &(info->temp[5]), false);
  1582. root = api_add_int(root, "temp7", &(info->temp[6]), false);
  1583. root = api_add_int(root, "temp8", &(info->temp[7]), false);
  1584. root = api_add_int(root, "temp9", &(info->temp[8]), false);
  1585. root = api_add_int(root, "temp10", &(info->temp[9]), false);
  1586. root = api_add_int(root, "temp11", &(info->temp[10]), false);
  1587. root = api_add_int(root, "temp12", &(info->temp[11]), false);
  1588. root = api_add_int(root, "temp13", &(info->temp[12]), false);
  1589. root = api_add_int(root, "temp14", &(info->temp[13]), false);
  1590. root = api_add_int(root, "temp15", &(info->temp[14]), false);
  1591. root = api_add_int(root, "temp16", &(info->temp[15]), false);
  1592. root = api_add_int(root, "temp_avg", &(info->temp_avg), false);
  1593. root = api_add_int(root, "temp_max", &(info->temp_max), false);
  1594. root = api_add_percent(root, "Device Hardware%", &hwp, true);
  1595. root = api_add_int(root, "no_matching_work", &(info->no_matching_work), false);
  1596. /*
  1597. for (int i = 0; i < info->chain_num; ++i) {
  1598. char mcw[24];
  1599. sprintf(mcw, "match_work_count%d", i + 1);
  1600. root = api_add_int(root, mcw, &(info->matching_work[i]), false);
  1601. }*/
  1602. root = api_add_int(root, "chain_acn1", &(info->chain_asic_num[0]), false);
  1603. root = api_add_int(root, "chain_acn2", &(info->chain_asic_num[1]), false);
  1604. root = api_add_int(root, "chain_acn3", &(info->chain_asic_num[2]), false);
  1605. root = api_add_int(root, "chain_acn4", &(info->chain_asic_num[3]), false);
  1606. root = api_add_int(root, "chain_acn5", &(info->chain_asic_num[4]), false);
  1607. root = api_add_int(root, "chain_acn6", &(info->chain_asic_num[5]), false);
  1608. root = api_add_int(root, "chain_acn7", &(info->chain_asic_num[6]), false);
  1609. root = api_add_int(root, "chain_acn8", &(info->chain_asic_num[7]), false);
  1610. root = api_add_int(root, "chain_acn9", &(info->chain_asic_num[8]), false);
  1611. root = api_add_int(root, "chain_acn10", &(info->chain_asic_num[9]), false);
  1612. root = api_add_int(root, "chain_acn11", &(info->chain_asic_num[10]), false);
  1613. root = api_add_int(root, "chain_acn12", &(info->chain_asic_num[11]), false);
  1614. root = api_add_int(root, "chain_acn13", &(info->chain_asic_num[12]), false);
  1615. root = api_add_int(root, "chain_acn14", &(info->chain_asic_num[13]), false);
  1616. root = api_add_int(root, "chain_acn15", &(info->chain_asic_num[14]), false);
  1617. root = api_add_int(root, "chain_acn16", &(info->chain_asic_num[15]), false);
  1618. //applog(LOG_ERR, "chain asic status:%s", info->chain_asic_status_t[0]);
  1619. root = api_add_string(root, "chain_acs1", info->chain_asic_status_t[0], false);
  1620. root = api_add_string(root, "chain_acs2", info->chain_asic_status_t[1], false);
  1621. root = api_add_string(root, "chain_acs3", info->chain_asic_status_t[2], false);
  1622. root = api_add_string(root, "chain_acs4", info->chain_asic_status_t[3], false);
  1623. root = api_add_string(root, "chain_acs5", info->chain_asic_status_t[4], false);
  1624. root = api_add_string(root, "chain_acs6", info->chain_asic_status_t[5], false);
  1625. root = api_add_string(root, "chain_acs7", info->chain_asic_status_t[6], false);
  1626. root = api_add_string(root, "chain_acs8", info->chain_asic_status_t[7], false);
  1627. root = api_add_string(root, "chain_acs9", info->chain_asic_status_t[8], false);
  1628. root = api_add_string(root, "chain_acs10", info->chain_asic_status_t[9], false);
  1629. root = api_add_string(root, "chain_acs11", info->chain_asic_status_t[10], false);
  1630. root = api_add_string(root, "chain_acs12", info->chain_asic_status_t[11], false);
  1631. root = api_add_string(root, "chain_acs13", info->chain_asic_status_t[12], false);
  1632. root = api_add_string(root, "chain_acs14", info->chain_asic_status_t[13], false);
  1633. root = api_add_string(root, "chain_acs15", info->chain_asic_status_t[14], false);
  1634. root = api_add_string(root, "chain_acs16", info->chain_asic_status_t[15], false);
  1635. //root = api_add_int(root, "chain_acs1", &(info->chain_asic_status[0]), false);
  1636. //root = api_add_int(root, "chain_acs2", &(info->chain_asic_status[1]), false);
  1637. //root = api_add_int(root, "chain_acs3", &(info->chain_asic_status[2]), false);
  1638. //root = api_add_int(root, "chain_acs4", &(info->chain_asic_status[3]), false);
  1639. return root;
  1640. }
  1641. static void bitmain_shutdown(struct thr_info *thr)
  1642. {
  1643. do_bitmain_close(thr);
  1644. }
  1645. char *set_bitmain_fan(char *arg)
  1646. {
  1647. int val1, val2, ret;
  1648. ret = sscanf(arg, "%d-%d", &val1, &val2);
  1649. if (ret < 1)
  1650. return "No values passed to bitmain-fan";
  1651. if (ret == 1)
  1652. val2 = val1;
  1653. if (val1 < 0 || val1 > 100 || val2 < 0 || val2 > 100 || val2 < val1)
  1654. return "Invalid value passed to bitmain-fan";
  1655. opt_bitmain_fan_min = val1 * BITMAIN_PWM_MAX / 100;
  1656. opt_bitmain_fan_max = val2 * BITMAIN_PWM_MAX / 100;
  1657. return NULL;
  1658. }
  1659. char *set_bitmain_freq(char *arg)
  1660. {
  1661. int val1, val2, ret;
  1662. ret = sscanf(arg, "%d-%d", &val1, &val2);
  1663. if (ret < 1)
  1664. return "No values passed to bitmain-freq";
  1665. if (ret == 1)
  1666. val2 = val1;
  1667. if (val1 < BITMAIN_MIN_FREQUENCY || val1 > BITMAIN_MAX_FREQUENCY ||
  1668. val2 < BITMAIN_MIN_FREQUENCY || val2 > BITMAIN_MAX_FREQUENCY ||
  1669. val2 < val1)
  1670. return "Invalid value passed to bitmain-freq";
  1671. opt_bitmain_freq_min = val1;
  1672. opt_bitmain_freq_max = val2;
  1673. return NULL;
  1674. }
  1675. const char *bitmain_set_baud(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1676. {
  1677. struct bitmain_info *info = proc->device_data;
  1678. const int baud = atoi(newvalue);
  1679. if (!valid_baud(baud))
  1680. return "Invalid baud setting";
  1681. info->baud = baud;
  1682. return NULL;
  1683. }
  1684. const char *bitmain_set_layout(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1685. {
  1686. struct bitmain_info *info = proc->device_data;
  1687. char *endptr, *next_field;
  1688. const long int n_chains = strtol(newvalue, &endptr, 0);
  1689. if (endptr == newvalue || n_chains < 1)
  1690. return "Missing chain count";
  1691. long int n_asics = 0;
  1692. if (endptr[0] == ':' || endptr[1] == ',')
  1693. {
  1694. next_field = &endptr[1];
  1695. n_asics = strtol(next_field, &endptr, 0);
  1696. }
  1697. if (n_asics < 1)
  1698. return "Missing ASIC count";
  1699. if (n_asics > BITMAIN_DEFAULT_ASIC_NUM)
  1700. return "ASIC count too high";
  1701. info->chain_num = n_chains;
  1702. info->asic_num = n_asics;
  1703. return NULL;
  1704. }
  1705. const char *bitmain_set_timeout(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1706. {
  1707. struct bitmain_info *info = proc->device_data;
  1708. const int timeout = atoi(newvalue);
  1709. if (timeout < 0 || timeout > 0xff)
  1710. return "Invalid timeout setting";
  1711. info->timeout = timeout;
  1712. return NULL;
  1713. }
  1714. const char *bitmain_set_clock(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1715. {
  1716. struct bitmain_info *info = proc->device_data;
  1717. const int freq = atoi(newvalue);
  1718. if (freq < BITMAIN_MIN_FREQUENCY || freq > BITMAIN_MAX_FREQUENCY)
  1719. return "Invalid clock frequency";
  1720. info->frequency = freq;
  1721. sprintf(info->frequency_t, "%d", freq);
  1722. return NULL;
  1723. }
  1724. const char *bitmain_set_reg_data(struct cgpu_info * const proc, const char * const optname, const char *newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1725. {
  1726. struct bitmain_info *info = proc->device_data;
  1727. uint8_t reg_data[4] = {0};
  1728. if (newvalue[0] == 'x')
  1729. ++newvalue;
  1730. size_t nvlen = strlen(newvalue);
  1731. if (nvlen > (sizeof(reg_data) * 2) || !nvlen || nvlen % 2)
  1732. return "reg_data must be a hex string of 2-8 digits (1-4 bytes)";
  1733. if (!hex2bin(reg_data, newvalue, nvlen / 2))
  1734. return "Invalid reg data hex";
  1735. memcpy(info->reg_data, reg_data, sizeof(reg_data));
  1736. return NULL;
  1737. }
  1738. const char *bitmain_set_voltage(struct cgpu_info * const proc, const char * const optname, const char *newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1739. {
  1740. struct bitmain_info *info = proc->device_data;
  1741. uint8_t voltage_data[2] = {0};
  1742. if (newvalue[0] == 'x')
  1743. ++newvalue;
  1744. else
  1745. voltage_usage:
  1746. return "voltage must be 'x' followed by a hex string of 1-4 digits (1-2 bytes)";
  1747. size_t nvlen = strlen(newvalue);
  1748. if (nvlen > (sizeof(voltage_data) * 2) || !nvlen || nvlen % 2)
  1749. goto voltage_usage;
  1750. if (!hex2bin(voltage_data, newvalue, nvlen / 2))
  1751. return "Invalid voltage data hex";
  1752. memcpy(info->voltage, voltage_data, sizeof(voltage_data));
  1753. bin2hex(info->voltage_t, voltage_data, 2);
  1754. info->voltage_t[5] = 0;
  1755. info->voltage_t[4] = info->voltage_t[3];
  1756. info->voltage_t[3] = info->voltage_t[2];
  1757. info->voltage_t[2] = info->voltage_t[1];
  1758. info->voltage_t[1] = '.';
  1759. return NULL;
  1760. }
  1761. static const struct bfg_set_device_definition bitmain_set_device_funcs_init[] = {
  1762. {"baud", bitmain_set_baud, "serial baud rate"},
  1763. {"layout", bitmain_set_layout, "number of chains ':' number of ASICs per chain (eg: 32:8)"},
  1764. {"timeout", bitmain_set_timeout, "timeout"},
  1765. {"clock", bitmain_set_clock, "clock frequency"},
  1766. {"reg_data", bitmain_set_reg_data, "reg_data (eg: x0d82)"},
  1767. {"voltage", bitmain_set_voltage, "voltage (must be specified as 'x' and hex data; eg: x0725)"},
  1768. {NULL},
  1769. };
  1770. struct device_drv bitmain_drv = {
  1771. .dname = "bitmain",
  1772. .name = "BTM",
  1773. .drv_detect = bitmain_detect,
  1774. .thread_prepare = bitmain_prepare,
  1775. .minerloop = hash_queued_work,
  1776. .queue_full = bitmain_fill,
  1777. .scanwork = bitmain_scanhash,
  1778. .flush_work = bitmain_flush_work,
  1779. .get_api_stats = bitmain_api_stats,
  1780. .reinit_device = bitmain_init,
  1781. .thread_shutdown = bitmain_shutdown,
  1782. };