libztex.c 19 KB

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  1. /**
  2. * libztex.c - Ztex 1.15x fpga board support library
  3. *
  4. * Copyright (c) 2012 nelisky.btc@gmail.com
  5. *
  6. * This work is based upon the Java SDK provided by ztex which is
  7. * Copyright (C) 2009-2011 ZTEX GmbH.
  8. * http://www.ztex.de
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, see http://www.gnu.org/licenses/.
  21. **/
  22. #include <stdio.h>
  23. #include <unistd.h>
  24. #include "dynclock.h"
  25. #include "miner.h"
  26. #include "fpgautils.h"
  27. #include "libztex.h"
  28. #define BUFSIZE 256
  29. //* Capability index for EEPROM support.
  30. #define CAPABILITY_EEPROM 0,0
  31. //* Capability index for FPGA configuration support.
  32. #define CAPABILITY_FPGA 0,1
  33. //* Capability index for FLASH memory support.
  34. #define CAPABILITY_FLASH 0,2
  35. //* Capability index for DEBUG helper support.
  36. #define CAPABILITY_DEBUG 0,3
  37. //* Capability index for AVR XMEGA support.
  38. #define CAPABILITY_XMEGA 0,4
  39. //* Capability index for AVR XMEGA support.
  40. #define CAPABILITY_HS_FPGA 0,5
  41. //* Capability index for AVR XMEGA support.
  42. #define CAPABILITY_MAC_EEPROM 0,6
  43. //* Capability index for multi FPGA support.
  44. #define CAPABILITY_MULTI_FPGA 0,7
  45. static bool libztex_checkDevice(struct libusb_device *dev)
  46. {
  47. struct libusb_device_descriptor desc;
  48. int err;
  49. err = libusb_get_device_descriptor(dev, &desc);
  50. if (unlikely(err != 0)) {
  51. applog(LOG_ERR, "Ztex check device: Failed to open read descriptor with error %d", err);
  52. return false;
  53. }
  54. if (!(desc.idVendor == LIBZTEX_IDVENDOR && desc.idProduct == LIBZTEX_IDPRODUCT)) {
  55. applog(LOG_DEBUG, "Not a ZTEX device %04x:%04x", desc.idVendor, desc.idProduct);
  56. return false;
  57. }
  58. return true;
  59. }
  60. static bool libztex_checkCapability(struct libztex_device *ztex, int i, int j)
  61. {
  62. if (!((i >= 0) && (i <= 5) && (j >= 0) && (j < 8) &&
  63. (((ztex->interfaceCapabilities[i] & 255) & (1 << j)) != 0))) {
  64. applog(LOG_ERR, "%s: capability missing: %d %d", ztex->repr, i, j);
  65. return false;
  66. }
  67. return true;
  68. }
  69. static int libztex_detectBitstreamBitOrder(const unsigned char *buf, int size)
  70. {
  71. int i;
  72. for (i = 0; i < size - 4; i++) {
  73. if (((buf[i] & 255) == 0xaa) && ((buf[i + 1] & 255) == 0x99) && ((buf[i + 2] & 255) == 0x55) && ((buf[i + 3] & 255) == 0x66))
  74. return 1;
  75. if (((buf[i] & 255) == 0x55) && ((buf[i + 1] & 255) == 0x99) && ((buf[i + 2] & 255) == 0xaa) && ((buf[i + 3] & 255) == 0x66))
  76. return 0;
  77. }
  78. applog(LOG_WARNING, "Unable to determine bitstream bit order: no signature found");
  79. return 0;
  80. }
  81. static void libztex_swapBits(unsigned char *buf, int size)
  82. {
  83. unsigned char c;
  84. int i;
  85. for (i = 0; i < size; i++) {
  86. c = buf[i];
  87. buf[i] = ((c & 128) >> 7) |
  88. ((c & 64) >> 5) |
  89. ((c & 32) >> 3) |
  90. ((c & 16) >> 1) |
  91. ((c & 8) << 1) |
  92. ((c & 4) << 3) |
  93. ((c & 2) << 5) |
  94. ((c & 1) << 7);
  95. }
  96. }
  97. static int libztex_getFpgaState(struct libztex_device *ztex, struct libztex_fpgastate *state)
  98. {
  99. unsigned char buf[9];
  100. int cnt;
  101. if (!libztex_checkCapability(ztex, CAPABILITY_FPGA))
  102. return -1;
  103. cnt = libusb_control_transfer(ztex->hndl, 0xc0, 0x30, 0, 0, buf, 9, 1000);
  104. if (unlikely(cnt < 0)) {
  105. applog(LOG_ERR, "%s: Failed getFpgaState with err %d", ztex->repr, cnt);
  106. return cnt;
  107. }
  108. state->fpgaConfigured = (buf[0] == 0);
  109. state->fpgaChecksum = buf[1] & 0xff;
  110. state->fpgaBytes = ((buf[5] & 0xff) << 24) | ((buf[4] & 0xff) << 16) | ((buf[3] & 0xff) << 8) | (buf[2] & 0xff);
  111. state->fpgaInitB = buf[6] & 0xff;
  112. state->fpgaFlashResult = buf[7];
  113. state->fpgaFlashBitSwap = (buf[8] != 0);
  114. return 0;
  115. }
  116. static int libztex_configureFpgaHS(struct libztex_device *ztex, const char* firmware, bool force, char bs)
  117. {
  118. struct libztex_fpgastate state;
  119. const int transactionBytes = 65536;
  120. unsigned char buf[transactionBytes], settings[2];
  121. int tries, cnt, buf_p, i;
  122. ssize_t pos = 0;
  123. FILE *fp;
  124. if (!libztex_checkCapability(ztex, CAPABILITY_HS_FPGA))
  125. return -1;
  126. libztex_getFpgaState(ztex, &state);
  127. if (!force && state.fpgaConfigured) {
  128. applog(LOG_INFO, "Bitstream already configured");
  129. return 1;
  130. }
  131. cnt = libusb_control_transfer(ztex->hndl, 0xc0, 0x33, 0, 0, settings, 2, 1000);
  132. if (unlikely(cnt < 0)) {
  133. applog(LOG_ERR, "%s: Failed getHSFpgaSettings with err %d", ztex->repr, cnt);
  134. return cnt;
  135. }
  136. libusb_claim_interface(ztex->hndl, settings[1]);
  137. for (tries = 3; tries > 0; tries--) {
  138. fp = open_bitstream("ztex", firmware);
  139. if (!fp) {
  140. applog(LOG_ERR, "%s: failed to read firmware '%s'", ztex->repr, firmware);
  141. return -2;
  142. }
  143. while (pos < transactionBytes && !feof(fp)) {
  144. buf[pos++] = getc(fp);
  145. }
  146. if (feof(fp))
  147. pos--;
  148. if (bs != 0 && bs != 1)
  149. bs = libztex_detectBitstreamBitOrder(buf, transactionBytes < pos? transactionBytes: pos);
  150. if (bs == 1)
  151. libztex_swapBits(buf, pos);
  152. libusb_control_transfer(ztex->hndl, 0x40, 0x34, 0, 0, NULL, 0, 1000);
  153. // 0x34 - initHSFPGAConfiguration
  154. buf_p = pos;
  155. while (1) {
  156. i = 0;
  157. while (i < buf_p) {
  158. if (libusb_bulk_transfer(ztex->hndl,
  159. settings[0],
  160. &buf[i],
  161. buf_p - i,
  162. &cnt, 1000) != 0) {
  163. applog(LOG_ERR, "%s: Failed send hs fpga data", ztex->repr);
  164. break;
  165. }
  166. usleep(500);
  167. i += cnt;
  168. }
  169. if (i < buf_p || buf_p < transactionBytes)
  170. break;
  171. buf_p = 0;
  172. while (buf_p < transactionBytes && !feof(fp)) {
  173. buf[buf_p++] = getc(fp);
  174. }
  175. if (feof(fp))
  176. buf_p--;
  177. pos += buf_p;
  178. if (buf_p == 0)
  179. break;
  180. if (bs == 1)
  181. libztex_swapBits(buf, buf_p);
  182. }
  183. libusb_control_transfer(ztex->hndl, 0x40, 0x35, 0, 0, NULL, 0, 1000);
  184. // 0x35 - finishHSFPGAConfiguration
  185. if (cnt >= 0)
  186. tries = 0;
  187. fclose(fp);
  188. libztex_getFpgaState(ztex, &state);
  189. if (!state.fpgaConfigured) {
  190. applog(LOG_ERR, "%s: HS FPGA configuration failed: DONE pin does not go high", ztex->repr);
  191. return -3;
  192. }
  193. }
  194. libusb_release_interface(ztex->hndl, settings[1]);
  195. usleep(200000);
  196. applog(LOG_INFO, "%s: HS FPGA configuration done", ztex->repr);
  197. return 0;
  198. }
  199. static int libztex_configureFpgaLS(struct libztex_device *ztex, const char* firmware, bool force, char bs)
  200. {
  201. struct libztex_fpgastate state;
  202. const int transactionBytes = 2048;
  203. unsigned char buf[transactionBytes], cs;
  204. int tries, cnt, buf_p, i;
  205. ssize_t pos = 0;
  206. FILE *fp;
  207. if (!libztex_checkCapability(ztex, CAPABILITY_FPGA))
  208. return -1;
  209. libztex_getFpgaState(ztex, &state);
  210. if (!force && state.fpgaConfigured) {
  211. applog(LOG_DEBUG, "Bitstream already configured");
  212. return 1;
  213. }
  214. for (tries = 10; tries > 0; tries--) {
  215. fp = open_bitstream("ztex", firmware);
  216. if (!fp) {
  217. applog(LOG_ERR, "%s: failed to read firmware '%s'", ztex->repr, firmware);
  218. return -2;
  219. }
  220. cs = 0;
  221. while (pos < transactionBytes && !feof(fp)) {
  222. buf[pos] = getc(fp);
  223. cs += buf[pos++];
  224. }
  225. if (feof(fp))
  226. pos--;
  227. if (bs != 0 && bs != 1)
  228. bs = libztex_detectBitstreamBitOrder(buf, transactionBytes < pos? transactionBytes: pos);
  229. //* Reset fpga
  230. cnt = libztex_resetFpga(ztex);
  231. if (unlikely(cnt < 0)) {
  232. applog(LOG_ERR, "%s: Failed reset fpga with err %d", ztex->repr, cnt);
  233. continue;
  234. }
  235. if (bs == 1)
  236. libztex_swapBits(buf, pos);
  237. buf_p = pos;
  238. while (1) {
  239. i = 0;
  240. while (i < buf_p) {
  241. cnt = libusb_control_transfer(ztex->hndl, 0x40, 0x32, 0, 0, &buf[i], buf_p - i, 5000);
  242. if (unlikely(cnt < 0)) {
  243. applog(LOG_ERR, "%s: Failed send fpga data with err %d", ztex->repr, cnt);
  244. break;
  245. }
  246. i += cnt;
  247. }
  248. if (i < buf_p || buf_p < transactionBytes)
  249. break;
  250. buf_p = 0;
  251. while (buf_p < transactionBytes && !feof(fp)) {
  252. buf[buf_p] = getc(fp);
  253. cs += buf[buf_p++];
  254. }
  255. if (feof(fp))
  256. buf_p--;
  257. pos += buf_p;
  258. if (buf_p == 0)
  259. break;
  260. if (bs == 1)
  261. libztex_swapBits(buf, buf_p);
  262. }
  263. if (cnt >= 0)
  264. tries = 0;
  265. fclose(fp);
  266. }
  267. libztex_getFpgaState(ztex, &state);
  268. if (!state.fpgaConfigured) {
  269. applog(LOG_ERR, "%s: FPGA configuration failed: DONE pin does not go high", ztex->repr);
  270. return 3;
  271. }
  272. usleep(200000);
  273. applog(LOG_INFO, "%s: FPGA configuration done", ztex->repr);
  274. return 0;
  275. }
  276. int libztex_configureFpga(struct libztex_device *ztex)
  277. {
  278. char buf[256];
  279. int rv;
  280. strcpy(buf, ztex->bitFileName);
  281. strcat(buf, ".bit");
  282. rv = libztex_configureFpgaHS(ztex, buf, true, 2);
  283. if (rv != 0)
  284. rv = libztex_configureFpgaLS(ztex, buf, true, 2);
  285. return rv;
  286. }
  287. int libztex_numberOfFpgas(struct libztex_device *ztex) {
  288. int cnt;
  289. unsigned char buf[3];
  290. if (ztex->numberOfFpgas < 0) {
  291. if (libztex_checkCapability(ztex, CAPABILITY_MULTI_FPGA)) {
  292. cnt = libusb_control_transfer(ztex->hndl, 0xc0, 0x50, 0, 0, buf, 3, 1000);
  293. if (unlikely(cnt < 0)) {
  294. applog(LOG_ERR, "%s: Failed getMultiFpgaInfo with err %d", ztex->repr, cnt);
  295. return cnt;
  296. }
  297. ztex->numberOfFpgas = buf[0] + 1;
  298. ztex->selectedFpga = -1;//buf[1];
  299. ztex->parallelConfigSupport = (buf[2] == 1);
  300. } else {
  301. ztex->numberOfFpgas = 1;
  302. ztex->selectedFpga = -1;//0;
  303. ztex->parallelConfigSupport = false;
  304. }
  305. }
  306. return ztex->numberOfFpgas;
  307. }
  308. int libztex_selectFpga(struct libztex_device *ztex) {
  309. int cnt, fpgacnt = libztex_numberOfFpgas(ztex->root);
  310. int number = ztex->fpgaNum;
  311. if (number < 0 || number >= fpgacnt) {
  312. applog(LOG_WARNING, "%s: Trying to select wrong fpga (%d in %d)", ztex->repr, number, fpgacnt);
  313. return 1;
  314. }
  315. if (ztex->root->selectedFpga != number && libztex_checkCapability(ztex->root, CAPABILITY_MULTI_FPGA)) {
  316. cnt = libusb_control_transfer(ztex->root->hndl, 0x40, 0x51, number, 0, NULL, 0, 500);
  317. if (unlikely(cnt < 0)) {
  318. applog(LOG_ERR, "Ztex check device: Failed to set fpga with err %d", cnt);
  319. return cnt;
  320. }
  321. ztex->root->selectedFpga = number;
  322. }
  323. return 0;
  324. }
  325. int libztex_setFreq(struct libztex_device *ztex, uint16_t freq) {
  326. int cnt;
  327. uint16_t oldfreq = ztex->dclk.freqM;
  328. if (freq > ztex->dclk.freqMaxM)
  329. freq = ztex->dclk.freqMaxM;
  330. cnt = libusb_control_transfer(ztex->hndl, 0x40, 0x83, freq, 0, NULL, 0, 500);
  331. if (unlikely(cnt < 0)) {
  332. applog(LOG_ERR, "Ztex check device: Failed to set frequency with err %d", cnt);
  333. return cnt;
  334. }
  335. ztex->dclk.freqM = freq;
  336. if (oldfreq > ztex->dclk.freqMaxM)
  337. applog(LOG_WARNING, "%s: Frequency set to %u Mhz (range: %u-%u)",
  338. ztex->repr,
  339. (unsigned)(ztex->freqM1 * (ztex->dclk.freqM + 1)),
  340. (unsigned)ztex->freqM1,
  341. (unsigned)(ztex->freqM1 * (ztex->dclk.freqMaxM + 1))
  342. );
  343. else
  344. dclk_msg_freqchange(ztex->repr,
  345. ztex->freqM1 * (oldfreq + 1),
  346. ztex->freqM1 * (ztex->dclk.freqM + 1),
  347. NULL);
  348. return 0;
  349. }
  350. int libztex_resetFpga(struct libztex_device *ztex)
  351. {
  352. return libusb_control_transfer(ztex->hndl, 0x40, 0x31, 0, 0, NULL, 0, 1000);
  353. }
  354. int libztex_suspend(struct libztex_device *ztex) {
  355. if (ztex->suspendSupported) {
  356. return libusb_control_transfer(ztex->hndl, 0x40, 0x84, 0, 0, NULL, 0, 1000);
  357. } else {
  358. return 0;
  359. }
  360. }
  361. int libztex_prepare_device(struct libusb_device *dev, struct libztex_device** ztex) {
  362. struct libztex_device *newdev;
  363. int i, cnt, err;
  364. unsigned char buf[64];
  365. newdev = malloc(sizeof(struct libztex_device));
  366. dclk_prepare(&newdev->dclk);
  367. newdev->bitFileName = NULL;
  368. newdev->numberOfFpgas = -1;
  369. newdev->valid = false;
  370. newdev->hndl = NULL;
  371. *ztex = newdev;
  372. err = libusb_get_device_descriptor(dev, &newdev->descriptor);
  373. if (unlikely(err != 0)) {
  374. applog(LOG_ERR, "Ztex check device: Failed to open read descriptor with error %d", err);
  375. return err;
  376. }
  377. // Check vendorId and productId
  378. if (!(newdev->descriptor.idVendor == LIBZTEX_IDVENDOR &&
  379. newdev->descriptor.idProduct == LIBZTEX_IDPRODUCT)) {
  380. applog(LOG_ERR, "Not a ztex device? %04x, %04x", newdev->descriptor.idVendor, newdev->descriptor.idProduct);
  381. return 1;
  382. }
  383. err = libusb_open(dev, &newdev->hndl);
  384. if (unlikely(err != 0)) {
  385. applog(LOG_ERR, "Ztex check device: Failed to open handle with error %d", err);
  386. return err;
  387. }
  388. cnt = libusb_get_string_descriptor_ascii (newdev->hndl, newdev->descriptor.iSerialNumber, newdev->snString,
  389. LIBZTEX_SNSTRING_LEN + 1);
  390. if (unlikely(cnt < 0)) {
  391. applog(LOG_ERR, "Ztex check device: Failed to read device snString with err %d", cnt);
  392. return cnt;
  393. }
  394. cnt = libusb_control_transfer(newdev->hndl, 0xc0, 0x22, 0, 0, buf, 40, 500);
  395. if (unlikely(cnt < 0)) {
  396. applog(LOG_ERR, "Ztex check device: Failed to read ztex descriptor with err %d", cnt);
  397. return cnt;
  398. }
  399. if (buf[0] != 40 || buf[1] != 1 || buf[2] != 'Z' || buf[3] != 'T' || buf[4] != 'E' || buf[5] != 'X') {
  400. applog(LOG_ERR, "Ztex check device: Error reading ztex descriptor");
  401. return 2;
  402. }
  403. newdev->productId[0] = buf[6];
  404. newdev->productId[1] = buf[7];
  405. newdev->productId[2] = buf[8];
  406. newdev->productId[3] = buf[9];
  407. newdev->fwVersion = buf[10];
  408. newdev->interfaceVersion = buf[11];
  409. newdev->interfaceCapabilities[0] = buf[12];
  410. newdev->interfaceCapabilities[1] = buf[13];
  411. newdev->interfaceCapabilities[2] = buf[14];
  412. newdev->interfaceCapabilities[3] = buf[15];
  413. newdev->interfaceCapabilities[4] = buf[16];
  414. newdev->interfaceCapabilities[5] = buf[17];
  415. newdev->moduleReserved[0] = buf[18];
  416. newdev->moduleReserved[1] = buf[19];
  417. newdev->moduleReserved[2] = buf[20];
  418. newdev->moduleReserved[3] = buf[21];
  419. newdev->moduleReserved[4] = buf[22];
  420. newdev->moduleReserved[5] = buf[23];
  421. newdev->moduleReserved[6] = buf[24];
  422. newdev->moduleReserved[7] = buf[25];
  423. newdev->moduleReserved[8] = buf[26];
  424. newdev->moduleReserved[9] = buf[27];
  425. newdev->moduleReserved[10] = buf[28];
  426. newdev->moduleReserved[11] = buf[29];
  427. cnt = libusb_control_transfer(newdev->hndl, 0xc0, 0x82, 0, 0, buf, 64, 500);
  428. if (unlikely(cnt < 0)) {
  429. applog(LOG_ERR, "Ztex check device: Failed to read ztex descriptor with err %d", cnt);
  430. return cnt;
  431. }
  432. if (unlikely(buf[0] != 5)) {
  433. if (unlikely(buf[0] != 2 && buf[0] != 4)) {
  434. applog(LOG_ERR, "Invalid BTCMiner descriptor version. Firmware must be updated (%d).", buf[0]);
  435. return 3;
  436. }
  437. applog(LOG_WARNING, "Firmware out of date (%d).", buf[0]);
  438. }
  439. i = buf[0] > 4? 11: (buf[0] > 2? 10: 8);
  440. while (cnt < 64 && buf[cnt] != 0)
  441. cnt++;
  442. if (cnt < i + 1) {
  443. applog(LOG_ERR, "Invalid bitstream file name .");
  444. return 4;
  445. }
  446. newdev->bitFileName = malloc(sizeof(char) * (cnt + 1));
  447. memcpy(newdev->bitFileName, &buf[i], cnt);
  448. newdev->bitFileName[cnt] = 0;
  449. newdev->numNonces = buf[1] + 1;
  450. newdev->offsNonces = ((buf[2] & 255) | ((buf[3] & 255) << 8)) - 10000;
  451. newdev->freqM1 = ((buf[4] & 255) | ((buf[5] & 255) << 8) ) * 0.01;
  452. newdev->dclk.freqMaxM = (buf[7] & 255);
  453. newdev->dclk.freqM = (buf[6] & 255);
  454. newdev->dclk.freqMDefault = newdev->dclk.freqM;
  455. newdev->suspendSupported = (buf[0] == 5);
  456. newdev->hashesPerClock = buf[0] > 2? (((buf[8] & 255) | ((buf[9] & 255) << 8)) + 1) / 128.0: 1.0;
  457. newdev->extraSolutions = buf[0] > 4? buf[10]: 0;
  458. applog(LOG_DEBUG, "PID: %d numNonces: %d offsNonces: %d freqM1: %f freqMaxM: %d freqM: %d suspendSupported: %s hashesPerClock: %f extraSolutions: %d",
  459. buf[0], newdev->numNonces, newdev->offsNonces, newdev->freqM1, newdev->dclk.freqMaxM, newdev->dclk.freqM, newdev->suspendSupported ? "T": "F",
  460. newdev->hashesPerClock, newdev->extraSolutions);
  461. if (buf[0] < 4) {
  462. if (strncmp(newdev->bitFileName, "ztex_ufm1_15b", 13) != 0)
  463. newdev->hashesPerClock = 0.5;
  464. applog(LOG_WARNING, "HASHES_PER_CLOCK not defined, assuming %0.2f", newdev->hashesPerClock);
  465. }
  466. newdev->usbbus = libusb_get_bus_number(dev);
  467. newdev->usbaddress = libusb_get_device_address(dev);
  468. sprintf(newdev->repr, "ZTEX %s-1", newdev->snString);
  469. newdev->valid = true;
  470. return 0;
  471. }
  472. void libztex_destroy_device(struct libztex_device* ztex)
  473. {
  474. if (ztex->hndl != NULL) {
  475. libusb_close(ztex->hndl);
  476. ztex->hndl = NULL;
  477. }
  478. if (ztex->bitFileName != NULL) {
  479. free(ztex->bitFileName);
  480. ztex->bitFileName = NULL;
  481. }
  482. free(ztex);
  483. }
  484. int libztex_scanDevices(struct libztex_dev_list*** devs_p)
  485. {
  486. int usbdevices[LIBZTEX_MAX_DESCRIPTORS];
  487. struct libztex_dev_list **devs;
  488. struct libztex_device *ztex;
  489. int found = 0, pos = 0, err;
  490. libusb_device **list;
  491. ssize_t cnt, i = 0;
  492. cnt = libusb_get_device_list(NULL, &list);
  493. if (unlikely(cnt < 0)) {
  494. applog(LOG_ERR, "Ztex scan devices: Failed to list usb devices with err %"PRId64, (int64_t)cnt);
  495. return 0;
  496. }
  497. for (i = 0; i < cnt; i++) {
  498. if (libztex_checkDevice(list[i])) {
  499. // Got one!
  500. usbdevices[found] = i;
  501. found++;
  502. }
  503. }
  504. devs = malloc(sizeof(struct libztex_dev_list *) * found);
  505. if (devs == NULL) {
  506. applog(LOG_ERR, "Ztex scan devices: Failed to allocate memory");
  507. return 0;
  508. }
  509. for (i = 0; i < found; i++) {
  510. err = libztex_prepare_device(list[usbdevices[i]], &ztex);
  511. if (unlikely(err != 0))
  512. applog(LOG_ERR, "prepare device: %d", err);
  513. // check if valid
  514. if (!ztex->valid) {
  515. libztex_destroy_device(ztex);
  516. continue;
  517. }
  518. devs[pos] = malloc(sizeof(struct libztex_dev_list));
  519. devs[pos]->dev = ztex;
  520. devs[pos]->next = NULL;
  521. if (pos > 0)
  522. devs[pos - 1]->next = devs[pos];
  523. pos++;
  524. }
  525. libusb_free_device_list(list, 1);
  526. *devs_p = devs;
  527. return pos;
  528. }
  529. int libztex_sendHashData(struct libztex_device *ztex, unsigned char *sendbuf)
  530. {
  531. int cnt, ret, len;
  532. if (ztex == NULL || ztex->hndl == NULL)
  533. return 0;
  534. ret = 44; len = 0;
  535. while (ret > 0) {
  536. cnt = libusb_control_transfer(ztex->hndl, 0x40, 0x80, 0, 0, sendbuf + len, ret, 1000);
  537. if (cnt >= 0) {
  538. ret -= cnt;
  539. len += cnt;
  540. } else
  541. break;
  542. }
  543. if (unlikely(cnt < 0))
  544. applog(LOG_ERR, "%s: Failed sendHashData with err %d", ztex->repr, cnt);
  545. return cnt;
  546. }
  547. int libztex_readHashData(struct libztex_device *ztex, struct libztex_hash_data nonces[]) {
  548. int bufsize = 12 + ztex->extraSolutions * 4;
  549. int cnt = 0, i, j, ret, len;
  550. unsigned char *rbuf;
  551. if (ztex->hndl == NULL)
  552. return 0;
  553. rbuf = malloc(sizeof(unsigned char) * (ztex->numNonces * bufsize));
  554. if (rbuf == NULL) {
  555. applog(LOG_ERR, "%s: Failed to allocate memory for reading nonces", ztex->repr);
  556. return 0;
  557. }
  558. ret = bufsize * ztex->numNonces; len = 0;
  559. while (ret > 0) {
  560. cnt = libusb_control_transfer(ztex->hndl, 0xc0, 0x81, 0, 0, rbuf + len, ret, 1000);
  561. if (cnt >= 0) {
  562. ret -= cnt;
  563. len += cnt;
  564. } else
  565. break;
  566. }
  567. if (unlikely(cnt < 0)) {
  568. applog(LOG_ERR, "%s: Failed readHashData with err %d", ztex->repr, cnt);
  569. free(rbuf);
  570. return cnt;
  571. }
  572. for (i=0; i<ztex->numNonces; i++) {
  573. memcpy((char*)&nonces[i].goldenNonce[0], &rbuf[i*bufsize], 4);
  574. nonces[i].goldenNonce[0] -= ztex->offsNonces;
  575. //applog(LOG_DEBUG, "W %d:0 %0.8x", i, nonces[i].goldenNonce[0]);
  576. memcpy((char*)&nonces[i].nonce, &rbuf[(i*bufsize)+4], 4);
  577. nonces[i].nonce -= ztex->offsNonces;
  578. memcpy((char*)&nonces[i].hash7, &rbuf[(i*bufsize)+8], 4);
  579. for (j=0; j<ztex->extraSolutions; j++) {
  580. memcpy((char*)&nonces[i].goldenNonce[j+1], &rbuf[(i*bufsize)+12+(j*4)], 4);
  581. nonces[i].goldenNonce[j+1] -= ztex->offsNonces;
  582. //applog(LOG_DEBUG, "W %d:%d %0.8x", i, j+1, nonces[i].goldenNonce[j+1]);
  583. }
  584. }
  585. free(rbuf);
  586. return cnt;
  587. }
  588. void libztex_freeDevList(struct libztex_dev_list **devs)
  589. {
  590. bool done = false;
  591. ssize_t cnt = 0;
  592. while (!done) {
  593. if (devs[cnt]->next == NULL)
  594. done = true;
  595. free(devs[cnt++]);
  596. }
  597. free(devs);
  598. }