spidevc.c 6.6 KB

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  1. /*
  2. * Copyright 2013 bitfury
  3. * Copyright 2013 Luke Dashjr
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a copy
  6. * of this software and associated documentation files (the "Software"), to deal
  7. * in the Software without restriction, including without limitation the rights
  8. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  9. * copies of the Software, and to permit persons to whom the Software is
  10. * furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice shall be included in
  13. * all copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  18. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  21. * THE SOFTWARE.
  22. */
  23. #include "spidevc.h"
  24. #include <sys/mman.h>
  25. #include <stdbool.h>
  26. #include <stdint.h>
  27. #include <unistd.h>
  28. #include <stdio.h>
  29. #include <stdlib.h>
  30. #include <string.h>
  31. #include <getopt.h>
  32. #include <fcntl.h>
  33. #include <sys/ioctl.h>
  34. #include <linux/types.h>
  35. #include <signal.h>
  36. #include <sys/types.h>
  37. #include <linux/spi/spidev.h>
  38. #include <time.h>
  39. #include <unistd.h>
  40. #include <linux/i2c.h>
  41. #include <linux/i2c-dev.h>
  42. #include <sys/stat.h>
  43. #include "logging.h"
  44. #define HAVE_LINUX_SPI
  45. #ifdef HAVE_LINUX_SPI
  46. bool sys_spi_txrx(struct spi_port *port);
  47. static volatile unsigned *gpio;
  48. #endif
  49. struct spi_port *sys_spi;
  50. void spi_init(void)
  51. {
  52. #ifdef HAVE_LINUX_SPI
  53. int fd;
  54. fd = open("/dev/mem",O_RDWR|O_SYNC);
  55. if (fd < 0)
  56. {
  57. perror("/dev/mem trouble");
  58. return;
  59. }
  60. gpio = mmap(0,4096,PROT_READ|PROT_WRITE,MAP_SHARED,fd,0x20200000);
  61. if (gpio == MAP_FAILED)
  62. {
  63. perror("gpio mmap trouble");
  64. return;
  65. }
  66. close(fd);
  67. sys_spi = malloc(sizeof(*sys_spi));
  68. *sys_spi = (struct spi_port){
  69. .txrx = sys_spi_txrx,
  70. };
  71. #endif
  72. }
  73. #ifdef HAVE_LINUX_SPI
  74. #define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3))
  75. #define OUT_GPIO(g) *(gpio+((g)/10)) |= (1<<(((g)%10)*3))
  76. #define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3))
  77. #define GPIO_SET *(gpio+7) // sets bits which are 1 ignores bits which are 0
  78. #define GPIO_CLR *(gpio+10) // clears bits which are 1 ignores bits which are 0
  79. // Bit-banging reset, to reset more chips in chain - toggle for longer period... Each 3 reset cycles reset first chip in chain
  80. static
  81. int spi_reset(int a)
  82. {
  83. int i,j;
  84. int len = 8;
  85. INP_GPIO(10); OUT_GPIO(10);
  86. INP_GPIO(11); OUT_GPIO(11);
  87. GPIO_SET = 1 << 11; // Set SCK
  88. for (i = 0; i < 32; i++) { // On standard settings this unoptimized code produces 1 Mhz freq.
  89. GPIO_SET = 1 << 10;
  90. for (j = 0; j < len; j++) {
  91. a *= a;
  92. }
  93. GPIO_CLR = 1 << 10;
  94. for (j = 0; j < len; j++) {
  95. a *= a;
  96. }
  97. }
  98. GPIO_CLR = 1 << 10;
  99. GPIO_CLR = 1 << 11;
  100. INP_GPIO(10);
  101. SET_GPIO_ALT(10,0);
  102. INP_GPIO(11);
  103. SET_GPIO_ALT(11,0);
  104. INP_GPIO(9);
  105. SET_GPIO_ALT(9,0);
  106. return a;
  107. }
  108. #define BAILOUT(s) do{ \
  109. perror(s); \
  110. close(fd); \
  111. return false; \
  112. }while(0)
  113. bool sys_spi_txrx(struct spi_port *port)
  114. {
  115. const void *wrbuf = spi_gettxbuf(port);
  116. void *rdbuf = spi_getrxbuf(port);
  117. size_t bufsz = spi_getbufsz(port);
  118. int fd;
  119. int mode, bits, speed, rv, i, j;
  120. struct spi_ioc_transfer tr[16];
  121. memset(&tr,0,sizeof(tr));
  122. mode = 0; bits = 8; speed = 4000000;
  123. spi_reset(1234);
  124. fd = open("/dev/spidev0.0", O_RDWR);
  125. if (fd < 0) {
  126. perror("Unable to open SPI device");
  127. return false;
  128. }
  129. if (ioctl(fd, SPI_IOC_WR_MODE, &mode) < 0)
  130. BAILOUT("Unable to set WR MODE");
  131. if (ioctl(fd, SPI_IOC_RD_MODE, &mode) < 0)
  132. BAILOUT("Unable to set RD MODE");
  133. if (ioctl(fd, SPI_IOC_WR_BITS_PER_WORD, &bits) < 0)
  134. BAILOUT("Unable to set WR_BITS_PER_WORD");
  135. if (ioctl(fd, SPI_IOC_RD_BITS_PER_WORD, &bits) < 0)
  136. BAILOUT("Unable to set RD_BITS_PER_WORD");
  137. if (ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed) < 0)
  138. BAILOUT("Unable to set WR_MAX_SPEED_HZ");
  139. if (ioctl(fd, SPI_IOC_RD_MAX_SPEED_HZ, &speed) < 0)
  140. BAILOUT("Unable to set RD_MAX_SPEED_HZ");
  141. rv = 0;
  142. while (bufsz >= 4096) {
  143. tr[rv].tx_buf = (uintptr_t) wrbuf;
  144. tr[rv].rx_buf = (uintptr_t) rdbuf;
  145. tr[rv].len = 4096;
  146. tr[rv].delay_usecs = 1;
  147. tr[rv].speed_hz = speed;
  148. tr[rv].bits_per_word = bits;
  149. bufsz -= 4096;
  150. wrbuf += 4096; rdbuf += 4096; rv ++;
  151. }
  152. if (bufsz > 0) {
  153. tr[rv].tx_buf = (uintptr_t) wrbuf;
  154. tr[rv].rx_buf = (uintptr_t) rdbuf;
  155. tr[rv].len = (unsigned)bufsz;
  156. tr[rv].delay_usecs = 1;
  157. tr[rv].speed_hz = speed;
  158. tr[rv].bits_per_word = bits;
  159. rv ++;
  160. }
  161. i = rv;
  162. for (j = 0; j < i; j++) {
  163. rv = (int)ioctl(fd, SPI_IOC_MESSAGE(1), (intptr_t)&tr[j]);
  164. if (rv < 0)
  165. BAILOUT("WTF!");
  166. }
  167. close(fd);
  168. spi_reset(4321);
  169. return true;
  170. }
  171. #endif
  172. static
  173. void spi_emit_buf_reverse(struct spi_port *port, const void *p, size_t sz)
  174. {
  175. const unsigned char *str = p;
  176. if (port->spibufsz + sz >= SPIMAXSZ)
  177. return;
  178. for (size_t i = 0; i < sz; ++i)
  179. {
  180. // Reverse bit order in each byte!
  181. unsigned char p = str[i];
  182. p = ((p & 0xaa)>>1) | ((p & 0x55) << 1);
  183. p = ((p & 0xcc)>>2) | ((p & 0x33) << 2);
  184. p = ((p & 0xf0)>>4) | ((p & 0x0f) << 4);
  185. port->spibuf[port->spibufsz++] = p;
  186. }
  187. }
  188. static
  189. void spi_emit_buf(struct spi_port *port, void *str, size_t sz)
  190. {
  191. if (port->spibufsz + sz >= SPIMAXSZ)
  192. return;
  193. memcpy(&port->spibuf[port->spibufsz], str, sz);
  194. port->spibufsz += sz;
  195. }
  196. /* TODO: in production, emit just bit-sequences! Eliminate padding to byte! */
  197. void spi_emit_break(struct spi_port *port)
  198. {
  199. spi_emit_buf(port, "\x4", 1);
  200. }
  201. void spi_emit_fsync(struct spi_port *port)
  202. {
  203. spi_emit_buf(port, "\x6", 1);
  204. }
  205. void spi_emit_fasync(struct spi_port *port, int n)
  206. {
  207. int i;
  208. for (i = 0; i < n; i++) {
  209. spi_emit_buf(port, "\x5", 1);
  210. }
  211. }
  212. void spi_emit_nop(struct spi_port *port, int n) {
  213. int i;
  214. for (i = 0; i < n; n++) {
  215. spi_emit_buf(port, "\x0", 1);
  216. }
  217. }
  218. void spi_emit_data(struct spi_port *port, uint16_t addr, const void *buf, size_t len)
  219. {
  220. unsigned char otmp[3];
  221. if (len < 4 || len > 128) return; /* This cannot be programmed in single frame! */
  222. len /= 4; /* Strip */
  223. otmp[0] = (len - 1) | 0xE0;
  224. otmp[1] = (addr >> 8)&0xFF; otmp[2] = addr & 0xFF;
  225. spi_emit_buf(port, otmp, 3);
  226. spi_emit_buf_reverse(port, buf, len*4);
  227. }