driver-icarus.c 45 KB

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  1. /*
  2. * Copyright 2012-2015 Luke Dashjr
  3. * Copyright 2012 Xiangfu
  4. * Copyright 2014 Nate Woolls
  5. * Copyright 2012 Andrew Smith
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the Free
  9. * Software Foundation; either version 3 of the License, or (at your option)
  10. * any later version. See COPYING for more details.
  11. */
  12. /*
  13. * Those code should be works fine with V2 and V3 bitstream of Icarus.
  14. * Operation:
  15. * No detection implement.
  16. * Input: 64B = 32B midstate + 20B fill bytes + last 12 bytes of block head.
  17. * Return: send back 32bits immediately when Icarus found a valid nonce.
  18. * no query protocol implemented here, if no data send back in ~11.3
  19. * seconds (full cover time on 32bit nonce range by 380MH/s speed)
  20. * just send another work.
  21. * Notice:
  22. * 1. Icarus will start calculate when you push a work to them, even they
  23. * are busy.
  24. * 2. The 2 FPGAs on Icarus will distribute the job, one will calculate the
  25. * 0 ~ 7FFFFFFF, another one will cover the 80000000 ~ FFFFFFFF.
  26. * 3. It's possible for 2 FPGAs both find valid nonce in the meantime, the 2
  27. * valid nonce will all be send back.
  28. * 4. Icarus will stop work when: a valid nonce has been found or 32 bits
  29. * nonce range is completely calculated.
  30. */
  31. #include "config.h"
  32. #include "miner.h"
  33. #include <limits.h>
  34. #include <pthread.h>
  35. #include <stdbool.h>
  36. #include <stdint.h>
  37. #include <stdio.h>
  38. #include <sys/time.h>
  39. #include <sys/types.h>
  40. #include <dirent.h>
  41. #include <unistd.h>
  42. #ifndef WIN32
  43. #include <termios.h>
  44. #include <sys/stat.h>
  45. #include <fcntl.h>
  46. #ifndef O_CLOEXEC
  47. #define O_CLOEXEC 0
  48. #endif
  49. #else
  50. #include <windows.h>
  51. #include <io.h>
  52. #endif
  53. #ifdef HAVE_SYS_EPOLL_H
  54. #include <sys/epoll.h>
  55. #define HAVE_EPOLL
  56. #endif
  57. #include "compat.h"
  58. #include "dynclock.h"
  59. #include "driver-icarus.h"
  60. #include "lowl-vcom.h"
  61. // The serial I/O speed - Linux uses a define 'B115200' in bits/termios.h
  62. #define ICARUS_IO_SPEED 115200
  63. // The number of bytes in a nonce (always 4)
  64. // This is NOT the read-size for the Icarus driver
  65. // That is defined in ICARUS_INFO->read_size
  66. #define ICARUS_NONCE_SIZE 4
  67. #define ASSERT1(condition) __maybe_unused static char sizeof_uint32_t_must_be_4[(condition)?1:-1]
  68. ASSERT1(sizeof(uint32_t) == 4);
  69. #define ICARUS_READ_TIME(baud, read_size) ((double)read_size * (double)8.0 / (double)(baud))
  70. // Defined in deciseconds
  71. // There's no need to have this bigger, since the overhead/latency of extra work
  72. // is pretty small once you get beyond a 10s nonce range time and 10s also
  73. // means that nothing slower than 429MH/s can go idle so most icarus devices
  74. // will always mine without idling
  75. #define ICARUS_READ_COUNT_LIMIT_MAX 100
  76. // In timing mode: Default starting value until an estimate can be obtained
  77. #define ICARUS_READ_COUNT_TIMING_MS 75
  78. // For a standard Icarus REV3
  79. #define ICARUS_REV3_HASH_TIME 0.00000000264083
  80. // Icarus Rev3 doesn't send a completion message when it finishes
  81. // the full nonce range, so to avoid being idle we must abort the
  82. // work (by starting a new work) shortly before it finishes
  83. //
  84. // Thus we need to estimate 2 things:
  85. // 1) How many hashes were done if the work was aborted
  86. // 2) How high can the timeout be before the Icarus is idle,
  87. // to minimise the number of work started
  88. // We set 2) to 'the calculated estimate' - 1
  89. // to ensure the estimate ends before idle
  90. //
  91. // The simple calculation used is:
  92. // Tn = Total time in seconds to calculate n hashes
  93. // Hs = seconds per hash
  94. // Xn = number of hashes
  95. // W = code overhead per work
  96. //
  97. // Rough but reasonable estimate:
  98. // Tn = Hs * Xn + W (of the form y = mx + b)
  99. //
  100. // Thus:
  101. // Line of best fit (using least squares)
  102. //
  103. // Hs = (n*Sum(XiTi)-Sum(Xi)*Sum(Ti))/(n*Sum(Xi^2)-Sum(Xi)^2)
  104. // W = Sum(Ti)/n - (Hs*Sum(Xi))/n
  105. //
  106. // N.B. W is less when aborting work since we aren't waiting for the reply
  107. // to be transferred back (ICARUS_READ_TIME)
  108. // Calculating the hashes aborted at n seconds is thus just n/Hs
  109. // (though this is still a slight overestimate due to code delays)
  110. //
  111. // Both below must be exceeded to complete a set of data
  112. // Minimum how long after the first, the last data point must be
  113. #define HISTORY_SEC 60
  114. // Minimum how many points a single ICARUS_HISTORY should have
  115. #define MIN_DATA_COUNT 5
  116. // The value above used is doubled each history until it exceeds:
  117. #define MAX_MIN_DATA_COUNT 100
  118. static struct timeval history_sec = { HISTORY_SEC, 0 };
  119. static const char *MODE_DEFAULT_STR = "default";
  120. static const char *MODE_SHORT_STR = "short";
  121. static const char *MODE_SHORT_STREQ = "short=";
  122. static const char *MODE_LONG_STR = "long";
  123. static const char *MODE_LONG_STREQ = "long=";
  124. static const char *MODE_VALUE_STR = "value";
  125. static const char *MODE_UNKNOWN_STR = "unknown";
  126. #define END_CONDITION 0x0000ffff
  127. #define DEFAULT_DETECT_THRESHOLD 1
  128. BFG_REGISTER_DRIVER(icarus_drv)
  129. extern const struct bfg_set_device_definition icarus_set_device_funcs[];
  130. extern const struct bfg_set_device_definition icarus_set_device_funcs_live[];
  131. extern void convert_icarus_to_cairnsmore(struct cgpu_info *);
  132. static inline
  133. uint32_t icarus_nonce32toh(const struct ICARUS_INFO * const info, const uint32_t nonce)
  134. {
  135. return info->nonce_littleendian ? le32toh(nonce) : be32toh(nonce);
  136. }
  137. #define icarus_open2(devpath, baud, purge) serial_open(devpath, baud, ICARUS_READ_FAULT_DECISECONDS, purge)
  138. #define icarus_open(devpath, baud) icarus_open2(devpath, baud, false)
  139. static
  140. void icarus_log_protocol(const char * const repr, const void *buf, size_t bufLen, const char *prefix)
  141. {
  142. char hex[(bufLen * 2) + 1];
  143. bin2hex(hex, buf, bufLen);
  144. applog(LOG_DEBUG, "%"PRIpreprv": DEVPROTO: %s %s", repr, prefix, hex);
  145. }
  146. int icarus_read(const char * const repr, uint8_t *buf, const int fd, struct timeval * const tvp_finish, struct thr_info * const thr, const struct timeval * const tvp_timeout, struct timeval * const tvp_now, int read_size)
  147. {
  148. int rv;
  149. long remaining_ms;
  150. ssize_t ret;
  151. struct timeval tv_start = *tvp_now;
  152. bool first = true;
  153. // If there is no thr, then there's no work restart to watch..
  154. #ifdef HAVE_EPOLL
  155. bool watching_work_restart = !thr;
  156. int epollfd;
  157. struct epoll_event evr[2];
  158. epollfd = epoll_create(2);
  159. if (epollfd != -1) {
  160. struct epoll_event ev = {
  161. .events = EPOLLIN,
  162. .data.fd = fd,
  163. };
  164. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, fd, &ev)) {
  165. applog(LOG_DEBUG, "%"PRIpreprv": Error adding %s fd to epoll", "device", repr);
  166. close(epollfd);
  167. epollfd = -1;
  168. }
  169. else
  170. if (thr && thr->work_restart_notifier[1] != -1)
  171. {
  172. ev.data.fd = thr->work_restart_notifier[0];
  173. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, thr->work_restart_notifier[0], &ev))
  174. applog(LOG_DEBUG, "%"PRIpreprv": Error adding %s fd to epoll", "work restart", repr);
  175. else
  176. watching_work_restart = true;
  177. }
  178. }
  179. else
  180. applog(LOG_DEBUG, "%"PRIpreprv": Error creating epoll", repr);
  181. if (epollfd == -1 && (remaining_ms = timer_remaining_us(tvp_timeout, tvp_now)) < 100000)
  182. applog(LOG_WARNING, "%"PRIpreprv": Failed to use epoll, and very short read timeout (%ldms)", repr, remaining_ms);
  183. #endif
  184. while (true) {
  185. remaining_ms = timer_remaining_us(tvp_timeout, tvp_now) / 1000;
  186. #ifdef HAVE_EPOLL
  187. if (epollfd != -1)
  188. {
  189. if ((!watching_work_restart) && remaining_ms > 100)
  190. remaining_ms = 100;
  191. ret = epoll_wait(epollfd, evr, 2, remaining_ms);
  192. timer_set_now(tvp_now);
  193. switch (ret)
  194. {
  195. case -1:
  196. if (unlikely(errno != EINTR))
  197. return_via(out, rv = ICA_GETS_ERROR);
  198. ret = 0;
  199. break;
  200. case 0: // timeout
  201. // handled after switch
  202. break;
  203. case 1:
  204. if (evr[0].data.fd != fd) // must be work restart notifier
  205. {
  206. notifier_read(thr->work_restart_notifier);
  207. ret = 0;
  208. break;
  209. }
  210. // fallthru to...
  211. case 2: // device has data
  212. ret = read(fd, buf, read_size);
  213. break;
  214. default:
  215. return_via(out, rv = ICA_GETS_ERROR);
  216. }
  217. }
  218. else
  219. #endif
  220. {
  221. if (remaining_ms > 100)
  222. remaining_ms = 100;
  223. vcom_set_timeout_ms(fd, remaining_ms);
  224. // Read first byte alone to get earliest tv_finish
  225. ret = read(fd, buf, first ? 1 : read_size);
  226. timer_set_now(tvp_now);
  227. }
  228. if (first)
  229. *tvp_finish = *tvp_now;
  230. if (ret)
  231. {
  232. if (unlikely(ret < 0))
  233. return_via(out, rv = ICA_GETS_ERROR);
  234. first = false;
  235. if (opt_dev_protocol && opt_debug)
  236. icarus_log_protocol(repr, buf, ret, "RECV");
  237. if (ret >= read_size)
  238. return_via(out, rv = ICA_GETS_OK);
  239. read_size -= ret;
  240. buf += ret;
  241. // Always continue reading while data is coming in, ignoring the timeout
  242. continue;
  243. }
  244. if (thr && thr->work_restart)
  245. return_via_applog(out, rv = ICA_GETS_RESTART, LOG_DEBUG, "%"PRIpreprv": Interrupted by work restart", repr);
  246. if (timer_passed(tvp_timeout, tvp_now))
  247. return_via_applog(out, rv = ICA_GETS_TIMEOUT, LOG_DEBUG, "%"PRIpreprv": No data in %.3f seconds", repr, timer_elapsed_us(&tv_start, tvp_now) / 1e6);
  248. }
  249. out:
  250. #ifdef HAVE_EPOLL
  251. if (epollfd != -1)
  252. close(epollfd);
  253. #endif
  254. return rv;
  255. }
  256. int icarus_write(const char * const repr, int fd, const void *buf, size_t bufLen)
  257. {
  258. size_t ret;
  259. if (opt_dev_protocol && opt_debug)
  260. icarus_log_protocol(repr, buf, bufLen, "SEND");
  261. if (unlikely(fd == -1))
  262. return 1;
  263. ret = write(fd, buf, bufLen);
  264. if (unlikely(ret != bufLen))
  265. return 1;
  266. return 0;
  267. }
  268. #define icarus_close(fd) serial_close(fd)
  269. void do_icarus_close(struct thr_info *thr)
  270. {
  271. struct cgpu_info *icarus = thr->cgpu;
  272. const int fd = icarus->device_fd;
  273. if (fd == -1)
  274. return;
  275. icarus_close(fd);
  276. icarus->device_fd = -1;
  277. }
  278. static const char *timing_mode_str(enum timing_mode timing_mode)
  279. {
  280. switch(timing_mode) {
  281. case MODE_DEFAULT:
  282. return MODE_DEFAULT_STR;
  283. case MODE_SHORT:
  284. return MODE_SHORT_STR;
  285. case MODE_LONG:
  286. return MODE_LONG_STR;
  287. case MODE_VALUE:
  288. return MODE_VALUE_STR;
  289. default:
  290. return MODE_UNKNOWN_STR;
  291. }
  292. }
  293. static
  294. const char *_icarus_set_timing(struct ICARUS_INFO * const info, const char * const repr, const struct device_drv * const drv, const char * const buf)
  295. {
  296. double Hs;
  297. char *eq;
  298. if (strcasecmp(buf, MODE_SHORT_STR) == 0) {
  299. // short
  300. info->read_timeout_ms = ICARUS_READ_COUNT_TIMING_MS;
  301. info->read_count_limit = 0; // 0 = no limit
  302. info->timing_mode = MODE_SHORT;
  303. info->do_icarus_timing = true;
  304. } else if (strncasecmp(buf, MODE_SHORT_STREQ, strlen(MODE_SHORT_STREQ)) == 0) {
  305. // short=limit
  306. info->read_timeout_ms = ICARUS_READ_COUNT_TIMING_MS;
  307. info->timing_mode = MODE_SHORT;
  308. info->do_icarus_timing = true;
  309. info->read_count_limit = atoi(&buf[strlen(MODE_SHORT_STREQ)]);
  310. if (info->read_count_limit < 0)
  311. info->read_count_limit = 0;
  312. if (info->read_count_limit > ICARUS_READ_COUNT_LIMIT_MAX)
  313. info->read_count_limit = ICARUS_READ_COUNT_LIMIT_MAX;
  314. } else if (strcasecmp(buf, MODE_LONG_STR) == 0) {
  315. // long
  316. info->read_timeout_ms = ICARUS_READ_COUNT_TIMING_MS;
  317. info->read_count_limit = 0; // 0 = no limit
  318. info->timing_mode = MODE_LONG;
  319. info->do_icarus_timing = true;
  320. } else if (strncasecmp(buf, MODE_LONG_STREQ, strlen(MODE_LONG_STREQ)) == 0) {
  321. // long=limit
  322. info->read_timeout_ms = ICARUS_READ_COUNT_TIMING_MS;
  323. info->timing_mode = MODE_LONG;
  324. info->do_icarus_timing = true;
  325. info->read_count_limit = atoi(&buf[strlen(MODE_LONG_STREQ)]);
  326. if (info->read_count_limit < 0)
  327. info->read_count_limit = 0;
  328. if (info->read_count_limit > ICARUS_READ_COUNT_LIMIT_MAX)
  329. info->read_count_limit = ICARUS_READ_COUNT_LIMIT_MAX;
  330. } else if ((Hs = atof(buf)) != 0) {
  331. // ns[=read_count]
  332. info->Hs = Hs / NANOSEC;
  333. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  334. info->read_timeout_ms = 0;
  335. if ((eq = strchr(buf, '=')) != NULL)
  336. info->read_timeout_ms = atof(&eq[1]) * 100;
  337. if (info->read_timeout_ms < 1)
  338. {
  339. info->read_timeout_ms = info->fullnonce * 1000;
  340. if (unlikely(info->read_timeout_ms < 2))
  341. info->read_timeout_ms = 1;
  342. else
  343. --info->read_timeout_ms;
  344. }
  345. info->read_count_limit = 0; // 0 = no limit
  346. info->timing_mode = MODE_VALUE;
  347. info->do_icarus_timing = false;
  348. } else {
  349. // Anything else in buf just uses DEFAULT mode
  350. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  351. info->read_timeout_ms = 0;
  352. if ((eq = strchr(buf, '=')) != NULL)
  353. info->read_timeout_ms = atof(&eq[1]) * 100;
  354. unsigned def_read_timeout_ms = ICARUS_READ_COUNT_TIMING_MS;
  355. if (info->timing_mode == MODE_DEFAULT) {
  356. if (drv == &icarus_drv) {
  357. info->do_default_detection = 0x10;
  358. } else {
  359. def_read_timeout_ms = info->fullnonce * 1000;
  360. if (def_read_timeout_ms > 0)
  361. --def_read_timeout_ms;
  362. }
  363. info->do_icarus_timing = false;
  364. }
  365. if (info->read_timeout_ms < 1)
  366. info->read_timeout_ms = def_read_timeout_ms;
  367. info->read_count_limit = 0; // 0 = no limit
  368. }
  369. info->min_data_count = MIN_DATA_COUNT;
  370. applog(LOG_DEBUG, "%"PRIpreprv": Init: mode=%s read_timeout_ms=%u limit=%dms Hs=%e",
  371. repr,
  372. timing_mode_str(info->timing_mode),
  373. info->read_timeout_ms, info->read_count_limit, info->Hs);
  374. return NULL;
  375. }
  376. const char *icarus_set_timing(struct cgpu_info * const proc, const char * const optname, const char * const buf, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  377. {
  378. struct ICARUS_INFO * const info = proc->device_data;
  379. return _icarus_set_timing(info, proc->proc_repr, proc->drv, buf);
  380. }
  381. static uint32_t mask(int work_division)
  382. {
  383. return 0xffffffff / work_division;
  384. }
  385. // Number of bytes remaining after reading a nonce from Icarus
  386. int icarus_excess_nonce_size(int fd, struct ICARUS_INFO *info)
  387. {
  388. // How big a buffer?
  389. int excess_size = info->read_size - ICARUS_NONCE_SIZE;
  390. // Try to read one more to ensure the device doesn't return
  391. // more than we want for this driver
  392. excess_size++;
  393. unsigned char excess_bin[excess_size];
  394. // Read excess_size from Icarus
  395. struct timeval tv_now;
  396. timer_set_now(&tv_now);
  397. int bytes_read = read(fd, excess_bin, excess_size);
  398. // Number of bytes that were still available
  399. return bytes_read;
  400. }
  401. int icarus_probe_work_division(const int fd, const char * const repr, struct ICARUS_INFO * const info)
  402. {
  403. struct timeval tv_now, tv_timeout;
  404. struct timeval tv_finish;
  405. // For reading the nonce from Icarus
  406. unsigned char res_bin[info->read_size];
  407. // For storing the the 32-bit nonce
  408. uint32_t res;
  409. int work_division = 0;
  410. applog(LOG_DEBUG, "%s: Work division not specified - autodetecting", repr);
  411. // Special packet to probe work_division
  412. unsigned char pkt[64] =
  413. "\x2e\x4c\x8f\x91\xfd\x59\x5d\x2d\x7e\xa2\x0a\xaa\xcb\x64\xa2\xa0"
  414. "\x43\x82\x86\x02\x77\xcf\x26\xb6\xa1\xee\x04\xc5\x6a\x5b\x50\x4a"
  415. "WDiv\0\0\0\0BFGMiner"
  416. "BFG\0\x64\x61\x01\x1a\xc9\x06\xa9\x51\xfb\x9b\x3c\x73";
  417. icarus_write(repr, fd, pkt, sizeof(pkt));
  418. memset(res_bin, 0, sizeof(res_bin));
  419. timer_set_now(&tv_now);
  420. timer_set_delay(&tv_timeout, &tv_now, info->read_timeout_ms * 1000);
  421. if (ICA_GETS_OK == icarus_read(repr, res_bin, fd, &tv_finish, NULL, &tv_timeout, &tv_now, info->read_size))
  422. {
  423. memcpy(&res, res_bin, sizeof(res));
  424. res = icarus_nonce32toh(info, res);
  425. }
  426. else
  427. res = 0;
  428. switch (res) {
  429. case 0x04C0FDB4:
  430. work_division = 1;
  431. break;
  432. case 0x82540E46:
  433. work_division = 2;
  434. break;
  435. case 0x417C0F36:
  436. work_division = 4;
  437. break;
  438. case 0x60C994D5:
  439. work_division = 8;
  440. break;
  441. default:
  442. applog(LOG_ERR, "%s: Work division autodetection failed (assuming 2): got %08x", repr, res);
  443. work_division = 2;
  444. }
  445. applog(LOG_DEBUG, "%s: Work division autodetection got %08x (=%d)", repr, res, work_division);
  446. return work_division;
  447. }
  448. struct cgpu_info *icarus_detect_custom(const char *devpath, struct device_drv *api, struct ICARUS_INFO *info)
  449. {
  450. struct timeval tv_start, tv_finish;
  451. int fd;
  452. unsigned char nonce_bin[ICARUS_NONCE_SIZE];
  453. char nonce_hex[(sizeof(nonce_bin) * 2) + 1];
  454. drv_set_defaults(api, icarus_set_device_funcs, info, devpath, detectone_meta_info.serial, 1);
  455. int baud = info->baud;
  456. int work_division = info->work_division;
  457. int fpga_count = info->fpga_count;
  458. applog(LOG_DEBUG, "%s: Attempting to open %s", api->dname, devpath);
  459. fd = icarus_open2(devpath, baud, true);
  460. if (unlikely(fd == -1)) {
  461. applog(LOG_DEBUG, "%s: Failed to open %s", api->dname, devpath);
  462. return NULL;
  463. }
  464. // Set a default so that individual drivers need not specify
  465. // e.g. Cairnsmore
  466. BFGINIT(info->probe_read_count, 1);
  467. if (info->read_size == 0)
  468. info->read_size = ICARUS_DEFAULT_READ_SIZE;
  469. if (!info->golden_ob)
  470. {
  471. // Block 171874 nonce = (0xa2870100) = 0x000187a2
  472. // NOTE: this MUST take less time to calculate
  473. // than the timeout set in icarus_open()
  474. // This one takes ~0.53ms on Rev3 Icarus
  475. info->golden_ob =
  476. "4679ba4ec99876bf4bfe086082b40025"
  477. "4df6c356451471139a3afa71e48f544a"
  478. "00000000000000000000000000000000"
  479. "0000000087320b1a1426674f2fa722ce";
  480. /* NOTE: This gets sent to basically every port specified in --scan-serial,
  481. * even ones that aren't Icarus; be sure they can all handle it, when
  482. * this is changed...
  483. * BitForce: Ignores entirely
  484. * ModMiner: Starts (useless) work, gets back to clean state
  485. */
  486. info->golden_nonce = "000187a2";
  487. }
  488. if (info->detect_init_func)
  489. info->detect_init_func(devpath, fd, info);
  490. int ob_size = strlen(info->golden_ob) / 2;
  491. unsigned char ob_bin[ob_size];
  492. BFGINIT(info->ob_size, ob_size);
  493. if (!info->ignore_golden_nonce)
  494. {
  495. hex2bin(ob_bin, info->golden_ob, sizeof(ob_bin));
  496. icarus_write(devpath, fd, ob_bin, sizeof(ob_bin));
  497. cgtime(&tv_start);
  498. memset(nonce_bin, 0, sizeof(nonce_bin));
  499. // Do not use info->read_size here, instead read exactly ICARUS_NONCE_SIZE
  500. // We will then compare the bytes left in fd with info->read_size to determine
  501. // if this is a valid device
  502. struct timeval tv_now, tv_timeout;
  503. timer_set_now(&tv_now);
  504. timer_set_delay(&tv_timeout, &tv_now, info->probe_read_count * 100000);
  505. icarus_read(devpath, nonce_bin, fd, &tv_finish, NULL, &tv_timeout, &tv_now, ICARUS_NONCE_SIZE);
  506. // How many bytes were left after reading the above nonce
  507. int bytes_left = icarus_excess_nonce_size(fd, info);
  508. icarus_close(fd);
  509. bin2hex(nonce_hex, nonce_bin, sizeof(nonce_bin));
  510. if (strncmp(nonce_hex, info->golden_nonce, 8))
  511. {
  512. applog(LOG_DEBUG,
  513. "%s: "
  514. "Test failed at %s: get %s, should: %s",
  515. api->dname,
  516. devpath, nonce_hex, info->golden_nonce);
  517. return NULL;
  518. }
  519. if (info->read_size - ICARUS_NONCE_SIZE != bytes_left)
  520. {
  521. applog(LOG_DEBUG,
  522. "%s: "
  523. "Test failed at %s: expected %d bytes, got %d",
  524. api->dname,
  525. devpath, info->read_size, ICARUS_NONCE_SIZE + bytes_left);
  526. return NULL;
  527. }
  528. }
  529. else
  530. icarus_close(fd);
  531. applog(LOG_DEBUG,
  532. "%s: "
  533. "Test succeeded at %s: got %s",
  534. api->dname,
  535. devpath, nonce_hex);
  536. if (serial_claim_v(devpath, api))
  537. return NULL;
  538. _icarus_set_timing(info, api->dname, api, "");
  539. if (!info->fpga_count)
  540. {
  541. if (!info->work_division)
  542. {
  543. fd = icarus_open2(devpath, baud, true);
  544. info->work_division = icarus_probe_work_division(fd, api->dname, info);
  545. icarus_close(fd);
  546. }
  547. info->fpga_count = info->work_division;
  548. }
  549. // Lock fpga_count from set_work_division
  550. info->user_set |= IUS_FPGA_COUNT;
  551. /* We have a real Icarus! */
  552. struct cgpu_info *icarus;
  553. icarus = calloc(1, sizeof(struct cgpu_info));
  554. icarus->drv = api;
  555. icarus->device_path = strdup(devpath);
  556. icarus->device_fd = -1;
  557. icarus->threads = 1;
  558. icarus->procs = info->fpga_count;
  559. icarus->device_data = info;
  560. icarus->set_device_funcs = icarus_set_device_funcs_live;
  561. add_cgpu(icarus);
  562. applog(LOG_INFO, "Found %"PRIpreprv" at %s",
  563. icarus->proc_repr,
  564. devpath);
  565. applog(LOG_DEBUG, "%"PRIpreprv": Init: baud=%d work_division=%d fpga_count=%d",
  566. icarus->proc_repr,
  567. baud, work_division, fpga_count);
  568. timersub(&tv_finish, &tv_start, &(info->golden_tv));
  569. return icarus;
  570. }
  571. static bool icarus_detect_one(const char *devpath)
  572. {
  573. struct ICARUS_INFO *info = calloc(1, sizeof(struct ICARUS_INFO));
  574. if (unlikely(!info))
  575. quit(1, "Failed to malloc ICARUS_INFO");
  576. // TODO: try some higher speeds with the Icarus and BFL to see
  577. // if they support them and if setting them makes any difference
  578. // N.B. B3000000 doesn't work on Icarus
  579. info->baud = ICARUS_IO_SPEED;
  580. info->reopen_mode = IRM_TIMEOUT;
  581. info->Hs = ICARUS_REV3_HASH_TIME;
  582. info->timing_mode = MODE_DEFAULT;
  583. info->read_size = ICARUS_DEFAULT_READ_SIZE;
  584. if (!icarus_detect_custom(devpath, &icarus_drv, info)) {
  585. free(info);
  586. return false;
  587. }
  588. return true;
  589. }
  590. static
  591. bool icarus_lowl_probe(const struct lowlevel_device_info * const info)
  592. {
  593. return vcom_lowl_probe_wrapper(info, icarus_detect_one);
  594. }
  595. static bool icarus_prepare(struct thr_info *thr)
  596. {
  597. struct cgpu_info *icarus = thr->cgpu;
  598. struct icarus_state *state;
  599. thr->cgpu_data = state = calloc(1, sizeof(*state));
  600. state->firstrun = true;
  601. #ifdef HAVE_EPOLL
  602. int epollfd = epoll_create(2);
  603. if (epollfd != -1)
  604. {
  605. close(epollfd);
  606. notifier_init(thr->work_restart_notifier);
  607. }
  608. #endif
  609. icarus->status = LIFE_INIT2;
  610. return true;
  611. }
  612. bool icarus_init(struct thr_info *thr)
  613. {
  614. struct cgpu_info *icarus = thr->cgpu;
  615. struct ICARUS_INFO *info = icarus->device_data;
  616. struct icarus_state * const state = thr->cgpu_data;
  617. int fd = icarus_open2(icarus->device_path, info->baud, true);
  618. icarus->device_fd = fd;
  619. if (unlikely(-1 == fd)) {
  620. applog(LOG_ERR, "%s: Failed to open %s",
  621. icarus->dev_repr,
  622. icarus->device_path);
  623. return false;
  624. }
  625. applog(LOG_INFO, "%s: Opened %s", icarus->dev_repr, icarus->device_path);
  626. BFGINIT(info->job_start_func, icarus_job_start);
  627. BFGINIT(state->ob_bin, calloc(1, info->ob_size));
  628. if (!info->work_division)
  629. info->work_division = icarus_probe_work_division(fd, icarus->proc_repr, info);
  630. if (!is_power_of_two(info->work_division))
  631. info->work_division = upper_power_of_two_u32(info->work_division);
  632. info->nonce_mask = mask(info->work_division);
  633. return true;
  634. }
  635. static
  636. struct thr_info *icarus_thread_for_nonce(const struct cgpu_info * const icarus, const uint32_t nonce)
  637. {
  638. struct ICARUS_INFO * const info = icarus->device_data;
  639. unsigned proc_id = 0;
  640. for (int i = info->work_division, j = 0; i /= 2; ++j)
  641. if (nonce & (1 << (31 - j)))
  642. proc_id |= (1 << j);
  643. const struct cgpu_info * const proc = device_proc_by_id(icarus, proc_id) ?: icarus;
  644. return proc->thr[0];
  645. }
  646. static bool icarus_reopen(struct cgpu_info *icarus, struct icarus_state *state, int *fdp)
  647. {
  648. struct ICARUS_INFO *info = icarus->device_data;
  649. // Reopen the serial port to workaround a USB-host-chipset-specific issue with the Icarus's buggy USB-UART
  650. do_icarus_close(icarus->thr[0]);
  651. *fdp = icarus->device_fd = icarus_open(icarus->device_path, info->baud);
  652. if (unlikely(-1 == *fdp)) {
  653. applog(LOG_ERR, "%"PRIpreprv": Failed to reopen on %s", icarus->proc_repr, icarus->device_path);
  654. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  655. state->firstrun = true;
  656. return false;
  657. }
  658. return true;
  659. }
  660. static
  661. bool icarus_job_prepare(struct thr_info *thr, struct work *work, __maybe_unused uint64_t max_nonce)
  662. {
  663. struct cgpu_info * const icarus = thr->cgpu;
  664. struct icarus_state * const state = thr->cgpu_data;
  665. uint8_t * const ob_bin = state->ob_bin;
  666. swab256(ob_bin, work->midstate);
  667. bswap_96p(&ob_bin[0x34], &work->data[0x40]);
  668. if (!(memcmp(&ob_bin[56], "\xff\xff\xff\xff", 4)
  669. || memcmp(&ob_bin, "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0", 32))) {
  670. // This sequence is used on cairnsmore bitstreams for commands, NEVER send it otherwise
  671. applog(LOG_WARNING, "%"PRIpreprv": Received job attempting to send a command, corrupting it!",
  672. icarus->proc_repr);
  673. ob_bin[56] = 0;
  674. }
  675. return true;
  676. }
  677. bool icarus_job_start(struct thr_info *thr)
  678. {
  679. struct cgpu_info *icarus = thr->cgpu;
  680. struct ICARUS_INFO *info = icarus->device_data;
  681. struct icarus_state *state = thr->cgpu_data;
  682. const uint8_t * const ob_bin = state->ob_bin;
  683. int fd = icarus->device_fd;
  684. int ret;
  685. // Handle dynamic clocking for "subclass" devices
  686. // This needs to run before sending next job, since it hashes the command too
  687. if (info->dclk.freqM && likely(!state->firstrun)) {
  688. dclk_preUpdate(&info->dclk);
  689. dclk_updateFreq(&info->dclk, info->dclk_change_clock_func, thr);
  690. }
  691. cgtime(&state->tv_workstart);
  692. ret = icarus_write(icarus->proc_repr, fd, ob_bin, info->ob_size);
  693. if (ret) {
  694. do_icarus_close(thr);
  695. applog(LOG_ERR, "%"PRIpreprv": Comms error (werr=%d)", icarus->proc_repr, ret);
  696. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  697. return false; /* This should never happen */
  698. }
  699. if (opt_debug) {
  700. char ob_hex[(info->ob_size * 2) + 1];
  701. bin2hex(ob_hex, ob_bin, info->ob_size);
  702. applog(LOG_DEBUG, "%"PRIpreprv" sent: %s",
  703. icarus->proc_repr,
  704. ob_hex);
  705. }
  706. return true;
  707. }
  708. static
  709. struct work *icarus_process_worknonce(const struct ICARUS_INFO * const info, struct icarus_state *state, uint32_t *nonce)
  710. {
  711. *nonce = icarus_nonce32toh(info, *nonce);
  712. if (test_nonce(state->last_work, *nonce, false))
  713. return state->last_work;
  714. if (likely(state->last2_work && test_nonce(state->last2_work, *nonce, false)))
  715. return state->last2_work;
  716. return NULL;
  717. }
  718. static
  719. void handle_identify(struct thr_info * const thr, int ret, const bool was_first_run)
  720. {
  721. const struct cgpu_info * const icarus = thr->cgpu;
  722. const struct ICARUS_INFO * const info = icarus->device_data;
  723. struct icarus_state * const state = thr->cgpu_data;
  724. int fd = icarus->device_fd;
  725. struct timeval tv_now;
  726. struct timeval tv_timeout, tv_finish;
  727. double delapsed;
  728. // For reading the nonce from Icarus
  729. unsigned char nonce_bin[info->read_size];
  730. // For storing the the 32-bit nonce
  731. uint32_t nonce;
  732. if (fd == -1)
  733. return;
  734. // If identify is requested (block erupters):
  735. // 1. Don't start the next job right away (above)
  736. // 2. Wait for the current job to complete 100%
  737. if (!was_first_run)
  738. {
  739. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Waiting for current job to finish", icarus->proc_repr);
  740. while (true)
  741. {
  742. cgtime(&tv_now);
  743. delapsed = tdiff(&tv_now, &state->tv_workstart);
  744. if (delapsed + 0.1 > info->fullnonce)
  745. break;
  746. // Try to get more nonces (ignoring work restart)
  747. memset(nonce_bin, 0, sizeof(nonce_bin));
  748. timer_set_delay(&tv_timeout, &tv_now, (uint64_t)(info->fullnonce - delapsed) * 1000000);
  749. ret = icarus_read(icarus->proc_repr, nonce_bin, fd, &tv_finish, NULL, &tv_timeout, &tv_now, info->read_size);
  750. if (ret == ICA_GETS_OK)
  751. {
  752. memcpy(&nonce, nonce_bin, sizeof(nonce));
  753. nonce = icarus_nonce32toh(info, nonce);
  754. submit_nonce(icarus_thread_for_nonce(icarus, nonce), state->last_work, nonce);
  755. }
  756. }
  757. }
  758. else
  759. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Current job should already be finished", icarus->proc_repr);
  760. // 3. Delay 3 more seconds
  761. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Leaving idle for 3 seconds", icarus->proc_repr);
  762. cgsleep_ms(3000);
  763. // Check for work restart in the meantime
  764. if (thr->work_restart)
  765. {
  766. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Work restart requested during delay", icarus->proc_repr);
  767. goto no_job_start;
  768. }
  769. // 4. Start next job
  770. if (!state->firstrun)
  771. {
  772. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Starting next job", icarus->proc_repr);
  773. if (!info->job_start_func(thr))
  774. no_job_start:
  775. state->firstrun = true;
  776. }
  777. state->identify = false;
  778. }
  779. static
  780. void icarus_transition_work(struct icarus_state *state, struct work *work)
  781. {
  782. if (state->last2_work)
  783. free_work(state->last2_work);
  784. state->last2_work = state->last_work;
  785. state->last_work = copy_work(work);
  786. }
  787. static int64_t icarus_scanhash(struct thr_info *thr, struct work *work,
  788. __maybe_unused int64_t max_nonce)
  789. {
  790. struct cgpu_info *icarus;
  791. int fd;
  792. int ret;
  793. struct ICARUS_INFO *info;
  794. struct work *nonce_work;
  795. int64_t hash_count;
  796. struct timeval tv_start = {.tv_sec=0}, elapsed;
  797. struct timeval tv_history_start, tv_history_finish;
  798. struct timeval tv_now, tv_timeout;
  799. double Ti, Xi;
  800. int i;
  801. bool was_hw_error = false;
  802. bool was_first_run;
  803. struct ICARUS_HISTORY *history0, *history;
  804. int count;
  805. double Hs, W, fullnonce;
  806. int read_timeout_ms;
  807. bool limited;
  808. uint32_t values;
  809. int64_t hash_count_range;
  810. elapsed.tv_sec = elapsed.tv_usec = 0;
  811. icarus = thr->cgpu;
  812. struct icarus_state *state = thr->cgpu_data;
  813. was_first_run = state->firstrun;
  814. icarus->drv->job_prepare(thr, work, max_nonce);
  815. // Wait for the previous run's result
  816. fd = icarus->device_fd;
  817. info = icarus->device_data;
  818. // For reading the nonce from Icarus
  819. unsigned char nonce_bin[info->read_size];
  820. // For storing the the 32-bit nonce
  821. uint32_t nonce;
  822. if (unlikely(fd == -1) && !icarus_reopen(icarus, state, &fd))
  823. return -1;
  824. if (!state->firstrun) {
  825. if (state->changework)
  826. {
  827. state->changework = false;
  828. ret = ICA_GETS_RESTART;
  829. }
  830. else
  831. {
  832. read_timeout_ms = info->read_timeout_ms;
  833. keepwaiting:
  834. /* Icarus will return info->read_size bytes nonces or nothing */
  835. memset(nonce_bin, 0, sizeof(nonce_bin));
  836. timer_set_now(&tv_now);
  837. timer_set_delay(&tv_timeout, &tv_now, read_timeout_ms * 1000);
  838. ret = icarus_read(icarus->proc_repr, nonce_bin, fd, &state->tv_workfinish, thr, &tv_timeout, &tv_now, info->read_size);
  839. switch (ret) {
  840. case ICA_GETS_RESTART:
  841. // The prepared work is invalid, and the current work is abandoned
  842. // Go back to the main loop to get the next work, and stuff
  843. // Returning to the main loop will clear work_restart, so use a flag...
  844. state->changework = true;
  845. return 0;
  846. case ICA_GETS_ERROR:
  847. do_icarus_close(thr);
  848. applog(LOG_ERR, "%"PRIpreprv": Comms error (rerr)", icarus->proc_repr);
  849. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  850. if (!icarus_reopen(icarus, state, &fd))
  851. return -1;
  852. break;
  853. case ICA_GETS_TIMEOUT:
  854. if (info->reopen_mode == IRM_TIMEOUT && !icarus_reopen(icarus, state, &fd))
  855. return -1;
  856. case ICA_GETS_OK:
  857. break;
  858. }
  859. }
  860. tv_start = state->tv_workstart;
  861. timersub(&state->tv_workfinish, &tv_start, &elapsed);
  862. }
  863. else
  864. {
  865. if (fd == -1 && !icarus_reopen(icarus, state, &fd))
  866. return -1;
  867. // First run; no nonce, no hashes done
  868. ret = ICA_GETS_ERROR;
  869. }
  870. #ifndef WIN32
  871. tcflush(fd, TCOFLUSH);
  872. #endif
  873. if (ret == ICA_GETS_OK)
  874. {
  875. memcpy(&nonce, nonce_bin, sizeof(nonce));
  876. nonce_work = icarus_process_worknonce(info, state, &nonce);
  877. if (likely(nonce_work))
  878. {
  879. if (nonce_work == state->last2_work)
  880. {
  881. // nonce was for the last job; submit and keep processing the current one
  882. submit_nonce(icarus_thread_for_nonce(icarus, nonce), nonce_work, nonce);
  883. goto keepwaiting;
  884. }
  885. if (info->continue_search)
  886. {
  887. read_timeout_ms = info->read_timeout_ms - ((timer_elapsed_us(&state->tv_workstart, NULL) / 1000) + 1);
  888. if (read_timeout_ms)
  889. {
  890. submit_nonce(icarus_thread_for_nonce(icarus, nonce), nonce_work, nonce);
  891. goto keepwaiting;
  892. }
  893. }
  894. }
  895. else
  896. was_hw_error = true;
  897. }
  898. // Handle dynamic clocking for "subclass" devices
  899. // This needs to run before sending next job, since it hashes the command too
  900. if (info->dclk.freqM && likely(ret == ICA_GETS_OK || ret == ICA_GETS_TIMEOUT)) {
  901. int qsec = ((4 * elapsed.tv_sec) + (elapsed.tv_usec / 250000)) ?: 1;
  902. for (int n = qsec; n; --n)
  903. dclk_gotNonces(&info->dclk);
  904. if (was_hw_error)
  905. dclk_errorCount(&info->dclk, qsec);
  906. }
  907. // Force a USB close/reopen on any hw error (or on request, eg for baud change)
  908. if (was_hw_error || info->reopen_now)
  909. {
  910. info->reopen_now = false;
  911. if (info->reopen_mode == IRM_CYCLE)
  912. {} // Do nothing here, we reopen after sending the job
  913. else
  914. if (!icarus_reopen(icarus, state, &fd))
  915. state->firstrun = true;
  916. }
  917. if (unlikely(state->identify))
  918. {
  919. // Delay job start until later...
  920. }
  921. else
  922. if (unlikely(icarus->deven != DEV_ENABLED || !info->job_start_func(thr)))
  923. state->firstrun = true;
  924. if (info->reopen_mode == IRM_CYCLE && !icarus_reopen(icarus, state, &fd))
  925. state->firstrun = true;
  926. work->blk.nonce = 0xffffffff;
  927. if (ret == ICA_GETS_ERROR) {
  928. state->firstrun = false;
  929. icarus_transition_work(state, work);
  930. hash_count = 0;
  931. goto out;
  932. }
  933. // OK, done starting Icarus's next job... now process the last run's result!
  934. if (ret == ICA_GETS_OK && !was_hw_error)
  935. {
  936. submit_nonce(icarus_thread_for_nonce(icarus, nonce), nonce_work, nonce);
  937. icarus_transition_work(state, work);
  938. hash_count = (nonce & info->nonce_mask);
  939. hash_count++;
  940. hash_count *= info->fpga_count;
  941. applog(LOG_DEBUG, "%"PRIpreprv" nonce = 0x%08x = 0x%08" PRIx64 " hashes (%"PRId64".%06lus)",
  942. icarus->proc_repr,
  943. nonce,
  944. (uint64_t)hash_count,
  945. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  946. }
  947. else
  948. {
  949. double estimate_hashes = elapsed.tv_sec;
  950. estimate_hashes += ((double)elapsed.tv_usec) / 1000000.;
  951. if (ret == ICA_GETS_OK)
  952. {
  953. // We can't be sure which processor got the error, but at least this is a decent guess
  954. inc_hw_errors(icarus_thread_for_nonce(icarus, nonce), state->last_work, nonce);
  955. estimate_hashes -= ICARUS_READ_TIME(info->baud, info->read_size);
  956. }
  957. icarus_transition_work(state, work);
  958. estimate_hashes /= info->Hs;
  959. // If some Serial-USB delay allowed the full nonce range to
  960. // complete it can't have done more than a full nonce
  961. if (unlikely(estimate_hashes > 0xffffffff))
  962. estimate_hashes = 0xffffffff;
  963. if (unlikely(estimate_hashes < 0))
  964. estimate_hashes = 0;
  965. applog(LOG_DEBUG, "%"PRIpreprv" %s nonce = 0x%08"PRIx64" hashes (%"PRId64".%06lus)",
  966. icarus->proc_repr,
  967. (ret == ICA_GETS_OK) ? "bad" : "no",
  968. (uint64_t)estimate_hashes,
  969. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  970. hash_count = estimate_hashes;
  971. if (ret != ICA_GETS_OK)
  972. goto out;
  973. }
  974. // Only ICA_GETS_OK gets here
  975. if (info->do_default_detection && elapsed.tv_sec >= DEFAULT_DETECT_THRESHOLD) {
  976. int MHs = (double)hash_count / ((double)elapsed.tv_sec * 1e6 + (double)elapsed.tv_usec);
  977. --info->do_default_detection;
  978. applog(LOG_DEBUG, "%"PRIpreprv": Autodetect device speed: %d MH/s", icarus->proc_repr, MHs);
  979. if (MHs <= 370 || MHs > 420) {
  980. // Not a real Icarus: enable short timing
  981. applog(LOG_WARNING, "%"PRIpreprv": Seems too %s to be an Icarus; calibrating with short timing", icarus->proc_repr, MHs>380?"fast":"slow");
  982. info->timing_mode = MODE_SHORT;
  983. info->do_icarus_timing = true;
  984. info->do_default_detection = 0;
  985. }
  986. else
  987. if (MHs <= 380) {
  988. // Real Icarus?
  989. if (!info->do_default_detection) {
  990. applog(LOG_DEBUG, "%"PRIpreprv": Seems to be a real Icarus", icarus->proc_repr);
  991. info->read_timeout_ms = info->fullnonce * 1000;
  992. if (info->read_timeout_ms > 0)
  993. --info->read_timeout_ms;
  994. }
  995. }
  996. else
  997. if (MHs <= 420) {
  998. // Enterpoint Cairnsmore1
  999. size_t old_repr_len = strlen(icarus->proc_repr);
  1000. char old_repr[old_repr_len + 1];
  1001. strcpy(old_repr, icarus->proc_repr);
  1002. convert_icarus_to_cairnsmore(icarus);
  1003. info->do_default_detection = 0;
  1004. applog(LOG_WARNING, "%"PRIpreprv": Detected Cairnsmore1 device, upgrading driver to %"PRIpreprv, old_repr, icarus->proc_repr);
  1005. }
  1006. }
  1007. // Ignore possible end condition values ... and hw errors
  1008. // TODO: set limitations on calculated values depending on the device
  1009. // to avoid crap values caused by CPU/Task Switching/Swapping/etc
  1010. if (info->do_icarus_timing
  1011. && !was_hw_error
  1012. && ((nonce & info->nonce_mask) > END_CONDITION)
  1013. && ((nonce & info->nonce_mask) < (info->nonce_mask & ~END_CONDITION))) {
  1014. cgtime(&tv_history_start);
  1015. history0 = &(info->history[0]);
  1016. if (history0->values == 0)
  1017. timeradd(&tv_start, &history_sec, &(history0->finish));
  1018. Ti = (double)(elapsed.tv_sec)
  1019. + ((double)(elapsed.tv_usec))/((double)1000000)
  1020. - ((double)ICARUS_READ_TIME(info->baud, info->read_size));
  1021. Xi = (double)hash_count;
  1022. history0->sumXiTi += Xi * Ti;
  1023. history0->sumXi += Xi;
  1024. history0->sumTi += Ti;
  1025. history0->sumXi2 += Xi * Xi;
  1026. history0->values++;
  1027. if (history0->hash_count_max < hash_count)
  1028. history0->hash_count_max = hash_count;
  1029. if (history0->hash_count_min > hash_count || history0->hash_count_min == 0)
  1030. history0->hash_count_min = hash_count;
  1031. if (history0->values >= info->min_data_count
  1032. && timercmp(&tv_start, &(history0->finish), >)) {
  1033. for (i = INFO_HISTORY; i > 0; i--)
  1034. memcpy(&(info->history[i]),
  1035. &(info->history[i-1]),
  1036. sizeof(struct ICARUS_HISTORY));
  1037. // Initialise history0 to zero for summary calculation
  1038. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  1039. // We just completed a history data set
  1040. // So now recalc read_count based on the whole history thus we will
  1041. // initially get more accurate until it completes INFO_HISTORY
  1042. // total data sets
  1043. count = 0;
  1044. for (i = 1 ; i <= INFO_HISTORY; i++) {
  1045. history = &(info->history[i]);
  1046. if (history->values >= MIN_DATA_COUNT) {
  1047. count++;
  1048. history0->sumXiTi += history->sumXiTi;
  1049. history0->sumXi += history->sumXi;
  1050. history0->sumTi += history->sumTi;
  1051. history0->sumXi2 += history->sumXi2;
  1052. history0->values += history->values;
  1053. if (history0->hash_count_max < history->hash_count_max)
  1054. history0->hash_count_max = history->hash_count_max;
  1055. if (history0->hash_count_min > history->hash_count_min || history0->hash_count_min == 0)
  1056. history0->hash_count_min = history->hash_count_min;
  1057. }
  1058. }
  1059. // All history data
  1060. Hs = (history0->values*history0->sumXiTi - history0->sumXi*history0->sumTi)
  1061. / (history0->values*history0->sumXi2 - history0->sumXi*history0->sumXi);
  1062. W = history0->sumTi/history0->values - Hs*history0->sumXi/history0->values;
  1063. hash_count_range = history0->hash_count_max - history0->hash_count_min;
  1064. values = history0->values;
  1065. // Initialise history0 to zero for next data set
  1066. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  1067. fullnonce = W + Hs * (((double)0xffffffff) + 1);
  1068. read_timeout_ms = fullnonce * 1000;
  1069. if (read_timeout_ms > 0)
  1070. --read_timeout_ms;
  1071. if (info->read_count_limit > 0 && read_timeout_ms > info->read_count_limit * 100) {
  1072. read_timeout_ms = info->read_count_limit * 100;
  1073. limited = true;
  1074. } else
  1075. limited = false;
  1076. info->Hs = Hs;
  1077. info->read_timeout_ms = read_timeout_ms;
  1078. info->fullnonce = fullnonce;
  1079. info->count = count;
  1080. info->W = W;
  1081. info->values = values;
  1082. info->hash_count_range = hash_count_range;
  1083. if (info->min_data_count < MAX_MIN_DATA_COUNT)
  1084. info->min_data_count *= 2;
  1085. else if (info->timing_mode == MODE_SHORT)
  1086. info->do_icarus_timing = false;
  1087. // applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: read_count=%d%s fullnonce=%fs history count=%d Hs=%e W=%e values=%d hash range=0x%08lx min data count=%u", icarus->proc_repr, read_count, limited ? " (limited)" : "", fullnonce, count, Hs, W, values, hash_count_range, info->min_data_count);
  1088. applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: Hs=%e W=%e read_timeout_ms=%u%s fullnonce=%.3fs",
  1089. icarus->proc_repr,
  1090. Hs, W, read_timeout_ms,
  1091. limited ? " (limited)" : "", fullnonce);
  1092. }
  1093. info->history_count++;
  1094. cgtime(&tv_history_finish);
  1095. timersub(&tv_history_finish, &tv_history_start, &tv_history_finish);
  1096. timeradd(&tv_history_finish, &(info->history_time), &(info->history_time));
  1097. }
  1098. out:
  1099. if (unlikely(state->identify))
  1100. handle_identify(thr, ret, was_first_run);
  1101. int hash_count_per_proc = hash_count / icarus->procs;
  1102. if (hash_count_per_proc > 0)
  1103. {
  1104. for_each_managed_proc(proc, icarus)
  1105. {
  1106. struct thr_info * const proc_thr = proc->thr[0];
  1107. hashes_done2(proc_thr, hash_count_per_proc, NULL);
  1108. hash_count -= hash_count_per_proc;
  1109. }
  1110. }
  1111. return hash_count;
  1112. }
  1113. static struct api_data *icarus_drv_stats(struct cgpu_info *cgpu)
  1114. {
  1115. struct api_data *root = NULL;
  1116. //use cgpu->device to handle multiple processors
  1117. struct ICARUS_INFO * const info = cgpu->device->device_data;
  1118. // Warning, access to these is not locked - but we don't really
  1119. // care since hashing performance is way more important than
  1120. // locking access to displaying API debug 'stats'
  1121. // If locking becomes an issue for any of them, use copy_data=true also
  1122. const unsigned read_count_ds = info->read_timeout_ms / 100;
  1123. root = api_add_uint(root, "read_count", &read_count_ds, true);
  1124. root = api_add_uint(root, "read_timeout_ms", &(info->read_timeout_ms), false);
  1125. root = api_add_int(root, "read_count_limit", &(info->read_count_limit), false);
  1126. root = api_add_double(root, "fullnonce", &(info->fullnonce), false);
  1127. root = api_add_int(root, "count", &(info->count), false);
  1128. root = api_add_hs(root, "Hs", &(info->Hs), false);
  1129. root = api_add_double(root, "W", &(info->W), false);
  1130. root = api_add_uint(root, "total_values", &(info->values), false);
  1131. root = api_add_uint64(root, "range", &(info->hash_count_range), false);
  1132. root = api_add_uint64(root, "history_count", &(info->history_count), false);
  1133. root = api_add_timeval(root, "history_time", &(info->history_time), false);
  1134. root = api_add_uint(root, "min_data_count", &(info->min_data_count), false);
  1135. root = api_add_uint(root, "timing_values", &(info->history[0].values), false);
  1136. root = api_add_const(root, "timing_mode", timing_mode_str(info->timing_mode), false);
  1137. root = api_add_bool(root, "is_timing", &(info->do_icarus_timing), false);
  1138. root = api_add_int(root, "baud", &(info->baud), false);
  1139. root = api_add_int(root, "work_division", &(info->work_division), false);
  1140. root = api_add_int(root, "fpga_count", &(info->fpga_count), false);
  1141. return root;
  1142. }
  1143. const char *icarus_set_baud(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1144. {
  1145. struct ICARUS_INFO * const info = proc->device_data;
  1146. const int baud = atoi(newvalue);
  1147. if (!valid_baud(baud))
  1148. return "Invalid baud setting";
  1149. if (info->baud != baud)
  1150. {
  1151. info->baud = baud;
  1152. info->reopen_now = true;
  1153. }
  1154. return NULL;
  1155. }
  1156. static
  1157. const char *icarus_set_probe_timeout(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1158. {
  1159. struct ICARUS_INFO * const info = proc->device_data;
  1160. info->probe_read_count = atof(newvalue) * 10.0 / ICARUS_READ_FAULT_DECISECONDS;
  1161. return NULL;
  1162. }
  1163. const char *icarus_set_work_division(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1164. {
  1165. struct ICARUS_INFO * const info = proc->device_data;
  1166. const int work_division = atoi(newvalue);
  1167. if (!is_power_of_two(work_division))
  1168. return "Invalid work_division: must be a power of two";
  1169. if (info->user_set & IUS_FPGA_COUNT)
  1170. {
  1171. if (info->fpga_count > work_division)
  1172. return "work_division must be >= fpga_count";
  1173. }
  1174. else
  1175. info->fpga_count = work_division;
  1176. info->user_set |= IUS_WORK_DIVISION;
  1177. info->work_division = work_division;
  1178. info->nonce_mask = mask(work_division);
  1179. return NULL;
  1180. }
  1181. static
  1182. const char *icarus_set_fpga_count(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1183. {
  1184. struct ICARUS_INFO * const info = proc->device_data;
  1185. const int fpga_count = atoi(newvalue);
  1186. if (fpga_count < 1 || (fpga_count > info->work_division && info->work_division))
  1187. return "Invalid fpga_count: must be >0 and <=work_division";
  1188. info->fpga_count = fpga_count;
  1189. return NULL;
  1190. }
  1191. const char *icarus_set_reopen(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1192. {
  1193. struct ICARUS_INFO * const info = proc->device_data;
  1194. if ((!strcasecmp(newvalue, "never")) || !strcasecmp(newvalue, "-r"))
  1195. info->reopen_mode = IRM_NEVER;
  1196. else
  1197. if (!strcasecmp(newvalue, "timeout"))
  1198. info->reopen_mode = IRM_TIMEOUT;
  1199. else
  1200. if ((!strcasecmp(newvalue, "cycle")) || !strcasecmp(newvalue, "r"))
  1201. info->reopen_mode = IRM_CYCLE;
  1202. else
  1203. if (!strcasecmp(newvalue, "now"))
  1204. info->reopen_now = true;
  1205. else
  1206. return "Invalid reopen mode";
  1207. return NULL;
  1208. }
  1209. static void icarus_shutdown(struct thr_info *thr)
  1210. {
  1211. do_icarus_close(thr);
  1212. free(thr->cgpu_data);
  1213. }
  1214. const struct bfg_set_device_definition icarus_set_device_funcs[] = {
  1215. // NOTE: Order of parameters below is important for --icarus-options
  1216. {"baud" , icarus_set_baud , "serial baud rate"},
  1217. {"work_division", icarus_set_work_division, "number of pieces work is split into"},
  1218. {"fpga_count" , icarus_set_fpga_count , "number of chips working on pieces"},
  1219. {"reopen" , icarus_set_reopen , "how often to reopen device: never, timeout, cycle, (or now for a one-shot reopen)"},
  1220. // NOTE: Below here, order is irrelevant
  1221. {"probe_timeout", icarus_set_probe_timeout},
  1222. {"timing" , icarus_set_timing , "timing of device; see README.FPGA"},
  1223. {NULL},
  1224. };
  1225. const struct bfg_set_device_definition icarus_set_device_funcs_live[] = {
  1226. {"baud" , icarus_set_baud , "serial baud rate"},
  1227. {"work_division", icarus_set_work_division, "number of pieces work is split into"},
  1228. {"reopen" , icarus_set_reopen , "how often to reopen device: never, timeout, cycle, (or now for a one-shot reopen)"},
  1229. {"timing" , icarus_set_timing , "timing of device; see README.FPGA"},
  1230. {NULL},
  1231. };
  1232. struct device_drv icarus_drv = {
  1233. .dname = "icarus",
  1234. .name = "ICA",
  1235. .probe_priority = -115,
  1236. .lowl_probe = icarus_lowl_probe,
  1237. .get_api_stats = icarus_drv_stats,
  1238. .thread_prepare = icarus_prepare,
  1239. .thread_init = icarus_init,
  1240. .scanhash = icarus_scanhash,
  1241. .job_prepare = icarus_job_prepare,
  1242. .thread_disable = close_device_fd,
  1243. .thread_shutdown = icarus_shutdown,
  1244. };