driver-bitmain.c 77 KB

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  1. /*
  2. * Copyright 2012-2013 Lingchao Xu <lingchao.xu@bitmaintech.com>
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 3 of the License, or (at your option)
  7. * any later version. See COPYING for more details.
  8. */
  9. #include "config.h"
  10. #include <limits.h>
  11. #include <pthread.h>
  12. #include <stdio.h>
  13. #include <sys/time.h>
  14. #include <sys/types.h>
  15. #include <dirent.h>
  16. #include <unistd.h>
  17. #ifndef WIN32
  18. #include <sys/select.h>
  19. #include <termios.h>
  20. #include <sys/stat.h>
  21. #include <fcntl.h>
  22. #ifndef O_CLOEXEC
  23. #define O_CLOEXEC 0
  24. #endif
  25. #else
  26. #include "compat.h"
  27. #include <windows.h>
  28. #include <io.h>
  29. #endif
  30. #include <uthash.h>
  31. #include "deviceapi.h"
  32. #include "miner.h"
  33. #include "driver-bitmain.h"
  34. #include "util.h"
  35. BFG_REGISTER_DRIVER(bitmain_drv)
  36. static inline unsigned int bfg_work_block(struct work * const work)
  37. {
  38. return *((unsigned int*)(&work->data[4]));
  39. }
  40. #define htole8(x) (x)
  41. struct cgpu_info *btm_alloc_cgpu(struct device_drv *drv, int threads)
  42. {
  43. struct cgpu_info *cgpu = calloc(1, sizeof(*cgpu));
  44. if (unlikely(!cgpu))
  45. quit(1, "Failed to calloc cgpu for %s in usb_alloc_cgpu", drv->dname);
  46. cgpu->drv = drv;
  47. cgpu->deven = DEV_ENABLED;
  48. cgpu->threads = threads;
  49. cgpu->device_fd = -1;
  50. return cgpu;
  51. }
  52. struct cgpu_info *btm_free_cgpu(struct cgpu_info *cgpu)
  53. {
  54. if(cgpu->device_path) {
  55. free((char*)cgpu->device_path);
  56. }
  57. free(cgpu);
  58. return NULL;
  59. }
  60. bool btm_init(struct cgpu_info *cgpu, const char * devpath)
  61. {
  62. #ifdef WIN32
  63. int fd = -1;
  64. signed short timeout = 1;
  65. unsigned long baud = 115200;
  66. bool purge = true;
  67. HANDLE hSerial = NULL;
  68. applog(LOG_DEBUG, "btm_init cgpu->device_fd=%d", cgpu->device_fd);
  69. if(cgpu->device_fd >= 0) {
  70. return false;
  71. }
  72. hSerial = CreateFile(devpath, GENERIC_READ | GENERIC_WRITE, 0, NULL, OPEN_EXISTING, 0, NULL);
  73. if (unlikely(hSerial == INVALID_HANDLE_VALUE))
  74. {
  75. DWORD e = GetLastError();
  76. switch (e) {
  77. case ERROR_ACCESS_DENIED:
  78. applog(LOG_DEBUG, "Do not have user privileges required to open %s", devpath);
  79. break;
  80. case ERROR_SHARING_VIOLATION:
  81. applog(LOG_DEBUG, "%s is already in use by another process", devpath);
  82. break;
  83. default:
  84. applog(LOG_DEBUG, "Open %s failed, GetLastError:%d", devpath, (int)e);
  85. break;
  86. }
  87. } else {
  88. // thanks to af_newbie for pointers about this
  89. COMMCONFIG comCfg = {0};
  90. comCfg.dwSize = sizeof(COMMCONFIG);
  91. comCfg.wVersion = 1;
  92. comCfg.dcb.DCBlength = sizeof(DCB);
  93. comCfg.dcb.BaudRate = baud;
  94. comCfg.dcb.fBinary = 1;
  95. comCfg.dcb.fDtrControl = DTR_CONTROL_ENABLE;
  96. comCfg.dcb.fRtsControl = RTS_CONTROL_ENABLE;
  97. comCfg.dcb.ByteSize = 8;
  98. SetCommConfig(hSerial, &comCfg, sizeof(comCfg));
  99. // Code must specify a valid timeout value (0 means don't timeout)
  100. const DWORD ctoms = (timeout * 100);
  101. COMMTIMEOUTS cto = {ctoms, 0, ctoms, 0, ctoms};
  102. SetCommTimeouts(hSerial, &cto);
  103. if (purge) {
  104. PurgeComm(hSerial, PURGE_RXABORT);
  105. PurgeComm(hSerial, PURGE_TXABORT);
  106. PurgeComm(hSerial, PURGE_RXCLEAR);
  107. PurgeComm(hSerial, PURGE_TXCLEAR);
  108. }
  109. fd = _open_osfhandle((intptr_t)hSerial, 0);
  110. }
  111. #else
  112. int fd = -1;
  113. if(cgpu->device_fd >= 0) {
  114. return false;
  115. }
  116. fd = open(devpath, O_RDWR|O_EXCL|O_NONBLOCK);
  117. #endif
  118. if(fd == -1) {
  119. applog(LOG_DEBUG, "%s open %s error %d",
  120. cgpu->drv->dname, devpath, errno);
  121. return false;
  122. }
  123. cgpu->device_path = strdup(devpath);
  124. cgpu->device_fd = fd;
  125. applog(LOG_DEBUG, "btm_init open device fd = %d", cgpu->device_fd);
  126. return true;
  127. }
  128. void btm_uninit(struct cgpu_info *cgpu)
  129. {
  130. applog(LOG_DEBUG, "BTM uninit %s%i", cgpu->drv->name, cgpu->device_fd);
  131. // May have happened already during a failed initialisation
  132. // if release_cgpu() was called due to a USB NODEV(err)
  133. close(cgpu->device_fd);
  134. if(cgpu->device_path) {
  135. free((char*)cgpu->device_path);
  136. cgpu->device_path = NULL;
  137. }
  138. }
  139. void btm_detect(struct device_drv *drv, bool (*device_detect)(const char*))
  140. {
  141. applog(LOG_DEBUG, "BTM scan devices: checking for %s devices", drv->name);
  142. device_detect("asic");
  143. }
  144. int btm_read(struct cgpu_info * const cgpu, void * const buf, const size_t bufsize)
  145. {
  146. int err = 0;
  147. //applog(LOG_DEBUG, "btm_read ----- %d -----", bufsize);
  148. err = read(cgpu->device_fd, buf, bufsize);
  149. return err;
  150. }
  151. int btm_write(struct cgpu_info * const cgpu, void * const buf, const size_t bufsize)
  152. {
  153. int err = 0;
  154. //applog(LOG_DEBUG, "btm_write ----- %d -----", bufsize);
  155. err = write(cgpu->device_fd, buf, bufsize);
  156. return err;
  157. }
  158. #define BITMAIN_CALC_DIFF1 1
  159. #ifdef WIN32
  160. #define BITMAIN_TEST
  161. #endif
  162. #define BITMAIN_TEST_PRINT_WORK 0
  163. #ifdef BITMAIN_TEST
  164. #define BITMAIN_TEST_NUM 19
  165. #define BITMAIN_TEST_USENUM 1
  166. int g_test_index = 0;
  167. const char btm_work_test_data[BITMAIN_TEST_NUM][256] = {
  168. "00000002ddc1ce5579dbec17f17fbb8f31ae218a814b2a0c1900f0d90000000100000000b58aa6ca86546b07a5a46698f736c7ca9c0eedc756d8f28ac33c20cc24d792675276f879190afc85b6888022000000800000000000000000000000000000000000000000000000000000000000000000",
  169. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000eb2d45233c5b02de50ddcb9049ba16040e0ba00e9750a474eec75891571d925b52dfda4a190266667145b02f000000800000000000000000000000000000000000000000000000000000000000000000",
  170. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000090c7d3743e0b0562e4f56d3dd35cece3c5e8275d0abb21bf7e503cb72bd7ed3b52dfda4a190266667bbb58d7000000800000000000000000000000000000000000000000000000000000000000000000",
  171. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000006e0561da06022bfbb42c5ecd74a46bfd91934f201b777e9155cc6c3674724ec652dfda4a19026666a0cd827b000000800000000000000000000000000000000000000000000000000000000000000000",
  172. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000000312f42ce4964cc23f2d8c039f106f25ddd58e10a1faed21b3bba4b0e621807b52dfda4a1902666629c9497d000000800000000000000000000000000000000000000000000000000000000000000000",
  173. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000033093a6540dbe8f7f3d19e3d2af05585ac58dafad890fa9a942e977334a23d6e52dfda4a190266665ae95079000000800000000000000000000000000000000000000000000000000000000000000000",
  174. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000bd7893057d06e69705bddf9a89c7bac6b40c5b32f15e2295fc8c5edf491ea24952dfda4a190266664b89b4d3000000800000000000000000000000000000000000000000000000000000000000000000",
  175. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000075e66f533e53837d14236a793ee4e493985642bc39e016b9e63adf14a584a2aa52dfda4a19026666ab5d638d000000800000000000000000000000000000000000000000000000000000000000000000",
  176. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d936f90c5db5f0fe1d017344443854fbf9e40a07a9b7e74fedc8661c23162bff52dfda4a19026666338e79cb000000800000000000000000000000000000000000000000000000000000000000000000",
  177. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d2c1a7d279a4355b017bc0a4b0a9425707786729f21ee18add3fda4252a31a4152dfda4a190266669bc90806000000800000000000000000000000000000000000000000000000000000000000000000",
  178. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000ad36d19f33d04ca779942843890bc3b083cec83a4b60b6c45cf7d21fc187746552dfda4a1902666675d81ab7000000800000000000000000000000000000000000000000000000000000000000000000",
  179. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000093b809cf82b76082eacb55bc35b79f31882ed0976fd102ef54783cd24341319b52dfda4a1902666642ab4e42000000800000000000000000000000000000000000000000000000000000000000000000",
  180. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000007411ff315430a7bbf41de8a685d457e82d5177c05640d6a4436a40f39e99667852dfda4a190266662affa4b5000000800000000000000000000000000000000000000000000000000000000000000000",
  181. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000001ad0db5b9e1e2b57c8d3654c160f5a51067521eab7e340a270639d97f00a3fa252dfda4a1902666601a47bb6000000800000000000000000000000000000000000000000000000000000000000000000",
  182. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000022e055c442c46bbe16df68603a26891f6e4cf85b90102b39fd7cadb602b4e34552dfda4a1902666695d33cea000000800000000000000000000000000000000000000000000000000000000000000000",
  183. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000009c8baf5a8a1e16de2d6ae949d5fec3ed751f10dcd4c99810f2ce08040fb9e31d52dfda4a19026666fe78849d000000800000000000000000000000000000000000000000000000000000000000000000",
  184. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000e5655532b414887f35eb4652bc7b11ebac12891f65bc08cbe0ce5b277b9e795152dfda4a19026666fcc0d1d1000000800000000000000000000000000000000000000000000000000000000000000000",
  185. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000f272c5508704e2b62dd1c30ea970372c40bf00f9203f9bf69d456b4a7fbfffe352dfda4a19026666c03d4399000000800000000000000000000000000000000000000000000000000000000000000000",
  186. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000fca3b4531ba627ad9b0e23cdd84c888952c23810df196e9c6db0bcecba6a830952dfda4a19026666c14009cb000000800000000000000000000000000000000000000000000000000000000000000000"
  187. };
  188. const char btm_work_test_midstate[BITMAIN_TEST_NUM][256] = {
  189. "2d8738e7f5bcf76dcb8316fec772e20e240cd58c88d47f2d3f5a6a9547ed0a35",
  190. "d31b6ce09c0bfc2af6f3fe3a03475ebefa5aa191fa70a327a354b2c22f9692f1",
  191. "84a8c8224b80d36caeb42eff2a100f634e1ff873e83fd02ef1306a34abef9dbe",
  192. "059882159439b9b32968c79a93c5521e769dbea9d840f56c2a17b9ad87e530b8",
  193. "17fa435d05012574f8f1da26994cc87b6cb9660b5e82072dc6a0881cec150a0d",
  194. "92a28cc5ec4ba6a2688471dfe2032b5fe97c805ca286c503e447d6749796c6af",
  195. "1677a03516d6e9509ac37e273d2482da9af6e077abe8392cdca6a30e916a7ae9",
  196. "50bbe09f1b8ac18c97aeb745d5d2c3b5d669b6ac7803e646f65ac7b763a392d1",
  197. "e46a0022ebdc303a7fb1a0ebfa82b523946c312e745e5b8a116b17ae6b4ce981",
  198. "8f2f61e7f5b4d76d854e6d266acfff4d40347548216838ccc4ef3b9e43d3c9ea",
  199. "0a450588ae99f75d676a08d0326e1ea874a3497f696722c78a80c7b6ee961ea6",
  200. "3c4c0fc2cf040b806c51b46de9ec0dcc678a7cc5cf3eff11c6c03de3bc7818cc",
  201. "f6c7c785ab5daddb8f98e5f854f2cb41879fcaf47289eb2b4196fefc1b28316f",
  202. "005312351ccb0d0794779f5023e4335b5cad221accf0dfa3da7b881266fa9f5a",
  203. "7b26d189c6bba7add54143179aadbba7ccaeff6887bd8d5bec9597d5716126e6",
  204. "a4718f4c801e7ddf913a9474eb71774993525684ffea1915f767ab16e05e6889",
  205. "6b6226a8c18919d0e55684638d33a6892a00d22492cc2f5906ca7a4ac21c74a7",
  206. "383114dccd1cb824b869158aa2984d157fcb02f46234ceca65943e919329e697",
  207. "d4d478df3016852b27cb1ae9e1e98d98617f8d0943bf9dc1217f47f817236222"
  208. };
  209. #endif
  210. char opt_bitmain_dev[256] = {0};
  211. bool opt_bitmain_hwerror = false;
  212. bool opt_bitmain_checkall = false;
  213. bool opt_bitmain_checkn2diff = false;
  214. bool opt_bitmain_nobeeper = false;
  215. bool opt_bitmain_notempoverctrl = false;
  216. bool opt_bitmain_homemode = false;
  217. int opt_bitmain_temp = BITMAIN_TEMP_TARGET;
  218. int opt_bitmain_overheat = BITMAIN_TEMP_OVERHEAT;
  219. int opt_bitmain_fan_min = BITMAIN_DEFAULT_FAN_MIN_PWM;
  220. int opt_bitmain_fan_max = BITMAIN_DEFAULT_FAN_MAX_PWM;
  221. int opt_bitmain_freq_min = BITMAIN_MIN_FREQUENCY;
  222. int opt_bitmain_freq_max = BITMAIN_MAX_FREQUENCY;
  223. bool opt_bitmain_auto;
  224. static int option_offset = -1;
  225. // --------------------------------------------------------------
  226. // CRC16 check table
  227. // --------------------------------------------------------------
  228. const uint8_t chCRCHTalbe[] = // CRC high byte table
  229. {
  230. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  231. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  232. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  233. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  234. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  235. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  236. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  237. 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  238. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  239. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  240. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  241. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  242. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  243. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  244. 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  245. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  246. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  247. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  248. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  249. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  250. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  251. 0x00, 0xC1, 0x81, 0x40
  252. };
  253. const uint8_t chCRCLTalbe[] = // CRC low byte table
  254. {
  255. 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7,
  256. 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E,
  257. 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9,
  258. 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC,
  259. 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
  260. 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32,
  261. 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D,
  262. 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38,
  263. 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF,
  264. 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
  265. 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1,
  266. 0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4,
  267. 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB,
  268. 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA,
  269. 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
  270. 0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0,
  271. 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97,
  272. 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E,
  273. 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89,
  274. 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
  275. 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83,
  276. 0x41, 0x81, 0x80, 0x40
  277. };
  278. static uint16_t CRC16(const uint8_t* p_data, uint16_t w_len)
  279. {
  280. uint8_t chCRCHi = 0xFF; // CRC high byte initialize
  281. uint8_t chCRCLo = 0xFF; // CRC low byte initialize
  282. uint16_t wIndex = 0; // CRC cycling index
  283. while (w_len--) {
  284. wIndex = chCRCLo ^ *p_data++;
  285. chCRCLo = chCRCHi ^ chCRCHTalbe[wIndex];
  286. chCRCHi = chCRCLTalbe[wIndex];
  287. }
  288. return ((chCRCHi << 8) | chCRCLo);
  289. }
  290. static uint32_t num2bit(int num) {
  291. switch(num) {
  292. case 0: return 0x80000000;
  293. case 1: return 0x40000000;
  294. case 2: return 0x20000000;
  295. case 3: return 0x10000000;
  296. case 4: return 0x08000000;
  297. case 5: return 0x04000000;
  298. case 6: return 0x02000000;
  299. case 7: return 0x01000000;
  300. case 8: return 0x00800000;
  301. case 9: return 0x00400000;
  302. case 10: return 0x00200000;
  303. case 11: return 0x00100000;
  304. case 12: return 0x00080000;
  305. case 13: return 0x00040000;
  306. case 14: return 0x00020000;
  307. case 15: return 0x00010000;
  308. case 16: return 0x00008000;
  309. case 17: return 0x00004000;
  310. case 18: return 0x00002000;
  311. case 19: return 0x00001000;
  312. case 20: return 0x00000800;
  313. case 21: return 0x00000400;
  314. case 22: return 0x00000200;
  315. case 23: return 0x00000100;
  316. case 24: return 0x00000080;
  317. case 25: return 0x00000040;
  318. case 26: return 0x00000020;
  319. case 27: return 0x00000010;
  320. case 28: return 0x00000008;
  321. case 29: return 0x00000004;
  322. case 30: return 0x00000002;
  323. case 31: return 0x00000001;
  324. default: return 0x00000000;
  325. }
  326. }
  327. static bool get_options(int this_option_offset, int *baud, int *chain_num,
  328. int *asic_num, int *timeout, int *frequency, char * frequency_t, uint8_t * reg_data, uint8_t * voltage, char * voltage_t)
  329. {
  330. char buf[BUFSIZ+1];
  331. char *ptr, *comma, *colon, *colon2, *colon3, *colon4, *colon5, *colon6;
  332. size_t max;
  333. int i, tmp;
  334. if (opt_bitmain_options == NULL)
  335. buf[0] = '\0';
  336. else {
  337. ptr = opt_bitmain_options;
  338. for (i = 0; i < this_option_offset; i++) {
  339. comma = strchr(ptr, ',');
  340. if (comma == NULL)
  341. break;
  342. ptr = comma + 1;
  343. }
  344. comma = strchr(ptr, ',');
  345. if (comma == NULL)
  346. max = strlen(ptr);
  347. else
  348. max = comma - ptr;
  349. if (max > BUFSIZ)
  350. max = BUFSIZ;
  351. strncpy(buf, ptr, max);
  352. buf[max] = '\0';
  353. }
  354. if (!(*buf))
  355. return false;
  356. colon = strchr(buf, ':');
  357. if (colon)
  358. *(colon++) = '\0';
  359. tmp = atoi(buf);
  360. switch (tmp) {
  361. case 115200:
  362. *baud = 115200;
  363. break;
  364. case 57600:
  365. *baud = 57600;
  366. break;
  367. case 38400:
  368. *baud = 38400;
  369. break;
  370. case 19200:
  371. *baud = 19200;
  372. break;
  373. default:
  374. quit(1, "Invalid bitmain-options for baud (%s) "
  375. "must be 115200, 57600, 38400 or 19200", buf);
  376. }
  377. if (colon && *colon) {
  378. colon2 = strchr(colon, ':');
  379. if (colon2)
  380. *(colon2++) = '\0';
  381. if (*colon) {
  382. tmp = atoi(colon);
  383. if (tmp > 0) {
  384. *chain_num = tmp;
  385. } else {
  386. quit(1, "Invalid bitmain-options for "
  387. "chain_num (%s) must be 1 ~ %d",
  388. colon, BITMAIN_DEFAULT_CHAIN_NUM);
  389. }
  390. }
  391. if (colon2 && *colon2) {
  392. colon3 = strchr(colon2, ':');
  393. if (colon3)
  394. *(colon3++) = '\0';
  395. tmp = atoi(colon2);
  396. if (tmp > 0 && tmp <= BITMAIN_DEFAULT_ASIC_NUM)
  397. *asic_num = tmp;
  398. else {
  399. quit(1, "Invalid bitmain-options for "
  400. "asic_num (%s) must be 1 ~ %d",
  401. colon2, BITMAIN_DEFAULT_ASIC_NUM);
  402. }
  403. if (colon3 && *colon3) {
  404. colon4 = strchr(colon3, ':');
  405. if (colon4)
  406. *(colon4++) = '\0';
  407. tmp = atoi(colon3);
  408. if (tmp > 0 && tmp <= 0xff)
  409. *timeout = tmp;
  410. else {
  411. quit(1, "Invalid bitmain-options for "
  412. "timeout (%s) must be 1 ~ %d",
  413. colon3, 0xff);
  414. }
  415. if (colon4 && *colon4) {
  416. colon5 = strchr(colon4, ':');
  417. if(colon5)
  418. *(colon5++) = '\0';
  419. tmp = atoi(colon4);
  420. if (tmp < BITMAIN_MIN_FREQUENCY || tmp > BITMAIN_MAX_FREQUENCY) {
  421. quit(1, "Invalid bitmain-options for frequency, must be %d <= frequency <= %d",
  422. BITMAIN_MIN_FREQUENCY, BITMAIN_MAX_FREQUENCY);
  423. } else {
  424. *frequency = tmp;
  425. strcpy(frequency_t, colon4);
  426. }
  427. if (colon5 && *colon5) {
  428. colon6 = strchr(colon5, ':');
  429. if(colon6)
  430. *(colon6++) = '\0';
  431. if(strlen(colon5) > 8 || strlen(colon5)%2 != 0 || strlen(colon5)/2 == 0) {
  432. quit(1, "Invalid bitmain-options for reg data, must be hex now: %s",
  433. colon5);
  434. }
  435. memset(reg_data, 0, 4);
  436. if(!hex2bin(reg_data, colon5, strlen(colon5)/2)) {
  437. quit(1, "Invalid bitmain-options for reg data, hex2bin error now: %s",
  438. colon5);
  439. }
  440. if (colon6 && *colon6) {
  441. if(strlen(colon6) > 4 || strlen(colon6)%2 != 0 || strlen(colon6)/2 == 0) {
  442. quit(1, "Invalid bitmain-options for voltage data, must be hex now: %s",
  443. colon6);
  444. }
  445. memset(voltage, 0, 2);
  446. if(!hex2bin(voltage, colon6, strlen(colon6)/2)) {
  447. quit(1, "Invalid bitmain-options for voltage data, hex2bin error now: %s",
  448. colon5);
  449. } else {
  450. sprintf(voltage_t, "%02x%02x", voltage[0], voltage[1]);
  451. voltage_t[5] = 0;
  452. voltage_t[4] = voltage_t[3];
  453. voltage_t[3] = voltage_t[2];
  454. voltage_t[2] = voltage_t[1];
  455. voltage_t[1] = '.';
  456. }
  457. }
  458. }
  459. }
  460. }
  461. }
  462. }
  463. return true;
  464. }
  465. static bool get_option_freq(int *timeout, int *frequency, char * frequency_t, uint8_t * reg_data)
  466. {
  467. char buf[BUFSIZ+1];
  468. char *ptr, *comma, *colon, *colon2;
  469. size_t max;
  470. int tmp;
  471. if (opt_bitmain_freq == NULL)
  472. return true;
  473. else {
  474. ptr = opt_bitmain_freq;
  475. comma = strchr(ptr, ',');
  476. if (comma == NULL)
  477. max = strlen(ptr);
  478. else
  479. max = comma - ptr;
  480. if (max > BUFSIZ)
  481. max = BUFSIZ;
  482. strncpy(buf, ptr, max);
  483. buf[max] = '\0';
  484. }
  485. if (!(*buf))
  486. return false;
  487. colon = strchr(buf, ':');
  488. if (colon)
  489. *(colon++) = '\0';
  490. tmp = atoi(buf);
  491. if (tmp > 0 && tmp <= 0xff)
  492. *timeout = tmp;
  493. else {
  494. quit(1, "Invalid bitmain-freq for "
  495. "timeout (%s) must be 1 ~ %d",
  496. buf, 0xff);
  497. }
  498. if (colon && *colon) {
  499. colon2 = strchr(colon, ':');
  500. if (colon2)
  501. *(colon2++) = '\0';
  502. tmp = atoi(colon);
  503. if (tmp < BITMAIN_MIN_FREQUENCY || tmp > BITMAIN_MAX_FREQUENCY) {
  504. quit(1, "Invalid bitmain-freq for frequency, must be %d <= frequency <= %d",
  505. BITMAIN_MIN_FREQUENCY, BITMAIN_MAX_FREQUENCY);
  506. } else {
  507. *frequency = tmp;
  508. strcpy(frequency_t, colon);
  509. }
  510. if (colon2 && *colon2) {
  511. if(strlen(colon2) > 8 || strlen(colon2)%2 != 0 || strlen(colon2)/2 == 0) {
  512. quit(1, "Invalid bitmain-freq for reg data, must be hex now: %s",
  513. colon2);
  514. }
  515. memset(reg_data, 0, 4);
  516. if(!hex2bin(reg_data, colon2, strlen(colon2)/2)) {
  517. quit(1, "Invalid bitmain-freq for reg data, hex2bin error now: %s",
  518. colon2);
  519. }
  520. }
  521. }
  522. return true;
  523. }
  524. static bool get_option_voltage(uint8_t * voltage, char * voltage_t)
  525. {
  526. if(opt_bitmain_voltage) {
  527. if(strlen(opt_bitmain_voltage) > 4 || strlen(opt_bitmain_voltage)%2 != 0 || strlen(opt_bitmain_voltage)/2 == 0) {
  528. applog(LOG_ERR, "Invalid bitmain-voltage for voltage data, must be hex now: %s,set default_volttage",
  529. opt_bitmain_voltage);
  530. return false;
  531. }
  532. memset(voltage, 0, 2);
  533. if(!hex2bin(voltage, opt_bitmain_voltage, strlen(opt_bitmain_voltage)/2)) {
  534. quit(1, "Invalid bitmain-voltage for voltage data, hex2bin error now: %s",
  535. opt_bitmain_voltage);
  536. } else {
  537. sprintf(voltage_t, "%02x%02x", voltage[0], voltage[1]);
  538. voltage_t[5] = 0;
  539. voltage_t[4] = voltage_t[3];
  540. voltage_t[3] = voltage_t[2];
  541. voltage_t[2] = voltage_t[1];
  542. voltage_t[1] = '.';
  543. }
  544. }
  545. return true;
  546. }
  547. static int bitmain_set_txconfig(struct bitmain_txconfig_token *bm,
  548. uint8_t reset, uint8_t fan_eft, uint8_t timeout_eft, uint8_t frequency_eft,
  549. uint8_t voltage_eft, uint8_t chain_check_time_eft, uint8_t chip_config_eft, uint8_t hw_error_eft,
  550. uint8_t beeper_ctrl, uint8_t temp_over_ctrl,uint8_t fan_home_mode,
  551. uint8_t chain_num, uint8_t asic_num, uint8_t fan_pwm_data, uint8_t timeout_data,
  552. uint16_t frequency, uint8_t * voltage, uint8_t chain_check_time,
  553. uint8_t chip_address, uint8_t reg_address, uint8_t * reg_data)
  554. {
  555. uint16_t crc = 0;
  556. int datalen = 0;
  557. uint8_t version = 0;
  558. uint8_t * sendbuf = (uint8_t *)bm;
  559. if (unlikely(!bm)) {
  560. applog(LOG_WARNING, "bitmain_set_txconfig bitmain_txconfig_token is null");
  561. return -1;
  562. }
  563. if (unlikely(timeout_data <= 0 || asic_num <= 0 || chain_num <= 0)) {
  564. applog(LOG_WARNING, "bitmain_set_txconfig parameter invalid timeout_data(%d) asic_num(%d) chain_num(%d)",
  565. timeout_data, asic_num, chain_num);
  566. return -1;
  567. }
  568. datalen = sizeof(struct bitmain_txconfig_token);
  569. memset(bm, 0, datalen);
  570. bm->token_type = BITMAIN_TOKEN_TYPE_TXCONFIG;
  571. bm->version = version;
  572. bm->length = datalen-4;
  573. bm->length = htole16(bm->length);
  574. bm->reset = reset;
  575. bm->fan_eft = fan_eft;
  576. bm->timeout_eft = timeout_eft;
  577. bm->frequency_eft = frequency_eft;
  578. bm->voltage_eft = voltage_eft;
  579. bm->chain_check_time_eft = chain_check_time_eft;
  580. bm->chip_config_eft = chip_config_eft;
  581. bm->hw_error_eft = hw_error_eft;
  582. bm->beeper_ctrl = beeper_ctrl;
  583. bm->temp_over_ctrl = temp_over_ctrl;
  584. bm->fan_home_mode = fan_home_mode;
  585. sendbuf[4] = htole8(sendbuf[4]);
  586. sendbuf[5] = htole8(sendbuf[5]);
  587. bm->chain_num = chain_num;
  588. bm->asic_num = asic_num;
  589. bm->fan_pwm_data = fan_pwm_data;
  590. bm->timeout_data = timeout_data;
  591. bm->frequency = htole16(frequency);
  592. memcpy(bm->voltage, voltage, 2);
  593. bm->chain_check_time = chain_check_time;
  594. memcpy(bm->reg_data, reg_data, 4);
  595. bm->chip_address = chip_address;
  596. bm->reg_address = reg_address;
  597. crc = CRC16((uint8_t *)bm, datalen-2);
  598. bm->crc = htole16(crc);
  599. applog(LOG_ERR, "BTM TxConfigToken:v(%d) reset(%d) fan_e(%d) tout_e(%d) fq_e(%d) vt_e(%d) chainc_e(%d) chipc_e(%d) hw_e(%d) b_c(%d) t_c(%d) f_m(%d) mnum(%d) anum(%d) fanpwmdata(%d) toutdata(%d) freq(%d) volt(%02x%02x) chainctime(%d) regdata(%02x%02x%02x%02x) chipaddr(%02x) regaddr(%02x) crc(%04x)",
  600. version, reset, fan_eft, timeout_eft, frequency_eft, voltage_eft,
  601. chain_check_time_eft, chip_config_eft, hw_error_eft, beeper_ctrl, temp_over_ctrl,fan_home_mode,chain_num, asic_num,
  602. fan_pwm_data, timeout_data, frequency, voltage[0], voltage[1],
  603. chain_check_time, reg_data[0], reg_data[1], reg_data[2], reg_data[3], chip_address, reg_address, crc);
  604. return datalen;
  605. }
  606. static int bitmain_set_txtask(uint8_t * sendbuf,
  607. unsigned int * last_work_block, struct work **works, int work_array_size, int work_array, int sendworkcount, int * sendcount)
  608. {
  609. uint16_t crc = 0;
  610. uint32_t work_id = 0;
  611. uint8_t version = 0;
  612. int datalen = 0;
  613. int i = 0;
  614. int index = work_array;
  615. uint8_t new_block= 0;
  616. struct bitmain_txtask_token *bm = (struct bitmain_txtask_token *)sendbuf;
  617. *sendcount = 0;
  618. int cursendcount = 0;
  619. int diff = 0;
  620. unsigned int difftmp = 0;
  621. unsigned int pooldiff = 0;
  622. int netdiff = 0;
  623. if (unlikely(!bm)) {
  624. applog(LOG_WARNING, "bitmain_set_txtask bitmain_txtask_token is null");
  625. return -1;
  626. }
  627. if (unlikely(!works)) {
  628. applog(LOG_WARNING, "bitmain_set_txtask work is null");
  629. return -1;
  630. }
  631. memset(bm, 0, sizeof(struct bitmain_txtask_token));
  632. bm->token_type = BITMAIN_TOKEN_TYPE_TXTASK;
  633. bm->version = version;
  634. datalen = 10;
  635. applog(LOG_DEBUG, "BTM send work count %d -----", sendworkcount);
  636. for(i = 0; i < sendworkcount; i++) {
  637. if(index > work_array_size) {
  638. index = 0;
  639. }
  640. if(works[index]) {
  641. const unsigned int work_block = bfg_work_block(works[index]);
  642. if(work_block != *last_work_block) {
  643. applog(LOG_ERR, "BTM send task new block %d old(%d)", work_block, *last_work_block);
  644. new_block = 1;
  645. *last_work_block = work_block;
  646. }
  647. #ifdef BITMAIN_TEST
  648. if(!hex2bin(works[index]->data, btm_work_test_data[g_test_index], 128)) {
  649. applog(LOG_DEBUG, "BTM send task set test data error");
  650. }
  651. if(!hex2bin(works[index]->midstate, btm_work_test_midstate[g_test_index], 32)) {
  652. applog(LOG_DEBUG, "BTM send task set test midstate error");
  653. }
  654. g_test_index++;
  655. if(g_test_index >= BITMAIN_TEST_USENUM) {
  656. g_test_index = 0;
  657. }
  658. applog(LOG_DEBUG, "BTM test index = %d", g_test_index);
  659. #endif
  660. work_id = works[index]->id;
  661. bm->works[cursendcount].work_id = htole32(work_id);
  662. applog(LOG_DEBUG, "BTM send task work id:%d %d", bm->works[cursendcount].work_id, work_id);
  663. memcpy(bm->works[cursendcount].midstate, works[index]->midstate, 32);
  664. memcpy(bm->works[cursendcount].data2, works[index]->data + 64, 12);
  665. if(cursendcount == 0) {
  666. pooldiff = (unsigned int)(works[index]->work_difficulty);
  667. difftmp = pooldiff;
  668. while(1) {
  669. difftmp = difftmp >> 1;
  670. if(difftmp > 0) {
  671. diff++;
  672. if(diff >= 255) {
  673. break;
  674. }
  675. } else {
  676. break;
  677. }
  678. }
  679. struct work * const work = works[index];
  680. const struct pool * const pool = work->pool;
  681. const struct mining_goal_info * const goal = pool->goal;
  682. for (uint64_t netdifftmp = goal->current_diff; netdifftmp > 0; netdifftmp >>= 1) {
  683. ++netdiff;
  684. }
  685. }
  686. if(BITMAIN_TEST_PRINT_WORK) {
  687. char ob_hex[(76 * 2) + 1];
  688. bin2hex(ob_hex, works[index]->data, 76);
  689. applog(LOG_ERR, "work %d data: %s", works[index]->id, ob_hex);
  690. }
  691. cursendcount++;
  692. }
  693. index++;
  694. }
  695. if(cursendcount <= 0) {
  696. applog(LOG_ERR, "BTM send work count %d", cursendcount);
  697. return 0;
  698. }
  699. datalen += 48*cursendcount;
  700. bm->length = datalen-4;
  701. bm->length = htole16(bm->length);
  702. //len = datalen-3;
  703. //len = htole16(len);
  704. //memcpy(sendbuf+1, &len, 2);
  705. bm->new_block = new_block;
  706. bm->diff = diff;
  707. bm->net_diff = htole16(netdiff);
  708. sendbuf[4] = htole8(sendbuf[4]);
  709. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  710. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  711. *sendcount = cursendcount;
  712. crc = CRC16(sendbuf, datalen-2);
  713. crc = htole16(crc);
  714. memcpy(sendbuf+datalen-2, &crc, 2);
  715. applog(LOG_DEBUG, "BitMain TxTask Token: v(%d) new_block(%d) diff(%d pool:%d net:%d) work_num(%d) crc(%04x)",
  716. version, new_block, diff, pooldiff,netdiff, cursendcount, crc);
  717. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  718. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  719. return datalen;
  720. }
  721. static int bitmain_set_rxstatus(struct bitmain_rxstatus_token *bm,
  722. uint8_t chip_status_eft, uint8_t detect_get, uint8_t chip_address, uint8_t reg_address)
  723. {
  724. uint16_t crc = 0;
  725. uint8_t version = 0;
  726. int datalen = 0;
  727. uint8_t * sendbuf = (uint8_t *)bm;
  728. if (unlikely(!bm)) {
  729. applog(LOG_WARNING, "bitmain_set_rxstatus bitmain_rxstatus_token is null");
  730. return -1;
  731. }
  732. datalen = sizeof(struct bitmain_rxstatus_token);
  733. memset(bm, 0, datalen);
  734. bm->token_type = BITMAIN_TOKEN_TYPE_RXSTATUS;
  735. bm->version = version;
  736. bm->length = datalen-4;
  737. bm->length = htole16(bm->length);
  738. bm->chip_status_eft = chip_status_eft;
  739. bm->detect_get = detect_get;
  740. sendbuf[4] = htole8(sendbuf[4]);
  741. bm->chip_address = chip_address;
  742. bm->reg_address = reg_address;
  743. crc = CRC16((uint8_t *)bm, datalen-2);
  744. bm->crc = htole16(crc);
  745. applog(LOG_ERR, "BitMain RxStatus Token: v(%d) chip_status_eft(%d) detect_get(%d) chip_address(%02x) reg_address(%02x) crc(%04x)",
  746. version, chip_status_eft, detect_get, chip_address, reg_address, crc);
  747. return datalen;
  748. }
  749. static int bitmain_parse_rxstatus(const uint8_t * data, int datalen, struct bitmain_rxstatus_data *bm)
  750. {
  751. uint16_t crc = 0;
  752. uint8_t version = 0;
  753. int i = 0, j = 0;
  754. int asic_num = 0;
  755. int dataindex = 0;
  756. uint8_t tmp = 0x01;
  757. if (unlikely(!bm)) {
  758. applog(LOG_WARNING, "bitmain_parse_rxstatus bitmain_rxstatus_data is null");
  759. return -1;
  760. }
  761. if (unlikely(!data || datalen <= 0)) {
  762. applog(LOG_WARNING, "bitmain_parse_rxstatus parameter invalid data is null or datalen(%d) error", datalen);
  763. return -1;
  764. }
  765. memset(bm, 0, sizeof(struct bitmain_rxstatus_data));
  766. memcpy(bm, data, 28);
  767. if (bm->data_type != BITMAIN_DATA_TYPE_RXSTATUS) {
  768. applog(LOG_ERR, "bitmain_parse_rxstatus datatype(%02x) error", bm->data_type);
  769. return -1;
  770. }
  771. if (bm->version != version) {
  772. applog(LOG_ERR, "bitmain_parse_rxstatus version(%02x) error", bm->version);
  773. return -1;
  774. }
  775. bm->length = htole16(bm->length);
  776. if (bm->length+4 != datalen) {
  777. applog(LOG_ERR, "bitmain_parse_rxstatus length(%d) datalen(%d) error", bm->length, datalen);
  778. return -1;
  779. }
  780. crc = CRC16(data, datalen-2);
  781. memcpy(&(bm->crc), data+datalen-2, 2);
  782. bm->crc = htole16(bm->crc);
  783. if(crc != bm->crc) {
  784. applog(LOG_ERR, "bitmain_parse_rxstatus check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  785. return -1;
  786. }
  787. bm->fifo_space = htole16(bm->fifo_space);
  788. bm->fan_exist = htole16(bm->fan_exist);
  789. bm->temp_exist = htole32(bm->temp_exist);
  790. bm->nonce_error = htole32(bm->nonce_error);
  791. if(bm->chain_num > BITMAIN_MAX_CHAIN_NUM) {
  792. applog(LOG_ERR, "bitmain_parse_rxstatus chain_num=%d error", bm->chain_num);
  793. return -1;
  794. }
  795. dataindex = 28;
  796. if(bm->chain_num > 0) {
  797. memcpy(bm->chain_asic_num, data+datalen-2-bm->chain_num-bm->temp_num-bm->fan_num, bm->chain_num);
  798. }
  799. for(i = 0; i < bm->chain_num; i++) {
  800. asic_num = bm->chain_asic_num[i];
  801. if(asic_num <= 0) {
  802. asic_num = 1;
  803. } else {
  804. if(asic_num % 32 == 0) {
  805. asic_num = asic_num / 32;
  806. } else {
  807. asic_num = asic_num / 32 + 1;
  808. }
  809. }
  810. memcpy((uint8_t *)bm->chain_asic_exist+i*32, data+dataindex, asic_num*4);
  811. dataindex += asic_num*4;
  812. }
  813. for(i = 0; i < bm->chain_num; i++) {
  814. asic_num = bm->chain_asic_num[i];
  815. if(asic_num <= 0) {
  816. asic_num = 1;
  817. } else {
  818. if(asic_num % 32 == 0) {
  819. asic_num = asic_num / 32;
  820. } else {
  821. asic_num = asic_num / 32 + 1;
  822. }
  823. }
  824. memcpy((uint8_t *)bm->chain_asic_status+i*32, data+dataindex, asic_num*4);
  825. dataindex += asic_num*4;
  826. }
  827. dataindex += bm->chain_num;
  828. if(dataindex + bm->temp_num + bm->fan_num + 2 != datalen) {
  829. applog(LOG_ERR, "bitmain_parse_rxstatus dataindex(%d) chain_num(%d) temp_num(%d) fan_num(%d) not match datalen(%d)",
  830. dataindex, bm->chain_num, bm->temp_num, bm->fan_num, datalen);
  831. return -1;
  832. }
  833. for(i = 0; i < bm->chain_num; i++) {
  834. //bm->chain_asic_status[i] = swab32(bm->chain_asic_status[i]);
  835. for(j = 0; j < 8; j++) {
  836. bm->chain_asic_exist[i*8+j] = htole32(bm->chain_asic_exist[i*8+j]);
  837. bm->chain_asic_status[i*8+j] = htole32(bm->chain_asic_status[i*8+j]);
  838. }
  839. }
  840. if(bm->temp_num > 0) {
  841. memcpy(bm->temp, data+dataindex, bm->temp_num);
  842. dataindex += bm->temp_num;
  843. }
  844. if(bm->fan_num > 0) {
  845. memcpy(bm->fan, data+dataindex, bm->fan_num);
  846. dataindex += bm->fan_num;
  847. }
  848. if(!opt_bitmain_checkall){
  849. if(tmp != htole8(tmp)){
  850. applog(LOG_ERR, "BitMain RxStatus byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  851. memcpy(&tmp,data+4,1);
  852. bm->chip_value_eft = tmp >>7;
  853. bm->get_blk_num = tmp >> 4;
  854. bm->reserved1 = ((tmp << 4) & 0xff) >> 5;
  855. }
  856. found_blocks = bm->get_blk_num;
  857. applog(LOG_ERR, "BitMain RxStatus tmp :0x%02x byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",tmp,*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  858. }
  859. applog(LOG_DEBUG, "BitMain RxStatusData: chipv_e(%d) chainnum(%d) fifos(%d) v1(%d) v2(%d) v3(%d) v4(%d) fann(%d) tempn(%d) fanet(%04x) tempet(%08x) ne(%d) regvalue(%d) crc(%04x)",
  860. bm->chip_value_eft, bm->chain_num, bm->fifo_space, bm->hw_version[0], bm->hw_version[1], bm->hw_version[2], bm->hw_version[3], bm->fan_num, bm->temp_num, bm->fan_exist, bm->temp_exist, bm->nonce_error, bm->reg_value, bm->crc);
  861. applog(LOG_DEBUG, "BitMain RxStatus Data chain info:");
  862. for(i = 0; i < bm->chain_num; i++) {
  863. applog(LOG_DEBUG, "BitMain RxStatus Data chain(%d) asic num=%d asic_exist=%08x asic_status=%08x", i+1, bm->chain_asic_num[i], bm->chain_asic_exist[i*8], bm->chain_asic_status[i*8]);
  864. }
  865. applog(LOG_DEBUG, "BitMain RxStatus Data temp info:");
  866. for(i = 0; i < bm->temp_num; i++) {
  867. applog(LOG_DEBUG, "BitMain RxStatus Data temp(%d) temp=%d", i+1, bm->temp[i]);
  868. }
  869. applog(LOG_DEBUG, "BitMain RxStatus Data fan info:");
  870. for(i = 0; i < bm->fan_num; i++) {
  871. applog(LOG_DEBUG, "BitMain RxStatus Data fan(%d) fan=%d", i+1, bm->fan[i]);
  872. }
  873. return 0;
  874. }
  875. static int bitmain_parse_rxnonce(const uint8_t * data, int datalen, struct bitmain_rxnonce_data *bm, int * nonce_num)
  876. {
  877. int i = 0;
  878. uint16_t crc = 0;
  879. uint8_t version = 0;
  880. int curnoncenum = 0;
  881. if (unlikely(!bm)) {
  882. applog(LOG_ERR, "bitmain_parse_rxnonce bitmain_rxstatus_data null");
  883. return -1;
  884. }
  885. if (unlikely(!data || datalen <= 0)) {
  886. applog(LOG_ERR, "bitmain_parse_rxnonce data null or datalen(%d) error", datalen);
  887. return -1;
  888. }
  889. memcpy(bm, data, sizeof(struct bitmain_rxnonce_data));
  890. if (bm->data_type != BITMAIN_DATA_TYPE_RXNONCE) {
  891. applog(LOG_ERR, "bitmain_parse_rxnonce datatype(%02x) error", bm->data_type);
  892. return -1;
  893. }
  894. if (bm->version != version) {
  895. applog(LOG_ERR, "bitmain_parse_rxnonce version(%02x) error", bm->version);
  896. return -1;
  897. }
  898. bm->length = htole16(bm->length);
  899. if (bm->length+4 != datalen) {
  900. applog(LOG_ERR, "bitmain_parse_rxnonce length(%d) error", bm->length);
  901. return -1;
  902. }
  903. crc = CRC16(data, datalen-2);
  904. memcpy(&(bm->crc), data+datalen-2, 2);
  905. bm->crc = htole16(bm->crc);
  906. if(crc != bm->crc) {
  907. applog(LOG_ERR, "bitmain_parse_rxnonce check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  908. return -1;
  909. }
  910. bm->fifo_space = htole16(bm->fifo_space);
  911. bm->diff = htole16(bm->diff);
  912. bm->total_nonce_num = htole64(bm->total_nonce_num);
  913. curnoncenum = (datalen-14)/8;
  914. applog(LOG_DEBUG, "BitMain RxNonce Data: nonce_num(%d) fifo_space(%d) diff(%d) tnn(%lld)", curnoncenum, bm->fifo_space, bm->diff, bm->total_nonce_num);
  915. for(i = 0; i < curnoncenum; i++) {
  916. bm->nonces[i].work_id = htole32(bm->nonces[i].work_id);
  917. bm->nonces[i].nonce = htole32(bm->nonces[i].nonce);
  918. applog(LOG_DEBUG, "BitMain RxNonce Data %d: work_id(%d) nonce(%08x)(%d)",
  919. i, bm->nonces[i].work_id, bm->nonces[i].nonce, bm->nonces[i].nonce);
  920. }
  921. *nonce_num = curnoncenum;
  922. return 0;
  923. }
  924. static int bitmain_read(struct cgpu_info *bitmain, unsigned char *buf,
  925. size_t bufsize, int timeout)
  926. {
  927. int err = 0;
  928. size_t total = 0;
  929. if(bitmain == NULL || buf == NULL || bufsize <= 0) {
  930. applog(LOG_WARNING, "bitmain_read parameter error bufsize(%d)", bufsize);
  931. return -1;
  932. }
  933. {
  934. err = btm_read(bitmain, buf, bufsize);
  935. total = err;
  936. }
  937. return total;
  938. }
  939. static int bitmain_write(struct cgpu_info *bitmain, char *buf, ssize_t len)
  940. {
  941. int err;
  942. {
  943. int havelen = 0;
  944. while(havelen < len) {
  945. err = btm_write(bitmain, buf+havelen, len-havelen);
  946. if(err < 0) {
  947. applog(LOG_DEBUG, "%s%i: btm_write got err %d", bitmain->drv->name,
  948. bitmain->device_id, err);
  949. applog(LOG_WARNING, "usb_write error on bitmain_write");
  950. return BTM_SEND_ERROR;
  951. } else {
  952. havelen += err;
  953. }
  954. }
  955. }
  956. return BTM_SEND_OK;
  957. }
  958. static int bitmain_send_data(const uint8_t * data, int datalen, struct cgpu_info *bitmain)
  959. {
  960. int ret;
  961. if(datalen <= 0) {
  962. return 0;
  963. }
  964. //struct bitmain_info *info = bitmain->device_data;
  965. //int delay;
  966. //delay = datalen * 10 * 1000000;
  967. //delay = delay / info->baud;
  968. //delay += 4000;
  969. if(opt_debug) {
  970. char hex[(datalen * 2) + 1];
  971. bin2hex(hex, data, datalen);
  972. applog(LOG_DEBUG, "BitMain: Sent(%d): %s", datalen, hex);
  973. }
  974. //cgtimer_t ts_start;
  975. //cgsleep_prepare_r(&ts_start);
  976. //applog(LOG_DEBUG, "----bitmain_send_data start");
  977. ret = bitmain_write(bitmain, (char *)data, datalen);
  978. applog(LOG_DEBUG, "----bitmain_send_data stop ret=%d datalen=%d", ret, datalen);
  979. //cgsleep_us_r(&ts_start, delay);
  980. //applog(LOG_DEBUG, "BitMain: Sent: Buffer delay: %dus", delay);
  981. return ret;
  982. }
  983. static bool bitmain_decode_nonce(struct thr_info *thr, struct cgpu_info *bitmain,
  984. struct bitmain_info *info, uint32_t nonce, struct work *work)
  985. {
  986. info = bitmain->device_data;
  987. //info->matching_work[work->subid]++;
  988. if(opt_bitmain_hwerror) {
  989. applog(LOG_DEBUG, "BitMain: submit direct nonce = %08x", nonce);
  990. if(opt_bitmain_checkall) {
  991. applog(LOG_DEBUG, "BitMain check all");
  992. return submit_nonce(thr, work, nonce);
  993. } else {
  994. if(opt_bitmain_checkn2diff) {
  995. int diff = 0;
  996. diff = work->work_difficulty;
  997. if(diff&&(diff&(diff-1))) {
  998. applog(LOG_DEBUG, "BitMain %d not diff 2 submit_nonce", diff);
  999. return submit_nonce(thr, work, nonce);
  1000. } else {
  1001. applog(LOG_DEBUG, "BitMain %d diff 2 submit_nonce_direct", diff);
  1002. return submit_nonce_direct(thr, work, nonce);
  1003. }
  1004. } else {
  1005. return submit_nonce_direct(thr, work, nonce);
  1006. }
  1007. }
  1008. } else {
  1009. applog(LOG_DEBUG, "BitMain: submit nonce = %08x", nonce);
  1010. return submit_nonce(thr, work, nonce);
  1011. }
  1012. }
  1013. static void bitmain_inc_nvw(struct bitmain_info *info, struct thr_info *thr)
  1014. {
  1015. applog(LOG_INFO, "%s%d: No matching work - HW error",
  1016. thr->cgpu->drv->name, thr->cgpu->device_id);
  1017. inc_hw_errors_only(thr);
  1018. info->no_matching_work++;
  1019. }
  1020. static inline void record_temp_fan(struct bitmain_info *info, struct bitmain_rxstatus_data *bm, float *temp_avg)
  1021. {
  1022. int i = 0;
  1023. int maxfan = 0, maxtemp = 0;
  1024. *temp_avg = 0;
  1025. info->fan_num = bm->fan_num;
  1026. for(i = 0; i < bm->fan_num; i++) {
  1027. info->fan[i] = bm->fan[i] * BITMAIN_FAN_FACTOR;
  1028. if(info->fan[i] > maxfan)
  1029. maxfan = info->fan[i];
  1030. }
  1031. info->temp_num = bm->temp_num;
  1032. for(i = 0; i < bm->temp_num; i++) {
  1033. info->temp[i] = bm->temp[i];
  1034. /*
  1035. if(bm->temp[i] & 0x80) {
  1036. bm->temp[i] &= 0x7f;
  1037. info->temp[i] = 0 - ((~bm->temp[i] & 0x7f) + 1);
  1038. }*/
  1039. *temp_avg += info->temp[i];
  1040. if(info->temp[i] > info->temp_max) {
  1041. info->temp_max = info->temp[i];
  1042. }
  1043. if(info->temp[i] > maxtemp)
  1044. maxtemp = info->temp[i];
  1045. }
  1046. if(bm->temp_num > 0) {
  1047. *temp_avg = *temp_avg / bm->temp_num;
  1048. info->temp_avg = *temp_avg;
  1049. }
  1050. // inc_dev_status
  1051. mutex_lock(&stats_lock);
  1052. info->g_max_fan = maxfan;
  1053. info->g_max_temp = maxtemp;
  1054. mutex_unlock(&stats_lock);
  1055. }
  1056. static void bitmain_update_temps(struct cgpu_info *bitmain, struct bitmain_info *info,
  1057. struct bitmain_rxstatus_data *bm)
  1058. {
  1059. char tmp[64] = {0};
  1060. char msg[10240] = {0};
  1061. int i = 0;
  1062. record_temp_fan(info, bm, &(bitmain->temp));
  1063. strcpy(msg, "BitMain: ");
  1064. for(i = 0; i < bm->fan_num; i++) {
  1065. if(i != 0) {
  1066. strcat(msg, ", ");
  1067. }
  1068. sprintf(tmp, "Fan%d: %d/m", i+1, info->fan[i]);
  1069. strcat(msg, tmp);
  1070. }
  1071. strcat(msg, "\t");
  1072. for(i = 0; i < bm->temp_num; i++) {
  1073. if(i != 0) {
  1074. strcat(msg, ", ");
  1075. }
  1076. sprintf(tmp, "Temp%d: %dC", i+1, info->temp[i]);
  1077. strcat(msg, tmp);
  1078. }
  1079. sprintf(tmp, ", TempMAX: %dC", info->temp_max);
  1080. strcat(msg, tmp);
  1081. applog(LOG_INFO, msg);
  1082. info->temp_history_index++;
  1083. info->temp_sum += bitmain->temp;
  1084. applog(LOG_DEBUG, "BitMain: temp_index: %d, temp_count: %d, temp_old: %d",
  1085. info->temp_history_index, info->temp_history_count, info->temp_old);
  1086. if (info->temp_history_index == info->temp_history_count) {
  1087. info->temp_history_index = 0;
  1088. info->temp_sum = 0;
  1089. }
  1090. if (unlikely(info->temp_old >= opt_bitmain_overheat)) {
  1091. applog(LOG_WARNING, "BTM%d overheat! Idling", bitmain->device_id);
  1092. info->overheat = true;
  1093. } else if (info->overheat && info->temp_old <= opt_bitmain_temp) {
  1094. applog(LOG_WARNING, "BTM%d cooled, restarting", bitmain->device_id);
  1095. info->overheat = false;
  1096. }
  1097. }
  1098. extern void cg_logwork_uint32(struct work *work, uint32_t nonce, bool ok);
  1099. static void bitmain_parse_results(struct cgpu_info *bitmain, struct bitmain_info *info,
  1100. struct thr_info *thr, uint8_t *buf, int *offset)
  1101. {
  1102. int i, j, n, m, r, errordiff, spare = BITMAIN_READ_SIZE;
  1103. uint32_t checkbit = 0x00000000;
  1104. bool found = false;
  1105. struct work *work = NULL;
  1106. struct bitmain_packet_head packethead;
  1107. int asicnum = 0;
  1108. int idiff = 0;
  1109. int mod = 0,tmp = 0;
  1110. for (i = 0; i <= spare; i++) {
  1111. if(buf[i] == 0xa1) {
  1112. struct bitmain_rxstatus_data rxstatusdata;
  1113. applog(LOG_DEBUG, "bitmain_parse_results RxStatus Data");
  1114. if(*offset < 4) {
  1115. return;
  1116. }
  1117. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  1118. packethead.length = htole16(packethead.length);
  1119. if(packethead.length > 1130) {
  1120. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus datalen=%d error", packethead.length+4);
  1121. continue;
  1122. }
  1123. if(*offset < packethead.length + 4) {
  1124. return;
  1125. }
  1126. if(bitmain_parse_rxstatus(buf+i, packethead.length+4, &rxstatusdata) != 0) {
  1127. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus error len=%d", packethead.length+4);
  1128. } else {
  1129. mutex_lock(&info->qlock);
  1130. info->chain_num = rxstatusdata.chain_num;
  1131. info->fifo_space = rxstatusdata.fifo_space;
  1132. info->hw_version[0] = rxstatusdata.hw_version[0];
  1133. info->hw_version[1] = rxstatusdata.hw_version[1];
  1134. info->hw_version[2] = rxstatusdata.hw_version[2];
  1135. info->hw_version[3] = rxstatusdata.hw_version[3];
  1136. info->nonce_error = rxstatusdata.nonce_error;
  1137. errordiff = info->nonce_error-info->last_nonce_error;
  1138. //sprintf(g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  1139. applog(LOG_ERR, "bitmain_parse_results v=%d chain=%d fifo=%d hwv1=%d hwv2=%d hwv3=%d hwv4=%d nerr=%d-%d freq=%d chain info:",
  1140. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  1141. info->last_nonce_error, info->nonce_error, info->frequency);
  1142. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  1143. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  1144. for(n = 0; n < rxstatusdata.chain_num; n++) {
  1145. info->chain_asic_num[n] = rxstatusdata.chain_asic_num[n];
  1146. memset(info->chain_asic_status_t[n], 0, 320);
  1147. j = 0;
  1148. mod = 0;
  1149. if(info->chain_asic_num[n] <= 0) {
  1150. asicnum = 0;
  1151. } else {
  1152. mod = info->chain_asic_num[n] % 32;
  1153. if(mod == 0) {
  1154. asicnum = info->chain_asic_num[n] / 32;
  1155. } else {
  1156. asicnum = info->chain_asic_num[n] / 32 + 1;
  1157. }
  1158. }
  1159. if(asicnum > 0) {
  1160. for(m = asicnum-1; m >= 0; m--) {
  1161. tmp = mod ? (32-mod): 0;
  1162. for(r = tmp;r < 32;r++){
  1163. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  1164. info->chain_asic_status_t[n][j] = ' ';
  1165. j++;
  1166. }
  1167. checkbit = num2bit(r);
  1168. if(rxstatusdata.chain_asic_exist[n*8+m] & checkbit) {
  1169. if(rxstatusdata.chain_asic_status[n*8+m] & checkbit) {
  1170. info->chain_asic_status_t[n][j] = 'o';
  1171. } else {
  1172. info->chain_asic_status_t[n][j] = 'x';
  1173. }
  1174. } else {
  1175. info->chain_asic_status_t[n][j] = '-';
  1176. }
  1177. j++;
  1178. }
  1179. info->chain_asic_status_t[n][j] = ' ';
  1180. j++;
  1181. mod = 0;
  1182. }
  1183. }
  1184. applog(LOG_DEBUG, "bitmain_parse_results chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  1185. n, info->chain_asic_num[n],
  1186. info->chain_asic_exist[n*8+0], info->chain_asic_exist[n*8+1], info->chain_asic_exist[n*8+2], info->chain_asic_exist[n*8+3], info->chain_asic_exist[n*8+4], info->chain_asic_exist[n*8+5], info->chain_asic_exist[n*8+6], info->chain_asic_exist[n*8+7],
  1187. info->chain_asic_status[n*8+0], info->chain_asic_status[n*8+1], info->chain_asic_status[n*8+2], info->chain_asic_status[n*8+3], info->chain_asic_status[n*8+4], info->chain_asic_status[n*8+5], info->chain_asic_status[n*8+6], info->chain_asic_status[n*8+7]);
  1188. applog(LOG_ERR, "bitmain_parse_results chain(%d) asic_num=%d asic_status=%s", n, info->chain_asic_num[n], info->chain_asic_status_t[n]);
  1189. }
  1190. mutex_unlock(&info->qlock);
  1191. if(errordiff > 0) {
  1192. for(j = 0; j < errordiff; j++) {
  1193. bitmain_inc_nvw(info, thr);
  1194. }
  1195. mutex_lock(&info->qlock);
  1196. info->last_nonce_error += errordiff;
  1197. mutex_unlock(&info->qlock);
  1198. }
  1199. bitmain_update_temps(bitmain, info, &rxstatusdata);
  1200. }
  1201. found = true;
  1202. spare = packethead.length + 4 + i;
  1203. if(spare > *offset) {
  1204. applog(LOG_ERR, "bitmain_parse_rxresults space(%d) > offset(%d)", spare, *offset);
  1205. spare = *offset;
  1206. }
  1207. break;
  1208. } else if(buf[i] == 0xa2) {
  1209. struct bitmain_rxnonce_data rxnoncedata;
  1210. int nonce_num = 0;
  1211. applog(LOG_DEBUG, "bitmain_parse_results RxNonce Data");
  1212. if(*offset < 4) {
  1213. return;
  1214. }
  1215. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  1216. packethead.length = htole16(packethead.length);
  1217. if(packethead.length > 1030) {
  1218. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce datalen=%d error", packethead.length+4);
  1219. continue;
  1220. }
  1221. if(*offset < packethead.length + 4) {
  1222. return;
  1223. }
  1224. if(bitmain_parse_rxnonce(buf+i, packethead.length+4, &rxnoncedata, &nonce_num) != 0) {
  1225. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce error len=%d", packethead.length+4);
  1226. } else {
  1227. for(j = 0; j < nonce_num; j++) {
  1228. const int work_id = rxnoncedata.nonces[j].work_id;
  1229. HASH_FIND_INT(bitmain->queued_work, &work_id, work);
  1230. if(work) {
  1231. if(BITMAIN_TEST_PRINT_WORK) {
  1232. applog(LOG_ERR, "bitmain_parse_results nonce find work(%d-%d)(%08x)", work->id, rxnoncedata.nonces[j].work_id, rxnoncedata.nonces[j].nonce);
  1233. char ob_hex[(32 * 2) + 1];
  1234. bin2hex(ob_hex, work->midstate, 32);
  1235. applog(LOG_ERR, "work %d midstate: %s", work->id, ob_hex);
  1236. bin2hex(ob_hex, &work->data[64], 12);
  1237. applog(LOG_ERR, "work %d data2: %s", work->id, ob_hex);
  1238. }
  1239. if(bfg_work_block(work) != info->last_work_block) {
  1240. applog(LOG_ERR, "BitMain: bitmain_parse_rxnonce work(%d) nonce stale", rxnoncedata.nonces[j].work_id);
  1241. } else {
  1242. if (bitmain_decode_nonce(thr, bitmain, info, rxnoncedata.nonces[j].nonce, work)) {
  1243. mutex_lock(&info->qlock);
  1244. info->nonces++;
  1245. info->auto_nonces++;
  1246. mutex_unlock(&info->qlock);
  1247. } else {
  1248. //bitmain_inc_nvw(info, thr);
  1249. applog(LOG_ERR, "BitMain: bitmain_decode_nonce error work(%d)", rxnoncedata.nonces[j].work_id);
  1250. }
  1251. }
  1252. } else {
  1253. //bitmain_inc_nvw(info, thr);
  1254. applog(LOG_ERR, "BitMain: Nonce not find work(%d)", rxnoncedata.nonces[j].work_id);
  1255. }
  1256. }
  1257. #ifdef BITMAIN_CALC_DIFF1
  1258. if(opt_bitmain_hwerror) {
  1259. int difftmp = 0;
  1260. difftmp = rxnoncedata.diff;
  1261. idiff = 1;
  1262. while(difftmp > 0) {
  1263. difftmp--;
  1264. idiff = idiff << 1;
  1265. }
  1266. mutex_lock(&info->qlock);
  1267. difftmp = idiff*(rxnoncedata.total_nonce_num-info->total_nonce_num);
  1268. if(difftmp < 0)
  1269. difftmp = 0;
  1270. info->nonces = info->nonces+difftmp;
  1271. info->auto_nonces = info->auto_nonces+difftmp;
  1272. info->total_nonce_num = rxnoncedata.total_nonce_num;
  1273. info->fifo_space = rxnoncedata.fifo_space;
  1274. mutex_unlock(&info->qlock);
  1275. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d diff=%d rxtnn=%lld tnn=%lld", info->fifo_space, idiff, rxnoncedata.total_nonce_num, info->total_nonce_num);
  1276. } else {
  1277. mutex_lock(&info->qlock);
  1278. info->fifo_space = rxnoncedata.fifo_space;
  1279. mutex_unlock(&info->qlock);
  1280. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  1281. }
  1282. #else
  1283. mutex_lock(&info->qlock);
  1284. info->fifo_space = rxnoncedata.fifo_space;
  1285. mutex_unlock(&info->qlock);
  1286. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  1287. #endif
  1288. #ifndef WIN32
  1289. if(nonce_num < BITMAIN_MAX_NONCE_NUM)
  1290. cgsleep_ms(5);
  1291. #endif
  1292. }
  1293. found = true;
  1294. spare = packethead.length + 4 + i;
  1295. if(spare > *offset) {
  1296. applog(LOG_ERR, "bitmain_parse_rxnonce space(%d) > offset(%d)", spare, *offset);
  1297. spare = *offset;
  1298. }
  1299. break;
  1300. } else {
  1301. applog(LOG_ERR, "bitmain_parse_results data type error=%02x", buf[i]);
  1302. }
  1303. }
  1304. if (!found) {
  1305. spare = *offset - BITMAIN_READ_SIZE;
  1306. /* We are buffering and haven't accumulated one more corrupt
  1307. * work result. */
  1308. if (spare < (int)BITMAIN_READ_SIZE)
  1309. return;
  1310. bitmain_inc_nvw(info, thr);
  1311. }
  1312. *offset -= spare;
  1313. memmove(buf, buf + spare, *offset);
  1314. }
  1315. static void bitmain_running_reset(struct cgpu_info *bitmain, struct bitmain_info *info)
  1316. {
  1317. bitmain->results = 0;
  1318. info->reset = false;
  1319. }
  1320. static void *bitmain_get_results(void *userdata)
  1321. {
  1322. struct cgpu_info *bitmain = (struct cgpu_info *)userdata;
  1323. struct bitmain_info *info = bitmain->device_data;
  1324. int offset = 0, ret = 0;
  1325. const int rsize = BITMAIN_FTDI_READSIZE;
  1326. uint8_t readbuf[BITMAIN_READBUF_SIZE];
  1327. struct thr_info *thr = info->thr;
  1328. char threadname[24];
  1329. int errorcount = 0;
  1330. snprintf(threadname, 24, "btm_recv/%d", bitmain->device_id);
  1331. RenameThread(threadname);
  1332. while (likely(!bitmain->shutdown)) {
  1333. unsigned char buf[rsize];
  1334. //applog(LOG_DEBUG, "+++++++bitmain_get_results offset=%d", offset);
  1335. if (offset >= (int)BITMAIN_READ_SIZE) {
  1336. //applog(LOG_DEBUG, "======start bitmain_get_results ");
  1337. bitmain_parse_results(bitmain, info, thr, readbuf, &offset);
  1338. //applog(LOG_DEBUG, "======stop bitmain_get_results ");
  1339. }
  1340. if (unlikely(offset + rsize >= BITMAIN_READBUF_SIZE)) {
  1341. /* This should never happen */
  1342. applog(LOG_DEBUG, "BitMain readbuf overflow, resetting buffer");
  1343. offset = 0;
  1344. }
  1345. if (unlikely(info->reset)) {
  1346. bitmain_running_reset(bitmain, info);
  1347. /* Discard anything in the buffer */
  1348. offset = 0;
  1349. }
  1350. /* As the usb read returns after just 1ms, sleep long enough
  1351. * to leave the interface idle for writes to occur, but do not
  1352. * sleep if we have been receiving data as more may be coming. */
  1353. //if (offset == 0) {
  1354. // cgsleep_ms_r(&ts_start, BITMAIN_READ_TIMEOUT);
  1355. //}
  1356. //cgsleep_prepare_r(&ts_start);
  1357. //applog(LOG_DEBUG, "======start bitmain_get_results bitmain_read");
  1358. ret = bitmain_read(bitmain, buf, rsize, BITMAIN_READ_TIMEOUT);
  1359. //applog(LOG_DEBUG, "======stop bitmain_get_results bitmain_read=%d", ret);
  1360. if ((ret < 1) || (ret == 18)) {
  1361. errorcount++;
  1362. #ifdef WIN32
  1363. if(errorcount > 200) {
  1364. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1365. cgsleep_ms(20);
  1366. errorcount = 0;
  1367. }
  1368. #else
  1369. if(errorcount > 3) {
  1370. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1371. cgsleep_ms(20);
  1372. errorcount = 0;
  1373. }
  1374. #endif
  1375. if(ret < 1)
  1376. continue;
  1377. }
  1378. if (opt_debug) {
  1379. char hex[(ret * 2) + 1];
  1380. bin2hex(hex, buf, ret);
  1381. applog(LOG_DEBUG, "BitMain: get: %s", hex);
  1382. }
  1383. memcpy(readbuf+offset, buf, ret);
  1384. offset += ret;
  1385. }
  1386. return NULL;
  1387. }
  1388. static void bitmain_set_timeout(struct bitmain_info *info)
  1389. {
  1390. info->timeout = BITMAIN_TIMEOUT_FACTOR / info->frequency;
  1391. }
  1392. static void bitmain_init(struct cgpu_info *bitmain)
  1393. {
  1394. applog(LOG_INFO, "BitMain: Opened on %s", bitmain->device_path);
  1395. }
  1396. static bool bitmain_prepare(struct thr_info *thr)
  1397. {
  1398. struct cgpu_info *bitmain = thr->cgpu;
  1399. struct bitmain_info *info = bitmain->device_data;
  1400. free(bitmain->works);
  1401. bitmain->works = calloc(BITMAIN_MAX_WORK_NUM * sizeof(struct work *),
  1402. BITMAIN_ARRAY_SIZE);
  1403. if (!bitmain->works)
  1404. quit(1, "Failed to calloc bitmain works in bitmain_prepare");
  1405. info->thr = thr;
  1406. mutex_init(&info->lock);
  1407. mutex_init(&info->qlock);
  1408. if (unlikely(pthread_cond_init(&info->qcond, NULL)))
  1409. quit(1, "Failed to pthread_cond_init bitmain qcond");
  1410. if (pthread_create(&info->read_thr, NULL, bitmain_get_results, (void *)bitmain))
  1411. quit(1, "Failed to create bitmain read_thr");
  1412. bitmain_init(bitmain);
  1413. return true;
  1414. }
  1415. static int bitmain_initialize(struct cgpu_info *bitmain)
  1416. {
  1417. uint8_t data[BITMAIN_READBUF_SIZE];
  1418. struct bitmain_info *info = NULL;
  1419. int ret = 0;
  1420. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1421. int readlen = 0;
  1422. int sendlen = 0;
  1423. int trycount = 3;
  1424. struct timespec p;
  1425. struct bitmain_rxstatus_data rxstatusdata;
  1426. int i = 0, j = 0, m = 0, r = 0, statusok = 0;
  1427. uint32_t checkbit = 0x00000000;
  1428. int hwerror_eft = 0;
  1429. int beeper_ctrl = 1;
  1430. int tempover_ctrl = 1;
  1431. int home_mode = 0;
  1432. struct bitmain_packet_head packethead;
  1433. int asicnum = 0;
  1434. int mod = 0,tmp = 0;
  1435. /* Send reset, then check for result */
  1436. if(!bitmain) {
  1437. applog(LOG_WARNING, "bitmain_initialize cgpu_info is null");
  1438. return -1;
  1439. }
  1440. info = bitmain->device_data;
  1441. /* clear read buf */
  1442. ret = bitmain_read(bitmain, data, BITMAIN_READBUF_SIZE,
  1443. BITMAIN_RESET_TIMEOUT);
  1444. if(ret > 0) {
  1445. if (opt_debug) {
  1446. char hex[(ret * 2) + 1];
  1447. bin2hex(hex, data, ret);
  1448. applog(LOG_DEBUG, "BTM%d Clear Read(%d): %s", bitmain->device_id, ret, hex);
  1449. }
  1450. }
  1451. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *)sendbuf, 0, 1, 0, 0);
  1452. if(sendlen <= 0) {
  1453. applog(LOG_ERR, "bitmain_initialize bitmain_set_rxstatus error(%d)", sendlen);
  1454. return -1;
  1455. }
  1456. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1457. if (unlikely(ret == BTM_SEND_ERROR)) {
  1458. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1459. return -1;
  1460. }
  1461. while(trycount >= 0) {
  1462. ret = bitmain_read(bitmain, data+readlen, BITMAIN_READBUF_SIZE, BITMAIN_RESET_TIMEOUT);
  1463. if(ret > 0) {
  1464. readlen += ret;
  1465. if(readlen > BITMAIN_READ_SIZE) {
  1466. for(i = 0; i < readlen; i++) {
  1467. if(data[i] == 0xa1) {
  1468. if (opt_debug) {
  1469. char hex[(readlen * 2) + 1];
  1470. bin2hex(hex, data, readlen);
  1471. applog(LOG_DEBUG, "%s%d initset: get: %s", bitmain->drv->name, bitmain->device_id, hex);
  1472. }
  1473. memcpy(&packethead, data+i, sizeof(struct bitmain_packet_head));
  1474. packethead.length = htole16(packethead.length);
  1475. if(packethead.length > 1130) {
  1476. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d error", packethead.length+4);
  1477. continue;
  1478. }
  1479. if(readlen-i < packethead.length+4) {
  1480. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d<%d low", readlen-i, packethead.length+4);
  1481. continue;
  1482. }
  1483. if (bitmain_parse_rxstatus(data+i, packethead.length+4, &rxstatusdata) != 0) {
  1484. applog(LOG_ERR, "bitmain_initialize bitmain_parse_rxstatus error");
  1485. continue;
  1486. }
  1487. info->chain_num = rxstatusdata.chain_num;
  1488. info->fifo_space = rxstatusdata.fifo_space;
  1489. info->hw_version[0] = rxstatusdata.hw_version[0];
  1490. info->hw_version[1] = rxstatusdata.hw_version[1];
  1491. info->hw_version[2] = rxstatusdata.hw_version[2];
  1492. info->hw_version[3] = rxstatusdata.hw_version[3];
  1493. info->nonce_error = 0;
  1494. info->last_nonce_error = 0;
  1495. sprintf(info->g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  1496. applog(LOG_ERR, "bitmain_initialize rxstatus v(%d) chain(%d) fifo(%d) hwv1(%d) hwv2(%d) hwv3(%d) hwv4(%d) nerr(%d) freq=%d",
  1497. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  1498. rxstatusdata.nonce_error, info->frequency);
  1499. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  1500. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  1501. for(i = 0; i < rxstatusdata.chain_num; i++) {
  1502. info->chain_asic_num[i] = rxstatusdata.chain_asic_num[i];
  1503. memset(info->chain_asic_status_t[i], 0, 320);
  1504. j = 0;
  1505. mod = 0;
  1506. if(info->chain_asic_num[i] <= 0) {
  1507. asicnum = 0;
  1508. } else {
  1509. mod = info->chain_asic_num[i] % 32;
  1510. if(mod == 0) {
  1511. asicnum = info->chain_asic_num[i] / 32;
  1512. } else {
  1513. asicnum = info->chain_asic_num[i] / 32 + 1;
  1514. }
  1515. }
  1516. if(asicnum > 0) {
  1517. for(m = asicnum-1; m >= 0; m--) {
  1518. tmp = mod ? (32-mod):0;
  1519. for(r = tmp;r < 32;r++){
  1520. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  1521. info->chain_asic_status_t[i][j] = ' ';
  1522. j++;
  1523. }
  1524. checkbit = num2bit(r);
  1525. if(rxstatusdata.chain_asic_exist[i*8+m] & checkbit) {
  1526. if(rxstatusdata.chain_asic_status[i*8+m] & checkbit) {
  1527. info->chain_asic_status_t[i][j] = 'o';
  1528. } else {
  1529. info->chain_asic_status_t[i][j] = 'x';
  1530. }
  1531. } else {
  1532. info->chain_asic_status_t[i][j] = '-';
  1533. }
  1534. j++;
  1535. }
  1536. info->chain_asic_status_t[i][j] = ' ';
  1537. j++;
  1538. mod = 0;
  1539. }
  1540. }
  1541. applog(LOG_DEBUG, "bitmain_initialize chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  1542. i, info->chain_asic_num[i],
  1543. info->chain_asic_exist[i*8+0], info->chain_asic_exist[i*8+1], info->chain_asic_exist[i*8+2], info->chain_asic_exist[i*8+3], info->chain_asic_exist[i*8+4], info->chain_asic_exist[i*8+5], info->chain_asic_exist[i*8+6], info->chain_asic_exist[i*8+7],
  1544. info->chain_asic_status[i*8+0], info->chain_asic_status[i*8+1], info->chain_asic_status[i*8+2], info->chain_asic_status[i*8+3], info->chain_asic_status[i*8+4], info->chain_asic_status[i*8+5], info->chain_asic_status[i*8+6], info->chain_asic_status[i*8+7]);
  1545. applog(LOG_ERR, "bitmain_initialize chain(%d) asic_num=%d asic_status=%s", i, info->chain_asic_num[i], info->chain_asic_status_t[i]);
  1546. }
  1547. bitmain_update_temps(bitmain, info, &rxstatusdata);
  1548. statusok = 1;
  1549. break;
  1550. }
  1551. }
  1552. if(statusok) {
  1553. break;
  1554. }
  1555. }
  1556. }
  1557. trycount--;
  1558. p.tv_sec = 0;
  1559. p.tv_nsec = BITMAIN_RESET_PITCH;
  1560. nanosleep(&p, NULL);
  1561. }
  1562. p.tv_sec = 0;
  1563. p.tv_nsec = BITMAIN_RESET_PITCH;
  1564. nanosleep(&p, NULL);
  1565. cgtime(&info->last_status_time);
  1566. if(statusok) {
  1567. applog(LOG_ERR, "bitmain_initialize start send txconfig");
  1568. if(opt_bitmain_hwerror)
  1569. hwerror_eft = 1;
  1570. else
  1571. hwerror_eft = 0;
  1572. if(opt_bitmain_nobeeper)
  1573. beeper_ctrl = 0;
  1574. else
  1575. beeper_ctrl = 1;
  1576. if(opt_bitmain_notempoverctrl)
  1577. tempover_ctrl = 0;
  1578. else
  1579. tempover_ctrl = 1;
  1580. if(opt_bitmain_homemode)
  1581. home_mode= 1;
  1582. else
  1583. home_mode= 0;
  1584. sendlen = bitmain_set_txconfig((struct bitmain_txconfig_token *)sendbuf, 1, 1, 1, 1, 1, 0, 1, hwerror_eft, beeper_ctrl, tempover_ctrl,home_mode,
  1585. info->chain_num, info->asic_num, BITMAIN_DEFAULT_FAN_MAX_PWM, info->timeout,
  1586. info->frequency, info->voltage, 0, 0, 0x04, info->reg_data);
  1587. if(sendlen <= 0) {
  1588. applog(LOG_ERR, "bitmain_initialize bitmain_set_txconfig error(%d)", sendlen);
  1589. return -1;
  1590. }
  1591. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1592. if (unlikely(ret == BTM_SEND_ERROR)) {
  1593. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1594. return -1;
  1595. }
  1596. applog(LOG_WARNING, "BMM%d: InitSet succeeded", bitmain->device_id);
  1597. } else {
  1598. applog(LOG_WARNING, "BMS%d: InitSet error", bitmain->device_id);
  1599. return -1;
  1600. }
  1601. return 0;
  1602. }
  1603. static bool bitmain_detect_one(const char * devpath)
  1604. {
  1605. int baud, chain_num, asic_num, timeout, frequency = 0;
  1606. char frequency_t[256] = {0};
  1607. uint8_t reg_data[4] = {0};
  1608. uint8_t voltage[2] = {0};
  1609. char voltage_t[8] = {0};
  1610. int this_option_offset = ++option_offset;
  1611. struct bitmain_info *info;
  1612. struct cgpu_info *bitmain;
  1613. bool configured;
  1614. int ret;
  1615. if (opt_bitmain_options == NULL)
  1616. return false;
  1617. bitmain = btm_alloc_cgpu(&bitmain_drv, BITMAIN_MINER_THREADS);
  1618. configured = get_options(this_option_offset, &baud, &chain_num,
  1619. &asic_num, &timeout, &frequency, frequency_t, reg_data, voltage, voltage_t);
  1620. get_option_freq(&timeout, &frequency, frequency_t, reg_data);
  1621. get_option_voltage(voltage, voltage_t);
  1622. if (!btm_init(bitmain, opt_bitmain_dev))
  1623. goto shin;
  1624. applog(LOG_ERR, "bitmain_detect_one btm init ok");
  1625. bitmain->device_data = calloc(sizeof(struct bitmain_info), 1);
  1626. /* make sure initialize successfully*/
  1627. memset(bitmain->device_data,0,sizeof(struct bitmain_info));
  1628. if (unlikely(!(bitmain->device_data)))
  1629. quit(1, "Failed to calloc bitmain_info data");
  1630. info = bitmain->device_data;
  1631. if (configured) {
  1632. info->baud = baud;
  1633. info->chain_num = chain_num;
  1634. info->asic_num = asic_num;
  1635. info->timeout = timeout;
  1636. info->frequency = frequency;
  1637. strcpy(info->frequency_t, frequency_t);
  1638. memcpy(info->reg_data, reg_data, 4);
  1639. memcpy(info->voltage, voltage, 2);
  1640. strcpy(info->voltage_t, voltage_t);
  1641. } else {
  1642. info->baud = BITMAIN_IO_SPEED;
  1643. info->chain_num = BITMAIN_DEFAULT_CHAIN_NUM;
  1644. info->asic_num = BITMAIN_DEFAULT_ASIC_NUM;
  1645. info->timeout = BITMAIN_DEFAULT_TIMEOUT;
  1646. info->frequency = BITMAIN_DEFAULT_FREQUENCY;
  1647. sprintf(info->frequency_t, "%d", BITMAIN_DEFAULT_FREQUENCY);
  1648. memset(info->reg_data, 0, 4);
  1649. info->voltage[0] = BITMAIN_DEFAULT_VOLTAGE0;
  1650. info->voltage[1] = BITMAIN_DEFAULT_VOLTAGE1;
  1651. strcpy(info->voltage_t, BITMAIN_DEFAULT_VOLTAGE_T);
  1652. }
  1653. info->fan_pwm = BITMAIN_DEFAULT_FAN_MIN_PWM;
  1654. info->temp_max = 0;
  1655. /* This is for check the temp/fan every 3~4s */
  1656. info->temp_history_count = (4 / (float)((float)info->timeout * ((float)1.67/0x32))) + 1;
  1657. if (info->temp_history_count <= 0)
  1658. info->temp_history_count = 1;
  1659. info->temp_history_index = 0;
  1660. info->temp_sum = 0;
  1661. info->temp_old = 0;
  1662. if (!add_cgpu(bitmain))
  1663. goto unshin;
  1664. ret = bitmain_initialize(bitmain);
  1665. applog(LOG_ERR, "bitmain_detect_one stop bitmain_initialize %d", ret);
  1666. if (ret && !configured)
  1667. goto unshin;
  1668. info->errorcount = 0;
  1669. applog(LOG_ERR, "BitMain Detected: %s "
  1670. "(chain_num=%d asic_num=%d timeout=%d freq=%d-%s volt=%02x%02x-%s)",
  1671. bitmain->device_path, info->chain_num, info->asic_num, info->timeout,
  1672. info->frequency, info->frequency_t, info->voltage[0], info->voltage[1], info->voltage_t);
  1673. return true;
  1674. unshin:
  1675. btm_uninit(bitmain);
  1676. shin:
  1677. free(bitmain->device_data);
  1678. bitmain->device_data = NULL;
  1679. free(bitmain);
  1680. return false;
  1681. }
  1682. static void bitmain_detect()
  1683. {
  1684. applog(LOG_DEBUG, "BTM detect dev: %s", opt_bitmain_dev);
  1685. if (strlen(opt_bitmain_dev) > 0) {
  1686. btm_detect(&bitmain_drv, bitmain_detect_one);
  1687. }
  1688. }
  1689. static void do_bitmain_close(struct thr_info *thr)
  1690. {
  1691. struct cgpu_info *bitmain = thr->cgpu;
  1692. struct bitmain_info *info = bitmain->device_data;
  1693. pthread_join(info->read_thr, NULL);
  1694. bitmain_running_reset(bitmain, info);
  1695. info->no_matching_work = 0;
  1696. }
  1697. /* We use a replacement algorithm to only remove references to work done from
  1698. * the buffer when we need the extra space for new work. */
  1699. static bool bitmain_fill(struct cgpu_info *bitmain)
  1700. {
  1701. struct bitmain_info *info = bitmain->device_data;
  1702. int subid, slot;
  1703. struct work *work;
  1704. bool ret = true;
  1705. int sendret = 0, sendcount = 0, neednum = 0, queuednum = 0, sendnum = 0, sendlen = 0;
  1706. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1707. int senderror = 0;
  1708. struct timeval now;
  1709. int timediff = 0;
  1710. //applog(LOG_DEBUG, "BTM bitmain_fill start--------");
  1711. mutex_lock(&info->qlock);
  1712. if(info->fifo_space <= 0) {
  1713. //applog(LOG_DEBUG, "BTM bitmain_fill fifo space empty--------");
  1714. ret = true;
  1715. goto out_unlock;
  1716. }
  1717. if (bitmain->queued >= BITMAIN_MAX_WORK_QUEUE_NUM) {
  1718. ret = true;
  1719. } else {
  1720. ret = false;
  1721. }
  1722. while(info->fifo_space > 0) {
  1723. neednum = info->fifo_space<BITMAIN_MAX_WORK_NUM?info->fifo_space:BITMAIN_MAX_WORK_NUM;
  1724. queuednum = bitmain->queued;
  1725. applog(LOG_DEBUG, "BTM: Work task queued(%d) fifo space(%d) needsend(%d)", queuednum, info->fifo_space, neednum);
  1726. if(queuednum < neednum) {
  1727. while(true) {
  1728. work = get_queued(bitmain);
  1729. if (unlikely(!work)) {
  1730. break;
  1731. } else {
  1732. applog(LOG_DEBUG, "BTM get work queued number:%d neednum:%d", queuednum, neednum);
  1733. subid = bitmain->queued++;
  1734. work->subid = subid;
  1735. slot = bitmain->work_array + subid;
  1736. if (slot > BITMAIN_ARRAY_SIZE) {
  1737. applog(LOG_DEBUG, "bitmain_fill array cyc %d", BITMAIN_ARRAY_SIZE);
  1738. slot = 0;
  1739. }
  1740. if (likely(bitmain->works[slot])) {
  1741. applog(LOG_DEBUG, "bitmain_fill work_completed %d", slot);
  1742. work_completed(bitmain, bitmain->works[slot]);
  1743. }
  1744. bitmain->works[slot] = work;
  1745. queuednum++;
  1746. if(queuednum >= neednum) {
  1747. break;
  1748. }
  1749. }
  1750. }
  1751. }
  1752. if(queuednum < BITMAIN_MAX_DEAL_QUEUE_NUM) {
  1753. if(queuednum < neednum) {
  1754. applog(LOG_DEBUG, "BTM: No enough work to send, queue num=%d", queuednum);
  1755. break;
  1756. }
  1757. }
  1758. sendnum = queuednum < neednum ? queuednum : neednum;
  1759. sendlen = bitmain_set_txtask(sendbuf, &(info->last_work_block), bitmain->works, BITMAIN_ARRAY_SIZE, bitmain->work_array, sendnum, &sendcount);
  1760. bitmain->queued -= sendnum;
  1761. info->send_full_space += sendnum;
  1762. if (bitmain->queued < 0)
  1763. bitmain->queued = 0;
  1764. if (bitmain->work_array + sendnum > BITMAIN_ARRAY_SIZE) {
  1765. bitmain->work_array = bitmain->work_array + sendnum-BITMAIN_ARRAY_SIZE;
  1766. } else {
  1767. bitmain->work_array += sendnum;
  1768. }
  1769. applog(LOG_DEBUG, "BTM: Send work array %d", bitmain->work_array);
  1770. if (sendlen > 0) {
  1771. info->fifo_space -= sendcount;
  1772. if (info->fifo_space < 0)
  1773. info->fifo_space = 0;
  1774. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1775. if (unlikely(sendret == BTM_SEND_ERROR)) {
  1776. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  1777. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  1778. info->reset = true;
  1779. info->errorcount++;
  1780. senderror = 1;
  1781. if (info->errorcount > 1000) {
  1782. info->errorcount = 0;
  1783. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  1784. bitmain->shutdown = true;
  1785. }
  1786. break;
  1787. } else {
  1788. applog(LOG_DEBUG, "bitmain_send_data send ret=%d", sendret);
  1789. info->errorcount = 0;
  1790. }
  1791. } else {
  1792. applog(LOG_DEBUG, "BTM: Send work bitmain_set_txtask error: %d", sendlen);
  1793. break;
  1794. }
  1795. }
  1796. out_unlock:
  1797. cgtime(&now);
  1798. timediff = now.tv_sec - info->last_status_time.tv_sec;
  1799. if(timediff < 0) timediff = -timediff;
  1800. if (timediff > BITMAIN_SEND_STATUS_TIME) {
  1801. applog(LOG_DEBUG, "BTM: Send RX Status Token fifo_space(%d) timediff(%d)", info->fifo_space, timediff);
  1802. copy_time(&(info->last_status_time), &now);
  1803. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *) sendbuf, 0, 0, 0, 0);
  1804. if (sendlen > 0) {
  1805. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1806. if (unlikely(sendret == BTM_SEND_ERROR)) {
  1807. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  1808. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  1809. info->reset = true;
  1810. info->errorcount++;
  1811. senderror = 1;
  1812. if (info->errorcount > 1000) {
  1813. info->errorcount = 0;
  1814. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  1815. bitmain->shutdown = true;
  1816. }
  1817. } else {
  1818. info->errorcount = 0;
  1819. if (info->fifo_space <= 0) {
  1820. senderror = 1;
  1821. }
  1822. }
  1823. }
  1824. }
  1825. if(info->send_full_space > BITMAIN_SEND_FULL_SPACE) {
  1826. info->send_full_space = 0;
  1827. ret = true;
  1828. cgsleep_ms(1);
  1829. }
  1830. mutex_unlock(&info->qlock);
  1831. if(senderror) {
  1832. ret = true;
  1833. applog(LOG_DEBUG, "bitmain_fill send task sleep");
  1834. //cgsleep_ms(1);
  1835. }
  1836. return ret;
  1837. }
  1838. static int64_t bitmain_scanhash(struct thr_info *thr)
  1839. {
  1840. struct cgpu_info *bitmain = thr->cgpu;
  1841. struct bitmain_info *info = bitmain->device_data;
  1842. const int chain_num = info->chain_num;
  1843. int64_t hash_count;
  1844. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock start");
  1845. mutex_lock(&info->qlock);
  1846. hash_count = 0xffffffffull * (uint64_t)info->nonces;
  1847. bitmain->results += info->nonces + info->idle;
  1848. if (bitmain->results > chain_num)
  1849. bitmain->results = chain_num;
  1850. if (!info->reset)
  1851. bitmain->results--;
  1852. info->nonces = info->idle = 0;
  1853. mutex_unlock(&info->qlock);
  1854. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock stop");
  1855. /* Check for nothing but consecutive bad results or consistently less
  1856. * results than we should be getting and reset the FPGA if necessary */
  1857. //if (bitmain->results < -chain_num && !info->reset) {
  1858. // applog(LOG_ERR, "BTM%d: Result return rate low, resetting!",
  1859. // bitmain->device_id);
  1860. // info->reset = true;
  1861. //}
  1862. /* This hashmeter is just a utility counter based on returned shares */
  1863. return hash_count;
  1864. }
  1865. static void bitmain_flush_work(struct cgpu_info *bitmain)
  1866. {
  1867. struct bitmain_info *info = bitmain->device_data;
  1868. mutex_lock(&info->qlock);
  1869. /* Will overwrite any work queued */
  1870. applog(LOG_ERR, "bitmain_flush_work queued=%d array=%d", bitmain->queued, bitmain->work_array);
  1871. if(bitmain->queued > 0) {
  1872. if (bitmain->work_array + bitmain->queued > BITMAIN_ARRAY_SIZE) {
  1873. bitmain->work_array = bitmain->work_array + bitmain->queued-BITMAIN_ARRAY_SIZE;
  1874. } else {
  1875. bitmain->work_array += bitmain->queued;
  1876. }
  1877. }
  1878. bitmain->queued = 0;
  1879. //bitmain->work_array = 0;
  1880. //for (int i = 0; i < BITMAIN_ARRAY_SIZE; ++i) {
  1881. // bitmain->works[i] = NULL;
  1882. //}
  1883. //pthread_cond_signal(&info->qcond);
  1884. mutex_unlock(&info->qlock);
  1885. }
  1886. static struct api_data *bitmain_api_stats(struct cgpu_info *cgpu)
  1887. {
  1888. struct api_data *root = NULL;
  1889. struct bitmain_info *info = cgpu->device_data;
  1890. double hwp = (cgpu->hw_errors + cgpu->diff1) ?
  1891. (double)(cgpu->hw_errors) / (double)(cgpu->hw_errors + cgpu->diff1) : 0;
  1892. root = api_add_int(root, "baud", &(info->baud), false);
  1893. root = api_add_int(root, "miner_count", &(info->chain_num), false);
  1894. root = api_add_int(root, "asic_count", &(info->asic_num), false);
  1895. root = api_add_int(root, "timeout", &(info->timeout), false);
  1896. root = api_add_string(root, "frequency", info->frequency_t, false);
  1897. root = api_add_string(root, "voltage", info->voltage_t, false);
  1898. root = api_add_int(root, "hwv1", &(info->hw_version[0]), false);
  1899. root = api_add_int(root, "hwv2", &(info->hw_version[1]), false);
  1900. root = api_add_int(root, "hwv3", &(info->hw_version[2]), false);
  1901. root = api_add_int(root, "hwv4", &(info->hw_version[3]), false);
  1902. root = api_add_int(root, "fan_num", &(info->fan_num), false);
  1903. root = api_add_int(root, "fan1", &(info->fan[0]), false);
  1904. root = api_add_int(root, "fan2", &(info->fan[1]), false);
  1905. root = api_add_int(root, "fan3", &(info->fan[2]), false);
  1906. root = api_add_int(root, "fan4", &(info->fan[3]), false);
  1907. root = api_add_int(root, "fan5", &(info->fan[4]), false);
  1908. root = api_add_int(root, "fan6", &(info->fan[5]), false);
  1909. root = api_add_int(root, "fan7", &(info->fan[6]), false);
  1910. root = api_add_int(root, "fan8", &(info->fan[7]), false);
  1911. root = api_add_int(root, "fan9", &(info->fan[8]), false);
  1912. root = api_add_int(root, "fan10", &(info->fan[9]), false);
  1913. root = api_add_int(root, "fan11", &(info->fan[10]), false);
  1914. root = api_add_int(root, "fan12", &(info->fan[11]), false);
  1915. root = api_add_int(root, "fan13", &(info->fan[12]), false);
  1916. root = api_add_int(root, "fan14", &(info->fan[13]), false);
  1917. root = api_add_int(root, "fan15", &(info->fan[14]), false);
  1918. root = api_add_int(root, "fan16", &(info->fan[15]), false);
  1919. root = api_add_int(root, "temp_num", &(info->temp_num), false);
  1920. root = api_add_int(root, "temp1", &(info->temp[0]), false);
  1921. root = api_add_int(root, "temp2", &(info->temp[1]), false);
  1922. root = api_add_int(root, "temp3", &(info->temp[2]), false);
  1923. root = api_add_int(root, "temp4", &(info->temp[3]), false);
  1924. root = api_add_int(root, "temp5", &(info->temp[4]), false);
  1925. root = api_add_int(root, "temp6", &(info->temp[5]), false);
  1926. root = api_add_int(root, "temp7", &(info->temp[6]), false);
  1927. root = api_add_int(root, "temp8", &(info->temp[7]), false);
  1928. root = api_add_int(root, "temp9", &(info->temp[8]), false);
  1929. root = api_add_int(root, "temp10", &(info->temp[9]), false);
  1930. root = api_add_int(root, "temp11", &(info->temp[10]), false);
  1931. root = api_add_int(root, "temp12", &(info->temp[11]), false);
  1932. root = api_add_int(root, "temp13", &(info->temp[12]), false);
  1933. root = api_add_int(root, "temp14", &(info->temp[13]), false);
  1934. root = api_add_int(root, "temp15", &(info->temp[14]), false);
  1935. root = api_add_int(root, "temp16", &(info->temp[15]), false);
  1936. root = api_add_int(root, "temp_avg", &(info->temp_avg), false);
  1937. root = api_add_int(root, "temp_max", &(info->temp_max), false);
  1938. root = api_add_percent(root, "Device Hardware%", &hwp, true);
  1939. root = api_add_int(root, "no_matching_work", &(info->no_matching_work), false);
  1940. /*
  1941. for (int i = 0; i < info->chain_num; ++i) {
  1942. char mcw[24];
  1943. sprintf(mcw, "match_work_count%d", i + 1);
  1944. root = api_add_int(root, mcw, &(info->matching_work[i]), false);
  1945. }*/
  1946. root = api_add_int(root, "chain_acn1", &(info->chain_asic_num[0]), false);
  1947. root = api_add_int(root, "chain_acn2", &(info->chain_asic_num[1]), false);
  1948. root = api_add_int(root, "chain_acn3", &(info->chain_asic_num[2]), false);
  1949. root = api_add_int(root, "chain_acn4", &(info->chain_asic_num[3]), false);
  1950. root = api_add_int(root, "chain_acn5", &(info->chain_asic_num[4]), false);
  1951. root = api_add_int(root, "chain_acn6", &(info->chain_asic_num[5]), false);
  1952. root = api_add_int(root, "chain_acn7", &(info->chain_asic_num[6]), false);
  1953. root = api_add_int(root, "chain_acn8", &(info->chain_asic_num[7]), false);
  1954. root = api_add_int(root, "chain_acn9", &(info->chain_asic_num[8]), false);
  1955. root = api_add_int(root, "chain_acn10", &(info->chain_asic_num[9]), false);
  1956. root = api_add_int(root, "chain_acn11", &(info->chain_asic_num[10]), false);
  1957. root = api_add_int(root, "chain_acn12", &(info->chain_asic_num[11]), false);
  1958. root = api_add_int(root, "chain_acn13", &(info->chain_asic_num[12]), false);
  1959. root = api_add_int(root, "chain_acn14", &(info->chain_asic_num[13]), false);
  1960. root = api_add_int(root, "chain_acn15", &(info->chain_asic_num[14]), false);
  1961. root = api_add_int(root, "chain_acn16", &(info->chain_asic_num[15]), false);
  1962. //applog(LOG_ERR, "chain asic status:%s", info->chain_asic_status_t[0]);
  1963. root = api_add_string(root, "chain_acs1", info->chain_asic_status_t[0], false);
  1964. root = api_add_string(root, "chain_acs2", info->chain_asic_status_t[1], false);
  1965. root = api_add_string(root, "chain_acs3", info->chain_asic_status_t[2], false);
  1966. root = api_add_string(root, "chain_acs4", info->chain_asic_status_t[3], false);
  1967. root = api_add_string(root, "chain_acs5", info->chain_asic_status_t[4], false);
  1968. root = api_add_string(root, "chain_acs6", info->chain_asic_status_t[5], false);
  1969. root = api_add_string(root, "chain_acs7", info->chain_asic_status_t[6], false);
  1970. root = api_add_string(root, "chain_acs8", info->chain_asic_status_t[7], false);
  1971. root = api_add_string(root, "chain_acs9", info->chain_asic_status_t[8], false);
  1972. root = api_add_string(root, "chain_acs10", info->chain_asic_status_t[9], false);
  1973. root = api_add_string(root, "chain_acs11", info->chain_asic_status_t[10], false);
  1974. root = api_add_string(root, "chain_acs12", info->chain_asic_status_t[11], false);
  1975. root = api_add_string(root, "chain_acs13", info->chain_asic_status_t[12], false);
  1976. root = api_add_string(root, "chain_acs14", info->chain_asic_status_t[13], false);
  1977. root = api_add_string(root, "chain_acs15", info->chain_asic_status_t[14], false);
  1978. root = api_add_string(root, "chain_acs16", info->chain_asic_status_t[15], false);
  1979. //root = api_add_int(root, "chain_acs1", &(info->chain_asic_status[0]), false);
  1980. //root = api_add_int(root, "chain_acs2", &(info->chain_asic_status[1]), false);
  1981. //root = api_add_int(root, "chain_acs3", &(info->chain_asic_status[2]), false);
  1982. //root = api_add_int(root, "chain_acs4", &(info->chain_asic_status[3]), false);
  1983. return root;
  1984. }
  1985. static void bitmain_shutdown(struct thr_info *thr)
  1986. {
  1987. do_bitmain_close(thr);
  1988. }
  1989. char *set_bitmain_dev(char *arg)
  1990. {
  1991. if(arg == NULL || strlen(arg) <= 0) {
  1992. opt_bitmain_dev[0] = '\0';
  1993. } else {
  1994. strncpy(opt_bitmain_dev, arg, 256);
  1995. }
  1996. applog(LOG_DEBUG, "BTM set device: %s", opt_bitmain_dev);
  1997. return NULL;
  1998. }
  1999. char *set_bitmain_fan(char *arg)
  2000. {
  2001. int val1, val2, ret;
  2002. ret = sscanf(arg, "%d-%d", &val1, &val2);
  2003. if (ret < 1)
  2004. return "No values passed to bitmain-fan";
  2005. if (ret == 1)
  2006. val2 = val1;
  2007. if (val1 < 0 || val1 > 100 || val2 < 0 || val2 > 100 || val2 < val1)
  2008. return "Invalid value passed to bitmain-fan";
  2009. opt_bitmain_fan_min = val1 * BITMAIN_PWM_MAX / 100;
  2010. opt_bitmain_fan_max = val2 * BITMAIN_PWM_MAX / 100;
  2011. return NULL;
  2012. }
  2013. char *set_bitmain_freq(char *arg)
  2014. {
  2015. int val1, val2, ret;
  2016. ret = sscanf(arg, "%d-%d", &val1, &val2);
  2017. if (ret < 1)
  2018. return "No values passed to bitmain-freq";
  2019. if (ret == 1)
  2020. val2 = val1;
  2021. if (val1 < BITMAIN_MIN_FREQUENCY || val1 > BITMAIN_MAX_FREQUENCY ||
  2022. val2 < BITMAIN_MIN_FREQUENCY || val2 > BITMAIN_MAX_FREQUENCY ||
  2023. val2 < val1)
  2024. return "Invalid value passed to bitmain-freq";
  2025. opt_bitmain_freq_min = val1;
  2026. opt_bitmain_freq_max = val2;
  2027. return NULL;
  2028. }
  2029. struct device_drv bitmain_drv = {
  2030. .dname = "bitmain",
  2031. .name = "BTM",
  2032. .drv_detect = bitmain_detect,
  2033. .thread_prepare = bitmain_prepare,
  2034. .minerloop = hash_queued_work,
  2035. .queue_full = bitmain_fill,
  2036. .scanwork = bitmain_scanhash,
  2037. .flush_work = bitmain_flush_work,
  2038. .get_api_stats = bitmain_api_stats,
  2039. .reinit_device = bitmain_init,
  2040. .thread_shutdown = bitmain_shutdown,
  2041. };