driver-bitmain.c 86 KB

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  1. /*
  2. * Copyright 2012-2013 Lingchao Xu <lingchao.xu@bitmaintech.com>
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 3 of the License, or (at your option)
  7. * any later version. See COPYING for more details.
  8. */
  9. #include "config.h"
  10. #include <limits.h>
  11. #include <pthread.h>
  12. #include <stdio.h>
  13. #include <sys/time.h>
  14. #include <sys/types.h>
  15. #include <dirent.h>
  16. #include <unistd.h>
  17. #ifndef WIN32
  18. #include <sys/select.h>
  19. #include <termios.h>
  20. #include <sys/stat.h>
  21. #include <fcntl.h>
  22. #ifndef O_CLOEXEC
  23. #define O_CLOEXEC 0
  24. #endif
  25. #else
  26. #include "compat.h"
  27. #include <windows.h>
  28. #include <io.h>
  29. #endif
  30. #include "elist.h"
  31. #include "miner.h"
  32. #include "usbutils.h"
  33. #include "driver-bitmain.h"
  34. #include "util.h"
  35. static inline unsigned int bfg_work_block(struct work * const work)
  36. {
  37. return *((unsigned int*)(&work->data[4]));
  38. }
  39. #define htole8(x) (x)
  40. struct cgpu_info *btm_alloc_cgpu(struct device_drv *drv, int threads)
  41. {
  42. struct cgpu_info *cgpu = calloc(1, sizeof(*cgpu));
  43. if (unlikely(!cgpu))
  44. quit(1, "Failed to calloc cgpu for %s in usb_alloc_cgpu", drv->dname);
  45. cgpu->drv = drv;
  46. cgpu->deven = DEV_ENABLED;
  47. cgpu->threads = threads;
  48. cgpu->usbinfo.nodev = true;
  49. cgpu->device_fd = -1;
  50. cglock_init(&cgpu->usbinfo.devlock);
  51. return cgpu;
  52. }
  53. struct cgpu_info *btm_free_cgpu(struct cgpu_info *cgpu)
  54. {
  55. if (cgpu->drv->copy)
  56. free(cgpu->drv);
  57. if(cgpu->device_path) {
  58. free(cgpu->device_path);
  59. }
  60. free(cgpu);
  61. return NULL;
  62. }
  63. bool btm_init(struct cgpu_info *cgpu, const char * devpath)
  64. {
  65. #ifdef WIN32
  66. int fd = -1;
  67. signed short timeout = 1;
  68. unsigned long baud = 115200;
  69. bool purge = true;
  70. HANDLE hSerial = NULL;
  71. applog(LOG_DEBUG, "btm_init cgpu->device_fd=%d", cgpu->device_fd);
  72. if(cgpu->device_fd >= 0) {
  73. return false;
  74. }
  75. hSerial = CreateFile(devpath, GENERIC_READ | GENERIC_WRITE, 0, NULL, OPEN_EXISTING, 0, NULL);
  76. if (unlikely(hSerial == INVALID_HANDLE_VALUE))
  77. {
  78. DWORD e = GetLastError();
  79. switch (e) {
  80. case ERROR_ACCESS_DENIED:
  81. applog(LOG_DEBUG, "Do not have user privileges required to open %s", devpath);
  82. break;
  83. case ERROR_SHARING_VIOLATION:
  84. applog(LOG_DEBUG, "%s is already in use by another process", devpath);
  85. break;
  86. default:
  87. applog(LOG_DEBUG, "Open %s failed, GetLastError:%d", devpath, (int)e);
  88. break;
  89. }
  90. } else {
  91. // thanks to af_newbie for pointers about this
  92. COMMCONFIG comCfg = {0};
  93. comCfg.dwSize = sizeof(COMMCONFIG);
  94. comCfg.wVersion = 1;
  95. comCfg.dcb.DCBlength = sizeof(DCB);
  96. comCfg.dcb.BaudRate = baud;
  97. comCfg.dcb.fBinary = 1;
  98. comCfg.dcb.fDtrControl = DTR_CONTROL_ENABLE;
  99. comCfg.dcb.fRtsControl = RTS_CONTROL_ENABLE;
  100. comCfg.dcb.ByteSize = 8;
  101. SetCommConfig(hSerial, &comCfg, sizeof(comCfg));
  102. // Code must specify a valid timeout value (0 means don't timeout)
  103. const DWORD ctoms = (timeout * 100);
  104. COMMTIMEOUTS cto = {ctoms, 0, ctoms, 0, ctoms};
  105. SetCommTimeouts(hSerial, &cto);
  106. if (purge) {
  107. PurgeComm(hSerial, PURGE_RXABORT);
  108. PurgeComm(hSerial, PURGE_TXABORT);
  109. PurgeComm(hSerial, PURGE_RXCLEAR);
  110. PurgeComm(hSerial, PURGE_TXCLEAR);
  111. }
  112. fd = _open_osfhandle((intptr_t)hSerial, 0);
  113. }
  114. #else
  115. int fd = -1;
  116. if(cgpu->device_fd >= 0) {
  117. return false;
  118. }
  119. fd = open(devpath, O_RDWR|O_EXCL|O_NONBLOCK);
  120. #endif
  121. if(fd == -1) {
  122. applog(LOG_DEBUG, "%s open %s error %d",
  123. cgpu->drv->dname, devpath, errno);
  124. return false;
  125. }
  126. cgpu->device_path = strdup(devpath);
  127. cgpu->device_fd = fd;
  128. cgpu->usbinfo.nodev = false;
  129. applog(LOG_DEBUG, "btm_init open device fd = %d", cgpu->device_fd);
  130. return true;
  131. }
  132. void btm_uninit(struct cgpu_info *cgpu)
  133. {
  134. applog(LOG_DEBUG, "BTM uninit %s%i", cgpu->drv->name, cgpu->device_fd);
  135. // May have happened already during a failed initialisation
  136. // if release_cgpu() was called due to a USB NODEV(err)
  137. close(cgpu->device_fd);
  138. if(cgpu->device_path) {
  139. free(cgpu->device_path);
  140. cgpu->device_path = NULL;
  141. }
  142. }
  143. void btm_detect(struct device_drv *drv, bool (*device_detect)(const char*))
  144. {
  145. applog(LOG_DEBUG, "BTM scan devices: checking for %s devices", drv->name);
  146. if (total_count >= total_limit) {
  147. applog(LOG_DEBUG, "BTM scan devices: total limit %d reached", total_limit);
  148. return;
  149. }
  150. if (drv_count[drv->drv_id].count >= drv_count[drv->drv_id].limit) {
  151. applog(LOG_DEBUG,
  152. "BTM scan devices: %s limit %d reached",
  153. drv->dname, drv_count[drv->drv_id].limit);
  154. return;
  155. }
  156. device_detect("asic");
  157. }
  158. int btm_read(struct cgpu_info *cgpu, char *buf, size_t bufsize)
  159. {
  160. int err = 0;
  161. //applog(LOG_DEBUG, "btm_read ----- %d -----", bufsize);
  162. err = read(cgpu->device_fd, buf, bufsize);
  163. return err;
  164. }
  165. int btm_write(struct cgpu_info *cgpu, char *buf, size_t bufsize)
  166. {
  167. int err = 0;
  168. //applog(LOG_DEBUG, "btm_write ----- %d -----", bufsize);
  169. err = write(cgpu->device_fd, buf, bufsize);
  170. return err;
  171. }
  172. #define BITMAIN_CALC_DIFF1 1
  173. #ifdef WIN32
  174. #define BITMAIN_TEST
  175. #endif
  176. #define BITMAIN_TEST_PRINT_WORK 0
  177. #ifdef BITMAIN_TEST
  178. #define BITMAIN_TEST_NUM 19
  179. #define BITMAIN_TEST_USENUM 1
  180. int g_test_index = 0;
  181. const char btm_work_test_data[BITMAIN_TEST_NUM][256] = {
  182. "00000002ddc1ce5579dbec17f17fbb8f31ae218a814b2a0c1900f0d90000000100000000b58aa6ca86546b07a5a46698f736c7ca9c0eedc756d8f28ac33c20cc24d792675276f879190afc85b6888022000000800000000000000000000000000000000000000000000000000000000000000000",
  183. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000eb2d45233c5b02de50ddcb9049ba16040e0ba00e9750a474eec75891571d925b52dfda4a190266667145b02f000000800000000000000000000000000000000000000000000000000000000000000000",
  184. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000090c7d3743e0b0562e4f56d3dd35cece3c5e8275d0abb21bf7e503cb72bd7ed3b52dfda4a190266667bbb58d7000000800000000000000000000000000000000000000000000000000000000000000000",
  185. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000006e0561da06022bfbb42c5ecd74a46bfd91934f201b777e9155cc6c3674724ec652dfda4a19026666a0cd827b000000800000000000000000000000000000000000000000000000000000000000000000",
  186. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000000312f42ce4964cc23f2d8c039f106f25ddd58e10a1faed21b3bba4b0e621807b52dfda4a1902666629c9497d000000800000000000000000000000000000000000000000000000000000000000000000",
  187. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000033093a6540dbe8f7f3d19e3d2af05585ac58dafad890fa9a942e977334a23d6e52dfda4a190266665ae95079000000800000000000000000000000000000000000000000000000000000000000000000",
  188. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000bd7893057d06e69705bddf9a89c7bac6b40c5b32f15e2295fc8c5edf491ea24952dfda4a190266664b89b4d3000000800000000000000000000000000000000000000000000000000000000000000000",
  189. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000075e66f533e53837d14236a793ee4e493985642bc39e016b9e63adf14a584a2aa52dfda4a19026666ab5d638d000000800000000000000000000000000000000000000000000000000000000000000000",
  190. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d936f90c5db5f0fe1d017344443854fbf9e40a07a9b7e74fedc8661c23162bff52dfda4a19026666338e79cb000000800000000000000000000000000000000000000000000000000000000000000000",
  191. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d2c1a7d279a4355b017bc0a4b0a9425707786729f21ee18add3fda4252a31a4152dfda4a190266669bc90806000000800000000000000000000000000000000000000000000000000000000000000000",
  192. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000ad36d19f33d04ca779942843890bc3b083cec83a4b60b6c45cf7d21fc187746552dfda4a1902666675d81ab7000000800000000000000000000000000000000000000000000000000000000000000000",
  193. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000093b809cf82b76082eacb55bc35b79f31882ed0976fd102ef54783cd24341319b52dfda4a1902666642ab4e42000000800000000000000000000000000000000000000000000000000000000000000000",
  194. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000007411ff315430a7bbf41de8a685d457e82d5177c05640d6a4436a40f39e99667852dfda4a190266662affa4b5000000800000000000000000000000000000000000000000000000000000000000000000",
  195. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000001ad0db5b9e1e2b57c8d3654c160f5a51067521eab7e340a270639d97f00a3fa252dfda4a1902666601a47bb6000000800000000000000000000000000000000000000000000000000000000000000000",
  196. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000022e055c442c46bbe16df68603a26891f6e4cf85b90102b39fd7cadb602b4e34552dfda4a1902666695d33cea000000800000000000000000000000000000000000000000000000000000000000000000",
  197. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000009c8baf5a8a1e16de2d6ae949d5fec3ed751f10dcd4c99810f2ce08040fb9e31d52dfda4a19026666fe78849d000000800000000000000000000000000000000000000000000000000000000000000000",
  198. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000e5655532b414887f35eb4652bc7b11ebac12891f65bc08cbe0ce5b277b9e795152dfda4a19026666fcc0d1d1000000800000000000000000000000000000000000000000000000000000000000000000",
  199. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000f272c5508704e2b62dd1c30ea970372c40bf00f9203f9bf69d456b4a7fbfffe352dfda4a19026666c03d4399000000800000000000000000000000000000000000000000000000000000000000000000",
  200. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000fca3b4531ba627ad9b0e23cdd84c888952c23810df196e9c6db0bcecba6a830952dfda4a19026666c14009cb000000800000000000000000000000000000000000000000000000000000000000000000"
  201. };
  202. const char btm_work_test_midstate[BITMAIN_TEST_NUM][256] = {
  203. "2d8738e7f5bcf76dcb8316fec772e20e240cd58c88d47f2d3f5a6a9547ed0a35",
  204. "d31b6ce09c0bfc2af6f3fe3a03475ebefa5aa191fa70a327a354b2c22f9692f1",
  205. "84a8c8224b80d36caeb42eff2a100f634e1ff873e83fd02ef1306a34abef9dbe",
  206. "059882159439b9b32968c79a93c5521e769dbea9d840f56c2a17b9ad87e530b8",
  207. "17fa435d05012574f8f1da26994cc87b6cb9660b5e82072dc6a0881cec150a0d",
  208. "92a28cc5ec4ba6a2688471dfe2032b5fe97c805ca286c503e447d6749796c6af",
  209. "1677a03516d6e9509ac37e273d2482da9af6e077abe8392cdca6a30e916a7ae9",
  210. "50bbe09f1b8ac18c97aeb745d5d2c3b5d669b6ac7803e646f65ac7b763a392d1",
  211. "e46a0022ebdc303a7fb1a0ebfa82b523946c312e745e5b8a116b17ae6b4ce981",
  212. "8f2f61e7f5b4d76d854e6d266acfff4d40347548216838ccc4ef3b9e43d3c9ea",
  213. "0a450588ae99f75d676a08d0326e1ea874a3497f696722c78a80c7b6ee961ea6",
  214. "3c4c0fc2cf040b806c51b46de9ec0dcc678a7cc5cf3eff11c6c03de3bc7818cc",
  215. "f6c7c785ab5daddb8f98e5f854f2cb41879fcaf47289eb2b4196fefc1b28316f",
  216. "005312351ccb0d0794779f5023e4335b5cad221accf0dfa3da7b881266fa9f5a",
  217. "7b26d189c6bba7add54143179aadbba7ccaeff6887bd8d5bec9597d5716126e6",
  218. "a4718f4c801e7ddf913a9474eb71774993525684ffea1915f767ab16e05e6889",
  219. "6b6226a8c18919d0e55684638d33a6892a00d22492cc2f5906ca7a4ac21c74a7",
  220. "383114dccd1cb824b869158aa2984d157fcb02f46234ceca65943e919329e697",
  221. "d4d478df3016852b27cb1ae9e1e98d98617f8d0943bf9dc1217f47f817236222"
  222. };
  223. #endif
  224. char opt_bitmain_dev[256] = {0};
  225. bool opt_bitmain_hwerror = false;
  226. bool opt_bitmain_checkall = false;
  227. bool opt_bitmain_checkn2diff = false;
  228. bool opt_bitmain_dev_usb = true;
  229. bool opt_bitmain_nobeeper = false;
  230. bool opt_bitmain_notempoverctrl = false;
  231. bool opt_bitmain_homemode = false;
  232. int opt_bitmain_temp = BITMAIN_TEMP_TARGET;
  233. int opt_bitmain_overheat = BITMAIN_TEMP_OVERHEAT;
  234. int opt_bitmain_fan_min = BITMAIN_DEFAULT_FAN_MIN_PWM;
  235. int opt_bitmain_fan_max = BITMAIN_DEFAULT_FAN_MAX_PWM;
  236. int opt_bitmain_freq_min = BITMAIN_MIN_FREQUENCY;
  237. int opt_bitmain_freq_max = BITMAIN_MAX_FREQUENCY;
  238. bool opt_bitmain_auto;
  239. static int option_offset = -1;
  240. // --------------------------------------------------------------
  241. // CRC16 check table
  242. // --------------------------------------------------------------
  243. const uint8_t chCRCHTalbe[] = // CRC high byte table
  244. {
  245. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  246. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  247. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  248. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  249. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  250. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  251. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  252. 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  253. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  254. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  255. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  256. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  257. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  258. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  259. 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  260. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  261. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  262. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  263. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  264. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  265. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  266. 0x00, 0xC1, 0x81, 0x40
  267. };
  268. const uint8_t chCRCLTalbe[] = // CRC low byte table
  269. {
  270. 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7,
  271. 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E,
  272. 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9,
  273. 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC,
  274. 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
  275. 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32,
  276. 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D,
  277. 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38,
  278. 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF,
  279. 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
  280. 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1,
  281. 0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4,
  282. 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB,
  283. 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA,
  284. 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
  285. 0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0,
  286. 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97,
  287. 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E,
  288. 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89,
  289. 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
  290. 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83,
  291. 0x41, 0x81, 0x80, 0x40
  292. };
  293. static uint16_t CRC16(const uint8_t* p_data, uint16_t w_len)
  294. {
  295. uint8_t chCRCHi = 0xFF; // CRC high byte initialize
  296. uint8_t chCRCLo = 0xFF; // CRC low byte initialize
  297. uint16_t wIndex = 0; // CRC cycling index
  298. while (w_len--) {
  299. wIndex = chCRCLo ^ *p_data++;
  300. chCRCLo = chCRCHi ^ chCRCHTalbe[wIndex];
  301. chCRCHi = chCRCLTalbe[wIndex];
  302. }
  303. return ((chCRCHi << 8) | chCRCLo);
  304. }
  305. static uint32_t num2bit(int num) {
  306. switch(num) {
  307. case 0: return 0x80000000;
  308. case 1: return 0x40000000;
  309. case 2: return 0x20000000;
  310. case 3: return 0x10000000;
  311. case 4: return 0x08000000;
  312. case 5: return 0x04000000;
  313. case 6: return 0x02000000;
  314. case 7: return 0x01000000;
  315. case 8: return 0x00800000;
  316. case 9: return 0x00400000;
  317. case 10: return 0x00200000;
  318. case 11: return 0x00100000;
  319. case 12: return 0x00080000;
  320. case 13: return 0x00040000;
  321. case 14: return 0x00020000;
  322. case 15: return 0x00010000;
  323. case 16: return 0x00008000;
  324. case 17: return 0x00004000;
  325. case 18: return 0x00002000;
  326. case 19: return 0x00001000;
  327. case 20: return 0x00000800;
  328. case 21: return 0x00000400;
  329. case 22: return 0x00000200;
  330. case 23: return 0x00000100;
  331. case 24: return 0x00000080;
  332. case 25: return 0x00000040;
  333. case 26: return 0x00000020;
  334. case 27: return 0x00000010;
  335. case 28: return 0x00000008;
  336. case 29: return 0x00000004;
  337. case 30: return 0x00000002;
  338. case 31: return 0x00000001;
  339. default: return 0x00000000;
  340. }
  341. }
  342. static bool get_options(int this_option_offset, int *baud, int *chain_num,
  343. int *asic_num, int *timeout, int *frequency, char * frequency_t, uint8_t * reg_data, uint8_t * voltage, char * voltage_t)
  344. {
  345. char buf[BUFSIZ+1];
  346. char *ptr, *comma, *colon, *colon2, *colon3, *colon4, *colon5, *colon6;
  347. size_t max;
  348. int i, tmp;
  349. if (opt_bitmain_options == NULL)
  350. buf[0] = '\0';
  351. else {
  352. ptr = opt_bitmain_options;
  353. for (i = 0; i < this_option_offset; i++) {
  354. comma = strchr(ptr, ',');
  355. if (comma == NULL)
  356. break;
  357. ptr = comma + 1;
  358. }
  359. comma = strchr(ptr, ',');
  360. if (comma == NULL)
  361. max = strlen(ptr);
  362. else
  363. max = comma - ptr;
  364. if (max > BUFSIZ)
  365. max = BUFSIZ;
  366. strncpy(buf, ptr, max);
  367. buf[max] = '\0';
  368. }
  369. if (!(*buf))
  370. return false;
  371. colon = strchr(buf, ':');
  372. if (colon)
  373. *(colon++) = '\0';
  374. tmp = atoi(buf);
  375. switch (tmp) {
  376. case 115200:
  377. *baud = 115200;
  378. break;
  379. case 57600:
  380. *baud = 57600;
  381. break;
  382. case 38400:
  383. *baud = 38400;
  384. break;
  385. case 19200:
  386. *baud = 19200;
  387. break;
  388. default:
  389. quit(1, "Invalid bitmain-options for baud (%s) "
  390. "must be 115200, 57600, 38400 or 19200", buf);
  391. }
  392. if (colon && *colon) {
  393. colon2 = strchr(colon, ':');
  394. if (colon2)
  395. *(colon2++) = '\0';
  396. if (*colon) {
  397. tmp = atoi(colon);
  398. if (tmp > 0) {
  399. *chain_num = tmp;
  400. } else {
  401. quit(1, "Invalid bitmain-options for "
  402. "chain_num (%s) must be 1 ~ %d",
  403. colon, BITMAIN_DEFAULT_CHAIN_NUM);
  404. }
  405. }
  406. if (colon2 && *colon2) {
  407. colon3 = strchr(colon2, ':');
  408. if (colon3)
  409. *(colon3++) = '\0';
  410. tmp = atoi(colon2);
  411. if (tmp > 0 && tmp <= BITMAIN_DEFAULT_ASIC_NUM)
  412. *asic_num = tmp;
  413. else {
  414. quit(1, "Invalid bitmain-options for "
  415. "asic_num (%s) must be 1 ~ %d",
  416. colon2, BITMAIN_DEFAULT_ASIC_NUM);
  417. }
  418. if (colon3 && *colon3) {
  419. colon4 = strchr(colon3, ':');
  420. if (colon4)
  421. *(colon4++) = '\0';
  422. tmp = atoi(colon3);
  423. if (tmp > 0 && tmp <= 0xff)
  424. *timeout = tmp;
  425. else {
  426. quit(1, "Invalid bitmain-options for "
  427. "timeout (%s) must be 1 ~ %d",
  428. colon3, 0xff);
  429. }
  430. if (colon4 && *colon4) {
  431. colon5 = strchr(colon4, ':');
  432. if(colon5)
  433. *(colon5++) = '\0';
  434. tmp = atoi(colon4);
  435. if (tmp < BITMAIN_MIN_FREQUENCY || tmp > BITMAIN_MAX_FREQUENCY) {
  436. quit(1, "Invalid bitmain-options for frequency, must be %d <= frequency <= %d",
  437. BITMAIN_MIN_FREQUENCY, BITMAIN_MAX_FREQUENCY);
  438. } else {
  439. *frequency = tmp;
  440. strcpy(frequency_t, colon4);
  441. }
  442. if (colon5 && *colon5) {
  443. colon6 = strchr(colon5, ':');
  444. if(colon6)
  445. *(colon6++) = '\0';
  446. if(strlen(colon5) > 8 || strlen(colon5)%2 != 0 || strlen(colon5)/2 == 0) {
  447. quit(1, "Invalid bitmain-options for reg data, must be hex now: %s",
  448. colon5);
  449. }
  450. memset(reg_data, 0, 4);
  451. if(!hex2bin(reg_data, colon5, strlen(colon5)/2)) {
  452. quit(1, "Invalid bitmain-options for reg data, hex2bin error now: %s",
  453. colon5);
  454. }
  455. if (colon6 && *colon6) {
  456. if(strlen(colon6) > 4 || strlen(colon6)%2 != 0 || strlen(colon6)/2 == 0) {
  457. quit(1, "Invalid bitmain-options for voltage data, must be hex now: %s",
  458. colon6);
  459. }
  460. memset(voltage, 0, 2);
  461. if(!hex2bin(voltage, colon6, strlen(colon6)/2)) {
  462. quit(1, "Invalid bitmain-options for voltage data, hex2bin error now: %s",
  463. colon5);
  464. } else {
  465. sprintf(voltage_t, "%02x%02x", voltage[0], voltage[1]);
  466. voltage_t[5] = 0;
  467. voltage_t[4] = voltage_t[3];
  468. voltage_t[3] = voltage_t[2];
  469. voltage_t[2] = voltage_t[1];
  470. voltage_t[1] = '.';
  471. }
  472. }
  473. }
  474. }
  475. }
  476. }
  477. }
  478. return true;
  479. }
  480. static bool get_option_freq(int *timeout, int *frequency, char * frequency_t, uint8_t * reg_data)
  481. {
  482. char buf[BUFSIZ+1];
  483. char *ptr, *comma, *colon, *colon2;
  484. size_t max;
  485. int tmp;
  486. if (opt_bitmain_freq == NULL)
  487. return true;
  488. else {
  489. ptr = opt_bitmain_freq;
  490. comma = strchr(ptr, ',');
  491. if (comma == NULL)
  492. max = strlen(ptr);
  493. else
  494. max = comma - ptr;
  495. if (max > BUFSIZ)
  496. max = BUFSIZ;
  497. strncpy(buf, ptr, max);
  498. buf[max] = '\0';
  499. }
  500. if (!(*buf))
  501. return false;
  502. colon = strchr(buf, ':');
  503. if (colon)
  504. *(colon++) = '\0';
  505. tmp = atoi(buf);
  506. if (tmp > 0 && tmp <= 0xff)
  507. *timeout = tmp;
  508. else {
  509. quit(1, "Invalid bitmain-freq for "
  510. "timeout (%s) must be 1 ~ %d",
  511. buf, 0xff);
  512. }
  513. if (colon && *colon) {
  514. colon2 = strchr(colon, ':');
  515. if (colon2)
  516. *(colon2++) = '\0';
  517. tmp = atoi(colon);
  518. if (tmp < BITMAIN_MIN_FREQUENCY || tmp > BITMAIN_MAX_FREQUENCY) {
  519. quit(1, "Invalid bitmain-freq for frequency, must be %d <= frequency <= %d",
  520. BITMAIN_MIN_FREQUENCY, BITMAIN_MAX_FREQUENCY);
  521. } else {
  522. *frequency = tmp;
  523. strcpy(frequency_t, colon);
  524. }
  525. if (colon2 && *colon2) {
  526. if(strlen(colon2) > 8 || strlen(colon2)%2 != 0 || strlen(colon2)/2 == 0) {
  527. quit(1, "Invalid bitmain-freq for reg data, must be hex now: %s",
  528. colon2);
  529. }
  530. memset(reg_data, 0, 4);
  531. if(!hex2bin(reg_data, colon2, strlen(colon2)/2)) {
  532. quit(1, "Invalid bitmain-freq for reg data, hex2bin error now: %s",
  533. colon2);
  534. }
  535. }
  536. }
  537. return true;
  538. }
  539. static bool get_option_voltage(uint8_t * voltage, char * voltage_t)
  540. {
  541. if(opt_bitmain_voltage) {
  542. if(strlen(opt_bitmain_voltage) > 4 || strlen(opt_bitmain_voltage)%2 != 0 || strlen(opt_bitmain_voltage)/2 == 0) {
  543. applog(LOG_ERR, "Invalid bitmain-voltage for voltage data, must be hex now: %s,set default_volttage",
  544. opt_bitmain_voltage);
  545. return false;
  546. }
  547. memset(voltage, 0, 2);
  548. if(!hex2bin(voltage, opt_bitmain_voltage, strlen(opt_bitmain_voltage)/2)) {
  549. quit(1, "Invalid bitmain-voltage for voltage data, hex2bin error now: %s",
  550. opt_bitmain_voltage);
  551. } else {
  552. sprintf(voltage_t, "%02x%02x", voltage[0], voltage[1]);
  553. voltage_t[5] = 0;
  554. voltage_t[4] = voltage_t[3];
  555. voltage_t[3] = voltage_t[2];
  556. voltage_t[2] = voltage_t[1];
  557. voltage_t[1] = '.';
  558. }
  559. }
  560. return true;
  561. }
  562. static int bitmain_set_txconfig(struct bitmain_txconfig_token *bm,
  563. uint8_t reset, uint8_t fan_eft, uint8_t timeout_eft, uint8_t frequency_eft,
  564. uint8_t voltage_eft, uint8_t chain_check_time_eft, uint8_t chip_config_eft, uint8_t hw_error_eft,
  565. uint8_t beeper_ctrl, uint8_t temp_over_ctrl,uint8_t fan_home_mode,
  566. uint8_t chain_num, uint8_t asic_num, uint8_t fan_pwm_data, uint8_t timeout_data,
  567. uint16_t frequency, uint8_t * voltage, uint8_t chain_check_time,
  568. uint8_t chip_address, uint8_t reg_address, uint8_t * reg_data)
  569. {
  570. uint16_t crc = 0;
  571. int datalen = 0;
  572. uint8_t version = 0;
  573. uint8_t * sendbuf = (uint8_t *)bm;
  574. if (unlikely(!bm)) {
  575. applog(LOG_WARNING, "bitmain_set_txconfig bitmain_txconfig_token is null");
  576. return -1;
  577. }
  578. if (unlikely(timeout_data <= 0 || asic_num <= 0 || chain_num <= 0)) {
  579. applog(LOG_WARNING, "bitmain_set_txconfig parameter invalid timeout_data(%d) asic_num(%d) chain_num(%d)",
  580. timeout_data, asic_num, chain_num);
  581. return -1;
  582. }
  583. datalen = sizeof(struct bitmain_txconfig_token);
  584. memset(bm, 0, datalen);
  585. bm->token_type = BITMAIN_TOKEN_TYPE_TXCONFIG;
  586. bm->version = version;
  587. bm->length = datalen-4;
  588. bm->length = htole16(bm->length);
  589. bm->reset = reset;
  590. bm->fan_eft = fan_eft;
  591. bm->timeout_eft = timeout_eft;
  592. bm->frequency_eft = frequency_eft;
  593. bm->voltage_eft = voltage_eft;
  594. bm->chain_check_time_eft = chain_check_time_eft;
  595. bm->chip_config_eft = chip_config_eft;
  596. bm->hw_error_eft = hw_error_eft;
  597. bm->beeper_ctrl = beeper_ctrl;
  598. bm->temp_over_ctrl = temp_over_ctrl;
  599. bm->fan_home_mode = fan_home_mode;
  600. sendbuf[4] = htole8(sendbuf[4]);
  601. sendbuf[5] = htole8(sendbuf[5]);
  602. bm->chain_num = chain_num;
  603. bm->asic_num = asic_num;
  604. bm->fan_pwm_data = fan_pwm_data;
  605. bm->timeout_data = timeout_data;
  606. bm->frequency = htole16(frequency);
  607. memcpy(bm->voltage, voltage, 2);
  608. bm->chain_check_time = chain_check_time;
  609. memcpy(bm->reg_data, reg_data, 4);
  610. bm->chip_address = chip_address;
  611. bm->reg_address = reg_address;
  612. crc = CRC16((uint8_t *)bm, datalen-2);
  613. bm->crc = htole16(crc);
  614. applog(LOG_ERR, "BTM TxConfigToken:v(%d) reset(%d) fan_e(%d) tout_e(%d) fq_e(%d) vt_e(%d) chainc_e(%d) chipc_e(%d) hw_e(%d) b_c(%d) t_c(%d) f_m(%d) mnum(%d) anum(%d) fanpwmdata(%d) toutdata(%d) freq(%d) volt(%02x%02x) chainctime(%d) regdata(%02x%02x%02x%02x) chipaddr(%02x) regaddr(%02x) crc(%04x)",
  615. version, reset, fan_eft, timeout_eft, frequency_eft, voltage_eft,
  616. chain_check_time_eft, chip_config_eft, hw_error_eft, beeper_ctrl, temp_over_ctrl,fan_home_mode,chain_num, asic_num,
  617. fan_pwm_data, timeout_data, frequency, voltage[0], voltage[1],
  618. chain_check_time, reg_data[0], reg_data[1], reg_data[2], reg_data[3], chip_address, reg_address, crc);
  619. return datalen;
  620. }
  621. static int bitmain_set_txtask(uint8_t * sendbuf,
  622. unsigned int * last_work_block, struct work **works, int work_array_size, int work_array, int sendworkcount, int * sendcount)
  623. {
  624. uint16_t crc = 0;
  625. uint32_t work_id = 0;
  626. uint8_t version = 0;
  627. int datalen = 0;
  628. int i = 0;
  629. int index = work_array;
  630. uint8_t new_block= 0;
  631. struct bitmain_txtask_token *bm = (struct bitmain_txtask_token *)sendbuf;
  632. *sendcount = 0;
  633. int cursendcount = 0;
  634. int diff = 0;
  635. unsigned int difftmp = 0;
  636. unsigned int pooldiff = 0;
  637. int netdiff = 0;
  638. if (unlikely(!bm)) {
  639. applog(LOG_WARNING, "bitmain_set_txtask bitmain_txtask_token is null");
  640. return -1;
  641. }
  642. if (unlikely(!works)) {
  643. applog(LOG_WARNING, "bitmain_set_txtask work is null");
  644. return -1;
  645. }
  646. memset(bm, 0, sizeof(struct bitmain_txtask_token));
  647. bm->token_type = BITMAIN_TOKEN_TYPE_TXTASK;
  648. bm->version = version;
  649. datalen = 10;
  650. applog(LOG_DEBUG, "BTM send work count %d -----", sendworkcount);
  651. for(i = 0; i < sendworkcount; i++) {
  652. if(index > work_array_size) {
  653. index = 0;
  654. }
  655. if(works[index]) {
  656. const unsigned int work_block = bfg_work_block(works[index]);
  657. if(work_block != *last_work_block) {
  658. applog(LOG_ERR, "BTM send task new block %d old(%d)", work_block, *last_work_block);
  659. new_block = 1;
  660. *last_work_block = work_block;
  661. }
  662. #ifdef BITMAIN_TEST
  663. if(!hex2bin(works[index]->data, btm_work_test_data[g_test_index], 128)) {
  664. applog(LOG_DEBUG, "BTM send task set test data error");
  665. }
  666. if(!hex2bin(works[index]->midstate, btm_work_test_midstate[g_test_index], 32)) {
  667. applog(LOG_DEBUG, "BTM send task set test midstate error");
  668. }
  669. g_test_index++;
  670. if(g_test_index >= BITMAIN_TEST_USENUM) {
  671. g_test_index = 0;
  672. }
  673. applog(LOG_DEBUG, "BTM test index = %d", g_test_index);
  674. #endif
  675. work_id = works[index]->id;
  676. bm->works[cursendcount].work_id = htole32(work_id);
  677. applog(LOG_DEBUG, "BTM send task work id:%d %d", bm->works[cursendcount].work_id, work_id);
  678. memcpy(bm->works[cursendcount].midstate, works[index]->midstate, 32);
  679. memcpy(bm->works[cursendcount].data2, works[index]->data + 64, 12);
  680. if(cursendcount == 0) {
  681. pooldiff = (unsigned int)(works[index]->sdiff);
  682. difftmp = pooldiff;
  683. while(1) {
  684. difftmp = difftmp >> 1;
  685. if(difftmp > 0) {
  686. diff++;
  687. if(diff >= 255) {
  688. break;
  689. }
  690. } else {
  691. break;
  692. }
  693. }
  694. struct work * const work = works[index];
  695. const struct pool * const pool = work->pool;
  696. const struct mining_goal_info * const goal = pool->goal;
  697. for (uint64_t netdifftmp = goal->current_diff; netdifftmp > 0; netdifftmp >>= 1) {
  698. ++netdiff;
  699. }
  700. }
  701. if(BITMAIN_TEST_PRINT_WORK) {
  702. char ob_hex[(76 * 2) + 1];
  703. bin2hex(ob_hex, works[index]->data, 76);
  704. applog(LOG_ERR, "work %d data: %s", works[index]->id, ob_hex);
  705. }
  706. cursendcount++;
  707. }
  708. index++;
  709. }
  710. if(cursendcount <= 0) {
  711. applog(LOG_ERR, "BTM send work count %d", cursendcount);
  712. return 0;
  713. }
  714. datalen += 48*cursendcount;
  715. bm->length = datalen-4;
  716. bm->length = htole16(bm->length);
  717. //len = datalen-3;
  718. //len = htole16(len);
  719. //memcpy(sendbuf+1, &len, 2);
  720. bm->new_block = new_block;
  721. bm->diff = diff;
  722. bm->net_diff = htole16(netdiff);
  723. sendbuf[4] = htole8(sendbuf[4]);
  724. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  725. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  726. *sendcount = cursendcount;
  727. crc = CRC16(sendbuf, datalen-2);
  728. crc = htole16(crc);
  729. memcpy(sendbuf+datalen-2, &crc, 2);
  730. applog(LOG_DEBUG, "BitMain TxTask Token: v(%d) new_block(%d) diff(%d pool:%d net:%d) work_num(%d) crc(%04x)",
  731. version, new_block, diff, pooldiff,netdiff, cursendcount, crc);
  732. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  733. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  734. return datalen;
  735. }
  736. static int bitmain_set_rxstatus(struct bitmain_rxstatus_token *bm,
  737. uint8_t chip_status_eft, uint8_t detect_get, uint8_t chip_address, uint8_t reg_address)
  738. {
  739. uint16_t crc = 0;
  740. uint8_t version = 0;
  741. int datalen = 0;
  742. uint8_t * sendbuf = (uint8_t *)bm;
  743. if (unlikely(!bm)) {
  744. applog(LOG_WARNING, "bitmain_set_rxstatus bitmain_rxstatus_token is null");
  745. return -1;
  746. }
  747. datalen = sizeof(struct bitmain_rxstatus_token);
  748. memset(bm, 0, datalen);
  749. bm->token_type = BITMAIN_TOKEN_TYPE_RXSTATUS;
  750. bm->version = version;
  751. bm->length = datalen-4;
  752. bm->length = htole16(bm->length);
  753. bm->chip_status_eft = chip_status_eft;
  754. bm->detect_get = detect_get;
  755. sendbuf[4] = htole8(sendbuf[4]);
  756. bm->chip_address = chip_address;
  757. bm->reg_address = reg_address;
  758. crc = CRC16((uint8_t *)bm, datalen-2);
  759. bm->crc = htole16(crc);
  760. applog(LOG_ERR, "BitMain RxStatus Token: v(%d) chip_status_eft(%d) detect_get(%d) chip_address(%02x) reg_address(%02x) crc(%04x)",
  761. version, chip_status_eft, detect_get, chip_address, reg_address, crc);
  762. return datalen;
  763. }
  764. static int bitmain_parse_rxstatus(const uint8_t * data, int datalen, struct bitmain_rxstatus_data *bm)
  765. {
  766. uint16_t crc = 0;
  767. uint8_t version = 0;
  768. int i = 0, j = 0;
  769. int asic_num = 0;
  770. int dataindex = 0;
  771. uint8_t tmp = 0x01;
  772. if (unlikely(!bm)) {
  773. applog(LOG_WARNING, "bitmain_parse_rxstatus bitmain_rxstatus_data is null");
  774. return -1;
  775. }
  776. if (unlikely(!data || datalen <= 0)) {
  777. applog(LOG_WARNING, "bitmain_parse_rxstatus parameter invalid data is null or datalen(%d) error", datalen);
  778. return -1;
  779. }
  780. memset(bm, 0, sizeof(struct bitmain_rxstatus_data));
  781. memcpy(bm, data, 28);
  782. if (bm->data_type != BITMAIN_DATA_TYPE_RXSTATUS) {
  783. applog(LOG_ERR, "bitmain_parse_rxstatus datatype(%02x) error", bm->data_type);
  784. return -1;
  785. }
  786. if (bm->version != version) {
  787. applog(LOG_ERR, "bitmain_parse_rxstatus version(%02x) error", bm->version);
  788. return -1;
  789. }
  790. bm->length = htole16(bm->length);
  791. if (bm->length+4 != datalen) {
  792. applog(LOG_ERR, "bitmain_parse_rxstatus length(%d) datalen(%d) error", bm->length, datalen);
  793. return -1;
  794. }
  795. crc = CRC16(data, datalen-2);
  796. memcpy(&(bm->crc), data+datalen-2, 2);
  797. bm->crc = htole16(bm->crc);
  798. if(crc != bm->crc) {
  799. applog(LOG_ERR, "bitmain_parse_rxstatus check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  800. return -1;
  801. }
  802. bm->fifo_space = htole16(bm->fifo_space);
  803. bm->fan_exist = htole16(bm->fan_exist);
  804. bm->temp_exist = htole32(bm->temp_exist);
  805. bm->nonce_error = htole32(bm->nonce_error);
  806. if(bm->chain_num > BITMAIN_MAX_CHAIN_NUM) {
  807. applog(LOG_ERR, "bitmain_parse_rxstatus chain_num=%d error", bm->chain_num);
  808. return -1;
  809. }
  810. dataindex = 28;
  811. if(bm->chain_num > 0) {
  812. memcpy(bm->chain_asic_num, data+datalen-2-bm->chain_num-bm->temp_num-bm->fan_num, bm->chain_num);
  813. }
  814. for(i = 0; i < bm->chain_num; i++) {
  815. asic_num = bm->chain_asic_num[i];
  816. if(asic_num <= 0) {
  817. asic_num = 1;
  818. } else {
  819. if(asic_num % 32 == 0) {
  820. asic_num = asic_num / 32;
  821. } else {
  822. asic_num = asic_num / 32 + 1;
  823. }
  824. }
  825. memcpy((uint8_t *)bm->chain_asic_exist+i*32, data+dataindex, asic_num*4);
  826. dataindex += asic_num*4;
  827. }
  828. for(i = 0; i < bm->chain_num; i++) {
  829. asic_num = bm->chain_asic_num[i];
  830. if(asic_num <= 0) {
  831. asic_num = 1;
  832. } else {
  833. if(asic_num % 32 == 0) {
  834. asic_num = asic_num / 32;
  835. } else {
  836. asic_num = asic_num / 32 + 1;
  837. }
  838. }
  839. memcpy((uint8_t *)bm->chain_asic_status+i*32, data+dataindex, asic_num*4);
  840. dataindex += asic_num*4;
  841. }
  842. dataindex += bm->chain_num;
  843. if(dataindex + bm->temp_num + bm->fan_num + 2 != datalen) {
  844. applog(LOG_ERR, "bitmain_parse_rxstatus dataindex(%d) chain_num(%d) temp_num(%d) fan_num(%d) not match datalen(%d)",
  845. dataindex, bm->chain_num, bm->temp_num, bm->fan_num, datalen);
  846. return -1;
  847. }
  848. for(i = 0; i < bm->chain_num; i++) {
  849. //bm->chain_asic_status[i] = swab32(bm->chain_asic_status[i]);
  850. for(j = 0; j < 8; j++) {
  851. bm->chain_asic_exist[i*8+j] = htole32(bm->chain_asic_exist[i*8+j]);
  852. bm->chain_asic_status[i*8+j] = htole32(bm->chain_asic_status[i*8+j]);
  853. }
  854. }
  855. if(bm->temp_num > 0) {
  856. memcpy(bm->temp, data+dataindex, bm->temp_num);
  857. dataindex += bm->temp_num;
  858. }
  859. if(bm->fan_num > 0) {
  860. memcpy(bm->fan, data+dataindex, bm->fan_num);
  861. dataindex += bm->fan_num;
  862. }
  863. if(!opt_bitmain_checkall){
  864. if(tmp != htole8(tmp)){
  865. applog(LOG_ERR, "BitMain RxStatus byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  866. memcpy(&tmp,data+4,1);
  867. bm->chip_value_eft = tmp >>7;
  868. bm->get_blk_num = tmp >> 4;
  869. bm->reserved1 = ((tmp << 4) & 0xff) >> 5;
  870. }
  871. found_blocks = bm->get_blk_num;
  872. applog(LOG_ERR, "BitMain RxStatus tmp :0x%02x byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",tmp,*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  873. }
  874. applog(LOG_DEBUG, "BitMain RxStatusData: chipv_e(%d) chainnum(%d) fifos(%d) v1(%d) v2(%d) v3(%d) v4(%d) fann(%d) tempn(%d) fanet(%04x) tempet(%08x) ne(%d) regvalue(%d) crc(%04x)",
  875. bm->chip_value_eft, bm->chain_num, bm->fifo_space, bm->hw_version[0], bm->hw_version[1], bm->hw_version[2], bm->hw_version[3], bm->fan_num, bm->temp_num, bm->fan_exist, bm->temp_exist, bm->nonce_error, bm->reg_value, bm->crc);
  876. applog(LOG_DEBUG, "BitMain RxStatus Data chain info:");
  877. for(i = 0; i < bm->chain_num; i++) {
  878. applog(LOG_DEBUG, "BitMain RxStatus Data chain(%d) asic num=%d asic_exist=%08x asic_status=%08x", i+1, bm->chain_asic_num[i], bm->chain_asic_exist[i*8], bm->chain_asic_status[i*8]);
  879. }
  880. applog(LOG_DEBUG, "BitMain RxStatus Data temp info:");
  881. for(i = 0; i < bm->temp_num; i++) {
  882. applog(LOG_DEBUG, "BitMain RxStatus Data temp(%d) temp=%d", i+1, bm->temp[i]);
  883. }
  884. applog(LOG_DEBUG, "BitMain RxStatus Data fan info:");
  885. for(i = 0; i < bm->fan_num; i++) {
  886. applog(LOG_DEBUG, "BitMain RxStatus Data fan(%d) fan=%d", i+1, bm->fan[i]);
  887. }
  888. return 0;
  889. }
  890. static int bitmain_parse_rxnonce(const uint8_t * data, int datalen, struct bitmain_rxnonce_data *bm, int * nonce_num)
  891. {
  892. int i = 0;
  893. uint16_t crc = 0;
  894. uint8_t version = 0;
  895. int curnoncenum = 0;
  896. if (unlikely(!bm)) {
  897. applog(LOG_ERR, "bitmain_parse_rxnonce bitmain_rxstatus_data null");
  898. return -1;
  899. }
  900. if (unlikely(!data || datalen <= 0)) {
  901. applog(LOG_ERR, "bitmain_parse_rxnonce data null or datalen(%d) error", datalen);
  902. return -1;
  903. }
  904. memcpy(bm, data, sizeof(struct bitmain_rxnonce_data));
  905. if (bm->data_type != BITMAIN_DATA_TYPE_RXNONCE) {
  906. applog(LOG_ERR, "bitmain_parse_rxnonce datatype(%02x) error", bm->data_type);
  907. return -1;
  908. }
  909. if (bm->version != version) {
  910. applog(LOG_ERR, "bitmain_parse_rxnonce version(%02x) error", bm->version);
  911. return -1;
  912. }
  913. bm->length = htole16(bm->length);
  914. if (bm->length+4 != datalen) {
  915. applog(LOG_ERR, "bitmain_parse_rxnonce length(%d) error", bm->length);
  916. return -1;
  917. }
  918. crc = CRC16(data, datalen-2);
  919. memcpy(&(bm->crc), data+datalen-2, 2);
  920. bm->crc = htole16(bm->crc);
  921. if(crc != bm->crc) {
  922. applog(LOG_ERR, "bitmain_parse_rxnonce check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  923. return -1;
  924. }
  925. bm->fifo_space = htole16(bm->fifo_space);
  926. bm->diff = htole16(bm->diff);
  927. bm->total_nonce_num = htole64(bm->total_nonce_num);
  928. curnoncenum = (datalen-14)/8;
  929. applog(LOG_DEBUG, "BitMain RxNonce Data: nonce_num(%d) fifo_space(%d) diff(%d) tnn(%lld)", curnoncenum, bm->fifo_space, bm->diff, bm->total_nonce_num);
  930. for(i = 0; i < curnoncenum; i++) {
  931. bm->nonces[i].work_id = htole32(bm->nonces[i].work_id);
  932. bm->nonces[i].nonce = htole32(bm->nonces[i].nonce);
  933. applog(LOG_DEBUG, "BitMain RxNonce Data %d: work_id(%d) nonce(%08x)(%d)",
  934. i, bm->nonces[i].work_id, bm->nonces[i].nonce, bm->nonces[i].nonce);
  935. }
  936. *nonce_num = curnoncenum;
  937. return 0;
  938. }
  939. static int bitmain_read(struct cgpu_info *bitmain, unsigned char *buf,
  940. size_t bufsize, int timeout, int ep)
  941. {
  942. int err = 0, readlen = 0;
  943. size_t total = 0;
  944. if(bitmain == NULL || buf == NULL || bufsize <= 0) {
  945. applog(LOG_WARNING, "bitmain_read parameter error bufsize(%d)", bufsize);
  946. return -1;
  947. }
  948. if(opt_bitmain_dev_usb) {
  949. #ifdef WIN32
  950. char readbuf[BITMAIN_READBUF_SIZE];
  951. int ofs = 2, cp = 0;
  952. err = usb_read_once_timeout(bitmain, readbuf, bufsize, &readlen, timeout, ep);
  953. applog(LOG_DEBUG, "%s%i: Get bitmain read got readlen %d err %d",
  954. bitmain->drv->name, bitmain->device_id, readlen, err);
  955. if (readlen < 2)
  956. goto out;
  957. while (readlen > 2) {
  958. cp = readlen - 2;
  959. if (cp > 62)
  960. cp = 62;
  961. memcpy(&buf[total], &readbuf[ofs], cp);
  962. total += cp;
  963. readlen -= cp + 2;
  964. ofs += 64;
  965. }
  966. #else
  967. err = usb_read_once_timeout(bitmain, buf, bufsize, &readlen, timeout, ep);
  968. applog(LOG_DEBUG, "%s%i: Get bitmain read got readlen %d err %d",
  969. bitmain->drv->name, bitmain->device_id, readlen, err);
  970. total = readlen;
  971. #endif
  972. } else {
  973. err = btm_read(bitmain, buf, bufsize);
  974. total = err;
  975. }
  976. out:
  977. return total;
  978. }
  979. static int bitmain_write(struct cgpu_info *bitmain, char *buf, ssize_t len, int ep)
  980. {
  981. int err, amount;
  982. if(opt_bitmain_dev_usb) {
  983. err = usb_write(bitmain, buf, len, &amount, ep);
  984. applog(LOG_DEBUG, "%s%i: usb_write got err %d", bitmain->drv->name,
  985. bitmain->device_id, err);
  986. if (unlikely(err != 0)) {
  987. applog(LOG_ERR, "usb_write error on bitmain_write err=%d", err);
  988. return BTM_SEND_ERROR;
  989. }
  990. if (amount != len) {
  991. applog(LOG_ERR, "usb_write length mismatch on bitmain_write amount=%d len=%d", amount, len);
  992. return BTM_SEND_ERROR;
  993. }
  994. } else {
  995. int havelen = 0;
  996. while(havelen < len) {
  997. err = btm_write(bitmain, buf+havelen, len-havelen);
  998. if(err < 0) {
  999. applog(LOG_DEBUG, "%s%i: btm_write got err %d", bitmain->drv->name,
  1000. bitmain->device_id, err);
  1001. applog(LOG_WARNING, "usb_write error on bitmain_write");
  1002. return BTM_SEND_ERROR;
  1003. } else {
  1004. havelen += err;
  1005. }
  1006. }
  1007. }
  1008. return BTM_SEND_OK;
  1009. }
  1010. static int bitmain_send_data(const uint8_t * data, int datalen, struct cgpu_info *bitmain)
  1011. {
  1012. int delay, ret, ep = C_BITMAIN_SEND;
  1013. struct bitmain_info *info = NULL;
  1014. cgtimer_t ts_start;
  1015. if(datalen <= 0) {
  1016. return 0;
  1017. }
  1018. if(data[0] == BITMAIN_TOKEN_TYPE_TXCONFIG) {
  1019. ep = C_BITMAIN_TOKEN_TXCONFIG;
  1020. } else if(data[0] == BITMAIN_TOKEN_TYPE_TXTASK) {
  1021. ep = C_BITMAIN_TOKEN_TXTASK;
  1022. } else if(data[0] == BITMAIN_TOKEN_TYPE_RXSTATUS) {
  1023. ep = C_BITMAIN_TOKEN_RXSTATUS;
  1024. }
  1025. info = bitmain->device_data;
  1026. //delay = datalen * 10 * 1000000;
  1027. //delay = delay / info->baud;
  1028. //delay += 4000;
  1029. if(opt_debug) {
  1030. char hex[(datalen * 2) + 1];
  1031. bin2hex(hex, data, datalen);
  1032. applog(LOG_DEBUG, "BitMain: Sent(%d): %s", datalen, hex);
  1033. }
  1034. //cgsleep_prepare_r(&ts_start);
  1035. //applog(LOG_DEBUG, "----bitmain_send_data start");
  1036. ret = bitmain_write(bitmain, (char *)data, datalen, ep);
  1037. applog(LOG_DEBUG, "----bitmain_send_data stop ret=%d datalen=%d", ret, datalen);
  1038. //cgsleep_us_r(&ts_start, delay);
  1039. //applog(LOG_DEBUG, "BitMain: Sent: Buffer delay: %dus", delay);
  1040. return ret;
  1041. }
  1042. static bool bitmain_decode_nonce(struct thr_info *thr, struct cgpu_info *bitmain,
  1043. struct bitmain_info *info, uint32_t nonce, struct work *work)
  1044. {
  1045. info = bitmain->device_data;
  1046. //info->matching_work[work->subid]++;
  1047. if(opt_bitmain_hwerror) {
  1048. applog(LOG_DEBUG, "BitMain: submit direct nonce = %08x", nonce);
  1049. if(opt_bitmain_checkall) {
  1050. applog(LOG_DEBUG, "BitMain check all");
  1051. return submit_nonce(thr, work, nonce);
  1052. } else {
  1053. if(opt_bitmain_checkn2diff) {
  1054. int diff = 0;
  1055. diff = work->sdiff;
  1056. if(diff&&(diff&(diff-1))) {
  1057. applog(LOG_DEBUG, "BitMain %d not diff 2 submit_nonce", diff);
  1058. return submit_nonce(thr, work, nonce);
  1059. } else {
  1060. applog(LOG_DEBUG, "BitMain %d diff 2 submit_nonce_direct", diff);
  1061. return submit_nonce_direct(thr, work, nonce);
  1062. }
  1063. } else {
  1064. return submit_nonce_direct(thr, work, nonce);
  1065. }
  1066. }
  1067. } else {
  1068. applog(LOG_DEBUG, "BitMain: submit nonce = %08x", nonce);
  1069. return submit_nonce(thr, work, nonce);
  1070. }
  1071. }
  1072. static void bitmain_inc_nvw(struct bitmain_info *info, struct thr_info *thr)
  1073. {
  1074. applog(LOG_INFO, "%s%d: No matching work - HW error",
  1075. thr->cgpu->drv->name, thr->cgpu->device_id);
  1076. inc_hw_errors(thr);
  1077. info->no_matching_work++;
  1078. }
  1079. static inline void record_temp_fan(struct bitmain_info *info, struct bitmain_rxstatus_data *bm, double *temp_avg)
  1080. {
  1081. int i = 0;
  1082. int maxfan = 0, maxtemp = 0;
  1083. *temp_avg = 0;
  1084. info->fan_num = bm->fan_num;
  1085. for(i = 0; i < bm->fan_num; i++) {
  1086. info->fan[i] = bm->fan[i] * BITMAIN_FAN_FACTOR;
  1087. if(info->fan[i] > maxfan)
  1088. maxfan = info->fan[i];
  1089. }
  1090. info->temp_num = bm->temp_num;
  1091. for(i = 0; i < bm->temp_num; i++) {
  1092. info->temp[i] = bm->temp[i];
  1093. /*
  1094. if(bm->temp[i] & 0x80) {
  1095. bm->temp[i] &= 0x7f;
  1096. info->temp[i] = 0 - ((~bm->temp[i] & 0x7f) + 1);
  1097. }*/
  1098. *temp_avg += info->temp[i];
  1099. if(info->temp[i] > info->temp_max) {
  1100. info->temp_max = info->temp[i];
  1101. }
  1102. if(info->temp[i] > maxtemp)
  1103. maxtemp = info->temp[i];
  1104. }
  1105. if(bm->temp_num > 0) {
  1106. *temp_avg = *temp_avg / bm->temp_num;
  1107. info->temp_avg = *temp_avg;
  1108. }
  1109. inc_dev_status(maxfan, maxtemp);
  1110. }
  1111. static void bitmain_update_temps(struct cgpu_info *bitmain, struct bitmain_info *info,
  1112. struct bitmain_rxstatus_data *bm)
  1113. {
  1114. char tmp[64] = {0};
  1115. char msg[10240] = {0};
  1116. int i = 0;
  1117. record_temp_fan(info, bm, &(bitmain->temp));
  1118. strcpy(msg, "BitMain: ");
  1119. for(i = 0; i < bm->fan_num; i++) {
  1120. if(i != 0) {
  1121. strcat(msg, ", ");
  1122. }
  1123. sprintf(tmp, "Fan%d: %d/m", i+1, info->fan[i]);
  1124. strcat(msg, tmp);
  1125. }
  1126. strcat(msg, "\t");
  1127. for(i = 0; i < bm->temp_num; i++) {
  1128. if(i != 0) {
  1129. strcat(msg, ", ");
  1130. }
  1131. sprintf(tmp, "Temp%d: %dC", i+1, info->temp[i]);
  1132. strcat(msg, tmp);
  1133. }
  1134. sprintf(tmp, ", TempMAX: %dC", info->temp_max);
  1135. strcat(msg, tmp);
  1136. applog(LOG_INFO, msg);
  1137. info->temp_history_index++;
  1138. info->temp_sum += bitmain->temp;
  1139. applog(LOG_DEBUG, "BitMain: temp_index: %d, temp_count: %d, temp_old: %d",
  1140. info->temp_history_index, info->temp_history_count, info->temp_old);
  1141. if (info->temp_history_index == info->temp_history_count) {
  1142. info->temp_history_index = 0;
  1143. info->temp_sum = 0;
  1144. }
  1145. if (unlikely(info->temp_old >= opt_bitmain_overheat)) {
  1146. applog(LOG_WARNING, "BTM%d overheat! Idling", bitmain->device_id);
  1147. info->overheat = true;
  1148. } else if (info->overheat && info->temp_old <= opt_bitmain_temp) {
  1149. applog(LOG_WARNING, "BTM%d cooled, restarting", bitmain->device_id);
  1150. info->overheat = false;
  1151. }
  1152. }
  1153. extern void cg_logwork_uint32(struct work *work, uint32_t nonce, bool ok);
  1154. static void bitmain_parse_results(struct cgpu_info *bitmain, struct bitmain_info *info,
  1155. struct thr_info *thr, uint8_t *buf, int *offset)
  1156. {
  1157. int i, j, n, m, r, errordiff, spare = BITMAIN_READ_SIZE;
  1158. uint32_t checkbit = 0x00000000;
  1159. bool found = false;
  1160. struct work *work = NULL;
  1161. struct bitmain_packet_head packethead;
  1162. int asicnum = 0;
  1163. int idiff = 0;
  1164. int mod = 0,tmp = 0;
  1165. for (i = 0; i <= spare; i++) {
  1166. if(buf[i] == 0xa1) {
  1167. struct bitmain_rxstatus_data rxstatusdata;
  1168. applog(LOG_DEBUG, "bitmain_parse_results RxStatus Data");
  1169. if(*offset < 4) {
  1170. return;
  1171. }
  1172. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  1173. packethead.length = htole16(packethead.length);
  1174. if(packethead.length > 1130) {
  1175. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus datalen=%d error", packethead.length+4);
  1176. continue;
  1177. }
  1178. if(*offset < packethead.length + 4) {
  1179. return;
  1180. }
  1181. if(bitmain_parse_rxstatus(buf+i, packethead.length+4, &rxstatusdata) != 0) {
  1182. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus error len=%d", packethead.length+4);
  1183. } else {
  1184. mutex_lock(&info->qlock);
  1185. info->chain_num = rxstatusdata.chain_num;
  1186. info->fifo_space = rxstatusdata.fifo_space;
  1187. info->hw_version[0] = rxstatusdata.hw_version[0];
  1188. info->hw_version[1] = rxstatusdata.hw_version[1];
  1189. info->hw_version[2] = rxstatusdata.hw_version[2];
  1190. info->hw_version[3] = rxstatusdata.hw_version[3];
  1191. info->nonce_error = rxstatusdata.nonce_error;
  1192. errordiff = info->nonce_error-info->last_nonce_error;
  1193. //sprintf(g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  1194. applog(LOG_ERR, "bitmain_parse_results v=%d chain=%d fifo=%d hwv1=%d hwv2=%d hwv3=%d hwv4=%d nerr=%d-%d freq=%d chain info:",
  1195. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  1196. info->last_nonce_error, info->nonce_error, info->frequency);
  1197. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  1198. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  1199. for(n = 0; n < rxstatusdata.chain_num; n++) {
  1200. info->chain_asic_num[n] = rxstatusdata.chain_asic_num[n];
  1201. memset(info->chain_asic_status_t[n], 0, 320);
  1202. j = 0;
  1203. mod = 0;
  1204. if(info->chain_asic_num[n] <= 0) {
  1205. asicnum = 0;
  1206. } else {
  1207. mod = info->chain_asic_num[n] % 32;
  1208. if(mod == 0) {
  1209. asicnum = info->chain_asic_num[n] / 32;
  1210. } else {
  1211. asicnum = info->chain_asic_num[n] / 32 + 1;
  1212. }
  1213. }
  1214. if(asicnum > 0) {
  1215. for(m = asicnum-1; m >= 0; m--) {
  1216. tmp = mod ? (32-mod): 0;
  1217. for(r = tmp;r < 32;r++){
  1218. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  1219. info->chain_asic_status_t[n][j] = ' ';
  1220. j++;
  1221. }
  1222. checkbit = num2bit(r);
  1223. if(rxstatusdata.chain_asic_exist[n*8+m] & checkbit) {
  1224. if(rxstatusdata.chain_asic_status[n*8+m] & checkbit) {
  1225. info->chain_asic_status_t[n][j] = 'o';
  1226. } else {
  1227. info->chain_asic_status_t[n][j] = 'x';
  1228. }
  1229. } else {
  1230. info->chain_asic_status_t[n][j] = '-';
  1231. }
  1232. j++;
  1233. }
  1234. info->chain_asic_status_t[n][j] = ' ';
  1235. j++;
  1236. mod = 0;
  1237. }
  1238. }
  1239. applog(LOG_DEBUG, "bitmain_parse_results chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  1240. n, info->chain_asic_num[n],
  1241. info->chain_asic_exist[n*8+0], info->chain_asic_exist[n*8+1], info->chain_asic_exist[n*8+2], info->chain_asic_exist[n*8+3], info->chain_asic_exist[n*8+4], info->chain_asic_exist[n*8+5], info->chain_asic_exist[n*8+6], info->chain_asic_exist[n*8+7],
  1242. info->chain_asic_status[n*8+0], info->chain_asic_status[n*8+1], info->chain_asic_status[n*8+2], info->chain_asic_status[n*8+3], info->chain_asic_status[n*8+4], info->chain_asic_status[n*8+5], info->chain_asic_status[n*8+6], info->chain_asic_status[n*8+7]);
  1243. applog(LOG_ERR, "bitmain_parse_results chain(%d) asic_num=%d asic_status=%s", n, info->chain_asic_num[n], info->chain_asic_status_t[n]);
  1244. }
  1245. mutex_unlock(&info->qlock);
  1246. if(errordiff > 0) {
  1247. for(j = 0; j < errordiff; j++) {
  1248. bitmain_inc_nvw(info, thr);
  1249. }
  1250. mutex_lock(&info->qlock);
  1251. info->last_nonce_error += errordiff;
  1252. mutex_unlock(&info->qlock);
  1253. }
  1254. bitmain_update_temps(bitmain, info, &rxstatusdata);
  1255. }
  1256. found = true;
  1257. spare = packethead.length + 4 + i;
  1258. if(spare > *offset) {
  1259. applog(LOG_ERR, "bitmain_parse_rxresults space(%d) > offset(%d)", spare, *offset);
  1260. spare = *offset;
  1261. }
  1262. break;
  1263. } else if(buf[i] == 0xa2) {
  1264. struct bitmain_rxnonce_data rxnoncedata;
  1265. int nonce_num = 0;
  1266. applog(LOG_DEBUG, "bitmain_parse_results RxNonce Data");
  1267. if(*offset < 4) {
  1268. return;
  1269. }
  1270. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  1271. packethead.length = htole16(packethead.length);
  1272. if(packethead.length > 1030) {
  1273. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce datalen=%d error", packethead.length+4);
  1274. continue;
  1275. }
  1276. if(*offset < packethead.length + 4) {
  1277. return;
  1278. }
  1279. if(bitmain_parse_rxnonce(buf+i, packethead.length+4, &rxnoncedata, &nonce_num) != 0) {
  1280. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce error len=%d", packethead.length+4);
  1281. } else {
  1282. struct pool * pool = NULL;
  1283. for(j = 0; j < nonce_num; j++) {
  1284. work = clone_queued_work_byid(bitmain, rxnoncedata.nonces[j].work_id);
  1285. if(work) {
  1286. pool = work->pool;
  1287. if(BITMAIN_TEST_PRINT_WORK) {
  1288. applog(LOG_ERR, "bitmain_parse_results nonce find work(%d-%d)(%08x)", work->id, rxnoncedata.nonces[j].work_id, rxnoncedata.nonces[j].nonce);
  1289. char ob_hex[(32 * 2) + 1];
  1290. bin2hex(ob_hex, work->midstate, 32);
  1291. applog(LOG_ERR, "work %d midstate: %s", work->id, ob_hex);
  1292. bin2hex(ob_hex, &work->data[64], 12);
  1293. applog(LOG_ERR, "work %d data2: %s", work->id, ob_hex);
  1294. }
  1295. if(bfg_work_block(work) != info->last_work_block) {
  1296. applog(LOG_ERR, "BitMain: bitmain_parse_rxnonce work(%d) nonce stale", rxnoncedata.nonces[j].work_id);
  1297. } else {
  1298. if (bitmain_decode_nonce(thr, bitmain, info, rxnoncedata.nonces[j].nonce, work)) {
  1299. cg_logwork_uint32(work, rxnoncedata.nonces[j].nonce, true);
  1300. if(opt_bitmain_hwerror) {
  1301. #ifndef BITMAIN_CALC_DIFF1
  1302. mutex_lock(&info->qlock);
  1303. idiff = (int)work->sdiff;
  1304. info->nonces+=idiff;
  1305. info->auto_nonces+=idiff;
  1306. mutex_unlock(&info->qlock);
  1307. inc_work_status(thr, pool, idiff);
  1308. #endif
  1309. } else {
  1310. mutex_lock(&info->qlock);
  1311. info->nonces++;
  1312. info->auto_nonces++;
  1313. mutex_unlock(&info->qlock);
  1314. }
  1315. } else {
  1316. //bitmain_inc_nvw(info, thr);
  1317. applog(LOG_ERR, "BitMain: bitmain_decode_nonce error work(%d)", rxnoncedata.nonces[j].work_id);
  1318. }
  1319. }
  1320. free_work(work);
  1321. } else {
  1322. //bitmain_inc_nvw(info, thr);
  1323. applog(LOG_ERR, "BitMain: Nonce not find work(%d)", rxnoncedata.nonces[j].work_id);
  1324. }
  1325. }
  1326. #ifdef BITMAIN_CALC_DIFF1
  1327. if(opt_bitmain_hwerror) {
  1328. int difftmp = 0;
  1329. difftmp = rxnoncedata.diff;
  1330. idiff = 1;
  1331. while(difftmp > 0) {
  1332. difftmp--;
  1333. idiff = idiff << 1;
  1334. }
  1335. mutex_lock(&info->qlock);
  1336. difftmp = idiff*(rxnoncedata.total_nonce_num-info->total_nonce_num);
  1337. if(difftmp < 0)
  1338. difftmp = 0;
  1339. info->nonces = info->nonces+difftmp;
  1340. info->auto_nonces = info->auto_nonces+difftmp;
  1341. info->total_nonce_num = rxnoncedata.total_nonce_num;
  1342. info->fifo_space = rxnoncedata.fifo_space;
  1343. mutex_unlock(&info->qlock);
  1344. inc_work_stats(thr, pool, difftmp);
  1345. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d diff=%d rxtnn=%lld tnn=%lld", info->fifo_space, idiff, rxnoncedata.total_nonce_num, info->total_nonce_num);
  1346. } else {
  1347. mutex_lock(&info->qlock);
  1348. info->fifo_space = rxnoncedata.fifo_space;
  1349. mutex_unlock(&info->qlock);
  1350. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  1351. }
  1352. #else
  1353. mutex_lock(&info->qlock);
  1354. info->fifo_space = rxnoncedata.fifo_space;
  1355. mutex_unlock(&info->qlock);
  1356. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  1357. #endif
  1358. #ifndef WIN32
  1359. if(nonce_num < BITMAIN_MAX_NONCE_NUM)
  1360. cgsleep_ms(5);
  1361. #endif
  1362. }
  1363. found = true;
  1364. spare = packethead.length + 4 + i;
  1365. if(spare > *offset) {
  1366. applog(LOG_ERR, "bitmain_parse_rxnonce space(%d) > offset(%d)", spare, *offset);
  1367. spare = *offset;
  1368. }
  1369. break;
  1370. } else {
  1371. applog(LOG_ERR, "bitmain_parse_results data type error=%02x", buf[i]);
  1372. }
  1373. }
  1374. if (!found) {
  1375. spare = *offset - BITMAIN_READ_SIZE;
  1376. /* We are buffering and haven't accumulated one more corrupt
  1377. * work result. */
  1378. if (spare < (int)BITMAIN_READ_SIZE)
  1379. return;
  1380. bitmain_inc_nvw(info, thr);
  1381. }
  1382. *offset -= spare;
  1383. memmove(buf, buf + spare, *offset);
  1384. }
  1385. static void bitmain_running_reset(struct cgpu_info *bitmain, struct bitmain_info *info)
  1386. {
  1387. bitmain->results = 0;
  1388. info->reset = false;
  1389. }
  1390. static void *bitmain_get_results(void *userdata)
  1391. {
  1392. struct cgpu_info *bitmain = (struct cgpu_info *)userdata;
  1393. struct bitmain_info *info = bitmain->device_data;
  1394. int offset = 0, ret = 0;
  1395. const int rsize = BITMAIN_FTDI_READSIZE;
  1396. char readbuf[BITMAIN_READBUF_SIZE];
  1397. struct thr_info *thr = info->thr;
  1398. char threadname[24];
  1399. int errorcount = 0;
  1400. snprintf(threadname, 24, "btm_recv/%d", bitmain->device_id);
  1401. RenameThread(threadname);
  1402. while (likely(!bitmain->shutdown)) {
  1403. unsigned char buf[rsize];
  1404. //applog(LOG_DEBUG, "+++++++bitmain_get_results offset=%d", offset);
  1405. if (offset >= (int)BITMAIN_READ_SIZE) {
  1406. //applog(LOG_DEBUG, "======start bitmain_get_results ");
  1407. bitmain_parse_results(bitmain, info, thr, readbuf, &offset);
  1408. //applog(LOG_DEBUG, "======stop bitmain_get_results ");
  1409. }
  1410. if (unlikely(offset + rsize >= BITMAIN_READBUF_SIZE)) {
  1411. /* This should never happen */
  1412. applog(LOG_DEBUG, "BitMain readbuf overflow, resetting buffer");
  1413. offset = 0;
  1414. }
  1415. if (unlikely(info->reset)) {
  1416. bitmain_running_reset(bitmain, info);
  1417. /* Discard anything in the buffer */
  1418. offset = 0;
  1419. }
  1420. /* As the usb read returns after just 1ms, sleep long enough
  1421. * to leave the interface idle for writes to occur, but do not
  1422. * sleep if we have been receiving data as more may be coming. */
  1423. //if (offset == 0) {
  1424. // cgsleep_ms_r(&ts_start, BITMAIN_READ_TIMEOUT);
  1425. //}
  1426. //cgsleep_prepare_r(&ts_start);
  1427. //applog(LOG_DEBUG, "======start bitmain_get_results bitmain_read");
  1428. ret = bitmain_read(bitmain, buf, rsize, BITMAIN_READ_TIMEOUT, C_BITMAIN_READ);
  1429. //applog(LOG_DEBUG, "======stop bitmain_get_results bitmain_read=%d", ret);
  1430. if ((ret < 1) || (ret == 18)) {
  1431. errorcount++;
  1432. #ifdef WIN32
  1433. if(errorcount > 200) {
  1434. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1435. cgsleep_ms(20);
  1436. errorcount = 0;
  1437. }
  1438. #else
  1439. if(errorcount > 3) {
  1440. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1441. cgsleep_ms(20);
  1442. errorcount = 0;
  1443. }
  1444. #endif
  1445. if(ret < 1)
  1446. continue;
  1447. }
  1448. if (opt_debug) {
  1449. char hex[(ret * 2) + 1];
  1450. bin2hex(hex, buf, ret);
  1451. applog(LOG_DEBUG, "BitMain: get: %s", hex);
  1452. }
  1453. memcpy(readbuf+offset, buf, ret);
  1454. offset += ret;
  1455. }
  1456. return NULL;
  1457. }
  1458. static void bitmain_set_timeout(struct bitmain_info *info)
  1459. {
  1460. info->timeout = BITMAIN_TIMEOUT_FACTOR / info->frequency;
  1461. }
  1462. static void bitmain_init(struct cgpu_info *bitmain)
  1463. {
  1464. applog(LOG_INFO, "BitMain: Opened on %s", bitmain->device_path);
  1465. }
  1466. static bool bitmain_prepare(struct thr_info *thr)
  1467. {
  1468. struct cgpu_info *bitmain = thr->cgpu;
  1469. struct bitmain_info *info = bitmain->device_data;
  1470. free(bitmain->works);
  1471. bitmain->works = calloc(BITMAIN_MAX_WORK_NUM * sizeof(struct work *),
  1472. BITMAIN_ARRAY_SIZE);
  1473. if (!bitmain->works)
  1474. quit(1, "Failed to calloc bitmain works in bitmain_prepare");
  1475. info->thr = thr;
  1476. mutex_init(&info->lock);
  1477. mutex_init(&info->qlock);
  1478. if (unlikely(pthread_cond_init(&info->qcond, NULL)))
  1479. quit(1, "Failed to pthread_cond_init bitmain qcond");
  1480. if (pthread_create(&info->read_thr, NULL, bitmain_get_results, (void *)bitmain))
  1481. quit(1, "Failed to create bitmain read_thr");
  1482. bitmain_init(bitmain);
  1483. return true;
  1484. }
  1485. static int bitmain_initialize(struct cgpu_info *bitmain)
  1486. {
  1487. uint8_t data[BITMAIN_READBUF_SIZE];
  1488. struct bitmain_info *info = NULL;
  1489. int ret = 0;
  1490. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1491. int readlen = 0;
  1492. int sendlen = 0;
  1493. int trycount = 3;
  1494. struct timespec p;
  1495. struct bitmain_rxstatus_data rxstatusdata;
  1496. int i = 0, j = 0, m = 0, r = 0, statusok = 0;
  1497. uint32_t checkbit = 0x00000000;
  1498. int hwerror_eft = 0;
  1499. int beeper_ctrl = 1;
  1500. int tempover_ctrl = 1;
  1501. int home_mode = 0;
  1502. struct bitmain_packet_head packethead;
  1503. int asicnum = 0;
  1504. int mod = 0,tmp = 0;
  1505. /* Send reset, then check for result */
  1506. if(!bitmain) {
  1507. applog(LOG_WARNING, "bitmain_initialize cgpu_info is null");
  1508. return -1;
  1509. }
  1510. info = bitmain->device_data;
  1511. /* clear read buf */
  1512. ret = bitmain_read(bitmain, data, BITMAIN_READBUF_SIZE,
  1513. BITMAIN_RESET_TIMEOUT, C_BITMAIN_READ);
  1514. if(ret > 0) {
  1515. if (opt_debug) {
  1516. char hex[(ret * 2) + 1];
  1517. bin2hex(hex, data, ret);
  1518. applog(LOG_DEBUG, "BTM%d Clear Read(%d): %s", bitmain->device_id, ret, hex);
  1519. }
  1520. }
  1521. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *)sendbuf, 0, 1, 0, 0);
  1522. if(sendlen <= 0) {
  1523. applog(LOG_ERR, "bitmain_initialize bitmain_set_rxstatus error(%d)", sendlen);
  1524. return -1;
  1525. }
  1526. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1527. if (unlikely(ret == BTM_SEND_ERROR)) {
  1528. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1529. return -1;
  1530. }
  1531. while(trycount >= 0) {
  1532. ret = bitmain_read(bitmain, data+readlen, BITMAIN_READBUF_SIZE, BITMAIN_RESET_TIMEOUT, C_BITMAIN_DATA_RXSTATUS);
  1533. if(ret > 0) {
  1534. readlen += ret;
  1535. if(readlen > BITMAIN_READ_SIZE) {
  1536. for(i = 0; i < readlen; i++) {
  1537. if(data[i] == 0xa1) {
  1538. if (opt_debug) {
  1539. char hex[(readlen * 2) + 1];
  1540. bin2hex(hex, data, readlen);
  1541. applog(LOG_DEBUG, "%s%d initset: get: %s", bitmain->drv->name, bitmain->device_id, hex);
  1542. }
  1543. memcpy(&packethead, data+i, sizeof(struct bitmain_packet_head));
  1544. packethead.length = htole16(packethead.length);
  1545. if(packethead.length > 1130) {
  1546. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d error", packethead.length+4);
  1547. continue;
  1548. }
  1549. if(readlen-i < packethead.length+4) {
  1550. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d<%d low", readlen-i, packethead.length+4);
  1551. continue;
  1552. }
  1553. if (bitmain_parse_rxstatus(data+i, packethead.length+4, &rxstatusdata) != 0) {
  1554. applog(LOG_ERR, "bitmain_initialize bitmain_parse_rxstatus error");
  1555. continue;
  1556. }
  1557. info->chain_num = rxstatusdata.chain_num;
  1558. info->fifo_space = rxstatusdata.fifo_space;
  1559. info->hw_version[0] = rxstatusdata.hw_version[0];
  1560. info->hw_version[1] = rxstatusdata.hw_version[1];
  1561. info->hw_version[2] = rxstatusdata.hw_version[2];
  1562. info->hw_version[3] = rxstatusdata.hw_version[3];
  1563. info->nonce_error = 0;
  1564. info->last_nonce_error = 0;
  1565. sprintf(g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  1566. applog(LOG_ERR, "bitmain_initialize rxstatus v(%d) chain(%d) fifo(%d) hwv1(%d) hwv2(%d) hwv3(%d) hwv4(%d) nerr(%d) freq=%d",
  1567. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  1568. rxstatusdata.nonce_error, info->frequency);
  1569. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  1570. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  1571. for(i = 0; i < rxstatusdata.chain_num; i++) {
  1572. info->chain_asic_num[i] = rxstatusdata.chain_asic_num[i];
  1573. memset(info->chain_asic_status_t[i], 0, 320);
  1574. j = 0;
  1575. mod = 0;
  1576. if(info->chain_asic_num[i] <= 0) {
  1577. asicnum = 0;
  1578. } else {
  1579. mod = info->chain_asic_num[i] % 32;
  1580. if(mod == 0) {
  1581. asicnum = info->chain_asic_num[i] / 32;
  1582. } else {
  1583. asicnum = info->chain_asic_num[i] / 32 + 1;
  1584. }
  1585. }
  1586. if(asicnum > 0) {
  1587. for(m = asicnum-1; m >= 0; m--) {
  1588. tmp = mod ? (32-mod):0;
  1589. for(r = tmp;r < 32;r++){
  1590. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  1591. info->chain_asic_status_t[i][j] = ' ';
  1592. j++;
  1593. }
  1594. checkbit = num2bit(r);
  1595. if(rxstatusdata.chain_asic_exist[i*8+m] & checkbit) {
  1596. if(rxstatusdata.chain_asic_status[i*8+m] & checkbit) {
  1597. info->chain_asic_status_t[i][j] = 'o';
  1598. } else {
  1599. info->chain_asic_status_t[i][j] = 'x';
  1600. }
  1601. } else {
  1602. info->chain_asic_status_t[i][j] = '-';
  1603. }
  1604. j++;
  1605. }
  1606. info->chain_asic_status_t[i][j] = ' ';
  1607. j++;
  1608. mod = 0;
  1609. }
  1610. }
  1611. applog(LOG_DEBUG, "bitmain_initialize chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  1612. i, info->chain_asic_num[i],
  1613. info->chain_asic_exist[i*8+0], info->chain_asic_exist[i*8+1], info->chain_asic_exist[i*8+2], info->chain_asic_exist[i*8+3], info->chain_asic_exist[i*8+4], info->chain_asic_exist[i*8+5], info->chain_asic_exist[i*8+6], info->chain_asic_exist[i*8+7],
  1614. info->chain_asic_status[i*8+0], info->chain_asic_status[i*8+1], info->chain_asic_status[i*8+2], info->chain_asic_status[i*8+3], info->chain_asic_status[i*8+4], info->chain_asic_status[i*8+5], info->chain_asic_status[i*8+6], info->chain_asic_status[i*8+7]);
  1615. applog(LOG_ERR, "bitmain_initialize chain(%d) asic_num=%d asic_status=%s", i, info->chain_asic_num[i], info->chain_asic_status_t[i]);
  1616. }
  1617. bitmain_update_temps(bitmain, info, &rxstatusdata);
  1618. statusok = 1;
  1619. break;
  1620. }
  1621. }
  1622. if(statusok) {
  1623. break;
  1624. }
  1625. }
  1626. }
  1627. trycount--;
  1628. p.tv_sec = 0;
  1629. p.tv_nsec = BITMAIN_RESET_PITCH;
  1630. nanosleep(&p, NULL);
  1631. }
  1632. p.tv_sec = 0;
  1633. p.tv_nsec = BITMAIN_RESET_PITCH;
  1634. nanosleep(&p, NULL);
  1635. cgtime(&info->last_status_time);
  1636. if(statusok) {
  1637. applog(LOG_ERR, "bitmain_initialize start send txconfig");
  1638. if(opt_bitmain_hwerror)
  1639. hwerror_eft = 1;
  1640. else
  1641. hwerror_eft = 0;
  1642. if(opt_bitmain_nobeeper)
  1643. beeper_ctrl = 0;
  1644. else
  1645. beeper_ctrl = 1;
  1646. if(opt_bitmain_notempoverctrl)
  1647. tempover_ctrl = 0;
  1648. else
  1649. tempover_ctrl = 1;
  1650. if(opt_bitmain_homemode)
  1651. home_mode= 1;
  1652. else
  1653. home_mode= 0;
  1654. sendlen = bitmain_set_txconfig((struct bitmain_txconfig_token *)sendbuf, 1, 1, 1, 1, 1, 0, 1, hwerror_eft, beeper_ctrl, tempover_ctrl,home_mode,
  1655. info->chain_num, info->asic_num, BITMAIN_DEFAULT_FAN_MAX_PWM, info->timeout,
  1656. info->frequency, info->voltage, 0, 0, 0x04, info->reg_data);
  1657. if(sendlen <= 0) {
  1658. applog(LOG_ERR, "bitmain_initialize bitmain_set_txconfig error(%d)", sendlen);
  1659. return -1;
  1660. }
  1661. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1662. if (unlikely(ret == BTM_SEND_ERROR)) {
  1663. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1664. return -1;
  1665. }
  1666. applog(LOG_WARNING, "BMM%d: InitSet succeeded", bitmain->device_id);
  1667. } else {
  1668. applog(LOG_WARNING, "BMS%d: InitSet error", bitmain->device_id);
  1669. return -1;
  1670. }
  1671. return 0;
  1672. }
  1673. static void bitmain_usb_init(struct cgpu_info *bitmain)
  1674. {
  1675. int err, interface;
  1676. #ifndef WIN32
  1677. return;
  1678. #endif
  1679. if (bitmain->usbinfo.nodev)
  1680. return;
  1681. interface = usb_interface(bitmain);
  1682. // Reset
  1683. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_RESET,
  1684. FTDI_VALUE_RESET, interface, C_RESET);
  1685. applog(LOG_DEBUG, "%s%i: reset got err %d",
  1686. bitmain->drv->name, bitmain->device_id, err);
  1687. if (bitmain->usbinfo.nodev)
  1688. return;
  1689. // Set latency
  1690. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_LATENCY,
  1691. BITMAIN_LATENCY, interface, C_LATENCY);
  1692. applog(LOG_DEBUG, "%s%i: latency got err %d",
  1693. bitmain->drv->name, bitmain->device_id, err);
  1694. if (bitmain->usbinfo.nodev)
  1695. return;
  1696. // Set data
  1697. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_DATA,
  1698. FTDI_VALUE_DATA_BTM, interface, C_SETDATA);
  1699. applog(LOG_DEBUG, "%s%i: data got err %d",
  1700. bitmain->drv->name, bitmain->device_id, err);
  1701. if (bitmain->usbinfo.nodev)
  1702. return;
  1703. // Set the baud
  1704. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_BAUD, FTDI_VALUE_BAUD_BTM,
  1705. (FTDI_INDEX_BAUD_BTM & 0xff00) | interface,
  1706. C_SETBAUD);
  1707. applog(LOG_DEBUG, "%s%i: setbaud got err %d",
  1708. bitmain->drv->name, bitmain->device_id, err);
  1709. if (bitmain->usbinfo.nodev)
  1710. return;
  1711. // Set Modem Control
  1712. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_MODEM,
  1713. FTDI_VALUE_MODEM, interface, C_SETMODEM);
  1714. applog(LOG_DEBUG, "%s%i: setmodemctrl got err %d",
  1715. bitmain->drv->name, bitmain->device_id, err);
  1716. if (bitmain->usbinfo.nodev)
  1717. return;
  1718. // Set Flow Control
  1719. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_FLOW,
  1720. FTDI_VALUE_FLOW, interface, C_SETFLOW);
  1721. applog(LOG_DEBUG, "%s%i: setflowctrl got err %d",
  1722. bitmain->drv->name, bitmain->device_id, err);
  1723. if (bitmain->usbinfo.nodev)
  1724. return;
  1725. /* BitMain repeats the following */
  1726. // Set Modem Control
  1727. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_MODEM,
  1728. FTDI_VALUE_MODEM, interface, C_SETMODEM);
  1729. applog(LOG_DEBUG, "%s%i: setmodemctrl 2 got err %d",
  1730. bitmain->drv->name, bitmain->device_id, err);
  1731. if (bitmain->usbinfo.nodev)
  1732. return;
  1733. // Set Flow Control
  1734. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_FLOW,
  1735. FTDI_VALUE_FLOW, interface, C_SETFLOW);
  1736. applog(LOG_DEBUG, "%s%i: setflowctrl 2 got err %d",
  1737. bitmain->drv->name, bitmain->device_id, err);
  1738. }
  1739. static struct cgpu_info * bitmain_usb_detect_one(libusb_device *dev, struct usb_find_devices *found)
  1740. {
  1741. int baud, chain_num, asic_num, timeout, frequency = 0;
  1742. char frequency_t[256] = {0};
  1743. uint8_t reg_data[4] = {0};
  1744. uint8_t voltage[2] = {0};
  1745. char voltage_t[8] = {0};
  1746. int this_option_offset = ++option_offset;
  1747. struct bitmain_info *info;
  1748. struct cgpu_info *bitmain;
  1749. bool configured;
  1750. int ret;
  1751. if (opt_bitmain_options == NULL)
  1752. return NULL;
  1753. bitmain = usb_alloc_cgpu(&bitmain_drv, BITMAIN_MINER_THREADS);
  1754. baud = BITMAIN_IO_SPEED;
  1755. chain_num = BITMAIN_DEFAULT_CHAIN_NUM;
  1756. asic_num = BITMAIN_DEFAULT_ASIC_NUM;
  1757. timeout = BITMAIN_DEFAULT_TIMEOUT;
  1758. frequency = BITMAIN_DEFAULT_FREQUENCY;
  1759. if (!usb_init(bitmain, dev, found))
  1760. goto shin;
  1761. configured = get_options(this_option_offset, &baud, &chain_num,
  1762. &asic_num, &timeout, &frequency, frequency_t, reg_data, voltage, voltage_t);
  1763. get_option_freq(&timeout, &frequency, frequency_t, reg_data);
  1764. get_option_voltage(voltage, voltage_t);
  1765. /* Even though this is an FTDI type chip, we want to do the parsing
  1766. * all ourselves so set it to std usb type */
  1767. bitmain->usbdev->usb_type = USB_TYPE_STD;
  1768. /* We have a real BitMain! */
  1769. bitmain_usb_init(bitmain);
  1770. bitmain->device_data = calloc(sizeof(struct bitmain_info), 1);
  1771. if (unlikely(!(bitmain->device_data)))
  1772. quit(1, "Failed to calloc bitmain_info data");
  1773. info = bitmain->device_data;
  1774. if (configured) {
  1775. info->baud = baud;
  1776. info->chain_num = chain_num;
  1777. info->asic_num = asic_num;
  1778. info->timeout = timeout;
  1779. info->frequency = frequency;
  1780. strcpy(info->frequency_t, frequency_t);
  1781. memcpy(info->reg_data, reg_data, 4);
  1782. memcpy(info->voltage, voltage, 2);
  1783. strcpy(info->voltage_t, voltage_t);
  1784. } else {
  1785. info->baud = BITMAIN_IO_SPEED;
  1786. info->chain_num = BITMAIN_DEFAULT_CHAIN_NUM;
  1787. info->asic_num = BITMAIN_DEFAULT_ASIC_NUM;
  1788. info->timeout = BITMAIN_DEFAULT_TIMEOUT;
  1789. info->frequency = BITMAIN_DEFAULT_FREQUENCY;
  1790. sprintf(info->frequency_t, "%d", BITMAIN_DEFAULT_FREQUENCY);
  1791. memset(info->reg_data, 0, 4);
  1792. info->voltage[0] = BITMAIN_DEFAULT_VOLTAGE0;
  1793. info->voltage[1] = BITMAIN_DEFAULT_VOLTAGE1;
  1794. strcpy(info->voltage_t, BITMAIN_DEFAULT_VOLTAGE_T);
  1795. }
  1796. info->fan_pwm = BITMAIN_DEFAULT_FAN_MIN_PWM;
  1797. info->temp_max = 0;
  1798. /* This is for check the temp/fan every 3~4s */
  1799. info->temp_history_count = (4 / (float)((float)info->timeout * ((float)1.67/0x32))) + 1;
  1800. if (info->temp_history_count <= 0)
  1801. info->temp_history_count = 1;
  1802. info->temp_history_index = 0;
  1803. info->temp_sum = 0;
  1804. info->temp_old = 0;
  1805. if (!add_cgpu(bitmain))
  1806. goto unshin;
  1807. applog(LOG_ERR, "------bitmain usb detect one------");
  1808. ret = bitmain_initialize(bitmain);
  1809. if (ret && !configured)
  1810. goto unshin;
  1811. update_usb_stats(bitmain);
  1812. info->errorcount = 0;
  1813. applog(LOG_DEBUG, "BitMain Detected: %s "
  1814. "(chain_num=%d asic_num=%d timeout=%d frequency=%d)",
  1815. bitmain->device_path, info->chain_num, info->asic_num, info->timeout,
  1816. info->frequency);
  1817. return bitmain;
  1818. unshin:
  1819. usb_uninit(bitmain);
  1820. shin:
  1821. free(bitmain->device_data);
  1822. bitmain->device_data = NULL;
  1823. bitmain = usb_free_cgpu(bitmain);
  1824. return NULL;
  1825. }
  1826. static bool bitmain_detect_one(const char * devpath)
  1827. {
  1828. int baud, chain_num, asic_num, timeout, frequency = 0;
  1829. char frequency_t[256] = {0};
  1830. uint8_t reg_data[4] = {0};
  1831. uint8_t voltage[2] = {0};
  1832. char voltage_t[8] = {0};
  1833. int this_option_offset = ++option_offset;
  1834. struct bitmain_info *info;
  1835. struct cgpu_info *bitmain;
  1836. bool configured;
  1837. int ret;
  1838. if (opt_bitmain_options == NULL)
  1839. return false;
  1840. bitmain = btm_alloc_cgpu(&bitmain_drv, BITMAIN_MINER_THREADS);
  1841. configured = get_options(this_option_offset, &baud, &chain_num,
  1842. &asic_num, &timeout, &frequency, frequency_t, reg_data, voltage, voltage_t);
  1843. get_option_freq(&timeout, &frequency, frequency_t, reg_data);
  1844. get_option_voltage(voltage, voltage_t);
  1845. if (!btm_init(bitmain, opt_bitmain_dev))
  1846. goto shin;
  1847. applog(LOG_ERR, "bitmain_detect_one btm init ok");
  1848. bitmain->device_data = calloc(sizeof(struct bitmain_info), 1);
  1849. /* make sure initialize successfully*/
  1850. memset(bitmain->device_data,0,sizeof(struct bitmain_info));
  1851. if (unlikely(!(bitmain->device_data)))
  1852. quit(1, "Failed to calloc bitmain_info data");
  1853. info = bitmain->device_data;
  1854. if (configured) {
  1855. info->baud = baud;
  1856. info->chain_num = chain_num;
  1857. info->asic_num = asic_num;
  1858. info->timeout = timeout;
  1859. info->frequency = frequency;
  1860. strcpy(info->frequency_t, frequency_t);
  1861. memcpy(info->reg_data, reg_data, 4);
  1862. memcpy(info->voltage, voltage, 2);
  1863. strcpy(info->voltage_t, voltage_t);
  1864. } else {
  1865. info->baud = BITMAIN_IO_SPEED;
  1866. info->chain_num = BITMAIN_DEFAULT_CHAIN_NUM;
  1867. info->asic_num = BITMAIN_DEFAULT_ASIC_NUM;
  1868. info->timeout = BITMAIN_DEFAULT_TIMEOUT;
  1869. info->frequency = BITMAIN_DEFAULT_FREQUENCY;
  1870. sprintf(info->frequency_t, "%d", BITMAIN_DEFAULT_FREQUENCY);
  1871. memset(info->reg_data, 0, 4);
  1872. info->voltage[0] = BITMAIN_DEFAULT_VOLTAGE0;
  1873. info->voltage[1] = BITMAIN_DEFAULT_VOLTAGE1;
  1874. strcpy(info->voltage_t, BITMAIN_DEFAULT_VOLTAGE_T);
  1875. }
  1876. info->fan_pwm = BITMAIN_DEFAULT_FAN_MIN_PWM;
  1877. info->temp_max = 0;
  1878. /* This is for check the temp/fan every 3~4s */
  1879. info->temp_history_count = (4 / (float)((float)info->timeout * ((float)1.67/0x32))) + 1;
  1880. if (info->temp_history_count <= 0)
  1881. info->temp_history_count = 1;
  1882. info->temp_history_index = 0;
  1883. info->temp_sum = 0;
  1884. info->temp_old = 0;
  1885. if (!add_cgpu(bitmain))
  1886. goto unshin;
  1887. ret = bitmain_initialize(bitmain);
  1888. applog(LOG_ERR, "bitmain_detect_one stop bitmain_initialize %d", ret);
  1889. if (ret && !configured)
  1890. goto unshin;
  1891. info->errorcount = 0;
  1892. applog(LOG_ERR, "BitMain Detected: %s "
  1893. "(chain_num=%d asic_num=%d timeout=%d freq=%d-%s volt=%02x%02x-%s)",
  1894. bitmain->device_path, info->chain_num, info->asic_num, info->timeout,
  1895. info->frequency, info->frequency_t, info->voltage[0], info->voltage[1], info->voltage_t);
  1896. return true;
  1897. unshin:
  1898. btm_uninit(bitmain);
  1899. shin:
  1900. free(bitmain->device_data);
  1901. bitmain->device_data = NULL;
  1902. bitmain = usb_free_cgpu(bitmain);
  1903. return false;
  1904. }
  1905. static void bitmain_detect(bool __maybe_unused hotplug)
  1906. {
  1907. applog(LOG_DEBUG, "BTM detect dev: %s", opt_bitmain_dev);
  1908. if(strlen(opt_bitmain_dev) <= 0) {
  1909. opt_bitmain_dev_usb = true;
  1910. } else {
  1911. opt_bitmain_dev_usb = false;
  1912. }
  1913. if(opt_bitmain_dev_usb) {
  1914. usb_detect(&bitmain_drv, bitmain_usb_detect_one);
  1915. } else {
  1916. btm_detect(&bitmain_drv, bitmain_detect_one);
  1917. }
  1918. }
  1919. static void do_bitmain_close(struct thr_info *thr)
  1920. {
  1921. struct cgpu_info *bitmain = thr->cgpu;
  1922. struct bitmain_info *info = bitmain->device_data;
  1923. pthread_join(info->read_thr, NULL);
  1924. bitmain_running_reset(bitmain, info);
  1925. info->no_matching_work = 0;
  1926. }
  1927. static void get_bitmain_statline_before(char *buf, size_t bufsiz, struct cgpu_info *bitmain)
  1928. {
  1929. struct bitmain_info *info = bitmain->device_data;
  1930. int lowfan = 10000;
  1931. int i = 0;
  1932. /* Find the lowest fan speed of the ASIC cooling fans. */
  1933. for(i = 0; i < info->fan_num; i++) {
  1934. if (info->fan[i] >= 0 && info->fan[i] < lowfan)
  1935. lowfan = info->fan[i];
  1936. }
  1937. tailsprintf(buf, bufsiz, "%2d/%3dC %04dR | ", info->temp_avg, info->temp_max, lowfan);
  1938. }
  1939. /* We use a replacement algorithm to only remove references to work done from
  1940. * the buffer when we need the extra space for new work. */
  1941. static bool bitmain_fill(struct cgpu_info *bitmain)
  1942. {
  1943. struct bitmain_info *info = bitmain->device_data;
  1944. int subid, slot;
  1945. struct work *work;
  1946. bool ret = true;
  1947. int sendret = 0, sendcount = 0, neednum = 0, queuednum = 0, sendnum = 0, sendlen = 0;
  1948. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1949. int senderror = 0;
  1950. struct timeval now;
  1951. int timediff = 0;
  1952. //applog(LOG_DEBUG, "BTM bitmain_fill start--------");
  1953. mutex_lock(&info->qlock);
  1954. if(info->fifo_space <= 0) {
  1955. //applog(LOG_DEBUG, "BTM bitmain_fill fifo space empty--------");
  1956. ret = true;
  1957. goto out_unlock;
  1958. }
  1959. if (bitmain->queued >= BITMAIN_MAX_WORK_QUEUE_NUM) {
  1960. ret = true;
  1961. } else {
  1962. ret = false;
  1963. }
  1964. while(info->fifo_space > 0) {
  1965. neednum = info->fifo_space<BITMAIN_MAX_WORK_NUM?info->fifo_space:BITMAIN_MAX_WORK_NUM;
  1966. queuednum = bitmain->queued;
  1967. applog(LOG_DEBUG, "BTM: Work task queued(%d) fifo space(%d) needsend(%d)", queuednum, info->fifo_space, neednum);
  1968. if(queuednum < neednum) {
  1969. while(true) {
  1970. work = get_queued(bitmain);
  1971. if (unlikely(!work)) {
  1972. break;
  1973. } else {
  1974. applog(LOG_DEBUG, "BTM get work queued number:%d neednum:%d", queuednum, neednum);
  1975. subid = bitmain->queued++;
  1976. work->subid = subid;
  1977. slot = bitmain->work_array + subid;
  1978. if (slot > BITMAIN_ARRAY_SIZE) {
  1979. applog(LOG_DEBUG, "bitmain_fill array cyc %d", BITMAIN_ARRAY_SIZE);
  1980. slot = 0;
  1981. }
  1982. if (likely(bitmain->works[slot])) {
  1983. applog(LOG_DEBUG, "bitmain_fill work_completed %d", slot);
  1984. work_completed(bitmain, bitmain->works[slot]);
  1985. }
  1986. bitmain->works[slot] = work;
  1987. queuednum++;
  1988. if(queuednum >= neednum) {
  1989. break;
  1990. }
  1991. }
  1992. }
  1993. }
  1994. if(queuednum < BITMAIN_MAX_DEAL_QUEUE_NUM) {
  1995. if(queuednum < neednum) {
  1996. applog(LOG_DEBUG, "BTM: No enough work to send, queue num=%d", queuednum);
  1997. break;
  1998. }
  1999. }
  2000. sendnum = queuednum < neednum ? queuednum : neednum;
  2001. sendlen = bitmain_set_txtask(sendbuf, &(info->last_work_block), bitmain->works, BITMAIN_ARRAY_SIZE, bitmain->work_array, sendnum, &sendcount);
  2002. bitmain->queued -= sendnum;
  2003. info->send_full_space += sendnum;
  2004. if (bitmain->queued < 0)
  2005. bitmain->queued = 0;
  2006. if (bitmain->work_array + sendnum > BITMAIN_ARRAY_SIZE) {
  2007. bitmain->work_array = bitmain->work_array + sendnum-BITMAIN_ARRAY_SIZE;
  2008. } else {
  2009. bitmain->work_array += sendnum;
  2010. }
  2011. applog(LOG_DEBUG, "BTM: Send work array %d", bitmain->work_array);
  2012. if (sendlen > 0) {
  2013. info->fifo_space -= sendcount;
  2014. if (info->fifo_space < 0)
  2015. info->fifo_space = 0;
  2016. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  2017. if (unlikely(sendret == BTM_SEND_ERROR)) {
  2018. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  2019. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  2020. info->reset = true;
  2021. info->errorcount++;
  2022. senderror = 1;
  2023. if (info->errorcount > 1000) {
  2024. info->errorcount = 0;
  2025. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  2026. bitmain->shutdown = true;
  2027. }
  2028. break;
  2029. } else {
  2030. applog(LOG_DEBUG, "bitmain_send_data send ret=%d", sendret);
  2031. info->errorcount = 0;
  2032. }
  2033. } else {
  2034. applog(LOG_DEBUG, "BTM: Send work bitmain_set_txtask error: %d", sendlen);
  2035. break;
  2036. }
  2037. }
  2038. out_unlock:
  2039. cgtime(&now);
  2040. timediff = now.tv_sec - info->last_status_time.tv_sec;
  2041. if(timediff < 0) timediff = -timediff;
  2042. if (timediff > BITMAIN_SEND_STATUS_TIME) {
  2043. applog(LOG_DEBUG, "BTM: Send RX Status Token fifo_space(%d) timediff(%d)", info->fifo_space, timediff);
  2044. copy_time(&(info->last_status_time), &now);
  2045. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *) sendbuf, 0, 0, 0, 0);
  2046. if (sendlen > 0) {
  2047. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  2048. if (unlikely(sendret == BTM_SEND_ERROR)) {
  2049. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  2050. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  2051. info->reset = true;
  2052. info->errorcount++;
  2053. senderror = 1;
  2054. if (info->errorcount > 1000) {
  2055. info->errorcount = 0;
  2056. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  2057. bitmain->shutdown = true;
  2058. }
  2059. } else {
  2060. info->errorcount = 0;
  2061. if (info->fifo_space <= 0) {
  2062. senderror = 1;
  2063. }
  2064. }
  2065. }
  2066. }
  2067. if(info->send_full_space > BITMAIN_SEND_FULL_SPACE) {
  2068. info->send_full_space = 0;
  2069. ret = true;
  2070. cgsleep_ms(1);
  2071. }
  2072. mutex_unlock(&info->qlock);
  2073. if(senderror) {
  2074. ret = true;
  2075. applog(LOG_DEBUG, "bitmain_fill send task sleep");
  2076. //cgsleep_ms(1);
  2077. }
  2078. return ret;
  2079. }
  2080. static int64_t bitmain_scanhash(struct thr_info *thr)
  2081. {
  2082. struct cgpu_info *bitmain = thr->cgpu;
  2083. struct bitmain_info *info = bitmain->device_data;
  2084. const int chain_num = info->chain_num;
  2085. int64_t hash_count;
  2086. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock start");
  2087. mutex_lock(&info->qlock);
  2088. hash_count = 0xffffffffull * (uint64_t)info->nonces;
  2089. bitmain->results += info->nonces + info->idle;
  2090. if (bitmain->results > chain_num)
  2091. bitmain->results = chain_num;
  2092. if (!info->reset)
  2093. bitmain->results--;
  2094. info->nonces = info->idle = 0;
  2095. mutex_unlock(&info->qlock);
  2096. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock stop");
  2097. /* Check for nothing but consecutive bad results or consistently less
  2098. * results than we should be getting and reset the FPGA if necessary */
  2099. //if (bitmain->results < -chain_num && !info->reset) {
  2100. // applog(LOG_ERR, "BTM%d: Result return rate low, resetting!",
  2101. // bitmain->device_id);
  2102. // info->reset = true;
  2103. //}
  2104. if (unlikely(bitmain->usbinfo.nodev)) {
  2105. applog(LOG_ERR, "BTM%d: Device disappeared, shutting down thread",
  2106. bitmain->device_id);
  2107. bitmain->shutdown = true;
  2108. }
  2109. /* This hashmeter is just a utility counter based on returned shares */
  2110. return hash_count;
  2111. }
  2112. static void bitmain_flush_work(struct cgpu_info *bitmain)
  2113. {
  2114. struct bitmain_info *info = bitmain->device_data;
  2115. int i = 0;
  2116. mutex_lock(&info->qlock);
  2117. /* Will overwrite any work queued */
  2118. applog(LOG_ERR, "bitmain_flush_work queued=%d array=%d", bitmain->queued, bitmain->work_array);
  2119. if(bitmain->queued > 0) {
  2120. if (bitmain->work_array + bitmain->queued > BITMAIN_ARRAY_SIZE) {
  2121. bitmain->work_array = bitmain->work_array + bitmain->queued-BITMAIN_ARRAY_SIZE;
  2122. } else {
  2123. bitmain->work_array += bitmain->queued;
  2124. }
  2125. }
  2126. bitmain->queued = 0;
  2127. //bitmain->work_array = 0;
  2128. //for(i = 0; i < BITMAIN_ARRAY_SIZE; i++) {
  2129. // bitmain->works[i] = NULL;
  2130. //}
  2131. //pthread_cond_signal(&info->qcond);
  2132. mutex_unlock(&info->qlock);
  2133. }
  2134. static struct api_data *bitmain_api_stats(struct cgpu_info *cgpu)
  2135. {
  2136. struct api_data *root = NULL;
  2137. struct bitmain_info *info = cgpu->device_data;
  2138. int i = 0;
  2139. double hwp = (cgpu->hw_errors + cgpu->diff1) ?
  2140. (double)(cgpu->hw_errors) / (double)(cgpu->hw_errors + cgpu->diff1) : 0;
  2141. root = api_add_int(root, "baud", &(info->baud), false);
  2142. root = api_add_int(root, "miner_count", &(info->chain_num), false);
  2143. root = api_add_int(root, "asic_count", &(info->asic_num), false);
  2144. root = api_add_int(root, "timeout", &(info->timeout), false);
  2145. root = api_add_string(root, "frequency", info->frequency_t, false);
  2146. root = api_add_string(root, "voltage", info->voltage_t, false);
  2147. root = api_add_int(root, "hwv1", &(info->hw_version[0]), false);
  2148. root = api_add_int(root, "hwv2", &(info->hw_version[1]), false);
  2149. root = api_add_int(root, "hwv3", &(info->hw_version[2]), false);
  2150. root = api_add_int(root, "hwv4", &(info->hw_version[3]), false);
  2151. root = api_add_int(root, "fan_num", &(info->fan_num), false);
  2152. root = api_add_int(root, "fan1", &(info->fan[0]), false);
  2153. root = api_add_int(root, "fan2", &(info->fan[1]), false);
  2154. root = api_add_int(root, "fan3", &(info->fan[2]), false);
  2155. root = api_add_int(root, "fan4", &(info->fan[3]), false);
  2156. root = api_add_int(root, "fan5", &(info->fan[4]), false);
  2157. root = api_add_int(root, "fan6", &(info->fan[5]), false);
  2158. root = api_add_int(root, "fan7", &(info->fan[6]), false);
  2159. root = api_add_int(root, "fan8", &(info->fan[7]), false);
  2160. root = api_add_int(root, "fan9", &(info->fan[8]), false);
  2161. root = api_add_int(root, "fan10", &(info->fan[9]), false);
  2162. root = api_add_int(root, "fan11", &(info->fan[10]), false);
  2163. root = api_add_int(root, "fan12", &(info->fan[11]), false);
  2164. root = api_add_int(root, "fan13", &(info->fan[12]), false);
  2165. root = api_add_int(root, "fan14", &(info->fan[13]), false);
  2166. root = api_add_int(root, "fan15", &(info->fan[14]), false);
  2167. root = api_add_int(root, "fan16", &(info->fan[15]), false);
  2168. root = api_add_int(root, "temp_num", &(info->temp_num), false);
  2169. root = api_add_int(root, "temp1", &(info->temp[0]), false);
  2170. root = api_add_int(root, "temp2", &(info->temp[1]), false);
  2171. root = api_add_int(root, "temp3", &(info->temp[2]), false);
  2172. root = api_add_int(root, "temp4", &(info->temp[3]), false);
  2173. root = api_add_int(root, "temp5", &(info->temp[4]), false);
  2174. root = api_add_int(root, "temp6", &(info->temp[5]), false);
  2175. root = api_add_int(root, "temp7", &(info->temp[6]), false);
  2176. root = api_add_int(root, "temp8", &(info->temp[7]), false);
  2177. root = api_add_int(root, "temp9", &(info->temp[8]), false);
  2178. root = api_add_int(root, "temp10", &(info->temp[9]), false);
  2179. root = api_add_int(root, "temp11", &(info->temp[10]), false);
  2180. root = api_add_int(root, "temp12", &(info->temp[11]), false);
  2181. root = api_add_int(root, "temp13", &(info->temp[12]), false);
  2182. root = api_add_int(root, "temp14", &(info->temp[13]), false);
  2183. root = api_add_int(root, "temp15", &(info->temp[14]), false);
  2184. root = api_add_int(root, "temp16", &(info->temp[15]), false);
  2185. root = api_add_int(root, "temp_avg", &(info->temp_avg), false);
  2186. root = api_add_int(root, "temp_max", &(info->temp_max), false);
  2187. root = api_add_percent(root, "Device Hardware%", &hwp, true);
  2188. root = api_add_int(root, "no_matching_work", &(info->no_matching_work), false);
  2189. /*
  2190. for (i = 0; i < info->chain_num; i++) {
  2191. char mcw[24];
  2192. sprintf(mcw, "match_work_count%d", i + 1);
  2193. root = api_add_int(root, mcw, &(info->matching_work[i]), false);
  2194. }*/
  2195. root = api_add_int(root, "chain_acn1", &(info->chain_asic_num[0]), false);
  2196. root = api_add_int(root, "chain_acn2", &(info->chain_asic_num[1]), false);
  2197. root = api_add_int(root, "chain_acn3", &(info->chain_asic_num[2]), false);
  2198. root = api_add_int(root, "chain_acn4", &(info->chain_asic_num[3]), false);
  2199. root = api_add_int(root, "chain_acn5", &(info->chain_asic_num[4]), false);
  2200. root = api_add_int(root, "chain_acn6", &(info->chain_asic_num[5]), false);
  2201. root = api_add_int(root, "chain_acn7", &(info->chain_asic_num[6]), false);
  2202. root = api_add_int(root, "chain_acn8", &(info->chain_asic_num[7]), false);
  2203. root = api_add_int(root, "chain_acn9", &(info->chain_asic_num[8]), false);
  2204. root = api_add_int(root, "chain_acn10", &(info->chain_asic_num[9]), false);
  2205. root = api_add_int(root, "chain_acn11", &(info->chain_asic_num[10]), false);
  2206. root = api_add_int(root, "chain_acn12", &(info->chain_asic_num[11]), false);
  2207. root = api_add_int(root, "chain_acn13", &(info->chain_asic_num[12]), false);
  2208. root = api_add_int(root, "chain_acn14", &(info->chain_asic_num[13]), false);
  2209. root = api_add_int(root, "chain_acn15", &(info->chain_asic_num[14]), false);
  2210. root = api_add_int(root, "chain_acn16", &(info->chain_asic_num[15]), false);
  2211. //applog(LOG_ERR, "chain asic status:%s", info->chain_asic_status_t[0]);
  2212. root = api_add_string(root, "chain_acs1", info->chain_asic_status_t[0], false);
  2213. root = api_add_string(root, "chain_acs2", info->chain_asic_status_t[1], false);
  2214. root = api_add_string(root, "chain_acs3", info->chain_asic_status_t[2], false);
  2215. root = api_add_string(root, "chain_acs4", info->chain_asic_status_t[3], false);
  2216. root = api_add_string(root, "chain_acs5", info->chain_asic_status_t[4], false);
  2217. root = api_add_string(root, "chain_acs6", info->chain_asic_status_t[5], false);
  2218. root = api_add_string(root, "chain_acs7", info->chain_asic_status_t[6], false);
  2219. root = api_add_string(root, "chain_acs8", info->chain_asic_status_t[7], false);
  2220. root = api_add_string(root, "chain_acs9", info->chain_asic_status_t[8], false);
  2221. root = api_add_string(root, "chain_acs10", info->chain_asic_status_t[9], false);
  2222. root = api_add_string(root, "chain_acs11", info->chain_asic_status_t[10], false);
  2223. root = api_add_string(root, "chain_acs12", info->chain_asic_status_t[11], false);
  2224. root = api_add_string(root, "chain_acs13", info->chain_asic_status_t[12], false);
  2225. root = api_add_string(root, "chain_acs14", info->chain_asic_status_t[13], false);
  2226. root = api_add_string(root, "chain_acs15", info->chain_asic_status_t[14], false);
  2227. root = api_add_string(root, "chain_acs16", info->chain_asic_status_t[15], false);
  2228. //root = api_add_int(root, "chain_acs1", &(info->chain_asic_status[0]), false);
  2229. //root = api_add_int(root, "chain_acs2", &(info->chain_asic_status[1]), false);
  2230. //root = api_add_int(root, "chain_acs3", &(info->chain_asic_status[2]), false);
  2231. //root = api_add_int(root, "chain_acs4", &(info->chain_asic_status[3]), false);
  2232. return root;
  2233. }
  2234. static void bitmain_shutdown(struct thr_info *thr)
  2235. {
  2236. do_bitmain_close(thr);
  2237. }
  2238. char *set_bitmain_dev(char *arg)
  2239. {
  2240. if(arg == NULL || strlen(arg) <= 0) {
  2241. memcpy(opt_bitmain_dev, 0, 256);
  2242. } else {
  2243. strncpy(opt_bitmain_dev, arg, 256);
  2244. }
  2245. applog(LOG_DEBUG, "BTM set device: %s", opt_bitmain_dev);
  2246. return NULL;
  2247. }
  2248. char *set_bitmain_fan(char *arg)
  2249. {
  2250. int val1, val2, ret;
  2251. ret = sscanf(arg, "%d-%d", &val1, &val2);
  2252. if (ret < 1)
  2253. return "No values passed to bitmain-fan";
  2254. if (ret == 1)
  2255. val2 = val1;
  2256. if (val1 < 0 || val1 > 100 || val2 < 0 || val2 > 100 || val2 < val1)
  2257. return "Invalid value passed to bitmain-fan";
  2258. opt_bitmain_fan_min = val1 * BITMAIN_PWM_MAX / 100;
  2259. opt_bitmain_fan_max = val2 * BITMAIN_PWM_MAX / 100;
  2260. return NULL;
  2261. }
  2262. char *set_bitmain_freq(char *arg)
  2263. {
  2264. int val1, val2, ret;
  2265. ret = sscanf(arg, "%d-%d", &val1, &val2);
  2266. if (ret < 1)
  2267. return "No values passed to bitmain-freq";
  2268. if (ret == 1)
  2269. val2 = val1;
  2270. if (val1 < BITMAIN_MIN_FREQUENCY || val1 > BITMAIN_MAX_FREQUENCY ||
  2271. val2 < BITMAIN_MIN_FREQUENCY || val2 > BITMAIN_MAX_FREQUENCY ||
  2272. val2 < val1)
  2273. return "Invalid value passed to bitmain-freq";
  2274. opt_bitmain_freq_min = val1;
  2275. opt_bitmain_freq_max = val2;
  2276. return NULL;
  2277. }
  2278. struct device_drv bitmain_drv = {
  2279. .drv_id = DRIVER_bitmain,
  2280. .dname = "Bitmain",
  2281. .name = "BTM",
  2282. .drv_detect = bitmain_detect,
  2283. .thread_prepare = bitmain_prepare,
  2284. .hash_work = hash_queued_work,
  2285. .queue_full = bitmain_fill,
  2286. .scanwork = bitmain_scanhash,
  2287. .flush_work = bitmain_flush_work,
  2288. .get_api_stats = bitmain_api_stats,
  2289. .get_statline_before = get_bitmain_statline_before,
  2290. .reinit_device = bitmain_init,
  2291. .thread_shutdown = bitmain_shutdown,
  2292. };