spidevc.c 6.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211
  1. /*
  2. * Copyright 2013 bitfury
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a copy
  5. * of this software and associated documentation files (the "Software"), to deal
  6. * in the Software without restriction, including without limitation the rights
  7. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  8. * copies of the Software, and to permit persons to whom the Software is
  9. * furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  17. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  19. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  20. * THE SOFTWARE.
  21. */
  22. #include "spidevc.h"
  23. #include <stdbool.h>
  24. #include <sys/mman.h>
  25. #include <stdint.h>
  26. #include <unistd.h>
  27. #include <stdio.h>
  28. #include <stdlib.h>
  29. #include <string.h>
  30. #include <getopt.h>
  31. #include <fcntl.h>
  32. #include <sys/ioctl.h>
  33. #include <linux/types.h>
  34. #include <signal.h>
  35. #include <sys/types.h>
  36. #include <linux/spi/spidev.h>
  37. #include <time.h>
  38. #include <unistd.h>
  39. #include <linux/i2c.h>
  40. #include <linux/i2c-dev.h>
  41. #include <sys/stat.h>
  42. static volatile unsigned *gpio;
  43. bool spi_init(void)
  44. {
  45. int fd;
  46. fd = open("/dev/mem",O_RDWR|O_SYNC);
  47. if (fd < 0)
  48. {
  49. perror("/dev/mem trouble");
  50. return false;
  51. }
  52. gpio = mmap(0,4096,PROT_READ|PROT_WRITE,MAP_SHARED,fd,0x20200000);
  53. if (gpio == MAP_FAILED)
  54. {
  55. perror("gpio mmap trouble");
  56. return false;
  57. }
  58. close(fd);
  59. return true;
  60. }
  61. #define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3))
  62. #define OUT_GPIO(g) *(gpio+((g)/10)) |= (1<<(((g)%10)*3))
  63. #define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3))
  64. #define GPIO_SET *(gpio+7) // sets bits which are 1 ignores bits which are 0
  65. #define GPIO_CLR *(gpio+10) // clears bits which are 1 ignores bits which are 0
  66. // Bit-banging reset, to reset more chips in chain - toggle for longer period... Each 3 reset cycles reset first chip in chain
  67. void spi_reset(void)
  68. {
  69. int i,j;
  70. int a = 1234, len = 2;
  71. INP_GPIO(10); OUT_GPIO(10);
  72. INP_GPIO(11); OUT_GPIO(11);
  73. GPIO_SET = 1 << 11; // Set SCK
  74. for (i = 0; i < 16; i++) { // On standard settings this unoptimized code produces 1 Mhz freq.
  75. GPIO_SET = 1 << 10;
  76. for (j = 0; j < len; j++) {
  77. a *= a;
  78. }
  79. GPIO_CLR = 1 << 10;
  80. for (j = 0; j < len; j++) {
  81. a *= a;
  82. }
  83. }
  84. GPIO_CLR = 1 << 10;
  85. GPIO_CLR = 1 << 11;
  86. INP_GPIO(10);
  87. SET_GPIO_ALT(10,0);
  88. INP_GPIO(11);
  89. SET_GPIO_ALT(11,0);
  90. INP_GPIO(9);
  91. SET_GPIO_ALT(9,0);
  92. }
  93. int spi_txrx(const char *wrbuf, char *rdbuf, int bufsz)
  94. {
  95. int fd;
  96. int mode, bits, speed, rv, i, j;
  97. struct timespec tv;
  98. struct spi_ioc_transfer tr[16];
  99. memset(&tr,0,sizeof(tr));
  100. mode = 0; bits = 8; speed = 2000000;
  101. spi_reset();
  102. fd = open("/dev/spidev0.0", O_RDWR);
  103. if (fd < 0) { perror("Unable to open SPI device"); exit(1); }
  104. if (ioctl(fd, SPI_IOC_WR_MODE, &mode) < 0) { perror("Unable to set WR MODE"); close(fd); return -1; }
  105. if (ioctl(fd, SPI_IOC_RD_MODE, &mode) < 0) { perror("Unable to set RD MODE"); close(fd); return -1; }
  106. if (ioctl(fd, SPI_IOC_WR_BITS_PER_WORD, &bits) < 0) { perror("Unable to set WR_BITS_PER_WORD"); close(fd); return -1; }
  107. if (ioctl(fd, SPI_IOC_RD_BITS_PER_WORD, &bits) < 0) { perror("Unable to set RD_BITS_PER_WORD"); close(fd); return -1; }
  108. if (ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed) < 0) { perror("Unable to set WR_MAX_SPEED_HZ"); close(fd); return -1; }
  109. if (ioctl(fd, SPI_IOC_RD_MAX_SPEED_HZ, &speed) < 0) { perror("Unable to set RD_MAX_SPEED_HZ"); close(fd); return -1; }
  110. rv = 0;
  111. while (bufsz >= 4096) {
  112. tr[rv].tx_buf = (uintptr_t) wrbuf;
  113. tr[rv].rx_buf = (uintptr_t) rdbuf;
  114. tr[rv].len = 4096;
  115. tr[rv].delay_usecs = 1;
  116. tr[rv].speed_hz = speed;
  117. tr[rv].bits_per_word = bits;
  118. bufsz -= 4096;
  119. wrbuf += 4096; rdbuf += 4096; rv ++;
  120. }
  121. if (bufsz > 0) {
  122. tr[rv].tx_buf = (uintptr_t) wrbuf;
  123. tr[rv].rx_buf = (uintptr_t) rdbuf;
  124. tr[rv].len = (unsigned)bufsz;
  125. tr[rv].delay_usecs = 1;
  126. tr[rv].speed_hz = speed;
  127. tr[rv].bits_per_word = bits;
  128. rv ++;
  129. }
  130. i = rv;
  131. for (j = 0; j < i; j++) {
  132. rv = (int)ioctl(fd, SPI_IOC_MESSAGE(1), (intptr_t)&tr[j]);
  133. if (rv < 0) { perror("WTF!"); close(fd); return -1; }
  134. }
  135. close(fd);
  136. spi_reset();
  137. return 0;
  138. }
  139. #define SPIMAXSZ 256*1024
  140. static unsigned char spibuf[SPIMAXSZ], spibuf_rx[SPIMAXSZ];
  141. static unsigned spibufsz;
  142. void spi_clear_buf(void) { spibufsz = 0; }
  143. unsigned char *spi_getrxbuf(void) { return spibuf_rx; }
  144. unsigned char *spi_gettxbuf(void) { return spibuf; }
  145. unsigned spi_getbufsz(void) { return spibufsz; }
  146. void spi_emit_buf_reverse(const char *str, unsigned sz)
  147. {
  148. unsigned i;
  149. if (spibufsz + sz >= SPIMAXSZ) return;
  150. for (i = 0; i < sz; i++) { // Reverse bit order in each byte!
  151. unsigned char p = str[i];
  152. p = ((p & 0xaa)>>1) | ((p & 0x55) << 1);
  153. p = ((p & 0xcc)>>2) | ((p & 0x33) << 2);
  154. p = ((p & 0xf0)>>4) | ((p & 0x0f) << 4);
  155. spibuf[spibufsz+i] = p;
  156. }
  157. spibufsz += sz;
  158. }
  159. void spi_emit_buf(const char *str, unsigned sz)
  160. {
  161. unsigned i;
  162. if (spibufsz + sz >= SPIMAXSZ) return;
  163. memcpy(&spibuf[spibufsz], str, sz); spibufsz += sz;
  164. }
  165. /* TODO: in production, emit just bit-sequences! Eliminate padding to byte! */
  166. void spi_emit_break(void) { spi_emit_buf("\x4", 1); }
  167. void spi_emit_fsync(void) { spi_emit_buf("\x6", 1); }
  168. void spi_emit_fasync(int n) {
  169. int i;
  170. for (i = 0; i < n; i++) {
  171. spi_emit_buf("\x5", 1);
  172. }
  173. }
  174. void spi_emit_nop(int n) {
  175. int i;
  176. for (i = 0; i < n; n++) {
  177. spi_emit_buf("\x0", 1);
  178. }
  179. }
  180. void spi_emit_data(unsigned addr, const char *buf, unsigned len)
  181. {
  182. unsigned char otmp[3];
  183. if (len < 4 || len > 128) return; /* This cannot be programmed in single frame! */
  184. len /= 4; /* Strip */
  185. otmp[0] = (len - 1) | 0xE0;
  186. otmp[1] = (addr >> 8)&0xFF; otmp[2] = addr & 0xFF;
  187. spi_emit_buf(otmp, 3);
  188. spi_emit_buf_reverse(buf, len*4);
  189. }