driver-bitmain.c 86 KB

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  1. /*
  2. * Copyright 2012-2013 Lingchao Xu <lingchao.xu@bitmaintech.com>
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 3 of the License, or (at your option)
  7. * any later version. See COPYING for more details.
  8. */
  9. #include "config.h"
  10. #include <limits.h>
  11. #include <pthread.h>
  12. #include <stdio.h>
  13. #include <sys/time.h>
  14. #include <sys/types.h>
  15. #include <dirent.h>
  16. #include <unistd.h>
  17. #ifndef WIN32
  18. #include <sys/select.h>
  19. #include <termios.h>
  20. #include <sys/stat.h>
  21. #include <fcntl.h>
  22. #ifndef O_CLOEXEC
  23. #define O_CLOEXEC 0
  24. #endif
  25. #else
  26. #include "compat.h"
  27. #include <windows.h>
  28. #include <io.h>
  29. #endif
  30. #include "elist.h"
  31. #include "miner.h"
  32. #include "usbutils.h"
  33. #include "driver-bitmain.h"
  34. #include "hexdump.c"
  35. #include "util.h"
  36. struct cgpu_info *btm_alloc_cgpu(struct device_drv *drv, int threads)
  37. {
  38. struct cgpu_info *cgpu = calloc(1, sizeof(*cgpu));
  39. if (unlikely(!cgpu))
  40. quit(1, "Failed to calloc cgpu for %s in usb_alloc_cgpu", drv->dname);
  41. cgpu->drv = drv;
  42. cgpu->deven = DEV_ENABLED;
  43. cgpu->threads = threads;
  44. cgpu->usbinfo.nodev = true;
  45. cgpu->device_fd = -1;
  46. cglock_init(&cgpu->usbinfo.devlock);
  47. return cgpu;
  48. }
  49. struct cgpu_info *btm_free_cgpu(struct cgpu_info *cgpu)
  50. {
  51. if (cgpu->drv->copy)
  52. free(cgpu->drv);
  53. if(cgpu->device_path) {
  54. free(cgpu->device_path);
  55. }
  56. free(cgpu);
  57. return NULL;
  58. }
  59. bool btm_init(struct cgpu_info *cgpu, const char * devpath)
  60. {
  61. #ifdef WIN32
  62. int fd = -1;
  63. signed short timeout = 1;
  64. unsigned long baud = 115200;
  65. bool purge = true;
  66. HANDLE hSerial = NULL;
  67. applog(LOG_DEBUG, "btm_init cgpu->device_fd=%d", cgpu->device_fd);
  68. if(cgpu->device_fd >= 0) {
  69. return false;
  70. }
  71. hSerial = CreateFile(devpath, GENERIC_READ | GENERIC_WRITE, 0, NULL, OPEN_EXISTING, 0, NULL);
  72. if (unlikely(hSerial == INVALID_HANDLE_VALUE))
  73. {
  74. DWORD e = GetLastError();
  75. switch (e) {
  76. case ERROR_ACCESS_DENIED:
  77. applog(LOG_DEBUG, "Do not have user privileges required to open %s", devpath);
  78. break;
  79. case ERROR_SHARING_VIOLATION:
  80. applog(LOG_DEBUG, "%s is already in use by another process", devpath);
  81. break;
  82. default:
  83. applog(LOG_DEBUG, "Open %s failed, GetLastError:%d", devpath, (int)e);
  84. break;
  85. }
  86. } else {
  87. // thanks to af_newbie for pointers about this
  88. COMMCONFIG comCfg = {0};
  89. comCfg.dwSize = sizeof(COMMCONFIG);
  90. comCfg.wVersion = 1;
  91. comCfg.dcb.DCBlength = sizeof(DCB);
  92. comCfg.dcb.BaudRate = baud;
  93. comCfg.dcb.fBinary = 1;
  94. comCfg.dcb.fDtrControl = DTR_CONTROL_ENABLE;
  95. comCfg.dcb.fRtsControl = RTS_CONTROL_ENABLE;
  96. comCfg.dcb.ByteSize = 8;
  97. SetCommConfig(hSerial, &comCfg, sizeof(comCfg));
  98. // Code must specify a valid timeout value (0 means don't timeout)
  99. const DWORD ctoms = (timeout * 100);
  100. COMMTIMEOUTS cto = {ctoms, 0, ctoms, 0, ctoms};
  101. SetCommTimeouts(hSerial, &cto);
  102. if (purge) {
  103. PurgeComm(hSerial, PURGE_RXABORT);
  104. PurgeComm(hSerial, PURGE_TXABORT);
  105. PurgeComm(hSerial, PURGE_RXCLEAR);
  106. PurgeComm(hSerial, PURGE_TXCLEAR);
  107. }
  108. fd = _open_osfhandle((intptr_t)hSerial, 0);
  109. }
  110. #else
  111. int fd = -1;
  112. if(cgpu->device_fd >= 0) {
  113. return false;
  114. }
  115. fd = open(devpath, O_RDWR|O_EXCL|O_NONBLOCK);
  116. #endif
  117. if(fd == -1) {
  118. applog(LOG_DEBUG, "%s open %s error %d",
  119. cgpu->drv->dname, devpath, errno);
  120. return false;
  121. }
  122. cgpu->device_path = strdup(devpath);
  123. cgpu->device_fd = fd;
  124. cgpu->usbinfo.nodev = false;
  125. applog(LOG_DEBUG, "btm_init open device fd = %d", cgpu->device_fd);
  126. return true;
  127. }
  128. void btm_uninit(struct cgpu_info *cgpu)
  129. {
  130. applog(LOG_DEBUG, "BTM uninit %s%i", cgpu->drv->name, cgpu->device_fd);
  131. // May have happened already during a failed initialisation
  132. // if release_cgpu() was called due to a USB NODEV(err)
  133. close(cgpu->device_fd);
  134. if(cgpu->device_path) {
  135. free(cgpu->device_path);
  136. cgpu->device_path = NULL;
  137. }
  138. }
  139. void btm_detect(struct device_drv *drv, bool (*device_detect)(const char*))
  140. {
  141. ssize_t count, i;
  142. applog(LOG_DEBUG, "BTM scan devices: checking for %s devices", drv->name);
  143. if (total_count >= total_limit) {
  144. applog(LOG_DEBUG, "BTM scan devices: total limit %d reached", total_limit);
  145. return;
  146. }
  147. if (drv_count[drv->drv_id].count >= drv_count[drv->drv_id].limit) {
  148. applog(LOG_DEBUG,
  149. "BTM scan devices: %s limit %d reached",
  150. drv->dname, drv_count[drv->drv_id].limit);
  151. return;
  152. }
  153. device_detect("asic");
  154. }
  155. int btm_read(struct cgpu_info *cgpu, char *buf, size_t bufsize)
  156. {
  157. int err = 0;
  158. //applog(LOG_DEBUG, "btm_read ----- %d -----", bufsize);
  159. err = read(cgpu->device_fd, buf, bufsize);
  160. return err;
  161. }
  162. int btm_write(struct cgpu_info *cgpu, char *buf, size_t bufsize)
  163. {
  164. int err = 0;
  165. //applog(LOG_DEBUG, "btm_write ----- %d -----", bufsize);
  166. err = write(cgpu->device_fd, buf, bufsize);
  167. return err;
  168. }
  169. #define BITMAIN_CALC_DIFF1 1
  170. #ifdef WIN32
  171. #define BITMAIN_TEST
  172. #endif
  173. #define BITMAIN_TEST_PRINT_WORK 0
  174. #ifdef BITMAIN_TEST
  175. #define BITMAIN_TEST_NUM 19
  176. #define BITMAIN_TEST_USENUM 1
  177. int g_test_index = 0;
  178. const char btm_work_test_data[BITMAIN_TEST_NUM][256] = {
  179. "00000002ddc1ce5579dbec17f17fbb8f31ae218a814b2a0c1900f0d90000000100000000b58aa6ca86546b07a5a46698f736c7ca9c0eedc756d8f28ac33c20cc24d792675276f879190afc85b6888022000000800000000000000000000000000000000000000000000000000000000000000000",
  180. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000eb2d45233c5b02de50ddcb9049ba16040e0ba00e9750a474eec75891571d925b52dfda4a190266667145b02f000000800000000000000000000000000000000000000000000000000000000000000000",
  181. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000090c7d3743e0b0562e4f56d3dd35cece3c5e8275d0abb21bf7e503cb72bd7ed3b52dfda4a190266667bbb58d7000000800000000000000000000000000000000000000000000000000000000000000000",
  182. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000006e0561da06022bfbb42c5ecd74a46bfd91934f201b777e9155cc6c3674724ec652dfda4a19026666a0cd827b000000800000000000000000000000000000000000000000000000000000000000000000",
  183. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000000312f42ce4964cc23f2d8c039f106f25ddd58e10a1faed21b3bba4b0e621807b52dfda4a1902666629c9497d000000800000000000000000000000000000000000000000000000000000000000000000",
  184. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000033093a6540dbe8f7f3d19e3d2af05585ac58dafad890fa9a942e977334a23d6e52dfda4a190266665ae95079000000800000000000000000000000000000000000000000000000000000000000000000",
  185. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000bd7893057d06e69705bddf9a89c7bac6b40c5b32f15e2295fc8c5edf491ea24952dfda4a190266664b89b4d3000000800000000000000000000000000000000000000000000000000000000000000000",
  186. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000075e66f533e53837d14236a793ee4e493985642bc39e016b9e63adf14a584a2aa52dfda4a19026666ab5d638d000000800000000000000000000000000000000000000000000000000000000000000000",
  187. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d936f90c5db5f0fe1d017344443854fbf9e40a07a9b7e74fedc8661c23162bff52dfda4a19026666338e79cb000000800000000000000000000000000000000000000000000000000000000000000000",
  188. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d2c1a7d279a4355b017bc0a4b0a9425707786729f21ee18add3fda4252a31a4152dfda4a190266669bc90806000000800000000000000000000000000000000000000000000000000000000000000000",
  189. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000ad36d19f33d04ca779942843890bc3b083cec83a4b60b6c45cf7d21fc187746552dfda4a1902666675d81ab7000000800000000000000000000000000000000000000000000000000000000000000000",
  190. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000093b809cf82b76082eacb55bc35b79f31882ed0976fd102ef54783cd24341319b52dfda4a1902666642ab4e42000000800000000000000000000000000000000000000000000000000000000000000000",
  191. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000007411ff315430a7bbf41de8a685d457e82d5177c05640d6a4436a40f39e99667852dfda4a190266662affa4b5000000800000000000000000000000000000000000000000000000000000000000000000",
  192. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000001ad0db5b9e1e2b57c8d3654c160f5a51067521eab7e340a270639d97f00a3fa252dfda4a1902666601a47bb6000000800000000000000000000000000000000000000000000000000000000000000000",
  193. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000022e055c442c46bbe16df68603a26891f6e4cf85b90102b39fd7cadb602b4e34552dfda4a1902666695d33cea000000800000000000000000000000000000000000000000000000000000000000000000",
  194. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000009c8baf5a8a1e16de2d6ae949d5fec3ed751f10dcd4c99810f2ce08040fb9e31d52dfda4a19026666fe78849d000000800000000000000000000000000000000000000000000000000000000000000000",
  195. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000e5655532b414887f35eb4652bc7b11ebac12891f65bc08cbe0ce5b277b9e795152dfda4a19026666fcc0d1d1000000800000000000000000000000000000000000000000000000000000000000000000",
  196. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000f272c5508704e2b62dd1c30ea970372c40bf00f9203f9bf69d456b4a7fbfffe352dfda4a19026666c03d4399000000800000000000000000000000000000000000000000000000000000000000000000",
  197. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000fca3b4531ba627ad9b0e23cdd84c888952c23810df196e9c6db0bcecba6a830952dfda4a19026666c14009cb000000800000000000000000000000000000000000000000000000000000000000000000"
  198. };
  199. const char btm_work_test_midstate[BITMAIN_TEST_NUM][256] = {
  200. "2d8738e7f5bcf76dcb8316fec772e20e240cd58c88d47f2d3f5a6a9547ed0a35",
  201. "d31b6ce09c0bfc2af6f3fe3a03475ebefa5aa191fa70a327a354b2c22f9692f1",
  202. "84a8c8224b80d36caeb42eff2a100f634e1ff873e83fd02ef1306a34abef9dbe",
  203. "059882159439b9b32968c79a93c5521e769dbea9d840f56c2a17b9ad87e530b8",
  204. "17fa435d05012574f8f1da26994cc87b6cb9660b5e82072dc6a0881cec150a0d",
  205. "92a28cc5ec4ba6a2688471dfe2032b5fe97c805ca286c503e447d6749796c6af",
  206. "1677a03516d6e9509ac37e273d2482da9af6e077abe8392cdca6a30e916a7ae9",
  207. "50bbe09f1b8ac18c97aeb745d5d2c3b5d669b6ac7803e646f65ac7b763a392d1",
  208. "e46a0022ebdc303a7fb1a0ebfa82b523946c312e745e5b8a116b17ae6b4ce981",
  209. "8f2f61e7f5b4d76d854e6d266acfff4d40347548216838ccc4ef3b9e43d3c9ea",
  210. "0a450588ae99f75d676a08d0326e1ea874a3497f696722c78a80c7b6ee961ea6",
  211. "3c4c0fc2cf040b806c51b46de9ec0dcc678a7cc5cf3eff11c6c03de3bc7818cc",
  212. "f6c7c785ab5daddb8f98e5f854f2cb41879fcaf47289eb2b4196fefc1b28316f",
  213. "005312351ccb0d0794779f5023e4335b5cad221accf0dfa3da7b881266fa9f5a",
  214. "7b26d189c6bba7add54143179aadbba7ccaeff6887bd8d5bec9597d5716126e6",
  215. "a4718f4c801e7ddf913a9474eb71774993525684ffea1915f767ab16e05e6889",
  216. "6b6226a8c18919d0e55684638d33a6892a00d22492cc2f5906ca7a4ac21c74a7",
  217. "383114dccd1cb824b869158aa2984d157fcb02f46234ceca65943e919329e697",
  218. "d4d478df3016852b27cb1ae9e1e98d98617f8d0943bf9dc1217f47f817236222"
  219. };
  220. #endif
  221. char opt_bitmain_dev[256] = {0};
  222. bool opt_bitmain_hwerror = false;
  223. bool opt_bitmain_checkall = false;
  224. bool opt_bitmain_checkn2diff = false;
  225. bool opt_bitmain_dev_usb = true;
  226. bool opt_bitmain_nobeeper = false;
  227. bool opt_bitmain_notempoverctrl = false;
  228. bool opt_bitmain_homemode = false;
  229. int opt_bitmain_temp = BITMAIN_TEMP_TARGET;
  230. int opt_bitmain_overheat = BITMAIN_TEMP_OVERHEAT;
  231. int opt_bitmain_fan_min = BITMAIN_DEFAULT_FAN_MIN_PWM;
  232. int opt_bitmain_fan_max = BITMAIN_DEFAULT_FAN_MAX_PWM;
  233. int opt_bitmain_freq_min = BITMAIN_MIN_FREQUENCY;
  234. int opt_bitmain_freq_max = BITMAIN_MAX_FREQUENCY;
  235. bool opt_bitmain_auto;
  236. static int option_offset = -1;
  237. // --------------------------------------------------------------
  238. // CRC16 check table
  239. // --------------------------------------------------------------
  240. const uint8_t chCRCHTalbe[] = // CRC high byte table
  241. {
  242. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  243. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  244. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  245. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  246. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  247. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  248. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  249. 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  250. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  251. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  252. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  253. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  254. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  255. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  256. 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  257. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  258. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  259. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  260. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  261. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  262. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  263. 0x00, 0xC1, 0x81, 0x40
  264. };
  265. const uint8_t chCRCLTalbe[] = // CRC low byte table
  266. {
  267. 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7,
  268. 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E,
  269. 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9,
  270. 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC,
  271. 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
  272. 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32,
  273. 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D,
  274. 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38,
  275. 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF,
  276. 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
  277. 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1,
  278. 0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4,
  279. 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB,
  280. 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA,
  281. 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
  282. 0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0,
  283. 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97,
  284. 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E,
  285. 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89,
  286. 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
  287. 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83,
  288. 0x41, 0x81, 0x80, 0x40
  289. };
  290. static uint16_t CRC16(const uint8_t* p_data, uint16_t w_len)
  291. {
  292. uint8_t chCRCHi = 0xFF; // CRC high byte initialize
  293. uint8_t chCRCLo = 0xFF; // CRC low byte initialize
  294. uint16_t wIndex = 0; // CRC cycling index
  295. while (w_len--) {
  296. wIndex = chCRCLo ^ *p_data++;
  297. chCRCLo = chCRCHi ^ chCRCHTalbe[wIndex];
  298. chCRCHi = chCRCLTalbe[wIndex];
  299. }
  300. return ((chCRCHi << 8) | chCRCLo);
  301. }
  302. static uint32_t num2bit(int num) {
  303. switch(num) {
  304. case 0: return 0x80000000;
  305. case 1: return 0x40000000;
  306. case 2: return 0x20000000;
  307. case 3: return 0x10000000;
  308. case 4: return 0x08000000;
  309. case 5: return 0x04000000;
  310. case 6: return 0x02000000;
  311. case 7: return 0x01000000;
  312. case 8: return 0x00800000;
  313. case 9: return 0x00400000;
  314. case 10: return 0x00200000;
  315. case 11: return 0x00100000;
  316. case 12: return 0x00080000;
  317. case 13: return 0x00040000;
  318. case 14: return 0x00020000;
  319. case 15: return 0x00010000;
  320. case 16: return 0x00008000;
  321. case 17: return 0x00004000;
  322. case 18: return 0x00002000;
  323. case 19: return 0x00001000;
  324. case 20: return 0x00000800;
  325. case 21: return 0x00000400;
  326. case 22: return 0x00000200;
  327. case 23: return 0x00000100;
  328. case 24: return 0x00000080;
  329. case 25: return 0x00000040;
  330. case 26: return 0x00000020;
  331. case 27: return 0x00000010;
  332. case 28: return 0x00000008;
  333. case 29: return 0x00000004;
  334. case 30: return 0x00000002;
  335. case 31: return 0x00000001;
  336. default: return 0x00000000;
  337. }
  338. }
  339. static bool get_options(int this_option_offset, int *baud, int *chain_num,
  340. int *asic_num, int *timeout, int *frequency, char * frequency_t, uint8_t * reg_data, uint8_t * voltage, char * voltage_t)
  341. {
  342. char buf[BUFSIZ+1];
  343. char *ptr, *comma, *colon, *colon2, *colon3, *colon4, *colon5, *colon6;
  344. size_t max;
  345. int i, tmp;
  346. if (opt_bitmain_options == NULL)
  347. buf[0] = '\0';
  348. else {
  349. ptr = opt_bitmain_options;
  350. for (i = 0; i < this_option_offset; i++) {
  351. comma = strchr(ptr, ',');
  352. if (comma == NULL)
  353. break;
  354. ptr = comma + 1;
  355. }
  356. comma = strchr(ptr, ',');
  357. if (comma == NULL)
  358. max = strlen(ptr);
  359. else
  360. max = comma - ptr;
  361. if (max > BUFSIZ)
  362. max = BUFSIZ;
  363. strncpy(buf, ptr, max);
  364. buf[max] = '\0';
  365. }
  366. if (!(*buf))
  367. return false;
  368. colon = strchr(buf, ':');
  369. if (colon)
  370. *(colon++) = '\0';
  371. tmp = atoi(buf);
  372. switch (tmp) {
  373. case 115200:
  374. *baud = 115200;
  375. break;
  376. case 57600:
  377. *baud = 57600;
  378. break;
  379. case 38400:
  380. *baud = 38400;
  381. break;
  382. case 19200:
  383. *baud = 19200;
  384. break;
  385. default:
  386. quit(1, "Invalid bitmain-options for baud (%s) "
  387. "must be 115200, 57600, 38400 or 19200", buf);
  388. }
  389. if (colon && *colon) {
  390. colon2 = strchr(colon, ':');
  391. if (colon2)
  392. *(colon2++) = '\0';
  393. if (*colon) {
  394. tmp = atoi(colon);
  395. if (tmp > 0) {
  396. *chain_num = tmp;
  397. } else {
  398. quit(1, "Invalid bitmain-options for "
  399. "chain_num (%s) must be 1 ~ %d",
  400. colon, BITMAIN_DEFAULT_CHAIN_NUM);
  401. }
  402. }
  403. if (colon2 && *colon2) {
  404. colon3 = strchr(colon2, ':');
  405. if (colon3)
  406. *(colon3++) = '\0';
  407. tmp = atoi(colon2);
  408. if (tmp > 0 && tmp <= BITMAIN_DEFAULT_ASIC_NUM)
  409. *asic_num = tmp;
  410. else {
  411. quit(1, "Invalid bitmain-options for "
  412. "asic_num (%s) must be 1 ~ %d",
  413. colon2, BITMAIN_DEFAULT_ASIC_NUM);
  414. }
  415. if (colon3 && *colon3) {
  416. colon4 = strchr(colon3, ':');
  417. if (colon4)
  418. *(colon4++) = '\0';
  419. tmp = atoi(colon3);
  420. if (tmp > 0 && tmp <= 0xff)
  421. *timeout = tmp;
  422. else {
  423. quit(1, "Invalid bitmain-options for "
  424. "timeout (%s) must be 1 ~ %d",
  425. colon3, 0xff);
  426. }
  427. if (colon4 && *colon4) {
  428. colon5 = strchr(colon4, ':');
  429. if(colon5)
  430. *(colon5++) = '\0';
  431. tmp = atoi(colon4);
  432. if (tmp < BITMAIN_MIN_FREQUENCY || tmp > BITMAIN_MAX_FREQUENCY) {
  433. quit(1, "Invalid bitmain-options for frequency, must be %d <= frequency <= %d",
  434. BITMAIN_MIN_FREQUENCY, BITMAIN_MAX_FREQUENCY);
  435. } else {
  436. *frequency = tmp;
  437. strcpy(frequency_t, colon4);
  438. }
  439. if (colon5 && *colon5) {
  440. colon6 = strchr(colon5, ':');
  441. if(colon6)
  442. *(colon6++) = '\0';
  443. if(strlen(colon5) > 8 || strlen(colon5)%2 != 0 || strlen(colon5)/2 == 0) {
  444. quit(1, "Invalid bitmain-options for reg data, must be hex now: %s",
  445. colon5);
  446. }
  447. memset(reg_data, 0, 4);
  448. if(!hex2bin(reg_data, colon5, strlen(colon5)/2)) {
  449. quit(1, "Invalid bitmain-options for reg data, hex2bin error now: %s",
  450. colon5);
  451. }
  452. if (colon6 && *colon6) {
  453. if(strlen(colon6) > 4 || strlen(colon6)%2 != 0 || strlen(colon6)/2 == 0) {
  454. quit(1, "Invalid bitmain-options for voltage data, must be hex now: %s",
  455. colon6);
  456. }
  457. memset(voltage, 0, 2);
  458. if(!hex2bin(voltage, colon6, strlen(colon6)/2)) {
  459. quit(1, "Invalid bitmain-options for voltage data, hex2bin error now: %s",
  460. colon5);
  461. } else {
  462. sprintf(voltage_t, "%02x%02x", voltage[0], voltage[1]);
  463. voltage_t[5] = 0;
  464. voltage_t[4] = voltage_t[3];
  465. voltage_t[3] = voltage_t[2];
  466. voltage_t[2] = voltage_t[1];
  467. voltage_t[1] = '.';
  468. }
  469. }
  470. }
  471. }
  472. }
  473. }
  474. }
  475. return true;
  476. }
  477. static bool get_option_freq(int *timeout, int *frequency, char * frequency_t, uint8_t * reg_data)
  478. {
  479. char buf[BUFSIZ+1];
  480. char *ptr, *comma, *colon, *colon2;
  481. size_t max;
  482. int i, tmp;
  483. if (opt_bitmain_freq == NULL)
  484. return true;
  485. else {
  486. ptr = opt_bitmain_freq;
  487. comma = strchr(ptr, ',');
  488. if (comma == NULL)
  489. max = strlen(ptr);
  490. else
  491. max = comma - ptr;
  492. if (max > BUFSIZ)
  493. max = BUFSIZ;
  494. strncpy(buf, ptr, max);
  495. buf[max] = '\0';
  496. }
  497. if (!(*buf))
  498. return false;
  499. colon = strchr(buf, ':');
  500. if (colon)
  501. *(colon++) = '\0';
  502. tmp = atoi(buf);
  503. if (tmp > 0 && tmp <= 0xff)
  504. *timeout = tmp;
  505. else {
  506. quit(1, "Invalid bitmain-freq for "
  507. "timeout (%s) must be 1 ~ %d",
  508. buf, 0xff);
  509. }
  510. if (colon && *colon) {
  511. colon2 = strchr(colon, ':');
  512. if (colon2)
  513. *(colon2++) = '\0';
  514. tmp = atoi(colon);
  515. if (tmp < BITMAIN_MIN_FREQUENCY || tmp > BITMAIN_MAX_FREQUENCY) {
  516. quit(1, "Invalid bitmain-freq for frequency, must be %d <= frequency <= %d",
  517. BITMAIN_MIN_FREQUENCY, BITMAIN_MAX_FREQUENCY);
  518. } else {
  519. *frequency = tmp;
  520. strcpy(frequency_t, colon);
  521. }
  522. if (colon2 && *colon2) {
  523. if(strlen(colon2) > 8 || strlen(colon2)%2 != 0 || strlen(colon2)/2 == 0) {
  524. quit(1, "Invalid bitmain-freq for reg data, must be hex now: %s",
  525. colon2);
  526. }
  527. memset(reg_data, 0, 4);
  528. if(!hex2bin(reg_data, colon2, strlen(colon2)/2)) {
  529. quit(1, "Invalid bitmain-freq for reg data, hex2bin error now: %s",
  530. colon2);
  531. }
  532. }
  533. }
  534. return true;
  535. }
  536. static bool get_option_voltage(uint8_t * voltage, char * voltage_t)
  537. {
  538. if(opt_bitmain_voltage) {
  539. if(strlen(opt_bitmain_voltage) > 4 || strlen(opt_bitmain_voltage)%2 != 0 || strlen(opt_bitmain_voltage)/2 == 0) {
  540. applog(LOG_ERR, "Invalid bitmain-voltage for voltage data, must be hex now: %s,set default_volttage",
  541. opt_bitmain_voltage);
  542. return false;
  543. }
  544. memset(voltage, 0, 2);
  545. if(!hex2bin(voltage, opt_bitmain_voltage, strlen(opt_bitmain_voltage)/2)) {
  546. quit(1, "Invalid bitmain-voltage for voltage data, hex2bin error now: %s",
  547. opt_bitmain_voltage);
  548. } else {
  549. sprintf(voltage_t, "%02x%02x", voltage[0], voltage[1]);
  550. voltage_t[5] = 0;
  551. voltage_t[4] = voltage_t[3];
  552. voltage_t[3] = voltage_t[2];
  553. voltage_t[2] = voltage_t[1];
  554. voltage_t[1] = '.';
  555. }
  556. }
  557. return true;
  558. }
  559. static int bitmain_set_txconfig(struct bitmain_txconfig_token *bm,
  560. uint8_t reset, uint8_t fan_eft, uint8_t timeout_eft, uint8_t frequency_eft,
  561. uint8_t voltage_eft, uint8_t chain_check_time_eft, uint8_t chip_config_eft, uint8_t hw_error_eft,
  562. uint8_t beeper_ctrl, uint8_t temp_over_ctrl,uint8_t fan_home_mode,
  563. uint8_t chain_num, uint8_t asic_num, uint8_t fan_pwm_data, uint8_t timeout_data,
  564. uint16_t frequency, uint8_t * voltage, uint8_t chain_check_time,
  565. uint8_t chip_address, uint8_t reg_address, uint8_t * reg_data)
  566. {
  567. uint16_t crc = 0;
  568. int datalen = 0;
  569. uint8_t version = 0;
  570. uint8_t * sendbuf = (uint8_t *)bm;
  571. if (unlikely(!bm)) {
  572. applog(LOG_WARNING, "bitmain_set_txconfig bitmain_txconfig_token is null");
  573. return -1;
  574. }
  575. if (unlikely(timeout_data <= 0 || asic_num <= 0 || chain_num <= 0)) {
  576. applog(LOG_WARNING, "bitmain_set_txconfig parameter invalid timeout_data(%d) asic_num(%d) chain_num(%d)",
  577. timeout_data, asic_num, chain_num);
  578. return -1;
  579. }
  580. datalen = sizeof(struct bitmain_txconfig_token);
  581. memset(bm, 0, datalen);
  582. bm->token_type = BITMAIN_TOKEN_TYPE_TXCONFIG;
  583. bm->version = version;
  584. bm->length = datalen-4;
  585. bm->length = htole16(bm->length);
  586. bm->reset = reset;
  587. bm->fan_eft = fan_eft;
  588. bm->timeout_eft = timeout_eft;
  589. bm->frequency_eft = frequency_eft;
  590. bm->voltage_eft = voltage_eft;
  591. bm->chain_check_time_eft = chain_check_time_eft;
  592. bm->chip_config_eft = chip_config_eft;
  593. bm->hw_error_eft = hw_error_eft;
  594. bm->beeper_ctrl = beeper_ctrl;
  595. bm->temp_over_ctrl = temp_over_ctrl;
  596. bm->fan_home_mode = fan_home_mode;
  597. sendbuf[4] = htole8(sendbuf[4]);
  598. sendbuf[5] = htole8(sendbuf[5]);
  599. bm->chain_num = chain_num;
  600. bm->asic_num = asic_num;
  601. bm->fan_pwm_data = fan_pwm_data;
  602. bm->timeout_data = timeout_data;
  603. bm->frequency = htole16(frequency);
  604. memcpy(bm->voltage, voltage, 2);
  605. bm->chain_check_time = chain_check_time;
  606. memcpy(bm->reg_data, reg_data, 4);
  607. bm->chip_address = chip_address;
  608. bm->reg_address = reg_address;
  609. crc = CRC16((uint8_t *)bm, datalen-2);
  610. bm->crc = htole16(crc);
  611. applog(LOG_ERR, "BTM TxConfigToken:v(%d) reset(%d) fan_e(%d) tout_e(%d) fq_e(%d) vt_e(%d) chainc_e(%d) chipc_e(%d) hw_e(%d) b_c(%d) t_c(%d) f_m(%d) mnum(%d) anum(%d) fanpwmdata(%d) toutdata(%d) freq(%d) volt(%02x%02x) chainctime(%d) regdata(%02x%02x%02x%02x) chipaddr(%02x) regaddr(%02x) crc(%04x)",
  612. version, reset, fan_eft, timeout_eft, frequency_eft, voltage_eft,
  613. chain_check_time_eft, chip_config_eft, hw_error_eft, beeper_ctrl, temp_over_ctrl,fan_home_mode,chain_num, asic_num,
  614. fan_pwm_data, timeout_data, frequency, voltage[0], voltage[1],
  615. chain_check_time, reg_data[0], reg_data[1], reg_data[2], reg_data[3], chip_address, reg_address, crc);
  616. return datalen;
  617. }
  618. static int bitmain_set_txtask(uint8_t * sendbuf,
  619. unsigned int * last_work_block, struct work **works, int work_array_size, int work_array, int sendworkcount, int * sendcount)
  620. {
  621. uint16_t crc = 0;
  622. uint32_t work_id = 0;
  623. uint8_t version = 0;
  624. int datalen = 0;
  625. int i = 0;
  626. int index = work_array;
  627. uint8_t new_block= 0;
  628. char * ob_hex = NULL;
  629. struct bitmain_txtask_token *bm = (struct bitmain_txtask_token *)sendbuf;
  630. *sendcount = 0;
  631. int cursendcount = 0;
  632. int diff = 0;
  633. unsigned int difftmp = 0;
  634. unsigned int pooldiff = 0;
  635. uint64_t netdifftmp = 0;
  636. int netdiff = 0;
  637. if (unlikely(!bm)) {
  638. applog(LOG_WARNING, "bitmain_set_txtask bitmain_txtask_token is null");
  639. return -1;
  640. }
  641. if (unlikely(!works)) {
  642. applog(LOG_WARNING, "bitmain_set_txtask work is null");
  643. return -1;
  644. }
  645. memset(bm, 0, sizeof(struct bitmain_txtask_token));
  646. bm->token_type = BITMAIN_TOKEN_TYPE_TXTASK;
  647. bm->version = version;
  648. datalen = 10;
  649. applog(LOG_DEBUG, "BTM send work count %d -----", sendworkcount);
  650. for(i = 0; i < sendworkcount; i++) {
  651. if(index > work_array_size) {
  652. index = 0;
  653. }
  654. if(works[index]) {
  655. if(works[index]->work_block > *last_work_block) {
  656. applog(LOG_ERR, "BTM send task new block %d old(%d)", works[index]->work_block, *last_work_block);
  657. new_block = 1;
  658. *last_work_block = works[index]->work_block;
  659. }
  660. #ifdef BITMAIN_TEST
  661. if(!hex2bin(works[index]->data, btm_work_test_data[g_test_index], 128)) {
  662. applog(LOG_DEBUG, "BTM send task set test data error");
  663. }
  664. if(!hex2bin(works[index]->midstate, btm_work_test_midstate[g_test_index], 32)) {
  665. applog(LOG_DEBUG, "BTM send task set test midstate error");
  666. }
  667. g_test_index++;
  668. if(g_test_index >= BITMAIN_TEST_USENUM) {
  669. g_test_index = 0;
  670. }
  671. applog(LOG_DEBUG, "BTM test index = %d", g_test_index);
  672. #endif
  673. work_id = works[index]->id;
  674. bm->works[cursendcount].work_id = htole32(work_id);
  675. applog(LOG_DEBUG, "BTM send task work id:%d %d", bm->works[cursendcount].work_id, work_id);
  676. memcpy(bm->works[cursendcount].midstate, works[index]->midstate, 32);
  677. memcpy(bm->works[cursendcount].data2, works[index]->data + 64, 12);
  678. if(cursendcount == 0) {
  679. pooldiff = (unsigned int)(works[index]->sdiff);
  680. difftmp = pooldiff;
  681. while(1) {
  682. difftmp = difftmp >> 1;
  683. if(difftmp > 0) {
  684. diff++;
  685. if(diff >= 255) {
  686. break;
  687. }
  688. } else {
  689. break;
  690. }
  691. }
  692. }
  693. if(BITMAIN_TEST_PRINT_WORK) {
  694. ob_hex = bin2hex(works[index]->data, 76);
  695. applog(LOG_ERR, "work %d data: %s", works[index]->id, ob_hex);
  696. free(ob_hex);
  697. }
  698. cursendcount++;
  699. }
  700. index++;
  701. }
  702. if(cursendcount <= 0) {
  703. applog(LOG_ERR, "BTM send work count %d", cursendcount);
  704. return 0;
  705. }
  706. netdifftmp = current_diff;
  707. while(netdifftmp > 0) {
  708. netdifftmp = netdifftmp >> 1;
  709. netdiff++;
  710. }
  711. datalen += 48*cursendcount;
  712. bm->length = datalen-4;
  713. bm->length = htole16(bm->length);
  714. //len = datalen-3;
  715. //len = htole16(len);
  716. //memcpy(sendbuf+1, &len, 2);
  717. bm->new_block = new_block;
  718. bm->diff = diff;
  719. bm->net_diff = htole16(netdiff);
  720. sendbuf[4] = htole8(sendbuf[4]);
  721. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  722. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  723. *sendcount = cursendcount;
  724. crc = CRC16(sendbuf, datalen-2);
  725. crc = htole16(crc);
  726. memcpy(sendbuf+datalen-2, &crc, 2);
  727. applog(LOG_DEBUG, "BitMain TxTask Token: v(%d) new_block(%d) diff(%d pool:%d net:%d) work_num(%d) crc(%04x)",
  728. version, new_block, diff, pooldiff,netdiff, cursendcount, crc);
  729. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  730. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  731. return datalen;
  732. }
  733. static int bitmain_set_rxstatus(struct bitmain_rxstatus_token *bm,
  734. uint8_t chip_status_eft, uint8_t detect_get, uint8_t chip_address, uint8_t reg_address)
  735. {
  736. uint16_t crc = 0;
  737. uint8_t version = 0;
  738. int datalen = 0;
  739. uint8_t * sendbuf = (uint8_t *)bm;
  740. if (unlikely(!bm)) {
  741. applog(LOG_WARNING, "bitmain_set_rxstatus bitmain_rxstatus_token is null");
  742. return -1;
  743. }
  744. datalen = sizeof(struct bitmain_rxstatus_token);
  745. memset(bm, 0, datalen);
  746. bm->token_type = BITMAIN_TOKEN_TYPE_RXSTATUS;
  747. bm->version = version;
  748. bm->length = datalen-4;
  749. bm->length = htole16(bm->length);
  750. bm->chip_status_eft = chip_status_eft;
  751. bm->detect_get = detect_get;
  752. sendbuf[4] = htole8(sendbuf[4]);
  753. bm->chip_address = chip_address;
  754. bm->reg_address = reg_address;
  755. crc = CRC16((uint8_t *)bm, datalen-2);
  756. bm->crc = htole16(crc);
  757. applog(LOG_ERR, "BitMain RxStatus Token: v(%d) chip_status_eft(%d) detect_get(%d) chip_address(%02x) reg_address(%02x) crc(%04x)",
  758. version, chip_status_eft, detect_get, chip_address, reg_address, crc);
  759. return datalen;
  760. }
  761. static int bitmain_parse_rxstatus(const uint8_t * data, int datalen, struct bitmain_rxstatus_data *bm)
  762. {
  763. uint16_t crc = 0;
  764. uint8_t version = 0;
  765. int i = 0, j = 0;
  766. int asic_num = 0;
  767. int dataindex = 0;
  768. uint8_t tmp = 0x01;
  769. if (unlikely(!bm)) {
  770. applog(LOG_WARNING, "bitmain_parse_rxstatus bitmain_rxstatus_data is null");
  771. return -1;
  772. }
  773. if (unlikely(!data || datalen <= 0)) {
  774. applog(LOG_WARNING, "bitmain_parse_rxstatus parameter invalid data is null or datalen(%d) error", datalen);
  775. return -1;
  776. }
  777. memset(bm, 0, sizeof(struct bitmain_rxstatus_data));
  778. memcpy(bm, data, 28);
  779. if (bm->data_type != BITMAIN_DATA_TYPE_RXSTATUS) {
  780. applog(LOG_ERR, "bitmain_parse_rxstatus datatype(%02x) error", bm->data_type);
  781. return -1;
  782. }
  783. if (bm->version != version) {
  784. applog(LOG_ERR, "bitmain_parse_rxstatus version(%02x) error", bm->version);
  785. return -1;
  786. }
  787. bm->length = htole16(bm->length);
  788. if (bm->length+4 != datalen) {
  789. applog(LOG_ERR, "bitmain_parse_rxstatus length(%d) datalen(%d) error", bm->length, datalen);
  790. return -1;
  791. }
  792. crc = CRC16(data, datalen-2);
  793. memcpy(&(bm->crc), data+datalen-2, 2);
  794. bm->crc = htole16(bm->crc);
  795. if(crc != bm->crc) {
  796. applog(LOG_ERR, "bitmain_parse_rxstatus check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  797. return -1;
  798. }
  799. bm->fifo_space = htole16(bm->fifo_space);
  800. bm->fan_exist = htole16(bm->fan_exist);
  801. bm->temp_exist = htole32(bm->temp_exist);
  802. bm->nonce_error = htole32(bm->nonce_error);
  803. if(bm->chain_num > BITMAIN_MAX_CHAIN_NUM) {
  804. applog(LOG_ERR, "bitmain_parse_rxstatus chain_num=%d error", bm->chain_num);
  805. return -1;
  806. }
  807. dataindex = 28;
  808. if(bm->chain_num > 0) {
  809. memcpy(bm->chain_asic_num, data+datalen-2-bm->chain_num-bm->temp_num-bm->fan_num, bm->chain_num);
  810. }
  811. for(i = 0; i < bm->chain_num; i++) {
  812. asic_num = bm->chain_asic_num[i];
  813. if(asic_num <= 0) {
  814. asic_num = 1;
  815. } else {
  816. if(asic_num % 32 == 0) {
  817. asic_num = asic_num / 32;
  818. } else {
  819. asic_num = asic_num / 32 + 1;
  820. }
  821. }
  822. memcpy((uint8_t *)bm->chain_asic_exist+i*32, data+dataindex, asic_num*4);
  823. dataindex += asic_num*4;
  824. }
  825. for(i = 0; i < bm->chain_num; i++) {
  826. asic_num = bm->chain_asic_num[i];
  827. if(asic_num <= 0) {
  828. asic_num = 1;
  829. } else {
  830. if(asic_num % 32 == 0) {
  831. asic_num = asic_num / 32;
  832. } else {
  833. asic_num = asic_num / 32 + 1;
  834. }
  835. }
  836. memcpy((uint8_t *)bm->chain_asic_status+i*32, data+dataindex, asic_num*4);
  837. dataindex += asic_num*4;
  838. }
  839. dataindex += bm->chain_num;
  840. if(dataindex + bm->temp_num + bm->fan_num + 2 != datalen) {
  841. applog(LOG_ERR, "bitmain_parse_rxstatus dataindex(%d) chain_num(%d) temp_num(%d) fan_num(%d) not match datalen(%d)",
  842. dataindex, bm->chain_num, bm->temp_num, bm->fan_num, datalen);
  843. return -1;
  844. }
  845. for(i = 0; i < bm->chain_num; i++) {
  846. //bm->chain_asic_status[i] = swab32(bm->chain_asic_status[i]);
  847. for(j = 0; j < 8; j++) {
  848. bm->chain_asic_exist[i*8+j] = htole32(bm->chain_asic_exist[i*8+j]);
  849. bm->chain_asic_status[i*8+j] = htole32(bm->chain_asic_status[i*8+j]);
  850. }
  851. }
  852. if(bm->temp_num > 0) {
  853. memcpy(bm->temp, data+dataindex, bm->temp_num);
  854. dataindex += bm->temp_num;
  855. }
  856. if(bm->fan_num > 0) {
  857. memcpy(bm->fan, data+dataindex, bm->fan_num);
  858. dataindex += bm->fan_num;
  859. }
  860. if(!opt_bitmain_checkall){
  861. if(tmp != htole8(tmp)){
  862. applog(LOG_ERR, "BitMain RxStatus byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  863. memcpy(&tmp,data+4,1);
  864. bm->chip_value_eft = tmp >>7;
  865. bm->get_blk_num = tmp >> 4;
  866. bm->reserved1 = ((tmp << 4) & 0xff) >> 5;
  867. }
  868. found_blocks = bm->get_blk_num;
  869. applog(LOG_ERR, "BitMain RxStatus tmp :0x%02x byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",tmp,*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  870. }
  871. applog(LOG_DEBUG, "BitMain RxStatusData: chipv_e(%d) chainnum(%d) fifos(%d) v1(%d) v2(%d) v3(%d) v4(%d) fann(%d) tempn(%d) fanet(%04x) tempet(%08x) ne(%d) regvalue(%d) crc(%04x)",
  872. bm->chip_value_eft, bm->chain_num, bm->fifo_space, bm->hw_version[0], bm->hw_version[1], bm->hw_version[2], bm->hw_version[3], bm->fan_num, bm->temp_num, bm->fan_exist, bm->temp_exist, bm->nonce_error, bm->reg_value, bm->crc);
  873. applog(LOG_DEBUG, "BitMain RxStatus Data chain info:");
  874. for(i = 0; i < bm->chain_num; i++) {
  875. applog(LOG_DEBUG, "BitMain RxStatus Data chain(%d) asic num=%d asic_exist=%08x asic_status=%08x", i+1, bm->chain_asic_num[i], bm->chain_asic_exist[i*8], bm->chain_asic_status[i*8]);
  876. }
  877. applog(LOG_DEBUG, "BitMain RxStatus Data temp info:");
  878. for(i = 0; i < bm->temp_num; i++) {
  879. applog(LOG_DEBUG, "BitMain RxStatus Data temp(%d) temp=%d", i+1, bm->temp[i]);
  880. }
  881. applog(LOG_DEBUG, "BitMain RxStatus Data fan info:");
  882. for(i = 0; i < bm->fan_num; i++) {
  883. applog(LOG_DEBUG, "BitMain RxStatus Data fan(%d) fan=%d", i+1, bm->fan[i]);
  884. }
  885. return 0;
  886. }
  887. static int bitmain_parse_rxnonce(const uint8_t * data, int datalen, struct bitmain_rxnonce_data *bm, int * nonce_num)
  888. {
  889. int i = 0;
  890. uint16_t crc = 0;
  891. uint8_t version = 0;
  892. int curnoncenum = 0;
  893. if (unlikely(!bm)) {
  894. applog(LOG_ERR, "bitmain_parse_rxnonce bitmain_rxstatus_data null");
  895. return -1;
  896. }
  897. if (unlikely(!data || datalen <= 0)) {
  898. applog(LOG_ERR, "bitmain_parse_rxnonce data null or datalen(%d) error", datalen);
  899. return -1;
  900. }
  901. memcpy(bm, data, sizeof(struct bitmain_rxnonce_data));
  902. if (bm->data_type != BITMAIN_DATA_TYPE_RXNONCE) {
  903. applog(LOG_ERR, "bitmain_parse_rxnonce datatype(%02x) error", bm->data_type);
  904. return -1;
  905. }
  906. if (bm->version != version) {
  907. applog(LOG_ERR, "bitmain_parse_rxnonce version(%02x) error", bm->version);
  908. return -1;
  909. }
  910. bm->length = htole16(bm->length);
  911. if (bm->length+4 != datalen) {
  912. applog(LOG_ERR, "bitmain_parse_rxnonce length(%d) error", bm->length);
  913. return -1;
  914. }
  915. crc = CRC16(data, datalen-2);
  916. memcpy(&(bm->crc), data+datalen-2, 2);
  917. bm->crc = htole16(bm->crc);
  918. if(crc != bm->crc) {
  919. applog(LOG_ERR, "bitmain_parse_rxnonce check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  920. return -1;
  921. }
  922. bm->fifo_space = htole16(bm->fifo_space);
  923. bm->diff = htole16(bm->diff);
  924. bm->total_nonce_num = htole64(bm->total_nonce_num);
  925. curnoncenum = (datalen-14)/8;
  926. applog(LOG_DEBUG, "BitMain RxNonce Data: nonce_num(%d) fifo_space(%d) diff(%d) tnn(%lld)", curnoncenum, bm->fifo_space, bm->diff, bm->total_nonce_num);
  927. for(i = 0; i < curnoncenum; i++) {
  928. bm->nonces[i].work_id = htole32(bm->nonces[i].work_id);
  929. bm->nonces[i].nonce = htole32(bm->nonces[i].nonce);
  930. applog(LOG_DEBUG, "BitMain RxNonce Data %d: work_id(%d) nonce(%08x)(%d)",
  931. i, bm->nonces[i].work_id, bm->nonces[i].nonce, bm->nonces[i].nonce);
  932. }
  933. *nonce_num = curnoncenum;
  934. return 0;
  935. }
  936. static int bitmain_read(struct cgpu_info *bitmain, unsigned char *buf,
  937. size_t bufsize, int timeout, int ep)
  938. {
  939. int err = 0, readlen = 0;
  940. size_t total = 0;
  941. if(bitmain == NULL || buf == NULL || bufsize <= 0) {
  942. applog(LOG_WARNING, "bitmain_read parameter error bufsize(%d)", bufsize);
  943. return -1;
  944. }
  945. if(opt_bitmain_dev_usb) {
  946. #ifdef WIN32
  947. char readbuf[BITMAIN_READBUF_SIZE];
  948. int ofs = 2, cp = 0;
  949. err = usb_read_once_timeout(bitmain, readbuf, bufsize, &readlen, timeout, ep);
  950. applog(LOG_DEBUG, "%s%i: Get bitmain read got readlen %d err %d",
  951. bitmain->drv->name, bitmain->device_id, readlen, err);
  952. if (readlen < 2)
  953. goto out;
  954. while (readlen > 2) {
  955. cp = readlen - 2;
  956. if (cp > 62)
  957. cp = 62;
  958. memcpy(&buf[total], &readbuf[ofs], cp);
  959. total += cp;
  960. readlen -= cp + 2;
  961. ofs += 64;
  962. }
  963. #else
  964. err = usb_read_once_timeout(bitmain, buf, bufsize, &readlen, timeout, ep);
  965. applog(LOG_DEBUG, "%s%i: Get bitmain read got readlen %d err %d",
  966. bitmain->drv->name, bitmain->device_id, readlen, err);
  967. total = readlen;
  968. #endif
  969. } else {
  970. err = btm_read(bitmain, buf, bufsize);
  971. total = err;
  972. }
  973. out:
  974. return total;
  975. }
  976. static int bitmain_write(struct cgpu_info *bitmain, char *buf, ssize_t len, int ep)
  977. {
  978. int err, amount;
  979. if(opt_bitmain_dev_usb) {
  980. err = usb_write(bitmain, buf, len, &amount, ep);
  981. applog(LOG_DEBUG, "%s%i: usb_write got err %d", bitmain->drv->name,
  982. bitmain->device_id, err);
  983. if (unlikely(err != 0)) {
  984. applog(LOG_ERR, "usb_write error on bitmain_write err=%d", err);
  985. return BTM_SEND_ERROR;
  986. }
  987. if (amount != len) {
  988. applog(LOG_ERR, "usb_write length mismatch on bitmain_write amount=%d len=%d", amount, len);
  989. return BTM_SEND_ERROR;
  990. }
  991. } else {
  992. int havelen = 0;
  993. while(havelen < len) {
  994. err = btm_write(bitmain, buf+havelen, len-havelen);
  995. if(err < 0) {
  996. applog(LOG_DEBUG, "%s%i: btm_write got err %d", bitmain->drv->name,
  997. bitmain->device_id, err);
  998. applog(LOG_WARNING, "usb_write error on bitmain_write");
  999. return BTM_SEND_ERROR;
  1000. } else {
  1001. havelen += err;
  1002. }
  1003. }
  1004. }
  1005. return BTM_SEND_OK;
  1006. }
  1007. static int bitmain_send_data(const uint8_t * data, int datalen, struct cgpu_info *bitmain)
  1008. {
  1009. int delay, ret, ep = C_BITMAIN_SEND;
  1010. struct bitmain_info *info = NULL;
  1011. cgtimer_t ts_start;
  1012. if(datalen <= 0) {
  1013. return 0;
  1014. }
  1015. if(data[0] == BITMAIN_TOKEN_TYPE_TXCONFIG) {
  1016. ep = C_BITMAIN_TOKEN_TXCONFIG;
  1017. } else if(data[0] == BITMAIN_TOKEN_TYPE_TXTASK) {
  1018. ep = C_BITMAIN_TOKEN_TXTASK;
  1019. } else if(data[0] == BITMAIN_TOKEN_TYPE_RXSTATUS) {
  1020. ep = C_BITMAIN_TOKEN_RXSTATUS;
  1021. }
  1022. info = bitmain->device_data;
  1023. //delay = datalen * 10 * 1000000;
  1024. //delay = delay / info->baud;
  1025. //delay += 4000;
  1026. if(opt_debug) {
  1027. applog(LOG_DEBUG, "BitMain: Sent(%d):", datalen);
  1028. hexdump(data, datalen);
  1029. }
  1030. //cgsleep_prepare_r(&ts_start);
  1031. //applog(LOG_DEBUG, "----bitmain_send_data start");
  1032. ret = bitmain_write(bitmain, (char *)data, datalen, ep);
  1033. applog(LOG_DEBUG, "----bitmain_send_data stop ret=%d datalen=%d", ret, datalen);
  1034. //cgsleep_us_r(&ts_start, delay);
  1035. //applog(LOG_DEBUG, "BitMain: Sent: Buffer delay: %dus", delay);
  1036. return ret;
  1037. }
  1038. static bool bitmain_decode_nonce(struct thr_info *thr, struct cgpu_info *bitmain,
  1039. struct bitmain_info *info, uint32_t nonce, struct work *work)
  1040. {
  1041. info = bitmain->device_data;
  1042. //info->matching_work[work->subid]++;
  1043. if(opt_bitmain_hwerror) {
  1044. applog(LOG_DEBUG, "BitMain: submit direct nonce = %08x", nonce);
  1045. if(opt_bitmain_checkall) {
  1046. applog(LOG_DEBUG, "BitMain check all");
  1047. return submit_nonce(thr, work, nonce);
  1048. } else {
  1049. if(opt_bitmain_checkn2diff) {
  1050. int diff = 0;
  1051. diff = work->sdiff;
  1052. if(diff&&(diff&(diff-1))) {
  1053. applog(LOG_DEBUG, "BitMain %d not diff 2 submit_nonce", diff);
  1054. return submit_nonce(thr, work, nonce);
  1055. } else {
  1056. applog(LOG_DEBUG, "BitMain %d diff 2 submit_nonce_direct", diff);
  1057. return submit_nonce_direct(thr, work, nonce);
  1058. }
  1059. } else {
  1060. return submit_nonce_direct(thr, work, nonce);
  1061. }
  1062. }
  1063. } else {
  1064. applog(LOG_DEBUG, "BitMain: submit nonce = %08x", nonce);
  1065. return submit_nonce(thr, work, nonce);
  1066. }
  1067. }
  1068. static void bitmain_inc_nvw(struct bitmain_info *info, struct thr_info *thr)
  1069. {
  1070. applog(LOG_INFO, "%s%d: No matching work - HW error",
  1071. thr->cgpu->drv->name, thr->cgpu->device_id);
  1072. inc_hw_errors(thr);
  1073. info->no_matching_work++;
  1074. }
  1075. static inline void record_temp_fan(struct bitmain_info *info, struct bitmain_rxstatus_data *bm, double *temp_avg)
  1076. {
  1077. int i = 0;
  1078. int maxfan = 0, maxtemp = 0;
  1079. *temp_avg = 0;
  1080. info->fan_num = bm->fan_num;
  1081. for(i = 0; i < bm->fan_num; i++) {
  1082. info->fan[i] = bm->fan[i] * BITMAIN_FAN_FACTOR;
  1083. if(info->fan[i] > maxfan)
  1084. maxfan = info->fan[i];
  1085. }
  1086. info->temp_num = bm->temp_num;
  1087. for(i = 0; i < bm->temp_num; i++) {
  1088. info->temp[i] = bm->temp[i];
  1089. /*
  1090. if(bm->temp[i] & 0x80) {
  1091. bm->temp[i] &= 0x7f;
  1092. info->temp[i] = 0 - ((~bm->temp[i] & 0x7f) + 1);
  1093. }*/
  1094. *temp_avg += info->temp[i];
  1095. if(info->temp[i] > info->temp_max) {
  1096. info->temp_max = info->temp[i];
  1097. }
  1098. if(info->temp[i] > maxtemp)
  1099. maxtemp = info->temp[i];
  1100. }
  1101. if(bm->temp_num > 0) {
  1102. *temp_avg = *temp_avg / bm->temp_num;
  1103. info->temp_avg = *temp_avg;
  1104. }
  1105. inc_dev_status(maxfan, maxtemp);
  1106. }
  1107. static void bitmain_update_temps(struct cgpu_info *bitmain, struct bitmain_info *info,
  1108. struct bitmain_rxstatus_data *bm)
  1109. {
  1110. char tmp[64] = {0};
  1111. char msg[10240] = {0};
  1112. int i = 0;
  1113. record_temp_fan(info, bm, &(bitmain->temp));
  1114. strcpy(msg, "BitMain: ");
  1115. for(i = 0; i < bm->fan_num; i++) {
  1116. if(i != 0) {
  1117. strcat(msg, ", ");
  1118. }
  1119. sprintf(tmp, "Fan%d: %d/m", i+1, info->fan[i]);
  1120. strcat(msg, tmp);
  1121. }
  1122. strcat(msg, "\t");
  1123. for(i = 0; i < bm->temp_num; i++) {
  1124. if(i != 0) {
  1125. strcat(msg, ", ");
  1126. }
  1127. sprintf(tmp, "Temp%d: %dC", i+1, info->temp[i]);
  1128. strcat(msg, tmp);
  1129. }
  1130. sprintf(tmp, ", TempMAX: %dC", info->temp_max);
  1131. strcat(msg, tmp);
  1132. applog(LOG_INFO, msg);
  1133. info->temp_history_index++;
  1134. info->temp_sum += bitmain->temp;
  1135. applog(LOG_DEBUG, "BitMain: temp_index: %d, temp_count: %d, temp_old: %d",
  1136. info->temp_history_index, info->temp_history_count, info->temp_old);
  1137. if (info->temp_history_index == info->temp_history_count) {
  1138. info->temp_history_index = 0;
  1139. info->temp_sum = 0;
  1140. }
  1141. if (unlikely(info->temp_old >= opt_bitmain_overheat)) {
  1142. applog(LOG_WARNING, "BTM%d overheat! Idling", bitmain->device_id);
  1143. info->overheat = true;
  1144. } else if (info->overheat && info->temp_old <= opt_bitmain_temp) {
  1145. applog(LOG_WARNING, "BTM%d cooled, restarting", bitmain->device_id);
  1146. info->overheat = false;
  1147. }
  1148. }
  1149. extern void cg_logwork_uint32(struct work *work, uint32_t nonce, bool ok);
  1150. static void bitmain_parse_results(struct cgpu_info *bitmain, struct bitmain_info *info,
  1151. struct thr_info *thr, uint8_t *buf, int *offset)
  1152. {
  1153. int i, j, n, m, r, errordiff, spare = BITMAIN_READ_SIZE;
  1154. uint32_t checkbit = 0x00000000;
  1155. bool found = false;
  1156. struct work *work = NULL;
  1157. char * ob_hex = NULL;
  1158. struct bitmain_packet_head packethead;
  1159. int asicnum = 0;
  1160. int idiff = 0;
  1161. int mod = 0,tmp = 0;
  1162. for (i = 0; i <= spare; i++) {
  1163. if(buf[i] == 0xa1) {
  1164. struct bitmain_rxstatus_data rxstatusdata;
  1165. applog(LOG_DEBUG, "bitmain_parse_results RxStatus Data");
  1166. if(*offset < 4) {
  1167. return;
  1168. }
  1169. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  1170. packethead.length = htole16(packethead.length);
  1171. if(packethead.length > 1130) {
  1172. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus datalen=%d error", packethead.length+4);
  1173. continue;
  1174. }
  1175. if(*offset < packethead.length + 4) {
  1176. return;
  1177. }
  1178. if(bitmain_parse_rxstatus(buf+i, packethead.length+4, &rxstatusdata) != 0) {
  1179. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus error len=%d", packethead.length+4);
  1180. } else {
  1181. mutex_lock(&info->qlock);
  1182. info->chain_num = rxstatusdata.chain_num;
  1183. info->fifo_space = rxstatusdata.fifo_space;
  1184. info->hw_version[0] = rxstatusdata.hw_version[0];
  1185. info->hw_version[1] = rxstatusdata.hw_version[1];
  1186. info->hw_version[2] = rxstatusdata.hw_version[2];
  1187. info->hw_version[3] = rxstatusdata.hw_version[3];
  1188. info->nonce_error = rxstatusdata.nonce_error;
  1189. errordiff = info->nonce_error-info->last_nonce_error;
  1190. //sprintf(g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  1191. applog(LOG_ERR, "bitmain_parse_results v=%d chain=%d fifo=%d hwv1=%d hwv2=%d hwv3=%d hwv4=%d nerr=%d-%d freq=%d chain info:",
  1192. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  1193. info->last_nonce_error, info->nonce_error, info->frequency);
  1194. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  1195. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  1196. for(n = 0; n < rxstatusdata.chain_num; n++) {
  1197. info->chain_asic_num[n] = rxstatusdata.chain_asic_num[n];
  1198. memset(info->chain_asic_status_t[n], 0, 320);
  1199. j = 0;
  1200. mod = 0;
  1201. if(info->chain_asic_num[n] <= 0) {
  1202. asicnum = 0;
  1203. } else {
  1204. mod = info->chain_asic_num[n] % 32;
  1205. if(mod == 0) {
  1206. asicnum = info->chain_asic_num[n] / 32;
  1207. } else {
  1208. asicnum = info->chain_asic_num[n] / 32 + 1;
  1209. }
  1210. }
  1211. if(asicnum > 0) {
  1212. for(m = asicnum-1; m >= 0; m--) {
  1213. tmp = mod ? (32-mod): 0;
  1214. for(r = tmp;r < 32;r++){
  1215. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  1216. info->chain_asic_status_t[n][j] = ' ';
  1217. j++;
  1218. }
  1219. checkbit = num2bit(r);
  1220. if(rxstatusdata.chain_asic_exist[n*8+m] & checkbit) {
  1221. if(rxstatusdata.chain_asic_status[n*8+m] & checkbit) {
  1222. info->chain_asic_status_t[n][j] = 'o';
  1223. } else {
  1224. info->chain_asic_status_t[n][j] = 'x';
  1225. }
  1226. } else {
  1227. info->chain_asic_status_t[n][j] = '-';
  1228. }
  1229. j++;
  1230. }
  1231. info->chain_asic_status_t[n][j] = ' ';
  1232. j++;
  1233. mod = 0;
  1234. }
  1235. }
  1236. applog(LOG_DEBUG, "bitmain_parse_results chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  1237. n, info->chain_asic_num[n],
  1238. info->chain_asic_exist[n*8+0], info->chain_asic_exist[n*8+1], info->chain_asic_exist[n*8+2], info->chain_asic_exist[n*8+3], info->chain_asic_exist[n*8+4], info->chain_asic_exist[n*8+5], info->chain_asic_exist[n*8+6], info->chain_asic_exist[n*8+7],
  1239. info->chain_asic_status[n*8+0], info->chain_asic_status[n*8+1], info->chain_asic_status[n*8+2], info->chain_asic_status[n*8+3], info->chain_asic_status[n*8+4], info->chain_asic_status[n*8+5], info->chain_asic_status[n*8+6], info->chain_asic_status[n*8+7]);
  1240. applog(LOG_ERR, "bitmain_parse_results chain(%d) asic_num=%d asic_status=%s", n, info->chain_asic_num[n], info->chain_asic_status_t[n]);
  1241. }
  1242. mutex_unlock(&info->qlock);
  1243. if(errordiff > 0) {
  1244. for(j = 0; j < errordiff; j++) {
  1245. bitmain_inc_nvw(info, thr);
  1246. }
  1247. mutex_lock(&info->qlock);
  1248. info->last_nonce_error += errordiff;
  1249. mutex_unlock(&info->qlock);
  1250. }
  1251. bitmain_update_temps(bitmain, info, &rxstatusdata);
  1252. }
  1253. found = true;
  1254. spare = packethead.length + 4 + i;
  1255. if(spare > *offset) {
  1256. applog(LOG_ERR, "bitmain_parse_rxresults space(%d) > offset(%d)", spare, *offset);
  1257. spare = *offset;
  1258. }
  1259. break;
  1260. } else if(buf[i] == 0xa2) {
  1261. struct bitmain_rxnonce_data rxnoncedata;
  1262. int nonce_num = 0;
  1263. applog(LOG_DEBUG, "bitmain_parse_results RxNonce Data");
  1264. if(*offset < 4) {
  1265. return;
  1266. }
  1267. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  1268. packethead.length = htole16(packethead.length);
  1269. if(packethead.length > 1030) {
  1270. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce datalen=%d error", packethead.length+4);
  1271. continue;
  1272. }
  1273. if(*offset < packethead.length + 4) {
  1274. return;
  1275. }
  1276. if(bitmain_parse_rxnonce(buf+i, packethead.length+4, &rxnoncedata, &nonce_num) != 0) {
  1277. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce error len=%d", packethead.length+4);
  1278. } else {
  1279. struct pool * pool = NULL;
  1280. for(j = 0; j < nonce_num; j++) {
  1281. work = clone_queued_work_byid(bitmain, rxnoncedata.nonces[j].work_id);
  1282. if(work) {
  1283. pool = work->pool;
  1284. if(BITMAIN_TEST_PRINT_WORK) {
  1285. applog(LOG_ERR, "bitmain_parse_results nonce find work(%d-%d)(%08x)", work->id, rxnoncedata.nonces[j].work_id, rxnoncedata.nonces[j].nonce);
  1286. ob_hex = bin2hex(work->midstate, 32);
  1287. applog(LOG_ERR, "work %d midstate: %s", work->id, ob_hex);
  1288. free(ob_hex);
  1289. ob_hex = bin2hex(work->data+64, 12);
  1290. applog(LOG_ERR, "work %d data2: %s", work->id, ob_hex);
  1291. free(ob_hex);
  1292. }
  1293. if(work->work_block < info->last_work_block) {
  1294. applog(LOG_ERR, "BitMain: bitmain_parse_rxnonce work(%d) nonce stale", rxnoncedata.nonces[j].work_id);
  1295. } else {
  1296. if (bitmain_decode_nonce(thr, bitmain, info, rxnoncedata.nonces[j].nonce, work)) {
  1297. cg_logwork_uint32(work, rxnoncedata.nonces[j].nonce, true);
  1298. if(opt_bitmain_hwerror) {
  1299. #ifndef BITMAIN_CALC_DIFF1
  1300. mutex_lock(&info->qlock);
  1301. idiff = (int)work->sdiff;
  1302. info->nonces+=idiff;
  1303. info->auto_nonces+=idiff;
  1304. mutex_unlock(&info->qlock);
  1305. inc_work_status(thr, pool, idiff);
  1306. #endif
  1307. } else {
  1308. mutex_lock(&info->qlock);
  1309. info->nonces++;
  1310. info->auto_nonces++;
  1311. mutex_unlock(&info->qlock);
  1312. }
  1313. } else {
  1314. //bitmain_inc_nvw(info, thr);
  1315. applog(LOG_ERR, "BitMain: bitmain_decode_nonce error work(%d)", rxnoncedata.nonces[j].work_id);
  1316. }
  1317. }
  1318. free_work(work);
  1319. } else {
  1320. //bitmain_inc_nvw(info, thr);
  1321. applog(LOG_ERR, "BitMain: Nonce not find work(%d)", rxnoncedata.nonces[j].work_id);
  1322. }
  1323. }
  1324. #ifdef BITMAIN_CALC_DIFF1
  1325. if(opt_bitmain_hwerror) {
  1326. int difftmp = 0;
  1327. difftmp = rxnoncedata.diff;
  1328. idiff = 1;
  1329. while(difftmp > 0) {
  1330. difftmp--;
  1331. idiff = idiff << 1;
  1332. }
  1333. mutex_lock(&info->qlock);
  1334. difftmp = idiff*(rxnoncedata.total_nonce_num-info->total_nonce_num);
  1335. if(difftmp < 0)
  1336. difftmp = 0;
  1337. info->nonces = info->nonces+difftmp;
  1338. info->auto_nonces = info->auto_nonces+difftmp;
  1339. info->total_nonce_num = rxnoncedata.total_nonce_num;
  1340. info->fifo_space = rxnoncedata.fifo_space;
  1341. mutex_unlock(&info->qlock);
  1342. inc_work_stats(thr, pool, difftmp);
  1343. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d diff=%d rxtnn=%lld tnn=%lld", info->fifo_space, idiff, rxnoncedata.total_nonce_num, info->total_nonce_num);
  1344. } else {
  1345. mutex_lock(&info->qlock);
  1346. info->fifo_space = rxnoncedata.fifo_space;
  1347. mutex_unlock(&info->qlock);
  1348. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  1349. }
  1350. #else
  1351. mutex_lock(&info->qlock);
  1352. info->fifo_space = rxnoncedata.fifo_space;
  1353. mutex_unlock(&info->qlock);
  1354. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  1355. #endif
  1356. #ifndef WIN32
  1357. if(nonce_num < BITMAIN_MAX_NONCE_NUM)
  1358. cgsleep_ms(5);
  1359. #endif
  1360. }
  1361. found = true;
  1362. spare = packethead.length + 4 + i;
  1363. if(spare > *offset) {
  1364. applog(LOG_ERR, "bitmain_parse_rxnonce space(%d) > offset(%d)", spare, *offset);
  1365. spare = *offset;
  1366. }
  1367. break;
  1368. } else {
  1369. applog(LOG_ERR, "bitmain_parse_results data type error=%02x", buf[i]);
  1370. }
  1371. }
  1372. if (!found) {
  1373. spare = *offset - BITMAIN_READ_SIZE;
  1374. /* We are buffering and haven't accumulated one more corrupt
  1375. * work result. */
  1376. if (spare < (int)BITMAIN_READ_SIZE)
  1377. return;
  1378. bitmain_inc_nvw(info, thr);
  1379. }
  1380. *offset -= spare;
  1381. memmove(buf, buf + spare, *offset);
  1382. }
  1383. static void bitmain_running_reset(struct cgpu_info *bitmain, struct bitmain_info *info)
  1384. {
  1385. bitmain->results = 0;
  1386. info->reset = false;
  1387. }
  1388. static void *bitmain_get_results(void *userdata)
  1389. {
  1390. struct cgpu_info *bitmain = (struct cgpu_info *)userdata;
  1391. struct bitmain_info *info = bitmain->device_data;
  1392. int offset = 0, read_delay = 0, ret = 0;
  1393. const int rsize = BITMAIN_FTDI_READSIZE;
  1394. char readbuf[BITMAIN_READBUF_SIZE];
  1395. struct thr_info *thr = info->thr;
  1396. char threadname[24];
  1397. int errorcount = 0;
  1398. snprintf(threadname, 24, "btm_recv/%d", bitmain->device_id);
  1399. RenameThread(threadname);
  1400. while (likely(!bitmain->shutdown)) {
  1401. unsigned char buf[rsize];
  1402. //applog(LOG_DEBUG, "+++++++bitmain_get_results offset=%d", offset);
  1403. if (offset >= (int)BITMAIN_READ_SIZE) {
  1404. //applog(LOG_DEBUG, "======start bitmain_get_results ");
  1405. bitmain_parse_results(bitmain, info, thr, readbuf, &offset);
  1406. //applog(LOG_DEBUG, "======stop bitmain_get_results ");
  1407. }
  1408. if (unlikely(offset + rsize >= BITMAIN_READBUF_SIZE)) {
  1409. /* This should never happen */
  1410. applog(LOG_DEBUG, "BitMain readbuf overflow, resetting buffer");
  1411. offset = 0;
  1412. }
  1413. if (unlikely(info->reset)) {
  1414. bitmain_running_reset(bitmain, info);
  1415. /* Discard anything in the buffer */
  1416. offset = 0;
  1417. }
  1418. /* As the usb read returns after just 1ms, sleep long enough
  1419. * to leave the interface idle for writes to occur, but do not
  1420. * sleep if we have been receiving data as more may be coming. */
  1421. //if (offset == 0) {
  1422. // cgsleep_ms_r(&ts_start, BITMAIN_READ_TIMEOUT);
  1423. //}
  1424. //cgsleep_prepare_r(&ts_start);
  1425. //applog(LOG_DEBUG, "======start bitmain_get_results bitmain_read");
  1426. ret = bitmain_read(bitmain, buf, rsize, BITMAIN_READ_TIMEOUT, C_BITMAIN_READ);
  1427. //applog(LOG_DEBUG, "======stop bitmain_get_results bitmain_read=%d", ret);
  1428. if ((ret < 1) || (ret == 18)) {
  1429. errorcount++;
  1430. #ifdef WIN32
  1431. if(errorcount > 200) {
  1432. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1433. cgsleep_ms(20);
  1434. errorcount = 0;
  1435. }
  1436. #else
  1437. if(errorcount > 3) {
  1438. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1439. cgsleep_ms(20);
  1440. errorcount = 0;
  1441. }
  1442. #endif
  1443. if(ret < 1)
  1444. continue;
  1445. }
  1446. if (opt_debug) {
  1447. applog(LOG_DEBUG, "BitMain: get:");
  1448. hexdump((uint8_t *)buf, ret);
  1449. }
  1450. memcpy(readbuf+offset, buf, ret);
  1451. offset += ret;
  1452. }
  1453. return NULL;
  1454. }
  1455. static void bitmain_set_timeout(struct bitmain_info *info)
  1456. {
  1457. info->timeout = BITMAIN_TIMEOUT_FACTOR / info->frequency;
  1458. }
  1459. static void *bitmain_send_tasks(void *userdata)
  1460. {
  1461. return NULL;
  1462. }
  1463. static void bitmain_init(struct cgpu_info *bitmain)
  1464. {
  1465. applog(LOG_INFO, "BitMain: Opened on %s", bitmain->device_path);
  1466. }
  1467. static bool bitmain_prepare(struct thr_info *thr)
  1468. {
  1469. struct cgpu_info *bitmain = thr->cgpu;
  1470. struct bitmain_info *info = bitmain->device_data;
  1471. free(bitmain->works);
  1472. bitmain->works = calloc(BITMAIN_MAX_WORK_NUM * sizeof(struct work *),
  1473. BITMAIN_ARRAY_SIZE);
  1474. if (!bitmain->works)
  1475. quit(1, "Failed to calloc bitmain works in bitmain_prepare");
  1476. info->thr = thr;
  1477. mutex_init(&info->lock);
  1478. mutex_init(&info->qlock);
  1479. if (unlikely(pthread_cond_init(&info->qcond, NULL)))
  1480. quit(1, "Failed to pthread_cond_init bitmain qcond");
  1481. cgsem_init(&info->write_sem);
  1482. if (pthread_create(&info->read_thr, NULL, bitmain_get_results, (void *)bitmain))
  1483. quit(1, "Failed to create bitmain read_thr");
  1484. //if (pthread_create(&info->write_thr, NULL, bitmain_send_tasks, (void *)bitmain))
  1485. // quit(1, "Failed to create bitmain write_thr");
  1486. bitmain_init(bitmain);
  1487. return true;
  1488. }
  1489. static int bitmain_initialize(struct cgpu_info *bitmain)
  1490. {
  1491. uint8_t data[BITMAIN_READBUF_SIZE];
  1492. struct bitmain_info *info = NULL;
  1493. int ret = 0, spare = 0;
  1494. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1495. int readlen = 0;
  1496. int sendlen = 0;
  1497. int trycount = 3;
  1498. struct timespec p;
  1499. struct bitmain_rxstatus_data rxstatusdata;
  1500. int i = 0, j = 0, m = 0, r = 0, statusok = 0;
  1501. uint32_t checkbit = 0x00000000;
  1502. int hwerror_eft = 0;
  1503. int beeper_ctrl = 1;
  1504. int tempover_ctrl = 1;
  1505. int home_mode = 0;
  1506. struct bitmain_packet_head packethead;
  1507. int asicnum = 0;
  1508. int mod = 0,tmp = 0;
  1509. /* Send reset, then check for result */
  1510. if(!bitmain) {
  1511. applog(LOG_WARNING, "bitmain_initialize cgpu_info is null");
  1512. return -1;
  1513. }
  1514. info = bitmain->device_data;
  1515. /* clear read buf */
  1516. ret = bitmain_read(bitmain, data, BITMAIN_READBUF_SIZE,
  1517. BITMAIN_RESET_TIMEOUT, C_BITMAIN_READ);
  1518. if(ret > 0) {
  1519. if (opt_debug) {
  1520. applog(LOG_DEBUG, "BTM%d Clear Read(%d):", bitmain->device_id, ret);
  1521. hexdump(data, ret);
  1522. }
  1523. }
  1524. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *)sendbuf, 0, 1, 0, 0);
  1525. if(sendlen <= 0) {
  1526. applog(LOG_ERR, "bitmain_initialize bitmain_set_rxstatus error(%d)", sendlen);
  1527. return -1;
  1528. }
  1529. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1530. if (unlikely(ret == BTM_SEND_ERROR)) {
  1531. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1532. return -1;
  1533. }
  1534. while(trycount >= 0) {
  1535. ret = bitmain_read(bitmain, data+readlen, BITMAIN_READBUF_SIZE, BITMAIN_RESET_TIMEOUT, C_BITMAIN_DATA_RXSTATUS);
  1536. if(ret > 0) {
  1537. readlen += ret;
  1538. if(readlen > BITMAIN_READ_SIZE) {
  1539. for(i = 0; i < readlen; i++) {
  1540. if(data[i] == 0xa1) {
  1541. if (opt_debug) {
  1542. applog(LOG_DEBUG, "%s%d initset: get:", bitmain->drv->name, bitmain->device_id);
  1543. hexdump(data, readlen);
  1544. }
  1545. memcpy(&packethead, data+i, sizeof(struct bitmain_packet_head));
  1546. packethead.length = htole16(packethead.length);
  1547. if(packethead.length > 1130) {
  1548. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d error", packethead.length+4);
  1549. continue;
  1550. }
  1551. if(readlen-i < packethead.length+4) {
  1552. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d<%d low", readlen-i, packethead.length+4);
  1553. continue;
  1554. }
  1555. if (bitmain_parse_rxstatus(data+i, packethead.length+4, &rxstatusdata) != 0) {
  1556. applog(LOG_ERR, "bitmain_initialize bitmain_parse_rxstatus error");
  1557. continue;
  1558. }
  1559. info->chain_num = rxstatusdata.chain_num;
  1560. info->fifo_space = rxstatusdata.fifo_space;
  1561. info->hw_version[0] = rxstatusdata.hw_version[0];
  1562. info->hw_version[1] = rxstatusdata.hw_version[1];
  1563. info->hw_version[2] = rxstatusdata.hw_version[2];
  1564. info->hw_version[3] = rxstatusdata.hw_version[3];
  1565. info->nonce_error = 0;
  1566. info->last_nonce_error = 0;
  1567. sprintf(g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  1568. applog(LOG_ERR, "bitmain_initialize rxstatus v(%d) chain(%d) fifo(%d) hwv1(%d) hwv2(%d) hwv3(%d) hwv4(%d) nerr(%d) freq=%d",
  1569. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  1570. rxstatusdata.nonce_error, info->frequency);
  1571. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  1572. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  1573. for(i = 0; i < rxstatusdata.chain_num; i++) {
  1574. info->chain_asic_num[i] = rxstatusdata.chain_asic_num[i];
  1575. memset(info->chain_asic_status_t[i], 0, 320);
  1576. j = 0;
  1577. mod = 0;
  1578. if(info->chain_asic_num[i] <= 0) {
  1579. asicnum = 0;
  1580. } else {
  1581. mod = info->chain_asic_num[i] % 32;
  1582. if(mod == 0) {
  1583. asicnum = info->chain_asic_num[i] / 32;
  1584. } else {
  1585. asicnum = info->chain_asic_num[i] / 32 + 1;
  1586. }
  1587. }
  1588. if(asicnum > 0) {
  1589. for(m = asicnum-1; m >= 0; m--) {
  1590. tmp = mod ? (32-mod):0;
  1591. for(r = tmp;r < 32;r++){
  1592. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  1593. info->chain_asic_status_t[i][j] = ' ';
  1594. j++;
  1595. }
  1596. checkbit = num2bit(r);
  1597. if(rxstatusdata.chain_asic_exist[i*8+m] & checkbit) {
  1598. if(rxstatusdata.chain_asic_status[i*8+m] & checkbit) {
  1599. info->chain_asic_status_t[i][j] = 'o';
  1600. } else {
  1601. info->chain_asic_status_t[i][j] = 'x';
  1602. }
  1603. } else {
  1604. info->chain_asic_status_t[i][j] = '-';
  1605. }
  1606. j++;
  1607. }
  1608. info->chain_asic_status_t[i][j] = ' ';
  1609. j++;
  1610. mod = 0;
  1611. }
  1612. }
  1613. applog(LOG_DEBUG, "bitmain_initialize chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  1614. i, info->chain_asic_num[i],
  1615. info->chain_asic_exist[i*8+0], info->chain_asic_exist[i*8+1], info->chain_asic_exist[i*8+2], info->chain_asic_exist[i*8+3], info->chain_asic_exist[i*8+4], info->chain_asic_exist[i*8+5], info->chain_asic_exist[i*8+6], info->chain_asic_exist[i*8+7],
  1616. info->chain_asic_status[i*8+0], info->chain_asic_status[i*8+1], info->chain_asic_status[i*8+2], info->chain_asic_status[i*8+3], info->chain_asic_status[i*8+4], info->chain_asic_status[i*8+5], info->chain_asic_status[i*8+6], info->chain_asic_status[i*8+7]);
  1617. applog(LOG_ERR, "bitmain_initialize chain(%d) asic_num=%d asic_status=%s", i, info->chain_asic_num[i], info->chain_asic_status_t[i]);
  1618. }
  1619. bitmain_update_temps(bitmain, info, &rxstatusdata);
  1620. statusok = 1;
  1621. break;
  1622. }
  1623. }
  1624. if(statusok) {
  1625. break;
  1626. }
  1627. }
  1628. }
  1629. trycount--;
  1630. p.tv_sec = 0;
  1631. p.tv_nsec = BITMAIN_RESET_PITCH;
  1632. nanosleep(&p, NULL);
  1633. }
  1634. p.tv_sec = 0;
  1635. p.tv_nsec = BITMAIN_RESET_PITCH;
  1636. nanosleep(&p, NULL);
  1637. cgtime(&info->last_status_time);
  1638. if(statusok) {
  1639. applog(LOG_ERR, "bitmain_initialize start send txconfig");
  1640. if(opt_bitmain_hwerror)
  1641. hwerror_eft = 1;
  1642. else
  1643. hwerror_eft = 0;
  1644. if(opt_bitmain_nobeeper)
  1645. beeper_ctrl = 0;
  1646. else
  1647. beeper_ctrl = 1;
  1648. if(opt_bitmain_notempoverctrl)
  1649. tempover_ctrl = 0;
  1650. else
  1651. tempover_ctrl = 1;
  1652. if(opt_bitmain_homemode)
  1653. home_mode= 1;
  1654. else
  1655. home_mode= 0;
  1656. sendlen = bitmain_set_txconfig((struct bitmain_txconfig_token *)sendbuf, 1, 1, 1, 1, 1, 0, 1, hwerror_eft, beeper_ctrl, tempover_ctrl,home_mode,
  1657. info->chain_num, info->asic_num, BITMAIN_DEFAULT_FAN_MAX_PWM, info->timeout,
  1658. info->frequency, info->voltage, 0, 0, 0x04, info->reg_data);
  1659. if(sendlen <= 0) {
  1660. applog(LOG_ERR, "bitmain_initialize bitmain_set_txconfig error(%d)", sendlen);
  1661. return -1;
  1662. }
  1663. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1664. if (unlikely(ret == BTM_SEND_ERROR)) {
  1665. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1666. return -1;
  1667. }
  1668. applog(LOG_WARNING, "BMM%d: InitSet succeeded", bitmain->device_id);
  1669. } else {
  1670. applog(LOG_WARNING, "BMS%d: InitSet error", bitmain->device_id);
  1671. return -1;
  1672. }
  1673. return 0;
  1674. }
  1675. static void bitmain_usb_init(struct cgpu_info *bitmain)
  1676. {
  1677. int err, interface;
  1678. #ifndef WIN32
  1679. return;
  1680. #endif
  1681. if (bitmain->usbinfo.nodev)
  1682. return;
  1683. interface = usb_interface(bitmain);
  1684. // Reset
  1685. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_RESET,
  1686. FTDI_VALUE_RESET, interface, C_RESET);
  1687. applog(LOG_DEBUG, "%s%i: reset got err %d",
  1688. bitmain->drv->name, bitmain->device_id, err);
  1689. if (bitmain->usbinfo.nodev)
  1690. return;
  1691. // Set latency
  1692. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_LATENCY,
  1693. BITMAIN_LATENCY, interface, C_LATENCY);
  1694. applog(LOG_DEBUG, "%s%i: latency got err %d",
  1695. bitmain->drv->name, bitmain->device_id, err);
  1696. if (bitmain->usbinfo.nodev)
  1697. return;
  1698. // Set data
  1699. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_DATA,
  1700. FTDI_VALUE_DATA_BTM, interface, C_SETDATA);
  1701. applog(LOG_DEBUG, "%s%i: data got err %d",
  1702. bitmain->drv->name, bitmain->device_id, err);
  1703. if (bitmain->usbinfo.nodev)
  1704. return;
  1705. // Set the baud
  1706. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_BAUD, FTDI_VALUE_BAUD_BTM,
  1707. (FTDI_INDEX_BAUD_BTM & 0xff00) | interface,
  1708. C_SETBAUD);
  1709. applog(LOG_DEBUG, "%s%i: setbaud got err %d",
  1710. bitmain->drv->name, bitmain->device_id, err);
  1711. if (bitmain->usbinfo.nodev)
  1712. return;
  1713. // Set Modem Control
  1714. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_MODEM,
  1715. FTDI_VALUE_MODEM, interface, C_SETMODEM);
  1716. applog(LOG_DEBUG, "%s%i: setmodemctrl got err %d",
  1717. bitmain->drv->name, bitmain->device_id, err);
  1718. if (bitmain->usbinfo.nodev)
  1719. return;
  1720. // Set Flow Control
  1721. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_FLOW,
  1722. FTDI_VALUE_FLOW, interface, C_SETFLOW);
  1723. applog(LOG_DEBUG, "%s%i: setflowctrl got err %d",
  1724. bitmain->drv->name, bitmain->device_id, err);
  1725. if (bitmain->usbinfo.nodev)
  1726. return;
  1727. /* BitMain repeats the following */
  1728. // Set Modem Control
  1729. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_MODEM,
  1730. FTDI_VALUE_MODEM, interface, C_SETMODEM);
  1731. applog(LOG_DEBUG, "%s%i: setmodemctrl 2 got err %d",
  1732. bitmain->drv->name, bitmain->device_id, err);
  1733. if (bitmain->usbinfo.nodev)
  1734. return;
  1735. // Set Flow Control
  1736. err = usb_transfer(bitmain, FTDI_TYPE_OUT, FTDI_REQUEST_FLOW,
  1737. FTDI_VALUE_FLOW, interface, C_SETFLOW);
  1738. applog(LOG_DEBUG, "%s%i: setflowctrl 2 got err %d",
  1739. bitmain->drv->name, bitmain->device_id, err);
  1740. }
  1741. static struct cgpu_info * bitmain_usb_detect_one(libusb_device *dev, struct usb_find_devices *found)
  1742. {
  1743. int baud, chain_num, asic_num, timeout, frequency = 0;
  1744. char frequency_t[256] = {0};
  1745. uint8_t reg_data[4] = {0};
  1746. uint8_t voltage[2] = {0};
  1747. char voltage_t[8] = {0};
  1748. int this_option_offset = ++option_offset;
  1749. struct bitmain_info *info;
  1750. struct cgpu_info *bitmain;
  1751. bool configured;
  1752. int ret;
  1753. if (opt_bitmain_options == NULL)
  1754. return NULL;
  1755. bitmain = usb_alloc_cgpu(&bitmain_drv, BITMAIN_MINER_THREADS);
  1756. baud = BITMAIN_IO_SPEED;
  1757. chain_num = BITMAIN_DEFAULT_CHAIN_NUM;
  1758. asic_num = BITMAIN_DEFAULT_ASIC_NUM;
  1759. timeout = BITMAIN_DEFAULT_TIMEOUT;
  1760. frequency = BITMAIN_DEFAULT_FREQUENCY;
  1761. if (!usb_init(bitmain, dev, found))
  1762. goto shin;
  1763. configured = get_options(this_option_offset, &baud, &chain_num,
  1764. &asic_num, &timeout, &frequency, frequency_t, reg_data, voltage, voltage_t);
  1765. get_option_freq(&timeout, &frequency, frequency_t, reg_data);
  1766. get_option_voltage(voltage, voltage_t);
  1767. /* Even though this is an FTDI type chip, we want to do the parsing
  1768. * all ourselves so set it to std usb type */
  1769. bitmain->usbdev->usb_type = USB_TYPE_STD;
  1770. /* We have a real BitMain! */
  1771. bitmain_usb_init(bitmain);
  1772. bitmain->device_data = calloc(sizeof(struct bitmain_info), 1);
  1773. if (unlikely(!(bitmain->device_data)))
  1774. quit(1, "Failed to calloc bitmain_info data");
  1775. info = bitmain->device_data;
  1776. if (configured) {
  1777. info->baud = baud;
  1778. info->chain_num = chain_num;
  1779. info->asic_num = asic_num;
  1780. info->timeout = timeout;
  1781. info->frequency = frequency;
  1782. strcpy(info->frequency_t, frequency_t);
  1783. memcpy(info->reg_data, reg_data, 4);
  1784. memcpy(info->voltage, voltage, 2);
  1785. strcpy(info->voltage_t, voltage_t);
  1786. } else {
  1787. info->baud = BITMAIN_IO_SPEED;
  1788. info->chain_num = BITMAIN_DEFAULT_CHAIN_NUM;
  1789. info->asic_num = BITMAIN_DEFAULT_ASIC_NUM;
  1790. info->timeout = BITMAIN_DEFAULT_TIMEOUT;
  1791. info->frequency = BITMAIN_DEFAULT_FREQUENCY;
  1792. sprintf(info->frequency_t, "%d", BITMAIN_DEFAULT_FREQUENCY);
  1793. memset(info->reg_data, 0, 4);
  1794. info->voltage[0] = BITMAIN_DEFAULT_VOLTAGE0;
  1795. info->voltage[1] = BITMAIN_DEFAULT_VOLTAGE1;
  1796. strcpy(info->voltage_t, BITMAIN_DEFAULT_VOLTAGE_T);
  1797. }
  1798. info->fan_pwm = BITMAIN_DEFAULT_FAN_MIN_PWM;
  1799. info->temp_max = 0;
  1800. /* This is for check the temp/fan every 3~4s */
  1801. info->temp_history_count = (4 / (float)((float)info->timeout * ((float)1.67/0x32))) + 1;
  1802. if (info->temp_history_count <= 0)
  1803. info->temp_history_count = 1;
  1804. info->temp_history_index = 0;
  1805. info->temp_sum = 0;
  1806. info->temp_old = 0;
  1807. if (!add_cgpu(bitmain))
  1808. goto unshin;
  1809. applog(LOG_ERR, "------bitmain usb detect one------");
  1810. ret = bitmain_initialize(bitmain);
  1811. if (ret && !configured)
  1812. goto unshin;
  1813. update_usb_stats(bitmain);
  1814. info->errorcount = 0;
  1815. applog(LOG_DEBUG, "BitMain Detected: %s "
  1816. "(chain_num=%d asic_num=%d timeout=%d frequency=%d)",
  1817. bitmain->device_path, info->chain_num, info->asic_num, info->timeout,
  1818. info->frequency);
  1819. return bitmain;
  1820. unshin:
  1821. usb_uninit(bitmain);
  1822. shin:
  1823. free(bitmain->device_data);
  1824. bitmain->device_data = NULL;
  1825. bitmain = usb_free_cgpu(bitmain);
  1826. return NULL;
  1827. }
  1828. static bool bitmain_detect_one(const char * devpath)
  1829. {
  1830. int baud, chain_num, asic_num, timeout, frequency = 0;
  1831. char frequency_t[256] = {0};
  1832. uint8_t reg_data[4] = {0};
  1833. uint8_t voltage[2] = {0};
  1834. char voltage_t[8] = {0};
  1835. int this_option_offset = ++option_offset;
  1836. struct bitmain_info *info;
  1837. struct cgpu_info *bitmain;
  1838. bool configured;
  1839. int ret;
  1840. if (opt_bitmain_options == NULL)
  1841. return false;
  1842. bitmain = btm_alloc_cgpu(&bitmain_drv, BITMAIN_MINER_THREADS);
  1843. configured = get_options(this_option_offset, &baud, &chain_num,
  1844. &asic_num, &timeout, &frequency, frequency_t, reg_data, voltage, voltage_t);
  1845. get_option_freq(&timeout, &frequency, frequency_t, reg_data);
  1846. get_option_voltage(voltage, voltage_t);
  1847. if (!btm_init(bitmain, opt_bitmain_dev))
  1848. goto shin;
  1849. applog(LOG_ERR, "bitmain_detect_one btm init ok");
  1850. bitmain->device_data = calloc(sizeof(struct bitmain_info), 1);
  1851. /* make sure initialize successfully*/
  1852. memset(bitmain->device_data,0,sizeof(struct bitmain_info));
  1853. if (unlikely(!(bitmain->device_data)))
  1854. quit(1, "Failed to calloc bitmain_info data");
  1855. info = bitmain->device_data;
  1856. if (configured) {
  1857. info->baud = baud;
  1858. info->chain_num = chain_num;
  1859. info->asic_num = asic_num;
  1860. info->timeout = timeout;
  1861. info->frequency = frequency;
  1862. strcpy(info->frequency_t, frequency_t);
  1863. memcpy(info->reg_data, reg_data, 4);
  1864. memcpy(info->voltage, voltage, 2);
  1865. strcpy(info->voltage_t, voltage_t);
  1866. } else {
  1867. info->baud = BITMAIN_IO_SPEED;
  1868. info->chain_num = BITMAIN_DEFAULT_CHAIN_NUM;
  1869. info->asic_num = BITMAIN_DEFAULT_ASIC_NUM;
  1870. info->timeout = BITMAIN_DEFAULT_TIMEOUT;
  1871. info->frequency = BITMAIN_DEFAULT_FREQUENCY;
  1872. sprintf(info->frequency_t, "%d", BITMAIN_DEFAULT_FREQUENCY);
  1873. memset(info->reg_data, 0, 4);
  1874. info->voltage[0] = BITMAIN_DEFAULT_VOLTAGE0;
  1875. info->voltage[1] = BITMAIN_DEFAULT_VOLTAGE1;
  1876. strcpy(info->voltage_t, BITMAIN_DEFAULT_VOLTAGE_T);
  1877. }
  1878. info->fan_pwm = BITMAIN_DEFAULT_FAN_MIN_PWM;
  1879. info->temp_max = 0;
  1880. /* This is for check the temp/fan every 3~4s */
  1881. info->temp_history_count = (4 / (float)((float)info->timeout * ((float)1.67/0x32))) + 1;
  1882. if (info->temp_history_count <= 0)
  1883. info->temp_history_count = 1;
  1884. info->temp_history_index = 0;
  1885. info->temp_sum = 0;
  1886. info->temp_old = 0;
  1887. if (!add_cgpu(bitmain))
  1888. goto unshin;
  1889. ret = bitmain_initialize(bitmain);
  1890. applog(LOG_ERR, "bitmain_detect_one stop bitmain_initialize %d", ret);
  1891. if (ret && !configured)
  1892. goto unshin;
  1893. info->errorcount = 0;
  1894. applog(LOG_ERR, "BitMain Detected: %s "
  1895. "(chain_num=%d asic_num=%d timeout=%d freq=%d-%s volt=%02x%02x-%s)",
  1896. bitmain->device_path, info->chain_num, info->asic_num, info->timeout,
  1897. info->frequency, info->frequency_t, info->voltage[0], info->voltage[1], info->voltage_t);
  1898. return true;
  1899. unshin:
  1900. btm_uninit(bitmain);
  1901. shin:
  1902. free(bitmain->device_data);
  1903. bitmain->device_data = NULL;
  1904. bitmain = usb_free_cgpu(bitmain);
  1905. return false;
  1906. }
  1907. static void bitmain_detect(bool __maybe_unused hotplug)
  1908. {
  1909. applog(LOG_DEBUG, "BTM detect dev: %s", opt_bitmain_dev);
  1910. if(strlen(opt_bitmain_dev) <= 0) {
  1911. opt_bitmain_dev_usb = true;
  1912. } else {
  1913. opt_bitmain_dev_usb = false;
  1914. }
  1915. if(opt_bitmain_dev_usb) {
  1916. usb_detect(&bitmain_drv, bitmain_usb_detect_one);
  1917. } else {
  1918. btm_detect(&bitmain_drv, bitmain_detect_one);
  1919. }
  1920. }
  1921. static void do_bitmain_close(struct thr_info *thr)
  1922. {
  1923. struct cgpu_info *bitmain = thr->cgpu;
  1924. struct bitmain_info *info = bitmain->device_data;
  1925. pthread_join(info->read_thr, NULL);
  1926. pthread_join(info->write_thr, NULL);
  1927. bitmain_running_reset(bitmain, info);
  1928. info->no_matching_work = 0;
  1929. cgsem_destroy(&info->write_sem);
  1930. }
  1931. static void get_bitmain_statline_before(char *buf, size_t bufsiz, struct cgpu_info *bitmain)
  1932. {
  1933. struct bitmain_info *info = bitmain->device_data;
  1934. int lowfan = 10000;
  1935. int i = 0;
  1936. /* Find the lowest fan speed of the ASIC cooling fans. */
  1937. for(i = 0; i < info->fan_num; i++) {
  1938. if (info->fan[i] >= 0 && info->fan[i] < lowfan)
  1939. lowfan = info->fan[i];
  1940. }
  1941. tailsprintf(buf, bufsiz, "%2d/%3dC %04dR | ", info->temp_avg, info->temp_max, lowfan);
  1942. }
  1943. /* We use a replacement algorithm to only remove references to work done from
  1944. * the buffer when we need the extra space for new work. */
  1945. static bool bitmain_fill(struct cgpu_info *bitmain)
  1946. {
  1947. struct bitmain_info *info = bitmain->device_data;
  1948. int subid, slot;
  1949. struct work *work;
  1950. bool ret = true;
  1951. int sendret = 0, sendcount = 0, neednum = 0, queuednum = 0, sendnum = 0, sendlen = 0;
  1952. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1953. cgtimer_t ts_start;
  1954. int senderror = 0;
  1955. struct timeval now;
  1956. int timediff = 0;
  1957. //applog(LOG_DEBUG, "BTM bitmain_fill start--------");
  1958. mutex_lock(&info->qlock);
  1959. if(info->fifo_space <= 0) {
  1960. //applog(LOG_DEBUG, "BTM bitmain_fill fifo space empty--------");
  1961. ret = true;
  1962. goto out_unlock;
  1963. }
  1964. if (bitmain->queued >= BITMAIN_MAX_WORK_QUEUE_NUM) {
  1965. ret = true;
  1966. } else {
  1967. ret = false;
  1968. }
  1969. while(info->fifo_space > 0) {
  1970. neednum = info->fifo_space<BITMAIN_MAX_WORK_NUM?info->fifo_space:BITMAIN_MAX_WORK_NUM;
  1971. queuednum = bitmain->queued;
  1972. applog(LOG_DEBUG, "BTM: Work task queued(%d) fifo space(%d) needsend(%d)", queuednum, info->fifo_space, neednum);
  1973. if(queuednum < neednum) {
  1974. while(true) {
  1975. work = get_queued(bitmain);
  1976. if (unlikely(!work)) {
  1977. break;
  1978. } else {
  1979. applog(LOG_DEBUG, "BTM get work queued number:%d neednum:%d", queuednum, neednum);
  1980. subid = bitmain->queued++;
  1981. work->subid = subid;
  1982. slot = bitmain->work_array + subid;
  1983. if (slot > BITMAIN_ARRAY_SIZE) {
  1984. applog(LOG_DEBUG, "bitmain_fill array cyc %d", BITMAIN_ARRAY_SIZE);
  1985. slot = 0;
  1986. }
  1987. if (likely(bitmain->works[slot])) {
  1988. applog(LOG_DEBUG, "bitmain_fill work_completed %d", slot);
  1989. work_completed(bitmain, bitmain->works[slot]);
  1990. }
  1991. bitmain->works[slot] = work;
  1992. queuednum++;
  1993. if(queuednum >= neednum) {
  1994. break;
  1995. }
  1996. }
  1997. }
  1998. }
  1999. if(queuednum < BITMAIN_MAX_DEAL_QUEUE_NUM) {
  2000. if(queuednum < neednum) {
  2001. applog(LOG_DEBUG, "BTM: No enough work to send, queue num=%d", queuednum);
  2002. break;
  2003. }
  2004. }
  2005. sendnum = queuednum < neednum ? queuednum : neednum;
  2006. sendlen = bitmain_set_txtask(sendbuf, &(info->last_work_block), bitmain->works, BITMAIN_ARRAY_SIZE, bitmain->work_array, sendnum, &sendcount);
  2007. bitmain->queued -= sendnum;
  2008. info->send_full_space += sendnum;
  2009. if (bitmain->queued < 0)
  2010. bitmain->queued = 0;
  2011. if (bitmain->work_array + sendnum > BITMAIN_ARRAY_SIZE) {
  2012. bitmain->work_array = bitmain->work_array + sendnum-BITMAIN_ARRAY_SIZE;
  2013. } else {
  2014. bitmain->work_array += sendnum;
  2015. }
  2016. applog(LOG_DEBUG, "BTM: Send work array %d", bitmain->work_array);
  2017. if (sendlen > 0) {
  2018. info->fifo_space -= sendcount;
  2019. if (info->fifo_space < 0)
  2020. info->fifo_space = 0;
  2021. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  2022. if (unlikely(sendret == BTM_SEND_ERROR)) {
  2023. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  2024. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  2025. info->reset = true;
  2026. info->errorcount++;
  2027. senderror = 1;
  2028. if (info->errorcount > 1000) {
  2029. info->errorcount = 0;
  2030. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  2031. bitmain->shutdown = true;
  2032. }
  2033. break;
  2034. } else {
  2035. applog(LOG_DEBUG, "bitmain_send_data send ret=%d", sendret);
  2036. info->errorcount = 0;
  2037. }
  2038. } else {
  2039. applog(LOG_DEBUG, "BTM: Send work bitmain_set_txtask error: %d", sendlen);
  2040. break;
  2041. }
  2042. }
  2043. out_unlock:
  2044. cgtime(&now);
  2045. timediff = now.tv_sec - info->last_status_time.tv_sec;
  2046. if(timediff < 0) timediff = -timediff;
  2047. if (timediff > BITMAIN_SEND_STATUS_TIME) {
  2048. applog(LOG_DEBUG, "BTM: Send RX Status Token fifo_space(%d) timediff(%d)", info->fifo_space, timediff);
  2049. copy_time(&(info->last_status_time), &now);
  2050. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *) sendbuf, 0, 0, 0, 0);
  2051. if (sendlen > 0) {
  2052. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  2053. if (unlikely(sendret == BTM_SEND_ERROR)) {
  2054. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  2055. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  2056. info->reset = true;
  2057. info->errorcount++;
  2058. senderror = 1;
  2059. if (info->errorcount > 1000) {
  2060. info->errorcount = 0;
  2061. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  2062. bitmain->shutdown = true;
  2063. }
  2064. } else {
  2065. info->errorcount = 0;
  2066. if (info->fifo_space <= 0) {
  2067. senderror = 1;
  2068. }
  2069. }
  2070. }
  2071. }
  2072. if(info->send_full_space > BITMAIN_SEND_FULL_SPACE) {
  2073. info->send_full_space = 0;
  2074. ret = true;
  2075. cgsleep_ms(1);
  2076. }
  2077. mutex_unlock(&info->qlock);
  2078. if(senderror) {
  2079. ret = true;
  2080. applog(LOG_DEBUG, "bitmain_fill send task sleep");
  2081. //cgsleep_ms(1);
  2082. }
  2083. return ret;
  2084. }
  2085. static int64_t bitmain_scanhash(struct thr_info *thr)
  2086. {
  2087. struct cgpu_info *bitmain = thr->cgpu;
  2088. struct bitmain_info *info = bitmain->device_data;
  2089. const int chain_num = info->chain_num;
  2090. struct timeval now, then, tdiff;
  2091. int64_t hash_count, us_timeout;
  2092. struct timespec abstime;
  2093. int ret;
  2094. /* Half nonce range */
  2095. us_timeout = 0x80000000ll / info->asic_num / info->frequency;
  2096. tdiff.tv_sec = us_timeout / 1000000;
  2097. tdiff.tv_usec = us_timeout - (tdiff.tv_sec * 1000000);
  2098. cgtime(&now);
  2099. timeradd(&now, &tdiff, &then);
  2100. abstime.tv_sec = then.tv_sec;
  2101. abstime.tv_nsec = then.tv_usec * 1000;
  2102. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock start");
  2103. mutex_lock(&info->qlock);
  2104. hash_count = 0xffffffffull * (uint64_t)info->nonces;
  2105. bitmain->results += info->nonces + info->idle;
  2106. if (bitmain->results > chain_num)
  2107. bitmain->results = chain_num;
  2108. if (!info->reset)
  2109. bitmain->results--;
  2110. info->nonces = info->idle = 0;
  2111. mutex_unlock(&info->qlock);
  2112. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock stop");
  2113. /* Check for nothing but consecutive bad results or consistently less
  2114. * results than we should be getting and reset the FPGA if necessary */
  2115. //if (bitmain->results < -chain_num && !info->reset) {
  2116. // applog(LOG_ERR, "BTM%d: Result return rate low, resetting!",
  2117. // bitmain->device_id);
  2118. // info->reset = true;
  2119. //}
  2120. if (unlikely(bitmain->usbinfo.nodev)) {
  2121. applog(LOG_ERR, "BTM%d: Device disappeared, shutting down thread",
  2122. bitmain->device_id);
  2123. bitmain->shutdown = true;
  2124. }
  2125. /* This hashmeter is just a utility counter based on returned shares */
  2126. return hash_count;
  2127. }
  2128. static void bitmain_flush_work(struct cgpu_info *bitmain)
  2129. {
  2130. struct bitmain_info *info = bitmain->device_data;
  2131. int i = 0;
  2132. mutex_lock(&info->qlock);
  2133. /* Will overwrite any work queued */
  2134. applog(LOG_ERR, "bitmain_flush_work queued=%d array=%d", bitmain->queued, bitmain->work_array);
  2135. if(bitmain->queued > 0) {
  2136. if (bitmain->work_array + bitmain->queued > BITMAIN_ARRAY_SIZE) {
  2137. bitmain->work_array = bitmain->work_array + bitmain->queued-BITMAIN_ARRAY_SIZE;
  2138. } else {
  2139. bitmain->work_array += bitmain->queued;
  2140. }
  2141. }
  2142. bitmain->queued = 0;
  2143. //bitmain->work_array = 0;
  2144. //for(i = 0; i < BITMAIN_ARRAY_SIZE; i++) {
  2145. // bitmain->works[i] = NULL;
  2146. //}
  2147. //pthread_cond_signal(&info->qcond);
  2148. mutex_unlock(&info->qlock);
  2149. }
  2150. static struct api_data *bitmain_api_stats(struct cgpu_info *cgpu)
  2151. {
  2152. struct api_data *root = NULL;
  2153. struct bitmain_info *info = cgpu->device_data;
  2154. char buf[64];
  2155. int i = 0;
  2156. double hwp = (cgpu->hw_errors + cgpu->diff1) ?
  2157. (double)(cgpu->hw_errors) / (double)(cgpu->hw_errors + cgpu->diff1) : 0;
  2158. root = api_add_int(root, "baud", &(info->baud), false);
  2159. root = api_add_int(root, "miner_count", &(info->chain_num), false);
  2160. root = api_add_int(root, "asic_count", &(info->asic_num), false);
  2161. root = api_add_int(root, "timeout", &(info->timeout), false);
  2162. root = api_add_string(root, "frequency", info->frequency_t, false);
  2163. root = api_add_string(root, "voltage", info->voltage_t, false);
  2164. root = api_add_int(root, "hwv1", &(info->hw_version[0]), false);
  2165. root = api_add_int(root, "hwv2", &(info->hw_version[1]), false);
  2166. root = api_add_int(root, "hwv3", &(info->hw_version[2]), false);
  2167. root = api_add_int(root, "hwv4", &(info->hw_version[3]), false);
  2168. root = api_add_int(root, "fan_num", &(info->fan_num), false);
  2169. root = api_add_int(root, "fan1", &(info->fan[0]), false);
  2170. root = api_add_int(root, "fan2", &(info->fan[1]), false);
  2171. root = api_add_int(root, "fan3", &(info->fan[2]), false);
  2172. root = api_add_int(root, "fan4", &(info->fan[3]), false);
  2173. root = api_add_int(root, "fan5", &(info->fan[4]), false);
  2174. root = api_add_int(root, "fan6", &(info->fan[5]), false);
  2175. root = api_add_int(root, "fan7", &(info->fan[6]), false);
  2176. root = api_add_int(root, "fan8", &(info->fan[7]), false);
  2177. root = api_add_int(root, "fan9", &(info->fan[8]), false);
  2178. root = api_add_int(root, "fan10", &(info->fan[9]), false);
  2179. root = api_add_int(root, "fan11", &(info->fan[10]), false);
  2180. root = api_add_int(root, "fan12", &(info->fan[11]), false);
  2181. root = api_add_int(root, "fan13", &(info->fan[12]), false);
  2182. root = api_add_int(root, "fan14", &(info->fan[13]), false);
  2183. root = api_add_int(root, "fan15", &(info->fan[14]), false);
  2184. root = api_add_int(root, "fan16", &(info->fan[15]), false);
  2185. root = api_add_int(root, "temp_num", &(info->temp_num), false);
  2186. root = api_add_int(root, "temp1", &(info->temp[0]), false);
  2187. root = api_add_int(root, "temp2", &(info->temp[1]), false);
  2188. root = api_add_int(root, "temp3", &(info->temp[2]), false);
  2189. root = api_add_int(root, "temp4", &(info->temp[3]), false);
  2190. root = api_add_int(root, "temp5", &(info->temp[4]), false);
  2191. root = api_add_int(root, "temp6", &(info->temp[5]), false);
  2192. root = api_add_int(root, "temp7", &(info->temp[6]), false);
  2193. root = api_add_int(root, "temp8", &(info->temp[7]), false);
  2194. root = api_add_int(root, "temp9", &(info->temp[8]), false);
  2195. root = api_add_int(root, "temp10", &(info->temp[9]), false);
  2196. root = api_add_int(root, "temp11", &(info->temp[10]), false);
  2197. root = api_add_int(root, "temp12", &(info->temp[11]), false);
  2198. root = api_add_int(root, "temp13", &(info->temp[12]), false);
  2199. root = api_add_int(root, "temp14", &(info->temp[13]), false);
  2200. root = api_add_int(root, "temp15", &(info->temp[14]), false);
  2201. root = api_add_int(root, "temp16", &(info->temp[15]), false);
  2202. root = api_add_int(root, "temp_avg", &(info->temp_avg), false);
  2203. root = api_add_int(root, "temp_max", &(info->temp_max), false);
  2204. root = api_add_percent(root, "Device Hardware%", &hwp, true);
  2205. root = api_add_int(root, "no_matching_work", &(info->no_matching_work), false);
  2206. /*
  2207. for (i = 0; i < info->chain_num; i++) {
  2208. char mcw[24];
  2209. sprintf(mcw, "match_work_count%d", i + 1);
  2210. root = api_add_int(root, mcw, &(info->matching_work[i]), false);
  2211. }*/
  2212. root = api_add_int(root, "chain_acn1", &(info->chain_asic_num[0]), false);
  2213. root = api_add_int(root, "chain_acn2", &(info->chain_asic_num[1]), false);
  2214. root = api_add_int(root, "chain_acn3", &(info->chain_asic_num[2]), false);
  2215. root = api_add_int(root, "chain_acn4", &(info->chain_asic_num[3]), false);
  2216. root = api_add_int(root, "chain_acn5", &(info->chain_asic_num[4]), false);
  2217. root = api_add_int(root, "chain_acn6", &(info->chain_asic_num[5]), false);
  2218. root = api_add_int(root, "chain_acn7", &(info->chain_asic_num[6]), false);
  2219. root = api_add_int(root, "chain_acn8", &(info->chain_asic_num[7]), false);
  2220. root = api_add_int(root, "chain_acn9", &(info->chain_asic_num[8]), false);
  2221. root = api_add_int(root, "chain_acn10", &(info->chain_asic_num[9]), false);
  2222. root = api_add_int(root, "chain_acn11", &(info->chain_asic_num[10]), false);
  2223. root = api_add_int(root, "chain_acn12", &(info->chain_asic_num[11]), false);
  2224. root = api_add_int(root, "chain_acn13", &(info->chain_asic_num[12]), false);
  2225. root = api_add_int(root, "chain_acn14", &(info->chain_asic_num[13]), false);
  2226. root = api_add_int(root, "chain_acn15", &(info->chain_asic_num[14]), false);
  2227. root = api_add_int(root, "chain_acn16", &(info->chain_asic_num[15]), false);
  2228. //applog(LOG_ERR, "chain asic status:%s", info->chain_asic_status_t[0]);
  2229. root = api_add_string(root, "chain_acs1", info->chain_asic_status_t[0], false);
  2230. root = api_add_string(root, "chain_acs2", info->chain_asic_status_t[1], false);
  2231. root = api_add_string(root, "chain_acs3", info->chain_asic_status_t[2], false);
  2232. root = api_add_string(root, "chain_acs4", info->chain_asic_status_t[3], false);
  2233. root = api_add_string(root, "chain_acs5", info->chain_asic_status_t[4], false);
  2234. root = api_add_string(root, "chain_acs6", info->chain_asic_status_t[5], false);
  2235. root = api_add_string(root, "chain_acs7", info->chain_asic_status_t[6], false);
  2236. root = api_add_string(root, "chain_acs8", info->chain_asic_status_t[7], false);
  2237. root = api_add_string(root, "chain_acs9", info->chain_asic_status_t[8], false);
  2238. root = api_add_string(root, "chain_acs10", info->chain_asic_status_t[9], false);
  2239. root = api_add_string(root, "chain_acs11", info->chain_asic_status_t[10], false);
  2240. root = api_add_string(root, "chain_acs12", info->chain_asic_status_t[11], false);
  2241. root = api_add_string(root, "chain_acs13", info->chain_asic_status_t[12], false);
  2242. root = api_add_string(root, "chain_acs14", info->chain_asic_status_t[13], false);
  2243. root = api_add_string(root, "chain_acs15", info->chain_asic_status_t[14], false);
  2244. root = api_add_string(root, "chain_acs16", info->chain_asic_status_t[15], false);
  2245. //root = api_add_int(root, "chain_acs1", &(info->chain_asic_status[0]), false);
  2246. //root = api_add_int(root, "chain_acs2", &(info->chain_asic_status[1]), false);
  2247. //root = api_add_int(root, "chain_acs3", &(info->chain_asic_status[2]), false);
  2248. //root = api_add_int(root, "chain_acs4", &(info->chain_asic_status[3]), false);
  2249. return root;
  2250. }
  2251. static void bitmain_shutdown(struct thr_info *thr)
  2252. {
  2253. do_bitmain_close(thr);
  2254. }
  2255. char *set_bitmain_dev(char *arg)
  2256. {
  2257. if(arg == NULL || strlen(arg) <= 0) {
  2258. memcpy(opt_bitmain_dev, 0, 256);
  2259. } else {
  2260. strncpy(opt_bitmain_dev, arg, 256);
  2261. }
  2262. applog(LOG_DEBUG, "BTM set device: %s", opt_bitmain_dev);
  2263. return NULL;
  2264. }
  2265. char *set_bitmain_fan(char *arg)
  2266. {
  2267. int val1, val2, ret;
  2268. ret = sscanf(arg, "%d-%d", &val1, &val2);
  2269. if (ret < 1)
  2270. return "No values passed to bitmain-fan";
  2271. if (ret == 1)
  2272. val2 = val1;
  2273. if (val1 < 0 || val1 > 100 || val2 < 0 || val2 > 100 || val2 < val1)
  2274. return "Invalid value passed to bitmain-fan";
  2275. opt_bitmain_fan_min = val1 * BITMAIN_PWM_MAX / 100;
  2276. opt_bitmain_fan_max = val2 * BITMAIN_PWM_MAX / 100;
  2277. return NULL;
  2278. }
  2279. char *set_bitmain_freq(char *arg)
  2280. {
  2281. int val1, val2, ret;
  2282. ret = sscanf(arg, "%d-%d", &val1, &val2);
  2283. if (ret < 1)
  2284. return "No values passed to bitmain-freq";
  2285. if (ret == 1)
  2286. val2 = val1;
  2287. if (val1 < BITMAIN_MIN_FREQUENCY || val1 > BITMAIN_MAX_FREQUENCY ||
  2288. val2 < BITMAIN_MIN_FREQUENCY || val2 > BITMAIN_MAX_FREQUENCY ||
  2289. val2 < val1)
  2290. return "Invalid value passed to bitmain-freq";
  2291. opt_bitmain_freq_min = val1;
  2292. opt_bitmain_freq_max = val2;
  2293. return NULL;
  2294. }
  2295. struct device_drv bitmain_drv = {
  2296. .drv_id = DRIVER_bitmain,
  2297. .dname = "Bitmain",
  2298. .name = "BTM",
  2299. .drv_detect = bitmain_detect,
  2300. .thread_prepare = bitmain_prepare,
  2301. .hash_work = hash_queued_work,
  2302. .queue_full = bitmain_fill,
  2303. .scanwork = bitmain_scanhash,
  2304. .flush_work = bitmain_flush_work,
  2305. .get_api_stats = bitmain_api_stats,
  2306. .get_statline_before = get_bitmain_statline_before,
  2307. .reinit_device = bitmain_init,
  2308. .thread_shutdown = bitmain_shutdown,
  2309. };