driver-avalon.c 22 KB

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  1. /*
  2. * Copyright 2012 Luke Dashjr
  3. * Copyright 2012 2013 Xiangfu <xiangfu@openmobilefree.com>
  4. * Copyright 2012 Andrew Smith
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the Free
  8. * Software Foundation; either version 3 of the License, or (at your option)
  9. * any later version. See COPYING for more details.
  10. */
  11. #include "config.h"
  12. #include <limits.h>
  13. #include <pthread.h>
  14. #include <stdio.h>
  15. #include <sys/time.h>
  16. #include <sys/types.h>
  17. #include <dirent.h>
  18. #include <unistd.h>
  19. #ifndef WIN32
  20. #include <termios.h>
  21. #include <sys/stat.h>
  22. #include <fcntl.h>
  23. #ifndef O_CLOEXEC
  24. #define O_CLOEXEC 0
  25. #endif
  26. #else
  27. #include <windows.h>
  28. #include <io.h>
  29. #endif
  30. #include "elist.h"
  31. #include "miner.h"
  32. #include "fpgautils.h"
  33. #include "driver-avalon.h"
  34. #include "hexdump.c"
  35. static struct timeval history_sec = { HISTORY_SEC, 0 };
  36. static const char *MODE_DEFAULT_STR = "default";
  37. static const char *MODE_SHORT_STR = "short";
  38. static const char *MODE_LONG_STR = "long";
  39. static const char *MODE_VALUE_STR = "value";
  40. static const char *MODE_UNKNOWN_STR = "unknown";
  41. static int option_offset = -1;
  42. static struct AVALON_INFO **avalon_info;
  43. struct device_api avalon_api;
  44. static int avalon_init_task(struct avalon_task *at,
  45. uint8_t reset, uint8_t ff, uint8_t fan,
  46. uint8_t timeout, uint8_t chip_num, uint8_t miner_num)
  47. {
  48. if (!at)
  49. return -1;
  50. memset(at, 0, sizeof(struct avalon_task));
  51. at->reset = reset ? 1 : 0;
  52. at->flush_fifo = ff ? 1: 0;
  53. at->fan_eft = fan ? 1 : 0; /* 1: fan_pwm_data */
  54. at->fan_pwm_data = fan ? (0xFF & fan) : 0xFF; /* by default: 0xFF */
  55. /* 1: timeout_data miner_num, chip_num */
  56. at->timer_eft = timeout ? 1 : 0;
  57. at->timer_eft = chip_num ? 1 : 0;
  58. at->timer_eft = miner_num ? 1 : 0;
  59. at->timeout_data = timeout ? timeout : 0x27; /* by default: 0x27 */
  60. at->chip_num = chip_num ? chip_num : 0xA; /* by default: 0x0A */
  61. at->miner_num = miner_num ? miner_num : 0x18; /* by default: 0x18 */
  62. /* FIXME: Not support nonce range yet */
  63. at->nonce_elf = 0; /* 1: nonce_range*/
  64. if (opt_debug) {
  65. applog(LOG_DEBUG, "Avalon: Task:");
  66. hexdump((uint8_t *)at, sizeof(struct avalon_task));
  67. }
  68. return 0;
  69. }
  70. static inline void avalon_create_task(struct avalon_task *at, struct work *work)
  71. {
  72. memcpy(at->midstate, work->midstate, 32);
  73. rev((uint8_t *)at->midstate, 32);
  74. memcpy(at->data, work->data + 64, 12);
  75. rev((uint8_t *)at->data, 12);
  76. if (opt_debug) {
  77. applog(LOG_DEBUG, "Avalon: Task + work:");
  78. hexdump((uint8_t *)at, sizeof(struct avalon_task));
  79. }
  80. }
  81. static int avalon_send_task(int fd, const struct avalon_task *at)
  82. {
  83. size_t ret;
  84. struct timespec p;
  85. if (opt_debug) {
  86. applog(LOG_DEBUG, "Avalon: Sent:");
  87. hexdump((uint8_t *)at, sizeof(struct avalon_task));
  88. }
  89. ret = write(fd, (uint8_t *)at, AVALON_WRITE_SIZE);
  90. if (unlikely(ret != AVALON_WRITE_SIZE))
  91. return AVA_SEND_ERROR;
  92. p.tv_sec = 0;
  93. p.tv_nsec = AVALON_SEND_WORK_PITCH;
  94. nanosleep(&p, NULL);
  95. return AVA_SEND_OK;
  96. }
  97. static int avalon_gets(int fd, uint8_t *buf, int read_count,
  98. struct thr_info *thr, struct timeval *tv_finish)
  99. {
  100. ssize_t ret = 0;
  101. int rc = 0;
  102. int read_amount = AVALON_READ_SIZE;
  103. bool first = true;
  104. int full = avalon_buffer_full(fd);
  105. applog(LOG_DEBUG, "Avalon: Buffer full: %s",
  106. full == AVA_BUFFER_FULL? "Yes" : "no");
  107. if (full == AVA_BUFFER_EMPTY) {
  108. applog(LOG_DEBUG, "Avalon: Finished hash!");
  109. return AVA_GETS_DONE;
  110. }
  111. /* Read reply 1 byte at a time to get earliest tv_finish */
  112. while (true) {
  113. ret = read(fd, buf, 1);
  114. if (ret < 0)
  115. return AVA_GETS_ERROR;
  116. if (first && tv_finish != NULL)
  117. gettimeofday(tv_finish, NULL);
  118. if (ret >= read_amount)
  119. return AVA_GETS_OK;
  120. if (ret > 0) {
  121. buf += ret;
  122. read_amount -= ret;
  123. first = false;
  124. continue;
  125. }
  126. rc++;
  127. if (rc >= read_count) {
  128. if (opt_debug) {
  129. applog(LOG_ERR,
  130. "Avalon: No data in %.2f seconds",
  131. (float)rc/(float)TIME_FACTOR);
  132. }
  133. return AVA_GETS_TIMEOUT;
  134. }
  135. if (thr && thr->work_restart) {
  136. if (opt_debug) {
  137. applog(LOG_ERR,
  138. "Avalon: Work restart at %.2f seconds",
  139. (float)(rc)/(float)TIME_FACTOR);
  140. }
  141. return AVA_GETS_RESTART;
  142. }
  143. }
  144. }
  145. static int avalon_get_result(int fd, struct avalon_result *ar,
  146. struct thr_info *thr, struct timeval *tv_finish)
  147. {
  148. struct cgpu_info *avalon;
  149. struct AVALON_INFO *info;
  150. uint8_t nonce_bin[AVALON_READ_SIZE];
  151. int ret, read_count = 10; /* FIXME: Set to 1s now */
  152. if (thr) {
  153. avalon = thr->cgpu;
  154. info = avalon_info[avalon->device_id];
  155. read_count = info->read_count;
  156. }
  157. memset(nonce_bin, 0, AVALON_READ_SIZE);
  158. ret = avalon_gets(fd, nonce_bin, read_count, thr, tv_finish);
  159. if (ret == AVA_GETS_OK) /* FIXME: maybe some decode here? */
  160. memcpy((uint8_t *)ar, nonce_bin, AVALON_READ_SIZE);
  161. return ret;
  162. }
  163. static int avalon_decode_nonce(struct work **work, uint32_t *nonce,
  164. uint8_t *nonce_bin)
  165. {
  166. int i;
  167. /* FIXME: should be modify to avalon data format */
  168. memcpy((uint8_t *)nonce, nonce_bin, AVALON_READ_SIZE);
  169. #if !defined (__BIG_ENDIAN__) && !defined(MIPSEB)
  170. /* FIXME: there should be a rev() not just 32bit */
  171. *nonce = swab32(*nonce);
  172. #endif
  173. for (i = 0; i < AVALON_GET_WORK_COUNT; i++) {
  174. /* TODO: find the nonce work, return index */
  175. if (!memcmp((uint8_t *)nonce,
  176. work[i]->data + 64,
  177. 4/* should be 12 */))
  178. break;
  179. }
  180. i -= 1;
  181. return i;
  182. }
  183. static int avalon_reset(int fd)
  184. {
  185. struct avalon_task at;
  186. struct avalon_result ar;
  187. uint8_t *buf;
  188. int i;
  189. avalon_init_task(&at, 1, 0, 0, 0, 0, 0);
  190. avalon_send_task(fd, &at);
  191. avalon_get_result(fd, &ar, NULL, NULL);
  192. buf = (uint8_t *)&ar;
  193. for (i = 0; i < 11; i++)
  194. if (buf[i] != 0)
  195. break;
  196. /* FIXME: add more avalon info base on return */
  197. if (i != 11) {
  198. applog(LOG_ERR, "Avalon: Reset failed! not a Avalon?");
  199. return 1;
  200. }
  201. applog(LOG_ERR, "Avalon: Reset succeeded");
  202. return 0;
  203. }
  204. static void do_avalon_close(struct thr_info *thr)
  205. {
  206. struct cgpu_info *avalon = thr->cgpu;
  207. avalon_close(avalon->device_fd);
  208. avalon->device_fd = -1;
  209. }
  210. static const char *timing_mode_str(enum timing_mode timing_mode)
  211. {
  212. switch(timing_mode) {
  213. case MODE_DEFAULT:
  214. return MODE_DEFAULT_STR;
  215. case MODE_SHORT:
  216. return MODE_SHORT_STR;
  217. case MODE_LONG:
  218. return MODE_LONG_STR;
  219. case MODE_VALUE:
  220. return MODE_VALUE_STR;
  221. default:
  222. return MODE_UNKNOWN_STR;
  223. }
  224. }
  225. static void set_timing_mode(int this_option_offset, struct cgpu_info *avalon)
  226. {
  227. struct AVALON_INFO *info = avalon_info[avalon->device_id];
  228. double Hs;
  229. char buf[BUFSIZ+1];
  230. char *ptr, *comma, *eq;
  231. size_t max;
  232. int i;
  233. if (opt_icarus_timing == NULL)
  234. buf[0] = '\0';
  235. else {
  236. ptr = opt_icarus_timing;
  237. for (i = 0; i < this_option_offset; i++) {
  238. comma = strchr(ptr, ',');
  239. if (comma == NULL)
  240. break;
  241. ptr = comma + 1;
  242. }
  243. comma = strchr(ptr, ',');
  244. if (comma == NULL)
  245. max = strlen(ptr);
  246. else
  247. max = comma - ptr;
  248. if (max > BUFSIZ)
  249. max = BUFSIZ;
  250. strncpy(buf, ptr, max);
  251. buf[max] = '\0';
  252. }
  253. info->Hs = 0;
  254. info->read_count = 0;
  255. if (strcasecmp(buf, MODE_SHORT_STR) == 0) {
  256. info->Hs = AVALON_REV3_HASH_TIME;
  257. info->read_count = AVALON_READ_COUNT_TIMING;
  258. info->timing_mode = MODE_SHORT;
  259. info->do_avalon_timing = true;
  260. } else if (strcasecmp(buf, MODE_LONG_STR) == 0) {
  261. info->Hs = AVALON_REV3_HASH_TIME;
  262. info->read_count = AVALON_READ_COUNT_TIMING;
  263. info->timing_mode = MODE_LONG;
  264. info->do_avalon_timing = true;
  265. } else if ((Hs = atof(buf)) != 0) {
  266. info->Hs = Hs / NANOSEC;
  267. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  268. if ((eq = strchr(buf, '=')) != NULL)
  269. info->read_count = atoi(eq+1);
  270. if (info->read_count < 1)
  271. info->read_count =
  272. (int)(info->fullnonce * TIME_FACTOR) - 1;
  273. if (unlikely(info->read_count < 1))
  274. info->read_count = 1;
  275. info->timing_mode = MODE_VALUE;
  276. info->do_avalon_timing = false;
  277. } else {
  278. // Anything else in buf just uses DEFAULT mode
  279. info->Hs = AVALON_REV3_HASH_TIME;
  280. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  281. if ((eq = strchr(buf, '=')) != NULL)
  282. info->read_count = atoi(eq+1);
  283. if (info->read_count < 1)
  284. info->read_count =
  285. (int)(info->fullnonce * TIME_FACTOR) - 1;
  286. info->timing_mode = MODE_DEFAULT;
  287. info->do_avalon_timing = false;
  288. }
  289. info->min_data_count = MIN_DATA_COUNT;
  290. applog(LOG_DEBUG, "Avalon: Init: %d mode=%s read_count=%d Hs=%e",
  291. avalon->device_id, timing_mode_str(info->timing_mode),
  292. info->read_count, info->Hs);
  293. }
  294. static uint32_t mask(int work_division)
  295. {
  296. char err_buf[BUFSIZ+1];
  297. uint32_t nonce_mask = 0x7fffffff;
  298. // yes we can calculate these,
  299. // but this way it's easy to see what they are
  300. switch (work_division) {
  301. case 1:
  302. nonce_mask = 0xffffffff;
  303. break;
  304. case 2:
  305. nonce_mask = 0x7fffffff;
  306. break;
  307. case 4:
  308. nonce_mask = 0x3fffffff;
  309. break;
  310. case 8:
  311. nonce_mask = 0x1fffffff;
  312. break;
  313. default:
  314. sprintf(err_buf,
  315. "Invalid2 avalon-options for work_division (%d)"
  316. " must be 1, 2, 4 or 8", work_division);
  317. quit(1, err_buf);
  318. }
  319. return nonce_mask;
  320. }
  321. static void get_options(int this_option_offset, int *baud, int *work_division,
  322. int *asic_count)
  323. {
  324. char err_buf[BUFSIZ+1];
  325. char buf[BUFSIZ+1];
  326. char *ptr, *comma, *colon, *colon2;
  327. size_t max;
  328. int i, tmp;
  329. if (opt_icarus_options == NULL)
  330. buf[0] = '\0';
  331. else {
  332. ptr = opt_icarus_options;
  333. for (i = 0; i < this_option_offset; i++) {
  334. comma = strchr(ptr, ',');
  335. if (comma == NULL)
  336. break;
  337. ptr = comma + 1;
  338. }
  339. comma = strchr(ptr, ',');
  340. if (comma == NULL)
  341. max = strlen(ptr);
  342. else
  343. max = comma - ptr;
  344. if (max > BUFSIZ)
  345. max = BUFSIZ;
  346. strncpy(buf, ptr, max);
  347. buf[max] = '\0';
  348. }
  349. *baud = AVALON_IO_SPEED;
  350. *work_division = 2;
  351. *asic_count = 2;
  352. if (*buf) {
  353. colon = strchr(buf, ':');
  354. if (colon)
  355. *(colon++) = '\0';
  356. if (*buf) {
  357. tmp = atoi(buf);
  358. switch (tmp) {
  359. case 115200:
  360. *baud = 115200;
  361. break;
  362. case 57600:
  363. *baud = 57600;
  364. break;
  365. default:
  366. sprintf(err_buf,
  367. "Invalid avalon-options for baud (%s) "
  368. "must be 115200 or 57600", buf);
  369. quit(1, err_buf);
  370. }
  371. }
  372. if (colon && *colon) {
  373. colon2 = strchr(colon, ':');
  374. if (colon2)
  375. *(colon2++) = '\0';
  376. if (*colon) {
  377. tmp = atoi(colon);
  378. if (tmp == 1 || tmp == 2 ||
  379. tmp == 4 || tmp == 8) {
  380. *work_division = tmp;
  381. // default to the same
  382. *asic_count = tmp;
  383. } else {
  384. sprintf(err_buf,
  385. "Invalid avalon-options for "
  386. "work_division (%s) must be 1,"
  387. " 2, 4 or 8", colon);
  388. quit(1, err_buf);
  389. }
  390. }
  391. if (colon2 && *colon2) {
  392. tmp = atoi(colon2);
  393. if (tmp > 0 && tmp <= *work_division)
  394. *asic_count = tmp;
  395. else {
  396. sprintf(err_buf,
  397. "Invalid avalon-options for "
  398. "asic_count (%s) must be >0 "
  399. "and <=work_division (%d)",
  400. colon2, *work_division);
  401. quit(1, err_buf);
  402. }
  403. }
  404. }
  405. }
  406. }
  407. static bool avalon_detect_one(const char *devpath)
  408. {
  409. struct AVALON_INFO *info;
  410. int fd, ret;
  411. int baud, work_division, asic_count;
  412. int this_option_offset = ++option_offset;
  413. get_options(this_option_offset, &baud, &work_division, &asic_count);
  414. applog(LOG_DEBUG, "Avalon Detect: Attempting to open %s", devpath);
  415. fd = avalon_open2(devpath, baud, true);
  416. if (unlikely(fd == -1)) {
  417. applog(LOG_ERR, "Avalon Detect: Failed to open %s", devpath);
  418. return false;
  419. }
  420. ret = avalon_reset(fd);
  421. avalon_close(fd);
  422. if (ret)
  423. return false;
  424. /* We have a real Avalon! */
  425. struct cgpu_info *avalon;
  426. avalon = calloc(1, sizeof(struct cgpu_info));
  427. avalon->api = &avalon_api;
  428. avalon->device_path = strdup(devpath);
  429. avalon->device_fd = -1;
  430. avalon->threads = AVALON_MINER_THREADS;
  431. add_cgpu(avalon);
  432. avalon_info = realloc(avalon_info,
  433. sizeof(struct AVALON_INFO *) *
  434. (total_devices + 1));
  435. applog(LOG_INFO, "Avalon Detect: Found at %s, mark as %d",
  436. devpath, avalon->device_id);
  437. applog(LOG_DEBUG,
  438. "Avalon: Init: %d baud=%d work_division=%d asic_count=%d",
  439. avalon->device_id, baud, work_division, asic_count);
  440. avalon_info[avalon->device_id] = (struct AVALON_INFO *)
  441. malloc(sizeof(struct AVALON_INFO));
  442. if (unlikely(!(avalon_info[avalon->device_id])))
  443. quit(1, "Failed to malloc AVALON_INFO");
  444. info = avalon_info[avalon->device_id];
  445. // Initialise everything to zero for a new device
  446. memset(info, 0, sizeof(struct AVALON_INFO));
  447. info->baud = baud;
  448. info->work_division = work_division;
  449. info->asic_count = asic_count;
  450. info->nonce_mask = mask(work_division);
  451. set_timing_mode(this_option_offset, avalon);
  452. return true;
  453. }
  454. static inline void avalon_detect()
  455. {
  456. serial_detect(&avalon_api, avalon_detect_one);
  457. }
  458. static bool avalon_prepare(struct thr_info *thr)
  459. {
  460. struct cgpu_info *avalon = thr->cgpu;
  461. struct timeval now;
  462. int fd;
  463. avalon->device_fd = -1;
  464. fd = avalon_open(avalon->device_path,
  465. avalon_info[avalon->device_id]->baud);
  466. if (unlikely(fd == -1)) {
  467. applog(LOG_ERR, "Avalon: Failed to open on %s",
  468. avalon->device_path);
  469. return false;
  470. }
  471. avalon->device_fd = fd;
  472. applog(LOG_INFO, "Avalon: Opened on %s", avalon->device_path);
  473. gettimeofday(&now, NULL);
  474. get_datestamp(avalon->init, &now);
  475. return true;
  476. }
  477. static int64_t avalon_scanhash(struct thr_info *thr, struct work **work,
  478. __maybe_unused int64_t max_nonce)
  479. {
  480. struct cgpu_info *avalon;
  481. int fd;
  482. int ret;
  483. struct AVALON_INFO *info;
  484. struct avalon_task at;
  485. uint8_t nonce_bin[AVALON_READ_SIZE];
  486. uint32_t nonce;
  487. int64_t hash_count;
  488. int i, work_i;
  489. int read_count;
  490. int count;
  491. struct timeval tv_start, tv_finish, elapsed;
  492. struct timeval tv_history_start, tv_history_finish;
  493. double Ti, Xi;
  494. int curr_hw_errors;
  495. bool was_hw_error;
  496. struct AVALON_HISTORY *history0, *history;
  497. double Hs, W, fullnonce;
  498. int64_t estimate_hashes;
  499. uint32_t values;
  500. int64_t hash_count_range;
  501. avalon = thr->cgpu;
  502. info = avalon_info[avalon->device_id];
  503. if (avalon->device_fd == -1)
  504. if (!avalon_prepare(thr)) {
  505. applog(LOG_ERR, "AVA%i: Comms error",
  506. avalon->device_id);
  507. dev_error(avalon, REASON_DEV_COMMS_ERROR);
  508. // fail the device if the reopen attempt fails
  509. return -1;
  510. }
  511. fd = avalon->device_fd;
  512. #ifndef WIN32
  513. tcflush(fd, TCOFLUSH);
  514. #endif
  515. /* Write task to device one by one */
  516. for (i = 0; i < AVALON_GET_WORK_COUNT; i++) {
  517. avalon_init_default_task(&at);
  518. avalon_create_task(&at, work[i]);
  519. ret = avalon_send_task(fd, &at);
  520. if (ret == AVA_SEND_ERROR) {
  521. do_avalon_close(thr);
  522. applog(LOG_ERR, "AVA%i: Comms error",
  523. avalon->device_id);
  524. dev_error(avalon, REASON_DEV_COMMS_ERROR);
  525. return 0; /* This should never happen */
  526. }
  527. }
  528. elapsed.tv_sec = elapsed.tv_usec = 0;
  529. gettimeofday(&tv_start, NULL);
  530. /* count may != AVALON_GET_WORK_COUNT */
  531. for (i = 0; i < AVALON_GET_WORK_COUNT; i++) {
  532. // FIXME: ret = avalon_get_result(nonce_bin, fd, &tv_finish, thr);
  533. if (ret == AVA_GETS_ERROR ) {
  534. do_avalon_close(thr);
  535. applog(LOG_ERR, "AVA%i: Comms error", avalon->device_id);
  536. dev_error(avalon, REASON_DEV_COMMS_ERROR);
  537. return 0;
  538. }
  539. work_i = avalon_decode_nonce(work, &nonce, nonce_bin);
  540. /* FIXME: Should be a check on return, no work_i maybe hardware error */
  541. work[work_i]->blk.nonce = 0xffffffff;
  542. // aborted before becoming idle, get new work
  543. if (ret == AVA_GETS_TIMEOUT || ret == AVA_GETS_RESTART) {
  544. timersub(&tv_finish, &tv_start, &elapsed);
  545. // ONLY up to just when it aborted
  546. // We didn't read a reply so we don't subtract AVALON_READ_TIME
  547. estimate_hashes = ((double)(elapsed.tv_sec) +
  548. ((double)(elapsed.tv_usec)) /
  549. ((double)1000000)) / info->Hs;
  550. // If some Serial-USB delay allowed the full nonce range to
  551. // complete it can't have done more than a full nonce
  552. if (unlikely(estimate_hashes > 0xffffffff))
  553. estimate_hashes = 0xffffffff;
  554. applog(LOG_DEBUG,
  555. "Avalon: no nonce = 0x%08llx hashes "
  556. "(%ld.%06lds)",
  557. estimate_hashes, elapsed.tv_sec, elapsed.tv_usec);
  558. return estimate_hashes;
  559. }
  560. curr_hw_errors = avalon->hw_errors;
  561. submit_nonce(thr, work[work_i], nonce);
  562. was_hw_error = (curr_hw_errors > avalon->hw_errors);
  563. // Force a USB close/reopen on any hw error
  564. if (was_hw_error)
  565. do_avalon_close(thr);
  566. hash_count = (nonce & info->nonce_mask);
  567. hash_count++;
  568. hash_count *= info->asic_count;
  569. }
  570. if (opt_debug || info->do_avalon_timing)
  571. timersub(&tv_finish, &tv_start, &elapsed);
  572. if (opt_debug) {
  573. applog(LOG_DEBUG,
  574. "Avalon: nonce = 0x%08x = 0x%08llx hashes "
  575. "(%ld.%06lds)",
  576. nonce, hash_count, elapsed.tv_sec, elapsed.tv_usec);
  577. }
  578. // ignore possible end condition values ... and hw errors
  579. if (info->do_avalon_timing
  580. && !was_hw_error
  581. && ((nonce & info->nonce_mask) > END_CONDITION)
  582. && ((nonce & info->nonce_mask) <
  583. (info->nonce_mask & ~END_CONDITION))) {
  584. gettimeofday(&tv_history_start, NULL);
  585. history0 = &(info->history[0]);
  586. if (history0->values == 0)
  587. timeradd(&tv_start, &history_sec, &(history0->finish));
  588. Ti = (double)(elapsed.tv_sec)
  589. + ((double)(elapsed.tv_usec))/((double)1000000)
  590. - ((double)AVALON_READ_TIME(info->baud));
  591. Xi = (double)hash_count;
  592. history0->sumXiTi += Xi * Ti;
  593. history0->sumXi += Xi;
  594. history0->sumTi += Ti;
  595. history0->sumXi2 += Xi * Xi;
  596. history0->values++;
  597. if (history0->hash_count_max < hash_count)
  598. history0->hash_count_max = hash_count;
  599. if (history0->hash_count_min > hash_count ||
  600. history0->hash_count_min == 0)
  601. history0->hash_count_min = hash_count;
  602. if (history0->values >= info->min_data_count
  603. && timercmp(&tv_start, &(history0->finish), >)) {
  604. for (i = INFO_HISTORY; i > 0; i--)
  605. memcpy(&(info->history[i]),
  606. &(info->history[i-1]),
  607. sizeof(struct AVALON_HISTORY));
  608. // Initialise history0 to zero for summary calculation
  609. memset(history0, 0, sizeof(struct AVALON_HISTORY));
  610. // We just completed a history data set
  611. // So now recalc read_count based on the
  612. // whole history thus we will
  613. // initially get more accurate until it
  614. // completes INFO_HISTORY
  615. // total data sets
  616. count = 0;
  617. for (i = 1 ; i <= INFO_HISTORY; i++) {
  618. history = &(info->history[i]);
  619. if (history->values >= MIN_DATA_COUNT) {
  620. count++;
  621. history0->sumXiTi += history->sumXiTi;
  622. history0->sumXi += history->sumXi;
  623. history0->sumTi += history->sumTi;
  624. history0->sumXi2 += history->sumXi2;
  625. history0->values += history->values;
  626. if (history0->hash_count_max < history->hash_count_max)
  627. history0->hash_count_max = history->hash_count_max;
  628. if (history0->hash_count_min > history->hash_count_min || history0->hash_count_min == 0)
  629. history0->hash_count_min = history->hash_count_min;
  630. }
  631. }
  632. // All history data
  633. Hs = (history0->values*history0->sumXiTi - history0->sumXi*history0->sumTi)
  634. / (history0->values*history0->sumXi2 - history0->sumXi*history0->sumXi);
  635. W = history0->sumTi/history0->values - Hs*history0->sumXi/history0->values;
  636. hash_count_range = history0->hash_count_max - history0->hash_count_min;
  637. values = history0->values;
  638. // Initialise history0 to zero for next data set
  639. memset(history0, 0, sizeof(struct AVALON_HISTORY));
  640. fullnonce = W + Hs * (((double)0xffffffff) + 1);
  641. read_count = (int)(fullnonce * TIME_FACTOR) - 1;
  642. info->Hs = Hs;
  643. info->read_count = read_count;
  644. info->fullnonce = fullnonce;
  645. info->count = count;
  646. info->W = W;
  647. info->values = values;
  648. info->hash_count_range = hash_count_range;
  649. if (info->min_data_count < MAX_MIN_DATA_COUNT)
  650. info->min_data_count *= 2;
  651. else if (info->timing_mode == MODE_SHORT)
  652. info->do_avalon_timing = false;
  653. // applog(LOG_WARNING, "Avalon %d Re-estimate: read_count=%d fullnonce=%fs history count=%d Hs=%e W=%e values=%d hash range=0x%08lx min data count=%u", avalon->device_id, read_count, fullnonce, count, Hs, W, values, hash_count_range, info->min_data_count);
  654. applog(LOG_WARNING, "Avalon %d Re-estimate: Hs=%e W=%e read_count=%d fullnonce=%.3fs",
  655. avalon->device_id, Hs, W, read_count, fullnonce);
  656. }
  657. info->history_count++;
  658. gettimeofday(&tv_history_finish, NULL);
  659. timersub(&tv_history_finish, &tv_history_start, &tv_history_finish);
  660. timeradd(&tv_history_finish, &(info->history_time), &(info->history_time));
  661. }
  662. return hash_count;
  663. }
  664. static struct api_data *avalon_api_stats(struct cgpu_info *cgpu)
  665. {
  666. struct api_data *root = NULL;
  667. struct AVALON_INFO *info = avalon_info[cgpu->device_id];
  668. // Warning, access to these is not locked - but we don't really
  669. // care since hashing performance is way more important than
  670. // locking access to displaying API debug 'stats'
  671. // If locking becomes an issue for any of them, use copy_data=true also
  672. root = api_add_int(root, "read_count", &(info->read_count), false);
  673. root = api_add_double(root, "fullnonce", &(info->fullnonce), false);
  674. root = api_add_int(root, "count", &(info->count), false);
  675. root = api_add_hs(root, "Hs", &(info->Hs), false);
  676. root = api_add_double(root, "W", &(info->W), false);
  677. root = api_add_uint(root, "total_values", &(info->values), false);
  678. root = api_add_uint64(root, "range", &(info->hash_count_range), false);
  679. root = api_add_uint64(root, "history_count", &(info->history_count),
  680. false);
  681. root = api_add_timeval(root, "history_time", &(info->history_time),
  682. false);
  683. root = api_add_uint(root, "min_data_count", &(info->min_data_count),
  684. false);
  685. root = api_add_uint(root, "timing_values", &(info->history[0].values),
  686. false);
  687. root = api_add_const(root, "timing_mode",
  688. timing_mode_str(info->timing_mode), false);
  689. root = api_add_bool(root, "is_timing", &(info->do_avalon_timing),
  690. false);
  691. root = api_add_int(root, "baud", &(info->baud), false);
  692. root = api_add_int(root, "work_division", &(info->work_division),
  693. false);
  694. root = api_add_int(root, "asic_count", &(info->asic_count), false);
  695. return root;
  696. }
  697. static void avalon_shutdown(struct thr_info *thr)
  698. {
  699. do_avalon_close(thr);
  700. }
  701. struct device_api avalon_api = {
  702. .dname = "avalon",
  703. .name = "AVA",
  704. .api_detect = avalon_detect,
  705. .thread_prepare = avalon_prepare,
  706. .scanhash_queue = avalon_scanhash,
  707. .get_api_stats = avalon_api_stats,
  708. .thread_shutdown = avalon_shutdown,
  709. };