driver-bitmain.c 65 KB

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  1. /*
  2. * Copyright 2012-2014 Lingchao Xu
  3. * Copyright 2015 Luke Dashjr
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the Free
  7. * Software Foundation; either version 3 of the License, or (at your option)
  8. * any later version. See COPYING for more details.
  9. */
  10. #include "config.h"
  11. #include <limits.h>
  12. #include <math.h>
  13. #include <pthread.h>
  14. #include <stdio.h>
  15. #include <sys/time.h>
  16. #include <sys/types.h>
  17. #include <dirent.h>
  18. #include <unistd.h>
  19. #ifndef WIN32
  20. #include <sys/select.h>
  21. #include <termios.h>
  22. #include <sys/stat.h>
  23. #include <fcntl.h>
  24. #ifndef O_CLOEXEC
  25. #define O_CLOEXEC 0
  26. #endif
  27. #else
  28. #include "compat.h"
  29. #include <windows.h>
  30. #include <io.h>
  31. #endif
  32. #include <curl/curl.h>
  33. #include <uthash.h>
  34. #include "deviceapi.h"
  35. #include "miner.h"
  36. #include "driver-bitmain.h"
  37. #include "lowl-vcom.h"
  38. #include "util.h"
  39. const bool opt_bitmain_hwerror = true;
  40. BFG_REGISTER_DRIVER(bitmain_drv)
  41. static const struct bfg_set_device_definition bitmain_set_device_funcs_init[];
  42. #define htole8(x) (x)
  43. #define BITMAIN_USING_CURL -2
  44. static
  45. struct cgpu_info *btm_alloc_cgpu(struct device_drv *drv, int threads)
  46. {
  47. struct cgpu_info *cgpu = calloc(1, sizeof(*cgpu));
  48. if (unlikely(!cgpu))
  49. quit(1, "Failed to calloc cgpu for %s in usb_alloc_cgpu", drv->dname);
  50. cgpu->drv = drv;
  51. cgpu->deven = DEV_ENABLED;
  52. cgpu->threads = threads;
  53. cgpu->device_fd = -1;
  54. struct bitmain_info *info = malloc(sizeof(*info));
  55. if (unlikely(!info))
  56. quit(1, "Failed to calloc bitmain_info data");
  57. cgpu->device_data = info;
  58. *info = (struct bitmain_info){
  59. .baud = BITMAIN_IO_SPEED,
  60. .chain_num = BITMAIN_DEFAULT_CHAIN_NUM,
  61. .asic_num = BITMAIN_DEFAULT_ASIC_NUM,
  62. .timeout = BITMAIN_DEFAULT_TIMEOUT,
  63. .frequency = BITMAIN_DEFAULT_FREQUENCY,
  64. .voltage[0] = BITMAIN_DEFAULT_VOLTAGE0,
  65. .voltage[1] = BITMAIN_DEFAULT_VOLTAGE1,
  66. .diff = 255,
  67. .lowest_goal_diff = 255,
  68. };
  69. sprintf(info->frequency_t, "%d", BITMAIN_DEFAULT_FREQUENCY),
  70. strcpy(info->voltage_t, BITMAIN_DEFAULT_VOLTAGE_T);
  71. return cgpu;
  72. }
  73. static curl_socket_t bitmain_grab_socket_opensocket_cb(void *clientp, __maybe_unused curlsocktype purpose, struct curl_sockaddr *addr)
  74. {
  75. struct bitmain_info * const info = clientp;
  76. curl_socket_t sck = bfg_socket(addr->family, addr->socktype, addr->protocol);
  77. info->curl_sock = sck;
  78. return sck;
  79. }
  80. static
  81. bool btm_init(struct cgpu_info *cgpu, const char * devpath)
  82. {
  83. applog(LOG_DEBUG, "btm_init cgpu->device_fd=%d", cgpu->device_fd);
  84. int fd = -1;
  85. if(cgpu->device_fd >= 0) {
  86. return false;
  87. }
  88. struct bitmain_info *info = cgpu->device_data;
  89. if (!strncmp(devpath, "ip:", 3)) {
  90. CURL *curl = curl_easy_init();
  91. if (!curl)
  92. applogr(false, LOG_ERR, "%s: curl_easy_init failed", cgpu->drv->dname);
  93. // CURLINFO_LASTSOCKET is broken on Win64 (which has a wider SOCKET type than curl_easy_getinfo returns), so we use this hack for now
  94. info->curl_sock = -1;
  95. curl_easy_setopt(curl, CURLOPT_OPENSOCKETFUNCTION, bitmain_grab_socket_opensocket_cb);
  96. curl_easy_setopt(curl, CURLOPT_OPENSOCKETDATA, info);
  97. curl_easy_setopt(curl, CURLOPT_FRESH_CONNECT, 1);
  98. curl_easy_setopt(curl, CURLOPT_CONNECTTIMEOUT, 5);
  99. curl_easy_setopt(curl, CURLOPT_NOSIGNAL, 1);
  100. curl_easy_setopt(curl, CURLOPT_TCP_NODELAY, 1);
  101. curl_easy_setopt(curl, CURLOPT_CONNECT_ONLY, 1);
  102. curl_easy_setopt(curl, CURLOPT_URL, &devpath[3]);
  103. if (curl_easy_perform(curl)) {
  104. curl_easy_cleanup(curl);
  105. applogr(false, LOG_ERR, "%s: curl_easy_perform failed for %s", cgpu->drv->dname, &devpath[3]);
  106. }
  107. cgpu->device_path = strdup(devpath);
  108. cgpu->device_fd = BITMAIN_USING_CURL;
  109. info->device_curl = curl;
  110. return true;
  111. }
  112. fd = serial_open(devpath, info->baud, 1, true);
  113. if(fd == -1) {
  114. applog(LOG_DEBUG, "%s open %s error %d",
  115. cgpu->drv->dname, devpath, errno);
  116. return false;
  117. }
  118. cgpu->device_path = strdup(devpath);
  119. cgpu->device_fd = fd;
  120. applog(LOG_DEBUG, "btm_init open device fd = %d", cgpu->device_fd);
  121. return true;
  122. }
  123. static
  124. void btm_uninit(struct cgpu_info *cgpu)
  125. {
  126. struct bitmain_info * const info = cgpu->device_data;
  127. applog(LOG_DEBUG, "BTM uninit %s%i", cgpu->drv->name, cgpu->device_fd);
  128. // May have happened already during a failed initialisation
  129. // if release_cgpu() was called due to a USB NODEV(err)
  130. if (cgpu->device_fd >= 0) {
  131. serial_close(cgpu->device_fd);
  132. cgpu->device_fd = -1;
  133. }
  134. if (info->device_curl) {
  135. curl_easy_cleanup(info->device_curl);
  136. info->device_curl = NULL;
  137. }
  138. if(cgpu->device_path) {
  139. free((char*)cgpu->device_path);
  140. cgpu->device_path = NULL;
  141. }
  142. }
  143. bool bitmain_curl_all(const bool is_recv, const int fd, CURL * const curl, void *p, size_t remsz)
  144. {
  145. CURLcode (* const func)(CURL *, void *, size_t, size_t *) = is_recv ? (void*)curl_easy_recv : (void*)curl_easy_send;
  146. CURLcode r;
  147. size_t sz;
  148. while (remsz) {
  149. fd_set otherfds, thisfds;
  150. FD_ZERO(&otherfds);
  151. FD_ZERO(&thisfds);
  152. FD_SET(fd, &thisfds);
  153. select(fd + 1, is_recv ? &thisfds : &otherfds, is_recv ? &otherfds : &thisfds, &thisfds, NULL);
  154. r = func(curl, p, remsz, &sz);
  155. switch (r) {
  156. case CURLE_OK:
  157. remsz -= sz;
  158. p += sz;
  159. break;
  160. case CURLE_AGAIN:
  161. break;
  162. default:
  163. return false;
  164. }
  165. }
  166. return true;
  167. }
  168. static
  169. int btm_read(struct cgpu_info * const cgpu, void * const buf, const size_t bufsize)
  170. {
  171. int err = 0;
  172. //applog(LOG_DEBUG, "btm_read ----- %d -----", bufsize);
  173. if (unlikely(cgpu->device_fd == BITMAIN_USING_CURL)) {
  174. struct bitmain_info * const info = cgpu->device_data;
  175. uint8_t headbuf[5];
  176. headbuf[0] = 0;
  177. pk_u32be(headbuf, 1, bufsize);
  178. if (!bitmain_curl_all(false, info->curl_sock, info->device_curl, headbuf, sizeof(headbuf)))
  179. return -1;
  180. if (!bitmain_curl_all( true, info->curl_sock, info->device_curl, headbuf, 4))
  181. return -1;
  182. if (headbuf[0] == 0xff && headbuf[1] == 0xff && headbuf[2] == 0xff && headbuf[3] == 0xff)
  183. return -1;
  184. size_t sz = upk_u32be(headbuf, 0);
  185. if (!bitmain_curl_all( true, info->curl_sock, info->device_curl, buf, sz))
  186. return -1;
  187. return sz;
  188. }
  189. err = read(cgpu->device_fd, buf, bufsize);
  190. return err;
  191. }
  192. static
  193. int btm_write(struct cgpu_info * const cgpu, void * const buf, const size_t bufsize)
  194. {
  195. int err = 0;
  196. //applog(LOG_DEBUG, "btm_write ----- %d -----", bufsize);
  197. if (unlikely(cgpu->device_fd == BITMAIN_USING_CURL)) {
  198. struct bitmain_info * const info = cgpu->device_data;
  199. uint8_t headbuf[5];
  200. headbuf[0] = 1;
  201. pk_u32be(headbuf, 1, bufsize);
  202. if (!bitmain_curl_all(false, info->curl_sock, info->device_curl, headbuf, sizeof(headbuf)))
  203. return -1;
  204. if (!bitmain_curl_all(false, info->curl_sock, info->device_curl, buf, bufsize))
  205. return -1;
  206. if (!bitmain_curl_all( true, info->curl_sock, info->device_curl, headbuf, 4))
  207. return -1;
  208. if (headbuf[0] == 0xff && headbuf[1] == 0xff && headbuf[2] == 0xff && headbuf[3] == 0xff)
  209. return -1;
  210. return upk_u32be(headbuf, 0);
  211. }
  212. err = write(cgpu->device_fd, buf, bufsize);
  213. return err;
  214. }
  215. #ifdef WIN32
  216. #define BITMAIN_TEST
  217. #endif
  218. #define BITMAIN_TEST_PRINT_WORK 0
  219. #ifdef BITMAIN_TEST
  220. #define BITMAIN_TEST_NUM 19
  221. #define BITMAIN_TEST_USENUM 1
  222. int g_test_index = 0;
  223. const char btm_work_test_data[BITMAIN_TEST_NUM][256] = {
  224. "00000002ddc1ce5579dbec17f17fbb8f31ae218a814b2a0c1900f0d90000000100000000b58aa6ca86546b07a5a46698f736c7ca9c0eedc756d8f28ac33c20cc24d792675276f879190afc85b6888022000000800000000000000000000000000000000000000000000000000000000000000000",
  225. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000eb2d45233c5b02de50ddcb9049ba16040e0ba00e9750a474eec75891571d925b52dfda4a190266667145b02f000000800000000000000000000000000000000000000000000000000000000000000000",
  226. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000090c7d3743e0b0562e4f56d3dd35cece3c5e8275d0abb21bf7e503cb72bd7ed3b52dfda4a190266667bbb58d7000000800000000000000000000000000000000000000000000000000000000000000000",
  227. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000006e0561da06022bfbb42c5ecd74a46bfd91934f201b777e9155cc6c3674724ec652dfda4a19026666a0cd827b000000800000000000000000000000000000000000000000000000000000000000000000",
  228. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000000312f42ce4964cc23f2d8c039f106f25ddd58e10a1faed21b3bba4b0e621807b52dfda4a1902666629c9497d000000800000000000000000000000000000000000000000000000000000000000000000",
  229. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000033093a6540dbe8f7f3d19e3d2af05585ac58dafad890fa9a942e977334a23d6e52dfda4a190266665ae95079000000800000000000000000000000000000000000000000000000000000000000000000",
  230. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000bd7893057d06e69705bddf9a89c7bac6b40c5b32f15e2295fc8c5edf491ea24952dfda4a190266664b89b4d3000000800000000000000000000000000000000000000000000000000000000000000000",
  231. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000075e66f533e53837d14236a793ee4e493985642bc39e016b9e63adf14a584a2aa52dfda4a19026666ab5d638d000000800000000000000000000000000000000000000000000000000000000000000000",
  232. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d936f90c5db5f0fe1d017344443854fbf9e40a07a9b7e74fedc8661c23162bff52dfda4a19026666338e79cb000000800000000000000000000000000000000000000000000000000000000000000000",
  233. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d2c1a7d279a4355b017bc0a4b0a9425707786729f21ee18add3fda4252a31a4152dfda4a190266669bc90806000000800000000000000000000000000000000000000000000000000000000000000000",
  234. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000ad36d19f33d04ca779942843890bc3b083cec83a4b60b6c45cf7d21fc187746552dfda4a1902666675d81ab7000000800000000000000000000000000000000000000000000000000000000000000000",
  235. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000093b809cf82b76082eacb55bc35b79f31882ed0976fd102ef54783cd24341319b52dfda4a1902666642ab4e42000000800000000000000000000000000000000000000000000000000000000000000000",
  236. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000007411ff315430a7bbf41de8a685d457e82d5177c05640d6a4436a40f39e99667852dfda4a190266662affa4b5000000800000000000000000000000000000000000000000000000000000000000000000",
  237. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000001ad0db5b9e1e2b57c8d3654c160f5a51067521eab7e340a270639d97f00a3fa252dfda4a1902666601a47bb6000000800000000000000000000000000000000000000000000000000000000000000000",
  238. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000022e055c442c46bbe16df68603a26891f6e4cf85b90102b39fd7cadb602b4e34552dfda4a1902666695d33cea000000800000000000000000000000000000000000000000000000000000000000000000",
  239. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000009c8baf5a8a1e16de2d6ae949d5fec3ed751f10dcd4c99810f2ce08040fb9e31d52dfda4a19026666fe78849d000000800000000000000000000000000000000000000000000000000000000000000000",
  240. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000e5655532b414887f35eb4652bc7b11ebac12891f65bc08cbe0ce5b277b9e795152dfda4a19026666fcc0d1d1000000800000000000000000000000000000000000000000000000000000000000000000",
  241. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000f272c5508704e2b62dd1c30ea970372c40bf00f9203f9bf69d456b4a7fbfffe352dfda4a19026666c03d4399000000800000000000000000000000000000000000000000000000000000000000000000",
  242. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000fca3b4531ba627ad9b0e23cdd84c888952c23810df196e9c6db0bcecba6a830952dfda4a19026666c14009cb000000800000000000000000000000000000000000000000000000000000000000000000"
  243. };
  244. const char btm_work_test_midstate[BITMAIN_TEST_NUM][256] = {
  245. "2d8738e7f5bcf76dcb8316fec772e20e240cd58c88d47f2d3f5a6a9547ed0a35",
  246. "d31b6ce09c0bfc2af6f3fe3a03475ebefa5aa191fa70a327a354b2c22f9692f1",
  247. "84a8c8224b80d36caeb42eff2a100f634e1ff873e83fd02ef1306a34abef9dbe",
  248. "059882159439b9b32968c79a93c5521e769dbea9d840f56c2a17b9ad87e530b8",
  249. "17fa435d05012574f8f1da26994cc87b6cb9660b5e82072dc6a0881cec150a0d",
  250. "92a28cc5ec4ba6a2688471dfe2032b5fe97c805ca286c503e447d6749796c6af",
  251. "1677a03516d6e9509ac37e273d2482da9af6e077abe8392cdca6a30e916a7ae9",
  252. "50bbe09f1b8ac18c97aeb745d5d2c3b5d669b6ac7803e646f65ac7b763a392d1",
  253. "e46a0022ebdc303a7fb1a0ebfa82b523946c312e745e5b8a116b17ae6b4ce981",
  254. "8f2f61e7f5b4d76d854e6d266acfff4d40347548216838ccc4ef3b9e43d3c9ea",
  255. "0a450588ae99f75d676a08d0326e1ea874a3497f696722c78a80c7b6ee961ea6",
  256. "3c4c0fc2cf040b806c51b46de9ec0dcc678a7cc5cf3eff11c6c03de3bc7818cc",
  257. "f6c7c785ab5daddb8f98e5f854f2cb41879fcaf47289eb2b4196fefc1b28316f",
  258. "005312351ccb0d0794779f5023e4335b5cad221accf0dfa3da7b881266fa9f5a",
  259. "7b26d189c6bba7add54143179aadbba7ccaeff6887bd8d5bec9597d5716126e6",
  260. "a4718f4c801e7ddf913a9474eb71774993525684ffea1915f767ab16e05e6889",
  261. "6b6226a8c18919d0e55684638d33a6892a00d22492cc2f5906ca7a4ac21c74a7",
  262. "383114dccd1cb824b869158aa2984d157fcb02f46234ceca65943e919329e697",
  263. "d4d478df3016852b27cb1ae9e1e98d98617f8d0943bf9dc1217f47f817236222"
  264. };
  265. #endif
  266. bool opt_bitmain_checkall = false;
  267. bool opt_bitmain_nobeeper = false;
  268. bool opt_bitmain_notempoverctrl = false;
  269. bool opt_bitmain_homemode = false;
  270. bool opt_bitmain_auto;
  271. // --------------------------------------------------------------
  272. // CRC16 check table
  273. // --------------------------------------------------------------
  274. static
  275. const uint8_t chCRCHTalbe[] = // CRC high byte table
  276. {
  277. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  278. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  279. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  280. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  281. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  282. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  283. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  284. 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  285. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  286. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  287. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  288. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  289. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  290. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  291. 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  292. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  293. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  294. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  295. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  296. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  297. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  298. 0x00, 0xC1, 0x81, 0x40
  299. };
  300. static
  301. const uint8_t chCRCLTalbe[] = // CRC low byte table
  302. {
  303. 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7,
  304. 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E,
  305. 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9,
  306. 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC,
  307. 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
  308. 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32,
  309. 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D,
  310. 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38,
  311. 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF,
  312. 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
  313. 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1,
  314. 0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4,
  315. 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB,
  316. 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA,
  317. 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
  318. 0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0,
  319. 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97,
  320. 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E,
  321. 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89,
  322. 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
  323. 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83,
  324. 0x41, 0x81, 0x80, 0x40
  325. };
  326. static uint16_t CRC16(const uint8_t* p_data, uint16_t w_len)
  327. {
  328. uint8_t chCRCHi = 0xFF; // CRC high byte initialize
  329. uint8_t chCRCLo = 0xFF; // CRC low byte initialize
  330. uint16_t wIndex = 0; // CRC cycling index
  331. while (w_len--) {
  332. wIndex = chCRCLo ^ *p_data++;
  333. chCRCLo = chCRCHi ^ chCRCHTalbe[wIndex];
  334. chCRCHi = chCRCLTalbe[wIndex];
  335. }
  336. return ((chCRCHi << 8) | chCRCLo);
  337. }
  338. static uint32_t num2bit(int num) {
  339. return 1L << (31 - num);
  340. }
  341. static int bitmain_set_txconfig(struct bitmain_txconfig_token *bm,
  342. uint8_t reset, uint8_t fan_eft, uint8_t timeout_eft, uint8_t frequency_eft,
  343. uint8_t voltage_eft, uint8_t chain_check_time_eft, uint8_t chip_config_eft, uint8_t hw_error_eft,
  344. uint8_t beeper_ctrl, uint8_t temp_over_ctrl,uint8_t fan_home_mode,
  345. uint8_t chain_num, uint8_t asic_num, uint8_t fan_pwm_data, uint8_t timeout_data,
  346. uint16_t frequency, uint8_t * voltage, uint8_t chain_check_time,
  347. uint8_t chip_address, uint8_t reg_address, uint8_t * reg_data)
  348. {
  349. uint16_t crc = 0;
  350. int datalen = 0;
  351. uint8_t version = 0;
  352. uint8_t * sendbuf = (uint8_t *)bm;
  353. if (unlikely(!bm)) {
  354. applog(LOG_WARNING, "bitmain_set_txconfig bitmain_txconfig_token is null");
  355. return -1;
  356. }
  357. if (unlikely(timeout_data <= 0 || asic_num <= 0 || chain_num <= 0)) {
  358. applog(LOG_WARNING, "bitmain_set_txconfig parameter invalid timeout_data(%d) asic_num(%d) chain_num(%d)",
  359. timeout_data, asic_num, chain_num);
  360. return -1;
  361. }
  362. datalen = sizeof(struct bitmain_txconfig_token);
  363. memset(bm, 0, datalen);
  364. bm->token_type = BITMAIN_TOKEN_TYPE_TXCONFIG;
  365. bm->version = version;
  366. bm->length = datalen-4;
  367. bm->length = htole16(bm->length);
  368. bm->reset = reset;
  369. bm->fan_eft = fan_eft;
  370. bm->timeout_eft = timeout_eft;
  371. bm->frequency_eft = frequency_eft;
  372. bm->voltage_eft = voltage_eft;
  373. bm->chain_check_time_eft = chain_check_time_eft;
  374. bm->chip_config_eft = chip_config_eft;
  375. bm->hw_error_eft = hw_error_eft;
  376. bm->beeper_ctrl = beeper_ctrl;
  377. bm->temp_over_ctrl = temp_over_ctrl;
  378. bm->fan_home_mode = fan_home_mode;
  379. sendbuf[4] = htole8(sendbuf[4]);
  380. sendbuf[5] = htole8(sendbuf[5]);
  381. bm->chain_num = chain_num;
  382. bm->asic_num = asic_num;
  383. bm->fan_pwm_data = fan_pwm_data;
  384. bm->timeout_data = timeout_data;
  385. bm->frequency = htole16(frequency);
  386. memcpy(bm->voltage, voltage, 2);
  387. bm->chain_check_time = chain_check_time;
  388. memcpy(bm->reg_data, reg_data, 4);
  389. bm->chip_address = chip_address;
  390. bm->reg_address = reg_address;
  391. crc = CRC16((uint8_t *)bm, datalen-2);
  392. bm->crc = htole16(crc);
  393. applog(LOG_ERR, "BTM TxConfigToken:v(%d) reset(%d) fan_e(%d) tout_e(%d) fq_e(%d) vt_e(%d) chainc_e(%d) chipc_e(%d) hw_e(%d) b_c(%d) t_c(%d) f_m(%d) mnum(%d) anum(%d) fanpwmdata(%d) toutdata(%d) freq(%d) volt(%02x%02x) chainctime(%d) regdata(%02x%02x%02x%02x) chipaddr(%02x) regaddr(%02x) crc(%04x)",
  394. version, reset, fan_eft, timeout_eft, frequency_eft, voltage_eft,
  395. chain_check_time_eft, chip_config_eft, hw_error_eft, beeper_ctrl, temp_over_ctrl,fan_home_mode,chain_num, asic_num,
  396. fan_pwm_data, timeout_data, frequency, voltage[0], voltage[1],
  397. chain_check_time, reg_data[0], reg_data[1], reg_data[2], reg_data[3], chip_address, reg_address, crc);
  398. return datalen;
  399. }
  400. static int bitmain_set_rxstatus(struct bitmain_rxstatus_token *bm,
  401. uint8_t chip_status_eft, uint8_t detect_get, uint8_t chip_address, uint8_t reg_address)
  402. {
  403. uint16_t crc = 0;
  404. uint8_t version = 0;
  405. int datalen = 0;
  406. uint8_t * sendbuf = (uint8_t *)bm;
  407. if (unlikely(!bm)) {
  408. applog(LOG_WARNING, "bitmain_set_rxstatus bitmain_rxstatus_token is null");
  409. return -1;
  410. }
  411. datalen = sizeof(struct bitmain_rxstatus_token);
  412. memset(bm, 0, datalen);
  413. bm->token_type = BITMAIN_TOKEN_TYPE_RXSTATUS;
  414. bm->version = version;
  415. bm->length = datalen-4;
  416. bm->length = htole16(bm->length);
  417. bm->chip_status_eft = chip_status_eft;
  418. bm->detect_get = detect_get;
  419. sendbuf[4] = htole8(sendbuf[4]);
  420. bm->chip_address = chip_address;
  421. bm->reg_address = reg_address;
  422. crc = CRC16((uint8_t *)bm, datalen-2);
  423. bm->crc = htole16(crc);
  424. applog(LOG_ERR, "BitMain RxStatus Token: v(%d) chip_status_eft(%d) detect_get(%d) chip_address(%02x) reg_address(%02x) crc(%04x)",
  425. version, chip_status_eft, detect_get, chip_address, reg_address, crc);
  426. return datalen;
  427. }
  428. static int bitmain_parse_rxstatus(const uint8_t * data, int datalen, struct bitmain_rxstatus_data *bm)
  429. {
  430. uint16_t crc = 0;
  431. uint8_t version = 0;
  432. int i = 0, j = 0;
  433. int asic_num = 0;
  434. int dataindex = 0;
  435. uint8_t tmp = 0x01;
  436. if (unlikely(!bm)) {
  437. applog(LOG_WARNING, "bitmain_parse_rxstatus bitmain_rxstatus_data is null");
  438. return -1;
  439. }
  440. if (unlikely(!data || datalen <= 0)) {
  441. applog(LOG_WARNING, "bitmain_parse_rxstatus parameter invalid data is null or datalen(%d) error", datalen);
  442. return -1;
  443. }
  444. memset(bm, 0, sizeof(struct bitmain_rxstatus_data));
  445. memcpy(bm, data, 28);
  446. if (bm->data_type != BITMAIN_DATA_TYPE_RXSTATUS) {
  447. applog(LOG_ERR, "bitmain_parse_rxstatus datatype(%02x) error", bm->data_type);
  448. return -1;
  449. }
  450. if (bm->version != version) {
  451. applog(LOG_ERR, "bitmain_parse_rxstatus version(%02x) error", bm->version);
  452. return -1;
  453. }
  454. bm->length = htole16(bm->length);
  455. if (bm->length+4 != datalen) {
  456. applog(LOG_ERR, "bitmain_parse_rxstatus length(%d) datalen(%d) error", bm->length, datalen);
  457. return -1;
  458. }
  459. crc = CRC16(data, datalen-2);
  460. memcpy(&(bm->crc), data+datalen-2, 2);
  461. bm->crc = htole16(bm->crc);
  462. if(crc != bm->crc) {
  463. applog(LOG_ERR, "bitmain_parse_rxstatus check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  464. return -1;
  465. }
  466. bm->fifo_space = htole16(bm->fifo_space);
  467. bm->fan_exist = htole16(bm->fan_exist);
  468. bm->temp_exist = htole32(bm->temp_exist);
  469. bm->nonce_error = htole32(bm->nonce_error);
  470. if(bm->chain_num > BITMAIN_MAX_CHAIN_NUM) {
  471. applog(LOG_ERR, "bitmain_parse_rxstatus chain_num=%d error", bm->chain_num);
  472. return -1;
  473. }
  474. dataindex = 28;
  475. if(bm->chain_num > 0) {
  476. memcpy(bm->chain_asic_num, data+datalen-2-bm->chain_num-bm->temp_num-bm->fan_num, bm->chain_num);
  477. }
  478. for(i = 0; i < bm->chain_num; i++) {
  479. asic_num = bm->chain_asic_num[i];
  480. if(asic_num <= 0) {
  481. asic_num = 1;
  482. } else {
  483. if(asic_num % 32 == 0) {
  484. asic_num = asic_num / 32;
  485. } else {
  486. asic_num = asic_num / 32 + 1;
  487. }
  488. }
  489. memcpy((uint8_t *)bm->chain_asic_exist+i*32, data+dataindex, asic_num*4);
  490. dataindex += asic_num*4;
  491. }
  492. for(i = 0; i < bm->chain_num; i++) {
  493. asic_num = bm->chain_asic_num[i];
  494. if(asic_num <= 0) {
  495. asic_num = 1;
  496. } else {
  497. if(asic_num % 32 == 0) {
  498. asic_num = asic_num / 32;
  499. } else {
  500. asic_num = asic_num / 32 + 1;
  501. }
  502. }
  503. memcpy((uint8_t *)bm->chain_asic_status+i*32, data+dataindex, asic_num*4);
  504. dataindex += asic_num*4;
  505. }
  506. dataindex += bm->chain_num;
  507. if(dataindex + bm->temp_num + bm->fan_num + 2 != datalen) {
  508. applog(LOG_ERR, "bitmain_parse_rxstatus dataindex(%d) chain_num(%d) temp_num(%d) fan_num(%d) not match datalen(%d)",
  509. dataindex, bm->chain_num, bm->temp_num, bm->fan_num, datalen);
  510. return -1;
  511. }
  512. for(i = 0; i < bm->chain_num; i++) {
  513. //bm->chain_asic_status[i] = swab32(bm->chain_asic_status[i]);
  514. for(j = 0; j < 8; j++) {
  515. bm->chain_asic_exist[i*8+j] = htole32(bm->chain_asic_exist[i*8+j]);
  516. bm->chain_asic_status[i*8+j] = htole32(bm->chain_asic_status[i*8+j]);
  517. }
  518. }
  519. if(bm->temp_num > 0) {
  520. memcpy(bm->temp, data+dataindex, bm->temp_num);
  521. dataindex += bm->temp_num;
  522. }
  523. if(bm->fan_num > 0) {
  524. memcpy(bm->fan, data+dataindex, bm->fan_num);
  525. dataindex += bm->fan_num;
  526. }
  527. if(!opt_bitmain_checkall){
  528. if(tmp != htole8(tmp)){
  529. applog(LOG_ERR, "BitMain RxStatus byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  530. memcpy(&tmp,data+4,1);
  531. bm->chip_value_eft = tmp >>7;
  532. bm->get_blk_num = tmp >> 4;
  533. bm->reserved1 = ((tmp << 4) & 0xff) >> 5;
  534. }
  535. found_blocks = bm->get_blk_num;
  536. applog(LOG_ERR, "BitMain RxStatus tmp :0x%02x byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",tmp,*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  537. }
  538. applog(LOG_DEBUG, "BitMain RxStatusData: chipv_e(%d) chainnum(%d) fifos(%d) v1(%d) v2(%d) v3(%d) v4(%d) fann(%d) tempn(%d) fanet(%04x) tempet(%08x) ne(%d) regvalue(%d) crc(%04x)",
  539. bm->chip_value_eft, bm->chain_num, bm->fifo_space, bm->hw_version[0], bm->hw_version[1], bm->hw_version[2], bm->hw_version[3], bm->fan_num, bm->temp_num, bm->fan_exist, bm->temp_exist, bm->nonce_error, bm->reg_value, bm->crc);
  540. applog(LOG_DEBUG, "BitMain RxStatus Data chain info:");
  541. for(i = 0; i < bm->chain_num; i++) {
  542. applog(LOG_DEBUG, "BitMain RxStatus Data chain(%d) asic num=%d asic_exist=%08x asic_status=%08x", i+1, bm->chain_asic_num[i], bm->chain_asic_exist[i*8], bm->chain_asic_status[i*8]);
  543. }
  544. applog(LOG_DEBUG, "BitMain RxStatus Data temp info:");
  545. for(i = 0; i < bm->temp_num; i++) {
  546. applog(LOG_DEBUG, "BitMain RxStatus Data temp(%d) temp=%d", i+1, bm->temp[i]);
  547. }
  548. applog(LOG_DEBUG, "BitMain RxStatus Data fan info:");
  549. for(i = 0; i < bm->fan_num; i++) {
  550. applog(LOG_DEBUG, "BitMain RxStatus Data fan(%d) fan=%d", i+1, bm->fan[i]);
  551. }
  552. return 0;
  553. }
  554. static int bitmain_parse_rxnonce(const uint8_t * data, int datalen, struct bitmain_rxnonce_data *bm, int * nonce_num)
  555. {
  556. int i = 0;
  557. uint16_t crc = 0;
  558. uint8_t version = 0;
  559. int curnoncenum = 0;
  560. if (unlikely(!bm)) {
  561. applog(LOG_ERR, "bitmain_parse_rxnonce bitmain_rxstatus_data null");
  562. return -1;
  563. }
  564. if (unlikely(!data || datalen <= 0)) {
  565. applog(LOG_ERR, "bitmain_parse_rxnonce data null or datalen(%d) error", datalen);
  566. return -1;
  567. }
  568. memcpy(bm, data, sizeof(struct bitmain_rxnonce_data));
  569. if (bm->data_type != BITMAIN_DATA_TYPE_RXNONCE) {
  570. applog(LOG_ERR, "bitmain_parse_rxnonce datatype(%02x) error", bm->data_type);
  571. return -1;
  572. }
  573. if (bm->version != version) {
  574. applog(LOG_ERR, "bitmain_parse_rxnonce version(%02x) error", bm->version);
  575. return -1;
  576. }
  577. bm->length = htole16(bm->length);
  578. if (bm->length+4 != datalen) {
  579. applog(LOG_ERR, "bitmain_parse_rxnonce length(%d) error", bm->length);
  580. return -1;
  581. }
  582. crc = CRC16(data, datalen-2);
  583. memcpy(&(bm->crc), data+datalen-2, 2);
  584. bm->crc = htole16(bm->crc);
  585. if(crc != bm->crc) {
  586. applog(LOG_ERR, "bitmain_parse_rxnonce check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  587. return -1;
  588. }
  589. bm->fifo_space = htole16(bm->fifo_space);
  590. bm->diff = htole16(bm->diff);
  591. bm->total_nonce_num = htole64(bm->total_nonce_num);
  592. curnoncenum = (datalen-14)/8;
  593. applog(LOG_DEBUG, "BitMain RxNonce Data: nonce_num(%d) fifo_space(%d) diff(%d) tnn(%"PRIu64")", curnoncenum, bm->fifo_space, bm->diff, bm->total_nonce_num);
  594. for(i = 0; i < curnoncenum; i++) {
  595. bm->nonces[i].work_id = htole32(bm->nonces[i].work_id);
  596. bm->nonces[i].nonce = htole32(bm->nonces[i].nonce);
  597. applog(LOG_DEBUG, "BitMain RxNonce Data %d: work_id(%d) nonce(%08x)(%d)",
  598. i, bm->nonces[i].work_id, bm->nonces[i].nonce, bm->nonces[i].nonce);
  599. }
  600. *nonce_num = curnoncenum;
  601. return 0;
  602. }
  603. static int bitmain_read(struct cgpu_info *bitmain, unsigned char *buf,
  604. size_t bufsize, int timeout)
  605. {
  606. int err = 0;
  607. size_t total = 0;
  608. if(bitmain == NULL || buf == NULL || bufsize <= 0) {
  609. applog(LOG_WARNING, "bitmain_read parameter error bufsize(%llu)", (unsigned long long)bufsize);
  610. return -1;
  611. }
  612. {
  613. err = btm_read(bitmain, buf, bufsize);
  614. total = err;
  615. }
  616. return total;
  617. }
  618. static int bitmain_write(struct cgpu_info *bitmain, char *buf, ssize_t len)
  619. {
  620. int err;
  621. {
  622. int havelen = 0;
  623. while(havelen < len) {
  624. err = btm_write(bitmain, buf+havelen, len-havelen);
  625. if(err < 0) {
  626. applog(LOG_DEBUG, "%s%i: btm_write got err %d", bitmain->drv->name,
  627. bitmain->device_id, err);
  628. applog(LOG_WARNING, "usb_write error on bitmain_write");
  629. return BTM_SEND_ERROR;
  630. } else {
  631. havelen += err;
  632. }
  633. }
  634. }
  635. return BTM_SEND_OK;
  636. }
  637. static int bitmain_send_data(const uint8_t * data, int datalen, struct cgpu_info *bitmain)
  638. {
  639. int ret;
  640. if(datalen <= 0) {
  641. return 0;
  642. }
  643. //struct bitmain_info *info = bitmain->device_data;
  644. //int delay;
  645. //delay = datalen * 10 * 1000000;
  646. //delay = delay / info->baud;
  647. //delay += 4000;
  648. if(opt_debug) {
  649. char hex[(datalen * 2) + 1];
  650. bin2hex(hex, data, datalen);
  651. applog(LOG_DEBUG, "BitMain: Sent(%d): %s", datalen, hex);
  652. }
  653. //cgtimer_t ts_start;
  654. //cgsleep_prepare_r(&ts_start);
  655. //applog(LOG_DEBUG, "----bitmain_send_data start");
  656. ret = bitmain_write(bitmain, (char *)data, datalen);
  657. applog(LOG_DEBUG, "----bitmain_send_data stop ret=%d datalen=%d", ret, datalen);
  658. //cgsleep_us_r(&ts_start, delay);
  659. //applog(LOG_DEBUG, "BitMain: Sent: Buffer delay: %dus", delay);
  660. return ret;
  661. }
  662. static void bitmain_inc_nvw(struct bitmain_info *info, struct thr_info *thr)
  663. {
  664. applog(LOG_INFO, "%s%d: No matching work - HW error",
  665. thr->cgpu->drv->name, thr->cgpu->device_id);
  666. inc_hw_errors_only(thr);
  667. info->no_matching_work++;
  668. }
  669. static inline void record_temp_fan(struct bitmain_info *info, struct bitmain_rxstatus_data *bm, float *temp)
  670. {
  671. int i = 0;
  672. int maxfan = 0, maxtemp = 0;
  673. int temp_avg = 0;
  674. info->fan_num = bm->fan_num;
  675. for(i = 0; i < bm->fan_num; i++) {
  676. info->fan[i] = bm->fan[i] * BITMAIN_FAN_FACTOR;
  677. if(info->fan[i] > maxfan)
  678. maxfan = info->fan[i];
  679. }
  680. info->temp_num = bm->temp_num;
  681. for(i = 0; i < bm->temp_num; i++) {
  682. info->temp[i] = bm->temp[i];
  683. /*
  684. if(bm->temp[i] & 0x80) {
  685. bm->temp[i] &= 0x7f;
  686. info->temp[i] = 0 - ((~bm->temp[i] & 0x7f) + 1);
  687. }*/
  688. temp_avg += info->temp[i];
  689. if(info->temp[i] > info->temp_max) {
  690. info->temp_max = info->temp[i];
  691. }
  692. if(info->temp[i] > maxtemp)
  693. maxtemp = info->temp[i];
  694. }
  695. if(bm->temp_num > 0) {
  696. temp_avg /= bm->temp_num;
  697. info->temp_avg = temp_avg;
  698. }
  699. *temp = maxtemp;
  700. }
  701. static void bitmain_update_temps(struct cgpu_info *bitmain, struct bitmain_info *info,
  702. struct bitmain_rxstatus_data *bm)
  703. {
  704. char tmp[64] = {0};
  705. char msg[10240] = {0};
  706. int i = 0;
  707. record_temp_fan(info, bm, &(bitmain->temp));
  708. strcpy(msg, "BitMain: ");
  709. for(i = 0; i < bm->fan_num; i++) {
  710. if(i != 0) {
  711. strcat(msg, ", ");
  712. }
  713. sprintf(tmp, "Fan%d: %d/m", i+1, info->fan[i]);
  714. strcat(msg, tmp);
  715. }
  716. strcat(msg, "\t");
  717. for(i = 0; i < bm->temp_num; i++) {
  718. if(i != 0) {
  719. strcat(msg, ", ");
  720. }
  721. sprintf(tmp, "Temp%d: %dC", i+1, info->temp[i]);
  722. strcat(msg, tmp);
  723. }
  724. sprintf(tmp, ", TempMAX: %dC", info->temp_max);
  725. strcat(msg, tmp);
  726. applog(LOG_INFO, "%s", msg);
  727. info->temp_history_index++;
  728. info->temp_sum += bitmain->temp;
  729. applog(LOG_DEBUG, "BitMain: temp_index: %d, temp_count: %d, temp_old: %d",
  730. info->temp_history_index, info->temp_history_count, info->temp_old);
  731. if (info->temp_history_index == info->temp_history_count) {
  732. info->temp_history_index = 0;
  733. info->temp_sum = 0;
  734. }
  735. }
  736. static void bitmain_set_fifo_space(struct cgpu_info * const dev, const int fifo_space)
  737. {
  738. struct thr_info * const master_thr = dev->thr[0];
  739. struct bitmain_info * const info = dev->device_data;
  740. if (unlikely(fifo_space > info->max_fifo_space))
  741. info->max_fifo_space = fifo_space;
  742. info->fifo_space = fifo_space;
  743. master_thr->queue_full = !fifo_space;
  744. }
  745. static void bitmain_parse_results(struct cgpu_info *bitmain, struct bitmain_info *info,
  746. struct thr_info *thr, uint8_t *buf, int *offset)
  747. {
  748. int i, j, n, m, r, errordiff, spare = BITMAIN_READ_SIZE;
  749. uint32_t checkbit = 0x00000000;
  750. bool found = false;
  751. struct work *work = NULL;
  752. struct bitmain_packet_head packethead;
  753. int asicnum = 0;
  754. int mod = 0,tmp = 0;
  755. for (i = 0; i <= spare; i++) {
  756. if(buf[i] == 0xa1) {
  757. struct bitmain_rxstatus_data rxstatusdata;
  758. applog(LOG_DEBUG, "bitmain_parse_results RxStatus Data");
  759. if(*offset < 4) {
  760. return;
  761. }
  762. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  763. packethead.length = htole16(packethead.length);
  764. if(packethead.length > 1130) {
  765. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus datalen=%d error", packethead.length+4);
  766. continue;
  767. }
  768. if(*offset < packethead.length + 4) {
  769. return;
  770. }
  771. if(bitmain_parse_rxstatus(buf+i, packethead.length+4, &rxstatusdata) != 0) {
  772. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus error len=%d", packethead.length+4);
  773. } else {
  774. mutex_lock(&info->qlock);
  775. info->chain_num = rxstatusdata.chain_num;
  776. bitmain_set_fifo_space(bitmain, rxstatusdata.fifo_space);
  777. info->hw_version[0] = rxstatusdata.hw_version[0];
  778. info->hw_version[1] = rxstatusdata.hw_version[1];
  779. info->hw_version[2] = rxstatusdata.hw_version[2];
  780. info->hw_version[3] = rxstatusdata.hw_version[3];
  781. info->nonce_error = rxstatusdata.nonce_error;
  782. errordiff = info->nonce_error-info->last_nonce_error;
  783. //sprintf(g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  784. applog(LOG_ERR, "bitmain_parse_results v=%d chain=%d fifo=%d hwv1=%d hwv2=%d hwv3=%d hwv4=%d nerr=%d-%d freq=%d chain info:",
  785. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  786. info->last_nonce_error, info->nonce_error, info->frequency);
  787. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  788. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  789. for(n = 0; n < rxstatusdata.chain_num; n++) {
  790. info->chain_asic_num[n] = rxstatusdata.chain_asic_num[n];
  791. memset(info->chain_asic_status_t[n], 0, 320);
  792. j = 0;
  793. mod = 0;
  794. if(info->chain_asic_num[n] <= 0) {
  795. asicnum = 0;
  796. } else {
  797. mod = info->chain_asic_num[n] % 32;
  798. if(mod == 0) {
  799. asicnum = info->chain_asic_num[n] / 32;
  800. } else {
  801. asicnum = info->chain_asic_num[n] / 32 + 1;
  802. }
  803. }
  804. if(asicnum > 0) {
  805. for(m = asicnum-1; m >= 0; m--) {
  806. tmp = mod ? (32-mod): 0;
  807. for(r = tmp;r < 32;r++){
  808. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  809. info->chain_asic_status_t[n][j] = ' ';
  810. j++;
  811. }
  812. checkbit = num2bit(r);
  813. if(rxstatusdata.chain_asic_exist[n*8+m] & checkbit) {
  814. if(rxstatusdata.chain_asic_status[n*8+m] & checkbit) {
  815. info->chain_asic_status_t[n][j] = 'o';
  816. } else {
  817. info->chain_asic_status_t[n][j] = 'x';
  818. }
  819. } else {
  820. info->chain_asic_status_t[n][j] = '-';
  821. }
  822. j++;
  823. }
  824. info->chain_asic_status_t[n][j] = ' ';
  825. j++;
  826. mod = 0;
  827. }
  828. }
  829. applog(LOG_DEBUG, "bitmain_parse_results chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  830. n, info->chain_asic_num[n],
  831. info->chain_asic_exist[n*8+0], info->chain_asic_exist[n*8+1], info->chain_asic_exist[n*8+2], info->chain_asic_exist[n*8+3], info->chain_asic_exist[n*8+4], info->chain_asic_exist[n*8+5], info->chain_asic_exist[n*8+6], info->chain_asic_exist[n*8+7],
  832. info->chain_asic_status[n*8+0], info->chain_asic_status[n*8+1], info->chain_asic_status[n*8+2], info->chain_asic_status[n*8+3], info->chain_asic_status[n*8+4], info->chain_asic_status[n*8+5], info->chain_asic_status[n*8+6], info->chain_asic_status[n*8+7]);
  833. applog(LOG_ERR, "bitmain_parse_results chain(%d) asic_num=%d asic_status=%s", n, info->chain_asic_num[n], info->chain_asic_status_t[n]);
  834. }
  835. mutex_unlock(&info->qlock);
  836. if(errordiff > 0) {
  837. for(j = 0; j < errordiff; j++) {
  838. bitmain_inc_nvw(info, thr);
  839. }
  840. mutex_lock(&info->qlock);
  841. info->last_nonce_error += errordiff;
  842. mutex_unlock(&info->qlock);
  843. }
  844. bitmain_update_temps(bitmain, info, &rxstatusdata);
  845. }
  846. found = true;
  847. spare = packethead.length + 4 + i;
  848. if(spare > *offset) {
  849. applog(LOG_ERR, "bitmain_parse_rxresults space(%d) > offset(%d)", spare, *offset);
  850. spare = *offset;
  851. }
  852. break;
  853. } else if(buf[i] == 0xa2) {
  854. struct bitmain_rxnonce_data rxnoncedata;
  855. int nonce_num = 0;
  856. applog(LOG_DEBUG, "bitmain_parse_results RxNonce Data");
  857. if(*offset < 4) {
  858. return;
  859. }
  860. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  861. packethead.length = htole16(packethead.length);
  862. if(packethead.length > 1038) {
  863. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce datalen=%d error", packethead.length+4);
  864. continue;
  865. }
  866. if(*offset < packethead.length + 4) {
  867. return;
  868. }
  869. if(bitmain_parse_rxnonce(buf+i, packethead.length+4, &rxnoncedata, &nonce_num) != 0) {
  870. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce error len=%d", packethead.length+4);
  871. } else {
  872. const float nonce_diff = 1 << rxnoncedata.diff;
  873. for(j = 0; j < nonce_num; j++) {
  874. const work_device_id_t work_id = rxnoncedata.nonces[j].work_id;
  875. HASH_FIND(hh, thr->work_list, &work_id, sizeof(work_id), work);
  876. if(work) {
  877. if(BITMAIN_TEST_PRINT_WORK) {
  878. applog(LOG_ERR, "bitmain_parse_results nonce find work(%d-%d)(%08x)", work->id, rxnoncedata.nonces[j].work_id, rxnoncedata.nonces[j].nonce);
  879. char ob_hex[(32 * 2) + 1];
  880. bin2hex(ob_hex, work->midstate, 32);
  881. applog(LOG_ERR, "work %d midstate: %s", work->id, ob_hex);
  882. bin2hex(ob_hex, &work->data[64], 12);
  883. applog(LOG_ERR, "work %d data2: %s", work->id, ob_hex);
  884. }
  885. {
  886. const uint32_t nonce = rxnoncedata.nonces[j].nonce;
  887. applog(LOG_DEBUG, "BitMain: submit nonce = %08lx", (unsigned long)nonce);
  888. work->nonce_diff = nonce_diff;
  889. if (submit_nonce(thr, work, nonce)) {
  890. mutex_lock(&info->qlock);
  891. hashes_done2(thr, 0x100000000 * work->nonce_diff, NULL);
  892. mutex_unlock(&info->qlock);
  893. } else {
  894. applog(LOG_ERR, "BitMain: bitmain_decode_nonce error work(%d)", rxnoncedata.nonces[j].work_id);
  895. }
  896. }
  897. } else {
  898. bitmain_inc_nvw(info, thr);
  899. applog(LOG_ERR, "BitMain: Nonce not find work(%d)", rxnoncedata.nonces[j].work_id);
  900. }
  901. }
  902. mutex_lock(&info->qlock);
  903. bitmain_set_fifo_space(bitmain, rxnoncedata.fifo_space);
  904. mutex_unlock(&info->qlock);
  905. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  906. #ifndef WIN32
  907. if(nonce_num < BITMAIN_MAX_NONCE_NUM)
  908. cgsleep_ms(5);
  909. #endif
  910. }
  911. found = true;
  912. spare = packethead.length + 4 + i;
  913. if(spare > *offset) {
  914. applog(LOG_ERR, "bitmain_parse_rxnonce space(%d) > offset(%d)", spare, *offset);
  915. spare = *offset;
  916. }
  917. break;
  918. } else {
  919. applog(LOG_ERR, "bitmain_parse_results data type error=%02x", buf[i]);
  920. }
  921. }
  922. if (!found) {
  923. spare = *offset - BITMAIN_READ_SIZE;
  924. /* We are buffering and haven't accumulated one more corrupt
  925. * work result. */
  926. if (spare < (int)BITMAIN_READ_SIZE)
  927. return;
  928. bitmain_inc_nvw(info, thr);
  929. }
  930. *offset -= spare;
  931. memmove(buf, buf + spare, *offset);
  932. }
  933. static void bitmain_running_reset(struct cgpu_info *bitmain, struct bitmain_info *info)
  934. {
  935. info->reset = false;
  936. }
  937. static void bitmain_prune_old_work(struct cgpu_info * const dev)
  938. {
  939. struct thr_info * const master_thr = dev->thr[0];
  940. struct bitmain_info * const info = dev->device_data;
  941. const size_t retain_work_items = info->max_fifo_space * 2;
  942. const size_t queued_work_items = HASH_COUNT(master_thr->work_list);
  943. if (queued_work_items > retain_work_items) {
  944. size_t remove_work_items = queued_work_items - retain_work_items;
  945. while (remove_work_items--) {
  946. // Deletes the first item insertion-order
  947. struct work * const work = master_thr->work_list;
  948. HASH_DEL(master_thr->work_list, work);
  949. free_work(work);
  950. }
  951. }
  952. }
  953. static void bitmain_poll(struct thr_info * const thr)
  954. {
  955. struct cgpu_info *bitmain = thr->cgpu;
  956. struct bitmain_info *info = bitmain->device_data;
  957. int offset = info->readbuf_offset, ret = 0;
  958. const int rsize = BITMAIN_FTDI_READSIZE;
  959. uint8_t * const readbuf = info->readbuf;
  960. {
  961. unsigned char buf[rsize];
  962. if (unlikely(info->reset)) {
  963. bitmain_running_reset(bitmain, info);
  964. /* Discard anything in the buffer */
  965. offset = 0;
  966. }
  967. //cgsleep_prepare_r(&ts_start);
  968. //applog(LOG_DEBUG, "======start bitmain_get_results bitmain_read");
  969. ret = bitmain_read(bitmain, buf, rsize, BITMAIN_READ_TIMEOUT);
  970. //applog(LOG_DEBUG, "======stop bitmain_get_results bitmain_read=%d", ret);
  971. if ((ret < 1) || (ret == 18)) {
  972. ++info->errorcount2;
  973. #ifdef WIN32
  974. if(info->errorcount2 > 200) {
  975. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  976. cgsleep_ms(20);
  977. info->errorcount2 = 0;
  978. }
  979. #else
  980. if(info->errorcount2 > 3) {
  981. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  982. cgsleep_ms(20);
  983. info->errorcount2 = 0;
  984. }
  985. #endif
  986. if(ret < 1)
  987. return;
  988. }
  989. if (opt_debug) {
  990. char hex[(ret * 2) + 1];
  991. bin2hex(hex, buf, ret);
  992. applog(LOG_DEBUG, "BitMain: get: %s", hex);
  993. }
  994. memcpy(readbuf+offset, buf, ret);
  995. offset += ret;
  996. //applog(LOG_DEBUG, "+++++++bitmain_get_results offset=%d", offset);
  997. if (offset >= (int)BITMAIN_READ_SIZE) {
  998. //applog(LOG_DEBUG, "======start bitmain_get_results ");
  999. bitmain_parse_results(bitmain, info, thr, readbuf, &offset);
  1000. //applog(LOG_DEBUG, "======stop bitmain_get_results ");
  1001. }
  1002. if (unlikely(offset + rsize >= BITMAIN_READBUF_SIZE)) {
  1003. /* This should never happen */
  1004. applog(LOG_DEBUG, "BitMain readbuf overflow, resetting buffer");
  1005. offset = 0;
  1006. }
  1007. /* As the usb read returns after just 1ms, sleep long enough
  1008. * to leave the interface idle for writes to occur, but do not
  1009. * sleep if we have been receiving data as more may be coming. */
  1010. //if (offset == 0) {
  1011. // cgsleep_ms_r(&ts_start, BITMAIN_READ_TIMEOUT);
  1012. //}
  1013. }
  1014. info->readbuf_offset = offset;
  1015. bitmain_prune_old_work(bitmain);
  1016. }
  1017. static void bitmain_init(struct cgpu_info *bitmain)
  1018. {
  1019. applog(LOG_INFO, "BitMain: Opened on %s", bitmain->device_path);
  1020. }
  1021. static bool bitmain_prepare(struct thr_info *thr)
  1022. {
  1023. struct cgpu_info *bitmain = thr->cgpu;
  1024. struct bitmain_info *info = bitmain->device_data;
  1025. mutex_init(&info->qlock);
  1026. // To initialise queue_full
  1027. bitmain_set_fifo_space(bitmain, info->fifo_space);
  1028. bitmain_init(bitmain);
  1029. timer_set_now(&thr->tv_poll);
  1030. return true;
  1031. }
  1032. static int bitmain_initialize(struct cgpu_info *bitmain)
  1033. {
  1034. uint8_t data[BITMAIN_READBUF_SIZE];
  1035. struct bitmain_info *info = NULL;
  1036. int ret = 0;
  1037. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1038. int readlen = 0;
  1039. int sendlen = 0;
  1040. int trycount = 3;
  1041. struct timespec p;
  1042. struct bitmain_rxstatus_data rxstatusdata;
  1043. int i = 0, j = 0, m = 0, r = 0, statusok = 0;
  1044. uint32_t checkbit = 0x00000000;
  1045. int hwerror_eft = 0;
  1046. int beeper_ctrl = 1;
  1047. int tempover_ctrl = 1;
  1048. int home_mode = 0;
  1049. struct bitmain_packet_head packethead;
  1050. int asicnum = 0;
  1051. int mod = 0,tmp = 0;
  1052. /* Send reset, then check for result */
  1053. if(!bitmain) {
  1054. applog(LOG_WARNING, "bitmain_initialize cgpu_info is null");
  1055. return -1;
  1056. }
  1057. info = bitmain->device_data;
  1058. /* clear read buf */
  1059. ret = bitmain_read(bitmain, data, BITMAIN_READBUF_SIZE,
  1060. BITMAIN_RESET_TIMEOUT);
  1061. if(ret > 0) {
  1062. if (opt_debug) {
  1063. char hex[(ret * 2) + 1];
  1064. bin2hex(hex, data, ret);
  1065. applog(LOG_DEBUG, "BTM%d Clear Read(%d): %s", bitmain->device_id, ret, hex);
  1066. }
  1067. }
  1068. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *)sendbuf, 0, 1, 0, 0);
  1069. if(sendlen <= 0) {
  1070. applog(LOG_ERR, "bitmain_initialize bitmain_set_rxstatus error(%d)", sendlen);
  1071. return -1;
  1072. }
  1073. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1074. if (unlikely(ret == BTM_SEND_ERROR)) {
  1075. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1076. return -1;
  1077. }
  1078. while(trycount >= 0) {
  1079. ret = bitmain_read(bitmain, data+readlen, BITMAIN_READBUF_SIZE, BITMAIN_RESET_TIMEOUT);
  1080. if(ret > 0) {
  1081. readlen += ret;
  1082. if(readlen > BITMAIN_READ_SIZE) {
  1083. for(i = 0; i < readlen; i++) {
  1084. if(data[i] == 0xa1) {
  1085. if (opt_debug) {
  1086. char hex[(readlen * 2) + 1];
  1087. bin2hex(hex, data, readlen);
  1088. applog(LOG_DEBUG, "%s%d initset: get: %s", bitmain->drv->name, bitmain->device_id, hex);
  1089. }
  1090. memcpy(&packethead, data+i, sizeof(struct bitmain_packet_head));
  1091. packethead.length = htole16(packethead.length);
  1092. if(packethead.length > 1130) {
  1093. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d error", packethead.length+4);
  1094. continue;
  1095. }
  1096. if(readlen-i < packethead.length+4) {
  1097. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d<%d low", readlen-i, packethead.length+4);
  1098. continue;
  1099. }
  1100. if (bitmain_parse_rxstatus(data+i, packethead.length+4, &rxstatusdata) != 0) {
  1101. applog(LOG_ERR, "bitmain_initialize bitmain_parse_rxstatus error");
  1102. continue;
  1103. }
  1104. info->chain_num = rxstatusdata.chain_num;
  1105. // NOTE: This is before thr_info is allocated, so we cannot use bitmain_set_fifo_space (bitmain_prepare will re-set it for us)
  1106. info->fifo_space = rxstatusdata.fifo_space;
  1107. info->hw_version[0] = rxstatusdata.hw_version[0];
  1108. info->hw_version[1] = rxstatusdata.hw_version[1];
  1109. info->hw_version[2] = rxstatusdata.hw_version[2];
  1110. info->hw_version[3] = rxstatusdata.hw_version[3];
  1111. info->nonce_error = 0;
  1112. info->last_nonce_error = 0;
  1113. sprintf(info->g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  1114. applog(LOG_ERR, "bitmain_initialize rxstatus v(%d) chain(%d) fifo(%d) hwv1(%d) hwv2(%d) hwv3(%d) hwv4(%d) nerr(%d) freq=%d",
  1115. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  1116. rxstatusdata.nonce_error, info->frequency);
  1117. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  1118. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  1119. for(i = 0; i < rxstatusdata.chain_num; i++) {
  1120. info->chain_asic_num[i] = rxstatusdata.chain_asic_num[i];
  1121. memset(info->chain_asic_status_t[i], 0, 320);
  1122. j = 0;
  1123. mod = 0;
  1124. if(info->chain_asic_num[i] <= 0) {
  1125. asicnum = 0;
  1126. } else {
  1127. mod = info->chain_asic_num[i] % 32;
  1128. if(mod == 0) {
  1129. asicnum = info->chain_asic_num[i] / 32;
  1130. } else {
  1131. asicnum = info->chain_asic_num[i] / 32 + 1;
  1132. }
  1133. }
  1134. if(asicnum > 0) {
  1135. for(m = asicnum-1; m >= 0; m--) {
  1136. tmp = mod ? (32-mod):0;
  1137. for(r = tmp;r < 32;r++){
  1138. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  1139. info->chain_asic_status_t[i][j] = ' ';
  1140. j++;
  1141. }
  1142. checkbit = num2bit(r);
  1143. if(rxstatusdata.chain_asic_exist[i*8+m] & checkbit) {
  1144. if(rxstatusdata.chain_asic_status[i*8+m] & checkbit) {
  1145. info->chain_asic_status_t[i][j] = 'o';
  1146. } else {
  1147. info->chain_asic_status_t[i][j] = 'x';
  1148. }
  1149. } else {
  1150. info->chain_asic_status_t[i][j] = '-';
  1151. }
  1152. j++;
  1153. }
  1154. info->chain_asic_status_t[i][j] = ' ';
  1155. j++;
  1156. mod = 0;
  1157. }
  1158. }
  1159. applog(LOG_DEBUG, "bitmain_initialize chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  1160. i, info->chain_asic_num[i],
  1161. info->chain_asic_exist[i*8+0], info->chain_asic_exist[i*8+1], info->chain_asic_exist[i*8+2], info->chain_asic_exist[i*8+3], info->chain_asic_exist[i*8+4], info->chain_asic_exist[i*8+5], info->chain_asic_exist[i*8+6], info->chain_asic_exist[i*8+7],
  1162. info->chain_asic_status[i*8+0], info->chain_asic_status[i*8+1], info->chain_asic_status[i*8+2], info->chain_asic_status[i*8+3], info->chain_asic_status[i*8+4], info->chain_asic_status[i*8+5], info->chain_asic_status[i*8+6], info->chain_asic_status[i*8+7]);
  1163. applog(LOG_ERR, "bitmain_initialize chain(%d) asic_num=%d asic_status=%s", i, info->chain_asic_num[i], info->chain_asic_status_t[i]);
  1164. }
  1165. bitmain_update_temps(bitmain, info, &rxstatusdata);
  1166. statusok = 1;
  1167. break;
  1168. }
  1169. }
  1170. if(statusok) {
  1171. break;
  1172. }
  1173. }
  1174. }
  1175. trycount--;
  1176. p.tv_sec = 0;
  1177. p.tv_nsec = BITMAIN_RESET_PITCH;
  1178. nanosleep(&p, NULL);
  1179. }
  1180. p.tv_sec = 0;
  1181. p.tv_nsec = BITMAIN_RESET_PITCH;
  1182. nanosleep(&p, NULL);
  1183. if(statusok) {
  1184. applog(LOG_ERR, "bitmain_initialize start send txconfig");
  1185. if(opt_bitmain_hwerror)
  1186. hwerror_eft = 1;
  1187. else
  1188. hwerror_eft = 0;
  1189. if(opt_bitmain_nobeeper)
  1190. beeper_ctrl = 0;
  1191. else
  1192. beeper_ctrl = 1;
  1193. if(opt_bitmain_notempoverctrl)
  1194. tempover_ctrl = 0;
  1195. else
  1196. tempover_ctrl = 1;
  1197. if(opt_bitmain_homemode)
  1198. home_mode= 1;
  1199. else
  1200. home_mode= 0;
  1201. sendlen = bitmain_set_txconfig((struct bitmain_txconfig_token *)sendbuf, 1, 1, 1, 1, 1, 0, 1, hwerror_eft, beeper_ctrl, tempover_ctrl,home_mode,
  1202. info->chain_num, info->asic_num, BITMAIN_DEFAULT_FAN_MAX_PWM, info->timeout,
  1203. info->frequency, info->voltage, 0, 0, 0x04, info->reg_data);
  1204. if(sendlen <= 0) {
  1205. applog(LOG_ERR, "bitmain_initialize bitmain_set_txconfig error(%d)", sendlen);
  1206. return -1;
  1207. }
  1208. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1209. if (unlikely(ret == BTM_SEND_ERROR)) {
  1210. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1211. return -1;
  1212. }
  1213. applog(LOG_WARNING, "BMM%d: InitSet succeeded", bitmain->device_id);
  1214. } else {
  1215. applog(LOG_WARNING, "BMS%d: InitSet error", bitmain->device_id);
  1216. return -1;
  1217. }
  1218. return 0;
  1219. }
  1220. static bool bitmain_detect_one(const char * devpath)
  1221. {
  1222. struct bitmain_info *info;
  1223. struct cgpu_info *bitmain;
  1224. int ret;
  1225. bitmain = btm_alloc_cgpu(&bitmain_drv, BITMAIN_MINER_THREADS);
  1226. info = bitmain->device_data;
  1227. drv_set_defaults(&bitmain_drv, bitmain_set_device_funcs_init, info, devpath, NULL, 1);
  1228. if (!btm_init(bitmain, devpath))
  1229. goto shin;
  1230. applog(LOG_ERR, "bitmain_detect_one btm init ok");
  1231. info->fan_pwm = BITMAIN_DEFAULT_FAN_MIN_PWM;
  1232. info->temp_max = 0;
  1233. /* This is for check the temp/fan every 3~4s */
  1234. info->temp_history_count = (4 / (float)((float)info->timeout * ((float)1.67/0x32))) + 1;
  1235. if (info->temp_history_count <= 0)
  1236. info->temp_history_count = 1;
  1237. info->temp_history_index = 0;
  1238. info->temp_sum = 0;
  1239. info->temp_old = 0;
  1240. if (!add_cgpu(bitmain))
  1241. goto unshin;
  1242. ret = bitmain_initialize(bitmain);
  1243. applog(LOG_ERR, "bitmain_detect_one stop bitmain_initialize %d", ret);
  1244. if (ret)
  1245. goto unshin;
  1246. info->errorcount = 0;
  1247. applog(LOG_ERR, "BitMain Detected: %s "
  1248. "(chain_num=%d asic_num=%d timeout=%d freq=%d-%s volt=%02x%02x-%s)",
  1249. bitmain->device_path, info->chain_num, info->asic_num, info->timeout,
  1250. info->frequency, info->frequency_t, info->voltage[0], info->voltage[1], info->voltage_t);
  1251. return true;
  1252. unshin:
  1253. btm_uninit(bitmain);
  1254. shin:
  1255. free(bitmain->device_data);
  1256. bitmain->device_data = NULL;
  1257. free(bitmain);
  1258. return false;
  1259. }
  1260. static int bitmain_detect_auto(void)
  1261. {
  1262. const char * const auto_bitmain_dev = "/dev/bitmain-asic";
  1263. applog(LOG_DEBUG, "BTM detect dev: %s", auto_bitmain_dev);
  1264. return bitmain_detect_one(auto_bitmain_dev) ? 1 : 0;
  1265. }
  1266. static void bitmain_detect()
  1267. {
  1268. generic_detect(&bitmain_drv, bitmain_detect_one, bitmain_detect_auto, GDF_REQUIRE_DNAME | GDF_DEFAULT_NOAUTO);
  1269. }
  1270. static void do_bitmain_close(struct thr_info *thr)
  1271. {
  1272. struct cgpu_info *bitmain = thr->cgpu;
  1273. struct bitmain_info *info = bitmain->device_data;
  1274. bitmain_running_reset(bitmain, info);
  1275. info->no_matching_work = 0;
  1276. }
  1277. static uint8_t diff_to_bitmain(float diff)
  1278. {
  1279. uint8_t res = 0;
  1280. if (diff > UINT64_MAX)
  1281. diff = UINT64_MAX;
  1282. for (uint64_t tmp = diff; tmp >>= 1; ) {
  1283. if (++res == UINT8_MAX)
  1284. break;
  1285. }
  1286. return res;
  1287. }
  1288. static bool bitmain_queue_append(struct thr_info * const thr, struct work * const work)
  1289. {
  1290. struct cgpu_info * const proc = thr->cgpu;
  1291. struct cgpu_info * const dev = proc->device;
  1292. struct thr_info * const master_thr = dev->thr[0];
  1293. struct bitmain_info * const info = dev->device_data;
  1294. const struct pool * const pool = work->pool;
  1295. const struct mining_goal_info * const goal = pool->goal;
  1296. applog(LOG_DEBUG, "%s: %s with fifo_space=%d", dev->dev_repr, __func__, info->fifo_space);
  1297. if (!info->fifo_space) {
  1298. thr->queue_full = true;
  1299. return false;
  1300. }
  1301. uint8_t * const wbuf = &info->queuebuf[BITMAIN_TASK_HEADER_SIZE + (BITMAIN_WORK_SIZE * info->ready_to_queue)];
  1302. const int work_nonce_bmdiff = diff_to_bitmain(work->nonce_diff);
  1303. if (work_nonce_bmdiff < info->diff)
  1304. info->diff = work_nonce_bmdiff;
  1305. if (goal->current_diff < info->lowest_goal_diff)
  1306. info->lowest_goal_diff = goal->current_diff;
  1307. work->device_id = info->next_work_id++;
  1308. pk_u32le(wbuf, 0, work->device_id);
  1309. memcpy(&wbuf[4], work->midstate, 0x20);
  1310. memcpy(&wbuf[0x24], &work->data[0x40], 0xc);
  1311. HASH_ADD(hh, master_thr->work_list, device_id, sizeof(work->device_id), work);
  1312. ++info->ready_to_queue;
  1313. if (!(info->ready_to_queue == BITMAIN_MAX_WORK_NUM || info->fifo_space == info->ready_to_queue || info->fifo_space == info->max_fifo_space)) {
  1314. applog(LOG_DEBUG, "%s: %s now has ready_to_queue=%d; deferring send", dev->dev_repr, __func__, info->ready_to_queue);
  1315. return true;
  1316. }
  1317. applog(LOG_DEBUG, "%s: %s now has ready_to_queue=%d; sending to device", dev->dev_repr, __func__, info->ready_to_queue);
  1318. uint8_t * const buf = info->queuebuf;
  1319. const size_t buflen = BITMAIN_TASK_HEADER_SIZE + (info->ready_to_queue * BITMAIN_WORK_SIZE) + BITMAIN_TASK_FOOTER_SIZE;
  1320. buf[0] = BITMAIN_TOKEN_TYPE_TXTASK;
  1321. buf[1] = 0; // packet version
  1322. pk_u16le(buf, 2, buflen - 4); // length of data after this field (including CRC)
  1323. buf[4] = 0; // set to (0x80 or 1??) to clear work queues (and skip fifo_space check above)
  1324. buf[5] = info->diff;
  1325. pk_u16le(buf, 6, diff_to_bitmain(info->lowest_goal_diff));
  1326. pk_u16le(buf, buflen - 2, CRC16(buf, buflen - 2));
  1327. int sendret = bitmain_send_data(buf, buflen, proc);
  1328. if (unlikely(sendret == BTM_SEND_ERROR)) {
  1329. applog(LOG_ERR, "%s: Comms error(buffer)", dev->dev_repr);
  1330. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  1331. info->reset = true;
  1332. info->errorcount++;
  1333. if (info->errorcount > 1000) {
  1334. info->errorcount = 0;
  1335. applog(LOG_ERR, "%s: Device disappeared, shutting down thread", dev->dev_repr);
  1336. dev->shutdown = true;
  1337. }
  1338. // The work is in the queuebuf already, so we're okay-ish for that...
  1339. return true;
  1340. } else {
  1341. applog(LOG_DEBUG, "bitmain_send_data send ret=%d", sendret);
  1342. info->errorcount = 0;
  1343. }
  1344. info->fifo_space -= info->ready_to_queue;
  1345. info->ready_to_queue = 0;
  1346. return true;
  1347. }
  1348. static void bitmain_queue_flush(struct thr_info * const thr)
  1349. {
  1350. // TODO
  1351. }
  1352. static struct api_data *bitmain_api_stats(struct cgpu_info *cgpu)
  1353. {
  1354. struct api_data *root = NULL;
  1355. struct bitmain_info *info = cgpu->device_data;
  1356. double hwp = (cgpu->hw_errors + cgpu->diff1) ?
  1357. (double)(cgpu->hw_errors) / (double)(cgpu->hw_errors + cgpu->diff1) : 0;
  1358. root = api_add_int(root, "baud", &(info->baud), false);
  1359. root = api_add_int(root, "miner_count", &(info->chain_num), false);
  1360. root = api_add_int(root, "asic_count", &(info->asic_num), false);
  1361. root = api_add_int(root, "timeout", &(info->timeout), false);
  1362. root = api_add_string(root, "frequency", info->frequency_t, false);
  1363. root = api_add_string(root, "voltage", info->voltage_t, false);
  1364. root = api_add_int(root, "hwv1", &(info->hw_version[0]), false);
  1365. root = api_add_int(root, "hwv2", &(info->hw_version[1]), false);
  1366. root = api_add_int(root, "hwv3", &(info->hw_version[2]), false);
  1367. root = api_add_int(root, "hwv4", &(info->hw_version[3]), false);
  1368. root = api_add_int(root, "fan_num", &(info->fan_num), false);
  1369. root = api_add_int(root, "fan1", &(info->fan[0]), false);
  1370. root = api_add_int(root, "fan2", &(info->fan[1]), false);
  1371. root = api_add_int(root, "fan3", &(info->fan[2]), false);
  1372. root = api_add_int(root, "fan4", &(info->fan[3]), false);
  1373. root = api_add_int(root, "fan5", &(info->fan[4]), false);
  1374. root = api_add_int(root, "fan6", &(info->fan[5]), false);
  1375. root = api_add_int(root, "fan7", &(info->fan[6]), false);
  1376. root = api_add_int(root, "fan8", &(info->fan[7]), false);
  1377. root = api_add_int(root, "fan9", &(info->fan[8]), false);
  1378. root = api_add_int(root, "fan10", &(info->fan[9]), false);
  1379. root = api_add_int(root, "fan11", &(info->fan[10]), false);
  1380. root = api_add_int(root, "fan12", &(info->fan[11]), false);
  1381. root = api_add_int(root, "fan13", &(info->fan[12]), false);
  1382. root = api_add_int(root, "fan14", &(info->fan[13]), false);
  1383. root = api_add_int(root, "fan15", &(info->fan[14]), false);
  1384. root = api_add_int(root, "fan16", &(info->fan[15]), false);
  1385. root = api_add_int(root, "temp_num", &(info->temp_num), false);
  1386. root = api_add_int(root, "temp1", &(info->temp[0]), false);
  1387. root = api_add_int(root, "temp2", &(info->temp[1]), false);
  1388. root = api_add_int(root, "temp3", &(info->temp[2]), false);
  1389. root = api_add_int(root, "temp4", &(info->temp[3]), false);
  1390. root = api_add_int(root, "temp5", &(info->temp[4]), false);
  1391. root = api_add_int(root, "temp6", &(info->temp[5]), false);
  1392. root = api_add_int(root, "temp7", &(info->temp[6]), false);
  1393. root = api_add_int(root, "temp8", &(info->temp[7]), false);
  1394. root = api_add_int(root, "temp9", &(info->temp[8]), false);
  1395. root = api_add_int(root, "temp10", &(info->temp[9]), false);
  1396. root = api_add_int(root, "temp11", &(info->temp[10]), false);
  1397. root = api_add_int(root, "temp12", &(info->temp[11]), false);
  1398. root = api_add_int(root, "temp13", &(info->temp[12]), false);
  1399. root = api_add_int(root, "temp14", &(info->temp[13]), false);
  1400. root = api_add_int(root, "temp15", &(info->temp[14]), false);
  1401. root = api_add_int(root, "temp16", &(info->temp[15]), false);
  1402. root = api_add_int(root, "temp_avg", &(info->temp_avg), false);
  1403. root = api_add_int(root, "temp_max", &(info->temp_max), false);
  1404. root = api_add_percent(root, "Device Hardware%", &hwp, true);
  1405. root = api_add_int(root, "no_matching_work", &(info->no_matching_work), false);
  1406. /*
  1407. for (int i = 0; i < info->chain_num; ++i) {
  1408. char mcw[24];
  1409. sprintf(mcw, "match_work_count%d", i + 1);
  1410. root = api_add_int(root, mcw, &(info->matching_work[i]), false);
  1411. }*/
  1412. root = api_add_int(root, "chain_acn1", &(info->chain_asic_num[0]), false);
  1413. root = api_add_int(root, "chain_acn2", &(info->chain_asic_num[1]), false);
  1414. root = api_add_int(root, "chain_acn3", &(info->chain_asic_num[2]), false);
  1415. root = api_add_int(root, "chain_acn4", &(info->chain_asic_num[3]), false);
  1416. root = api_add_int(root, "chain_acn5", &(info->chain_asic_num[4]), false);
  1417. root = api_add_int(root, "chain_acn6", &(info->chain_asic_num[5]), false);
  1418. root = api_add_int(root, "chain_acn7", &(info->chain_asic_num[6]), false);
  1419. root = api_add_int(root, "chain_acn8", &(info->chain_asic_num[7]), false);
  1420. root = api_add_int(root, "chain_acn9", &(info->chain_asic_num[8]), false);
  1421. root = api_add_int(root, "chain_acn10", &(info->chain_asic_num[9]), false);
  1422. root = api_add_int(root, "chain_acn11", &(info->chain_asic_num[10]), false);
  1423. root = api_add_int(root, "chain_acn12", &(info->chain_asic_num[11]), false);
  1424. root = api_add_int(root, "chain_acn13", &(info->chain_asic_num[12]), false);
  1425. root = api_add_int(root, "chain_acn14", &(info->chain_asic_num[13]), false);
  1426. root = api_add_int(root, "chain_acn15", &(info->chain_asic_num[14]), false);
  1427. root = api_add_int(root, "chain_acn16", &(info->chain_asic_num[15]), false);
  1428. //applog(LOG_ERR, "chain asic status:%s", info->chain_asic_status_t[0]);
  1429. root = api_add_string(root, "chain_acs1", info->chain_asic_status_t[0], false);
  1430. root = api_add_string(root, "chain_acs2", info->chain_asic_status_t[1], false);
  1431. root = api_add_string(root, "chain_acs3", info->chain_asic_status_t[2], false);
  1432. root = api_add_string(root, "chain_acs4", info->chain_asic_status_t[3], false);
  1433. root = api_add_string(root, "chain_acs5", info->chain_asic_status_t[4], false);
  1434. root = api_add_string(root, "chain_acs6", info->chain_asic_status_t[5], false);
  1435. root = api_add_string(root, "chain_acs7", info->chain_asic_status_t[6], false);
  1436. root = api_add_string(root, "chain_acs8", info->chain_asic_status_t[7], false);
  1437. root = api_add_string(root, "chain_acs9", info->chain_asic_status_t[8], false);
  1438. root = api_add_string(root, "chain_acs10", info->chain_asic_status_t[9], false);
  1439. root = api_add_string(root, "chain_acs11", info->chain_asic_status_t[10], false);
  1440. root = api_add_string(root, "chain_acs12", info->chain_asic_status_t[11], false);
  1441. root = api_add_string(root, "chain_acs13", info->chain_asic_status_t[12], false);
  1442. root = api_add_string(root, "chain_acs14", info->chain_asic_status_t[13], false);
  1443. root = api_add_string(root, "chain_acs15", info->chain_asic_status_t[14], false);
  1444. root = api_add_string(root, "chain_acs16", info->chain_asic_status_t[15], false);
  1445. //root = api_add_int(root, "chain_acs1", &(info->chain_asic_status[0]), false);
  1446. //root = api_add_int(root, "chain_acs2", &(info->chain_asic_status[1]), false);
  1447. //root = api_add_int(root, "chain_acs3", &(info->chain_asic_status[2]), false);
  1448. //root = api_add_int(root, "chain_acs4", &(info->chain_asic_status[3]), false);
  1449. return root;
  1450. }
  1451. static void bitmain_shutdown(struct thr_info *thr)
  1452. {
  1453. do_bitmain_close(thr);
  1454. }
  1455. static
  1456. const char *bitmain_set_baud(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1457. {
  1458. struct bitmain_info *info = proc->device_data;
  1459. const int baud = atoi(newvalue);
  1460. if (!valid_baud(baud))
  1461. return "Invalid baud setting";
  1462. info->baud = baud;
  1463. return NULL;
  1464. }
  1465. static
  1466. const char *bitmain_set_layout(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1467. {
  1468. struct bitmain_info *info = proc->device_data;
  1469. char *endptr, *next_field;
  1470. const long int n_chains = strtol(newvalue, &endptr, 0);
  1471. if (endptr == newvalue || n_chains < 1)
  1472. return "Missing chain count";
  1473. long int n_asics = 0;
  1474. if (endptr[0] == ':' || endptr[1] == ',')
  1475. {
  1476. next_field = &endptr[1];
  1477. n_asics = strtol(next_field, &endptr, 0);
  1478. }
  1479. if (n_asics < 1)
  1480. return "Missing ASIC count";
  1481. if (n_asics > BITMAIN_DEFAULT_ASIC_NUM)
  1482. return "ASIC count too high";
  1483. info->chain_num = n_chains;
  1484. info->asic_num = n_asics;
  1485. return NULL;
  1486. }
  1487. static
  1488. const char *bitmain_set_timeout(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1489. {
  1490. struct bitmain_info *info = proc->device_data;
  1491. const int timeout = atoi(newvalue);
  1492. if (timeout < 0 || timeout > 0xff)
  1493. return "Invalid timeout setting";
  1494. info->timeout = timeout;
  1495. return NULL;
  1496. }
  1497. static
  1498. const char *bitmain_set_clock(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1499. {
  1500. struct bitmain_info *info = proc->device_data;
  1501. const int freq = atoi(newvalue);
  1502. if (freq < BITMAIN_MIN_FREQUENCY || freq > BITMAIN_MAX_FREQUENCY)
  1503. return "Invalid clock frequency";
  1504. info->frequency = freq;
  1505. sprintf(info->frequency_t, "%d", freq);
  1506. return NULL;
  1507. }
  1508. static
  1509. const char *bitmain_set_reg_data(struct cgpu_info * const proc, const char * const optname, const char *newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1510. {
  1511. struct bitmain_info *info = proc->device_data;
  1512. uint8_t reg_data[4] = {0};
  1513. if (newvalue[0] == 'x')
  1514. ++newvalue;
  1515. size_t nvlen = strlen(newvalue);
  1516. if (nvlen > (sizeof(reg_data) * 2) || !nvlen || nvlen % 2)
  1517. return "reg_data must be a hex string of 2-8 digits (1-4 bytes)";
  1518. if (!hex2bin(reg_data, newvalue, nvlen / 2))
  1519. return "Invalid reg data hex";
  1520. memcpy(info->reg_data, reg_data, sizeof(reg_data));
  1521. return NULL;
  1522. }
  1523. static
  1524. const char *bitmain_set_voltage(struct cgpu_info * const proc, const char * const optname, const char *newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1525. {
  1526. struct bitmain_info *info = proc->device_data;
  1527. uint8_t voltage_data[2] = {0};
  1528. if (newvalue[0] == 'x')
  1529. ++newvalue;
  1530. else
  1531. voltage_usage:
  1532. return "voltage must be 'x' followed by a hex string of 1-4 digits (1-2 bytes)";
  1533. size_t nvlen = strlen(newvalue);
  1534. if (nvlen > (sizeof(voltage_data) * 2) || !nvlen || nvlen % 2)
  1535. goto voltage_usage;
  1536. if (!hex2bin(voltage_data, newvalue, nvlen / 2))
  1537. return "Invalid voltage data hex";
  1538. memcpy(info->voltage, voltage_data, sizeof(voltage_data));
  1539. bin2hex(info->voltage_t, voltage_data, 2);
  1540. info->voltage_t[5] = 0;
  1541. info->voltage_t[4] = info->voltage_t[3];
  1542. info->voltage_t[3] = info->voltage_t[2];
  1543. info->voltage_t[2] = info->voltage_t[1];
  1544. info->voltage_t[1] = '.';
  1545. return NULL;
  1546. }
  1547. static const struct bfg_set_device_definition bitmain_set_device_funcs_init[] = {
  1548. {"baud", bitmain_set_baud, "serial baud rate"},
  1549. {"layout", bitmain_set_layout, "number of chains ':' number of ASICs per chain (eg: 32:8)"},
  1550. {"timeout", bitmain_set_timeout, "timeout"},
  1551. {"clock", bitmain_set_clock, "clock frequency"},
  1552. {"reg_data", bitmain_set_reg_data, "reg_data (eg: x0d82)"},
  1553. {"voltage", bitmain_set_voltage, "voltage (must be specified as 'x' and hex data; eg: x0725)"},
  1554. {NULL},
  1555. };
  1556. struct device_drv bitmain_drv = {
  1557. .dname = "bitmain",
  1558. .name = "BTM",
  1559. .drv_detect = bitmain_detect,
  1560. .thread_prepare = bitmain_prepare,
  1561. .minerloop = minerloop_queue,
  1562. .queue_append = bitmain_queue_append,
  1563. .queue_flush = bitmain_queue_flush,
  1564. .poll = bitmain_poll,
  1565. .get_api_stats = bitmain_api_stats,
  1566. .reinit_device = bitmain_init,
  1567. .thread_shutdown = bitmain_shutdown,
  1568. };