driver-icarus.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913
  1. /*
  2. * Copyright 2012 Luke Dashjr
  3. * Copyright 2012 Xiangfu <xiangfu@openmobilefree.com>
  4. * Copyright 2012 Andrew Smith
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the Free
  8. * Software Foundation; either version 3 of the License, or (at your option)
  9. * any later version. See COPYING for more details.
  10. */
  11. /*
  12. * Those code should be works fine with V2 and V3 bitstream of Icarus.
  13. * Operation:
  14. * No detection implement.
  15. * Input: 64B = 32B midstate + 20B fill bytes + last 12 bytes of block head.
  16. * Return: send back 32bits immediately when Icarus found a valid nonce.
  17. * no query protocol implemented here, if no data send back in ~11.3
  18. * seconds (full cover time on 32bit nonce range by 380MH/s speed)
  19. * just send another work.
  20. * Notice:
  21. * 1. Icarus will start calculate when you push a work to them, even they
  22. * are busy.
  23. * 2. The 2 FPGAs on Icarus will distribute the job, one will calculate the
  24. * 0 ~ 7FFFFFFF, another one will cover the 80000000 ~ FFFFFFFF.
  25. * 3. It's possible for 2 FPGAs both find valid nonce in the meantime, the 2
  26. * valid nonce will all be send back.
  27. * 4. Icarus will stop work when: a valid nonce has been found or 32 bits
  28. * nonce range is completely calculated.
  29. */
  30. #include "config.h"
  31. #include "miner.h"
  32. #include <limits.h>
  33. #include <pthread.h>
  34. #include <stdio.h>
  35. #include <sys/time.h>
  36. #include <sys/types.h>
  37. #include <dirent.h>
  38. #include <unistd.h>
  39. #ifndef WIN32
  40. #include <termios.h>
  41. #include <sys/stat.h>
  42. #include <fcntl.h>
  43. #ifndef O_CLOEXEC
  44. #define O_CLOEXEC 0
  45. #endif
  46. #else
  47. #include <windows.h>
  48. #include <io.h>
  49. #endif
  50. #include "elist.h"
  51. #include "fpgautils.h"
  52. // The serial I/O speed - Linux uses a define 'B115200' in bits/termios.h
  53. #define ICARUS_IO_SPEED 115200
  54. // The size of a successful nonce read
  55. #define ICARUS_READ_SIZE 4
  56. // Ensure the sizes are correct for the Serial read
  57. #if (ICARUS_READ_SIZE != 4)
  58. #error ICARUS_READ_SIZE must be 4
  59. #endif
  60. #define ASSERT1(condition) __maybe_unused static char sizeof_uint32_t_must_be_4[(condition)?1:-1]
  61. ASSERT1(sizeof(uint32_t) == 4);
  62. #define ICARUS_READ_TIME(baud) ((double)ICARUS_READ_SIZE * (double)8.0 / (double)(baud))
  63. // Fraction of a second, USB timeout is measured in
  64. // i.e. 10 means 1/10 of a second
  65. #define TIME_FACTOR 10
  66. // It's 10 per second, thus value = 10/TIME_FACTOR =
  67. #define ICARUS_READ_FAULT_DECISECONDS 1
  68. // In timing mode: Default starting value until an estimate can be obtained
  69. // 5 seconds allows for up to a ~840MH/s device
  70. #define ICARUS_READ_COUNT_TIMING (5 * TIME_FACTOR)
  71. // For a standard Icarus REV3 (to 5 places)
  72. // Since this rounds up a the last digit - it is a slight overestimate
  73. // Thus the hash rate will be a VERY slight underestimate
  74. // (by a lot less than the displayed accuracy)
  75. #define ICARUS_REV3_HASH_TIME 0.0000000026316
  76. #define NANOSEC 1000000000.0
  77. // Icarus Rev3 doesn't send a completion message when it finishes
  78. // the full nonce range, so to avoid being idle we must abort the
  79. // work (by starting a new work) shortly before it finishes
  80. //
  81. // Thus we need to estimate 2 things:
  82. // 1) How many hashes were done if the work was aborted
  83. // 2) How high can the timeout be before the Icarus is idle,
  84. // to minimise the number of work started
  85. // We set 2) to 'the calculated estimate' - 1
  86. // to ensure the estimate ends before idle
  87. //
  88. // The simple calculation used is:
  89. // Tn = Total time in seconds to calculate n hashes
  90. // Hs = seconds per hash
  91. // Xn = number of hashes
  92. // W = code overhead per work
  93. //
  94. // Rough but reasonable estimate:
  95. // Tn = Hs * Xn + W (of the form y = mx + b)
  96. //
  97. // Thus:
  98. // Line of best fit (using least squares)
  99. //
  100. // Hs = (n*Sum(XiTi)-Sum(Xi)*Sum(Ti))/(n*Sum(Xi^2)-Sum(Xi)^2)
  101. // W = Sum(Ti)/n - (Hs*Sum(Xi))/n
  102. //
  103. // N.B. W is less when aborting work since we aren't waiting for the reply
  104. // to be transferred back (ICARUS_READ_TIME)
  105. // Calculating the hashes aborted at n seconds is thus just n/Hs
  106. // (though this is still a slight overestimate due to code delays)
  107. //
  108. // Both below must be exceeded to complete a set of data
  109. // Minimum how long after the first, the last data point must be
  110. #define HISTORY_SEC 60
  111. // Minimum how many points a single ICARUS_HISTORY should have
  112. #define MIN_DATA_COUNT 5
  113. // The value above used is doubled each history until it exceeds:
  114. #define MAX_MIN_DATA_COUNT 100
  115. static struct timeval history_sec = { HISTORY_SEC, 0 };
  116. // Store the last INFO_HISTORY data sets
  117. // [0] = current data, not yet ready to be included as an estimate
  118. // Each new data set throws the last old set off the end thus
  119. // keeping a ongoing average of recent data
  120. #define INFO_HISTORY 10
  121. struct ICARUS_HISTORY {
  122. struct timeval finish;
  123. double sumXiTi;
  124. double sumXi;
  125. double sumTi;
  126. double sumXi2;
  127. uint32_t values;
  128. uint32_t hash_count_min;
  129. uint32_t hash_count_max;
  130. };
  131. enum timing_mode { MODE_DEFAULT, MODE_SHORT, MODE_LONG, MODE_VALUE };
  132. static const char *MODE_DEFAULT_STR = "default";
  133. static const char *MODE_SHORT_STR = "short";
  134. static const char *MODE_LONG_STR = "long";
  135. static const char *MODE_VALUE_STR = "value";
  136. static const char *MODE_UNKNOWN_STR = "unknown";
  137. struct ICARUS_INFO {
  138. // time to calculate the golden_ob
  139. uint64_t golden_hashes;
  140. struct timeval golden_tv;
  141. struct ICARUS_HISTORY history[INFO_HISTORY+1];
  142. uint32_t min_data_count;
  143. // seconds per Hash
  144. double Hs;
  145. int read_count;
  146. enum timing_mode timing_mode;
  147. bool do_icarus_timing;
  148. double fullnonce;
  149. int count;
  150. double W;
  151. uint32_t values;
  152. uint64_t hash_count_range;
  153. // Determine the cost of history processing
  154. // (which will only affect W)
  155. uint64_t history_count;
  156. struct timeval history_time;
  157. // icarus-options
  158. int baud;
  159. int work_division;
  160. int fpga_count;
  161. uint32_t nonce_mask;
  162. };
  163. #define END_CONDITION 0x0000ffff
  164. // One for each possible device
  165. static struct ICARUS_INFO **icarus_info;
  166. // Looking for options in --icarus-timing and --icarus-options:
  167. //
  168. // Code increments this each time we start to look at a device
  169. // However, this means that if other devices are checked by
  170. // the Icarus code (e.g. BFL) they will count in the option offset
  171. //
  172. // This, however, is deterministic so that's OK
  173. //
  174. // If we were to increment after successfully finding an Icarus
  175. // that would be random since an Icarus may fail and thus we'd
  176. // not be able to predict the option order
  177. //
  178. // This also assumes that serial_detect() checks them sequentially
  179. // and in the order specified on the command line
  180. //
  181. static int option_offset = -1;
  182. struct device_drv icarus_drv;
  183. static void rev(unsigned char *s, size_t l)
  184. {
  185. size_t i, j;
  186. unsigned char t;
  187. for (i = 0, j = l - 1; i < j; i++, j--) {
  188. t = s[i];
  189. s[i] = s[j];
  190. s[j] = t;
  191. }
  192. }
  193. #define icarus_open2(devpath, baud, purge) serial_open(devpath, baud, ICARUS_READ_FAULT_DECISECONDS, purge)
  194. #define icarus_open(devpath, baud) icarus_open2(devpath, baud, false)
  195. #define ICA_GETS_ERROR -1
  196. #define ICA_GETS_OK 0
  197. #define ICA_GETS_RESTART 1
  198. #define ICA_GETS_TIMEOUT 2
  199. static int icarus_gets(unsigned char *buf, int fd, struct timeval *tv_finish, struct thr_info *thr, int read_count)
  200. {
  201. ssize_t ret = 0;
  202. int rc = 0;
  203. int read_amount = ICARUS_READ_SIZE;
  204. bool first = true;
  205. // Read reply 1 byte at a time to get earliest tv_finish
  206. while (true) {
  207. ret = read(fd, buf, 1);
  208. if (ret < 0)
  209. return ICA_GETS_ERROR;
  210. if (first)
  211. cgtime(tv_finish);
  212. if (ret >= read_amount)
  213. return ICA_GETS_OK;
  214. if (ret > 0) {
  215. buf += ret;
  216. read_amount -= ret;
  217. first = false;
  218. continue;
  219. }
  220. rc++;
  221. if (rc >= read_count) {
  222. if (opt_debug) {
  223. applog(LOG_DEBUG,
  224. "Icarus Read: No data in %.2f seconds",
  225. (float)rc/(float)TIME_FACTOR);
  226. }
  227. return ICA_GETS_TIMEOUT;
  228. }
  229. if (thr && thr->work_restart) {
  230. if (opt_debug) {
  231. applog(LOG_DEBUG,
  232. "Icarus Read: Work restart at %.2f seconds",
  233. (float)(rc)/(float)TIME_FACTOR);
  234. }
  235. return ICA_GETS_RESTART;
  236. }
  237. }
  238. }
  239. static int icarus_write(int fd, const void *buf, size_t bufLen)
  240. {
  241. size_t ret;
  242. ret = write(fd, buf, bufLen);
  243. if (unlikely(ret != bufLen))
  244. return 1;
  245. return 0;
  246. }
  247. #define icarus_close(fd) close(fd)
  248. static void do_icarus_close(struct thr_info *thr)
  249. {
  250. struct cgpu_info *icarus = thr->cgpu;
  251. icarus_close(icarus->device_fd);
  252. icarus->device_fd = -1;
  253. }
  254. static const char *timing_mode_str(enum timing_mode timing_mode)
  255. {
  256. switch(timing_mode) {
  257. case MODE_DEFAULT:
  258. return MODE_DEFAULT_STR;
  259. case MODE_SHORT:
  260. return MODE_SHORT_STR;
  261. case MODE_LONG:
  262. return MODE_LONG_STR;
  263. case MODE_VALUE:
  264. return MODE_VALUE_STR;
  265. default:
  266. return MODE_UNKNOWN_STR;
  267. }
  268. }
  269. static void set_timing_mode(int this_option_offset, struct cgpu_info *icarus)
  270. {
  271. struct ICARUS_INFO *info = icarus_info[icarus->device_id];
  272. double Hs;
  273. char buf[BUFSIZ+1];
  274. char *ptr, *comma, *eq;
  275. size_t max;
  276. int i;
  277. if (opt_icarus_timing == NULL)
  278. buf[0] = '\0';
  279. else {
  280. ptr = opt_icarus_timing;
  281. for (i = 0; i < this_option_offset; i++) {
  282. comma = strchr(ptr, ',');
  283. if (comma == NULL)
  284. break;
  285. ptr = comma + 1;
  286. }
  287. comma = strchr(ptr, ',');
  288. if (comma == NULL)
  289. max = strlen(ptr);
  290. else
  291. max = comma - ptr;
  292. if (max > BUFSIZ)
  293. max = BUFSIZ;
  294. strncpy(buf, ptr, max);
  295. buf[max] = '\0';
  296. }
  297. info->Hs = 0;
  298. info->read_count = 0;
  299. if (strcasecmp(buf, MODE_SHORT_STR) == 0) {
  300. info->Hs = ICARUS_REV3_HASH_TIME;
  301. info->read_count = ICARUS_READ_COUNT_TIMING;
  302. info->timing_mode = MODE_SHORT;
  303. info->do_icarus_timing = true;
  304. } else if (strcasecmp(buf, MODE_LONG_STR) == 0) {
  305. info->Hs = ICARUS_REV3_HASH_TIME;
  306. info->read_count = ICARUS_READ_COUNT_TIMING;
  307. info->timing_mode = MODE_LONG;
  308. info->do_icarus_timing = true;
  309. } else if ((Hs = atof(buf)) != 0) {
  310. info->Hs = Hs / NANOSEC;
  311. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  312. if ((eq = strchr(buf, '=')) != NULL)
  313. info->read_count = atoi(eq+1);
  314. if (info->read_count < 1)
  315. info->read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  316. if (unlikely(info->read_count < 1))
  317. info->read_count = 1;
  318. info->timing_mode = MODE_VALUE;
  319. info->do_icarus_timing = false;
  320. } else {
  321. // Anything else in buf just uses DEFAULT mode
  322. info->Hs = ICARUS_REV3_HASH_TIME;
  323. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  324. if ((eq = strchr(buf, '=')) != NULL)
  325. info->read_count = atoi(eq+1);
  326. if (info->read_count < 1)
  327. info->read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  328. info->timing_mode = MODE_DEFAULT;
  329. info->do_icarus_timing = false;
  330. }
  331. info->min_data_count = MIN_DATA_COUNT;
  332. applog(LOG_DEBUG, "Icarus: Init: %d mode=%s read_count=%d Hs=%e",
  333. icarus->device_id, timing_mode_str(info->timing_mode), info->read_count, info->Hs);
  334. }
  335. static uint32_t mask(int work_division)
  336. {
  337. char err_buf[BUFSIZ+1];
  338. uint32_t nonce_mask = 0x7fffffff;
  339. // yes we can calculate these, but this way it's easy to see what they are
  340. switch (work_division) {
  341. case 1:
  342. nonce_mask = 0xffffffff;
  343. break;
  344. case 2:
  345. nonce_mask = 0x7fffffff;
  346. break;
  347. case 4:
  348. nonce_mask = 0x3fffffff;
  349. break;
  350. case 8:
  351. nonce_mask = 0x1fffffff;
  352. break;
  353. default:
  354. sprintf(err_buf, "Invalid2 icarus-options for work_division (%d) must be 1, 2, 4 or 8", work_division);
  355. quit(1, err_buf);
  356. }
  357. return nonce_mask;
  358. }
  359. static void get_options(int this_option_offset, int *baud, int *work_division, int *fpga_count)
  360. {
  361. char err_buf[BUFSIZ+1];
  362. char buf[BUFSIZ+1];
  363. char *ptr, *comma, *colon, *colon2;
  364. size_t max;
  365. int i, tmp;
  366. if (opt_icarus_options == NULL)
  367. buf[0] = '\0';
  368. else {
  369. ptr = opt_icarus_options;
  370. for (i = 0; i < this_option_offset; i++) {
  371. comma = strchr(ptr, ',');
  372. if (comma == NULL)
  373. break;
  374. ptr = comma + 1;
  375. }
  376. comma = strchr(ptr, ',');
  377. if (comma == NULL)
  378. max = strlen(ptr);
  379. else
  380. max = comma - ptr;
  381. if (max > BUFSIZ)
  382. max = BUFSIZ;
  383. strncpy(buf, ptr, max);
  384. buf[max] = '\0';
  385. }
  386. *baud = ICARUS_IO_SPEED;
  387. *work_division = 2;
  388. *fpga_count = 2;
  389. if (*buf) {
  390. colon = strchr(buf, ':');
  391. if (colon)
  392. *(colon++) = '\0';
  393. if (*buf) {
  394. tmp = atoi(buf);
  395. switch (tmp) {
  396. case 115200:
  397. *baud = 115200;
  398. break;
  399. case 57600:
  400. *baud = 57600;
  401. break;
  402. default:
  403. sprintf(err_buf, "Invalid icarus-options for baud (%s) must be 115200 or 57600", buf);
  404. quit(1, err_buf);
  405. }
  406. }
  407. if (colon && *colon) {
  408. colon2 = strchr(colon, ':');
  409. if (colon2)
  410. *(colon2++) = '\0';
  411. if (*colon) {
  412. tmp = atoi(colon);
  413. if (tmp == 1 || tmp == 2 || tmp == 4 || tmp == 8) {
  414. *work_division = tmp;
  415. *fpga_count = tmp; // default to the same
  416. } else {
  417. sprintf(err_buf, "Invalid icarus-options for work_division (%s) must be 1, 2, 4 or 8", colon);
  418. quit(1, err_buf);
  419. }
  420. }
  421. if (colon2 && *colon2) {
  422. tmp = atoi(colon2);
  423. if (tmp > 0 && tmp <= *work_division)
  424. *fpga_count = tmp;
  425. else {
  426. sprintf(err_buf, "Invalid icarus-options for fpga_count (%s) must be >0 and <=work_division (%d)", colon2, *work_division);
  427. quit(1, err_buf);
  428. }
  429. }
  430. }
  431. }
  432. }
  433. static bool icarus_detect_one(const char *devpath)
  434. {
  435. int this_option_offset = ++option_offset;
  436. struct ICARUS_INFO *info;
  437. struct timeval tv_start, tv_finish;
  438. int fd;
  439. // Block 171874 nonce = (0xa2870100) = 0x000187a2
  440. // N.B. golden_ob MUST take less time to calculate
  441. // than the timeout set in icarus_open()
  442. // This one takes ~0.53ms on Rev3 Icarus
  443. const char golden_ob[] =
  444. "4679ba4ec99876bf4bfe086082b40025"
  445. "4df6c356451471139a3afa71e48f544a"
  446. "00000000000000000000000000000000"
  447. "0000000087320b1a1426674f2fa722ce";
  448. const char golden_nonce[] = "000187a2";
  449. const uint32_t golden_nonce_val = 0x000187a2;
  450. unsigned char ob_bin[64], nonce_bin[ICARUS_READ_SIZE];
  451. char *nonce_hex;
  452. int baud, work_division, fpga_count;
  453. get_options(this_option_offset, &baud, &work_division, &fpga_count);
  454. applog(LOG_DEBUG, "Icarus Detect: Attempting to open %s", devpath);
  455. fd = icarus_open2(devpath, baud, true);
  456. if (unlikely(fd == -1)) {
  457. applog(LOG_ERR, "Icarus Detect: Failed to open %s", devpath);
  458. return false;
  459. }
  460. hex2bin(ob_bin, golden_ob, sizeof(ob_bin));
  461. icarus_write(fd, ob_bin, sizeof(ob_bin));
  462. cgtime(&tv_start);
  463. memset(nonce_bin, 0, sizeof(nonce_bin));
  464. icarus_gets(nonce_bin, fd, &tv_finish, NULL, 1);
  465. icarus_close(fd);
  466. nonce_hex = bin2hex(nonce_bin, sizeof(nonce_bin));
  467. if (strncmp(nonce_hex, golden_nonce, 8)) {
  468. applog(LOG_ERR,
  469. "Icarus Detect: "
  470. "Test failed at %s: get %s, should: %s",
  471. devpath, nonce_hex, golden_nonce);
  472. free(nonce_hex);
  473. return false;
  474. }
  475. applog(LOG_DEBUG,
  476. "Icarus Detect: "
  477. "Test succeeded at %s: got %s",
  478. devpath, nonce_hex);
  479. free(nonce_hex);
  480. /* We have a real Icarus! */
  481. struct cgpu_info *icarus;
  482. icarus = calloc(1, sizeof(struct cgpu_info));
  483. icarus->drv = &icarus_drv;
  484. icarus->device_path = strdup(devpath);
  485. icarus->device_fd = -1;
  486. icarus->threads = 1;
  487. add_cgpu(icarus);
  488. icarus_info = realloc(icarus_info, sizeof(struct ICARUS_INFO *) * (total_devices + 1));
  489. applog(LOG_INFO, "Found Icarus at %s, mark as %d",
  490. devpath, icarus->device_id);
  491. applog(LOG_DEBUG, "Icarus: Init: %d baud=%d work_division=%d fpga_count=%d",
  492. icarus->device_id, baud, work_division, fpga_count);
  493. // Since we are adding a new device on the end it needs to always be allocated
  494. icarus_info[icarus->device_id] = (struct ICARUS_INFO *)malloc(sizeof(struct ICARUS_INFO));
  495. if (unlikely(!(icarus_info[icarus->device_id])))
  496. quit(1, "Failed to malloc ICARUS_INFO");
  497. info = icarus_info[icarus->device_id];
  498. // Initialise everything to zero for a new device
  499. memset(info, 0, sizeof(struct ICARUS_INFO));
  500. info->baud = baud;
  501. info->work_division = work_division;
  502. info->fpga_count = fpga_count;
  503. info->nonce_mask = mask(work_division);
  504. info->golden_hashes = (golden_nonce_val & info->nonce_mask) * fpga_count;
  505. timersub(&tv_finish, &tv_start, &(info->golden_tv));
  506. set_timing_mode(this_option_offset, icarus);
  507. return true;
  508. }
  509. static void icarus_detect()
  510. {
  511. serial_detect(&icarus_drv, icarus_detect_one);
  512. }
  513. static bool icarus_prepare(struct thr_info *thr)
  514. {
  515. struct cgpu_info *icarus = thr->cgpu;
  516. struct timeval now;
  517. icarus->device_fd = -1;
  518. int fd = icarus_open(icarus->device_path, icarus_info[icarus->device_id]->baud);
  519. if (unlikely(-1 == fd)) {
  520. applog(LOG_ERR, "Failed to open Icarus on %s",
  521. icarus->device_path);
  522. return false;
  523. }
  524. icarus->device_fd = fd;
  525. applog(LOG_INFO, "Opened Icarus on %s", icarus->device_path);
  526. cgtime(&now);
  527. get_datestamp(icarus->init, &now);
  528. return true;
  529. }
  530. static int64_t icarus_scanhash(struct thr_info *thr, struct work *work,
  531. __maybe_unused int64_t max_nonce)
  532. {
  533. struct cgpu_info *icarus;
  534. int fd;
  535. int ret;
  536. struct ICARUS_INFO *info;
  537. unsigned char ob_bin[64], nonce_bin[ICARUS_READ_SIZE];
  538. char *ob_hex;
  539. uint32_t nonce;
  540. int64_t hash_count;
  541. struct timeval tv_start, tv_finish, elapsed;
  542. struct timeval tv_history_start, tv_history_finish;
  543. double Ti, Xi;
  544. int curr_hw_errors, i;
  545. bool was_hw_error;
  546. struct ICARUS_HISTORY *history0, *history;
  547. int count;
  548. double Hs, W, fullnonce;
  549. int read_count;
  550. int64_t estimate_hashes;
  551. uint32_t values;
  552. int64_t hash_count_range;
  553. elapsed.tv_sec = elapsed.tv_usec = 0;
  554. icarus = thr->cgpu;
  555. if (icarus->device_fd == -1)
  556. if (!icarus_prepare(thr)) {
  557. applog(LOG_ERR, "%s%i: Comms error", icarus->drv->name, icarus->device_id);
  558. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  559. // fail the device if the reopen attempt fails
  560. return -1;
  561. }
  562. fd = icarus->device_fd;
  563. memset(ob_bin, 0, sizeof(ob_bin));
  564. memcpy(ob_bin, work->midstate, 32);
  565. memcpy(ob_bin + 52, work->data + 64, 12);
  566. rev(ob_bin, 32);
  567. rev(ob_bin + 52, 12);
  568. #ifndef WIN32
  569. tcflush(fd, TCOFLUSH);
  570. #endif
  571. ret = icarus_write(fd, ob_bin, sizeof(ob_bin));
  572. if (ret) {
  573. do_icarus_close(thr);
  574. applog(LOG_ERR, "%s%i: Comms error", icarus->drv->name, icarus->device_id);
  575. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  576. return 0; /* This should never happen */
  577. }
  578. cgtime(&tv_start);
  579. if (opt_debug) {
  580. ob_hex = bin2hex(ob_bin, sizeof(ob_bin));
  581. applog(LOG_DEBUG, "Icarus %d sent: %s",
  582. icarus->device_id, ob_hex);
  583. free(ob_hex);
  584. }
  585. /* Icarus will return 4 bytes (ICARUS_READ_SIZE) nonces or nothing */
  586. memset(nonce_bin, 0, sizeof(nonce_bin));
  587. info = icarus_info[icarus->device_id];
  588. ret = icarus_gets(nonce_bin, fd, &tv_finish, thr, info->read_count);
  589. if (ret == ICA_GETS_ERROR) {
  590. do_icarus_close(thr);
  591. applog(LOG_ERR, "%s%i: Comms error", icarus->drv->name, icarus->device_id);
  592. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  593. return 0;
  594. }
  595. work->blk.nonce = 0xffffffff;
  596. // aborted before becoming idle, get new work
  597. if (ret == ICA_GETS_TIMEOUT || ret == ICA_GETS_RESTART) {
  598. timersub(&tv_finish, &tv_start, &elapsed);
  599. // ONLY up to just when it aborted
  600. // We didn't read a reply so we don't subtract ICARUS_READ_TIME
  601. estimate_hashes = ((double)(elapsed.tv_sec)
  602. + ((double)(elapsed.tv_usec))/((double)1000000)) / info->Hs;
  603. // If some Serial-USB delay allowed the full nonce range to
  604. // complete it can't have done more than a full nonce
  605. if (unlikely(estimate_hashes > 0xffffffff))
  606. estimate_hashes = 0xffffffff;
  607. if (opt_debug) {
  608. applog(LOG_DEBUG, "Icarus %d no nonce = 0x%08lX hashes (%ld.%06lds)",
  609. icarus->device_id, (long unsigned int)estimate_hashes,
  610. elapsed.tv_sec, elapsed.tv_usec);
  611. }
  612. return estimate_hashes;
  613. }
  614. memcpy((char *)&nonce, nonce_bin, sizeof(nonce_bin));
  615. #if !defined (__BIG_ENDIAN__) && !defined(MIPSEB)
  616. nonce = swab32(nonce);
  617. #endif
  618. curr_hw_errors = icarus->hw_errors;
  619. submit_nonce(thr, work, nonce);
  620. was_hw_error = (curr_hw_errors > icarus->hw_errors);
  621. // Force a USB close/reopen on any hw error
  622. if (was_hw_error)
  623. do_icarus_close(thr);
  624. hash_count = (nonce & info->nonce_mask);
  625. hash_count++;
  626. hash_count *= info->fpga_count;
  627. if (opt_debug || info->do_icarus_timing)
  628. timersub(&tv_finish, &tv_start, &elapsed);
  629. if (opt_debug) {
  630. applog(LOG_DEBUG, "Icarus %d nonce = 0x%08x = 0x%08lX hashes (%ld.%06lds)",
  631. icarus->device_id, nonce, (long unsigned int)hash_count,
  632. elapsed.tv_sec, elapsed.tv_usec);
  633. }
  634. // ignore possible end condition values ... and hw errors
  635. if (info->do_icarus_timing
  636. && !was_hw_error
  637. && ((nonce & info->nonce_mask) > END_CONDITION)
  638. && ((nonce & info->nonce_mask) < (info->nonce_mask & ~END_CONDITION))) {
  639. cgtime(&tv_history_start);
  640. history0 = &(info->history[0]);
  641. if (history0->values == 0)
  642. timeradd(&tv_start, &history_sec, &(history0->finish));
  643. Ti = (double)(elapsed.tv_sec)
  644. + ((double)(elapsed.tv_usec))/((double)1000000)
  645. - ((double)ICARUS_READ_TIME(info->baud));
  646. Xi = (double)hash_count;
  647. history0->sumXiTi += Xi * Ti;
  648. history0->sumXi += Xi;
  649. history0->sumTi += Ti;
  650. history0->sumXi2 += Xi * Xi;
  651. history0->values++;
  652. if (history0->hash_count_max < hash_count)
  653. history0->hash_count_max = hash_count;
  654. if (history0->hash_count_min > hash_count || history0->hash_count_min == 0)
  655. history0->hash_count_min = hash_count;
  656. if (history0->values >= info->min_data_count
  657. && timercmp(&tv_start, &(history0->finish), >)) {
  658. for (i = INFO_HISTORY; i > 0; i--)
  659. memcpy(&(info->history[i]),
  660. &(info->history[i-1]),
  661. sizeof(struct ICARUS_HISTORY));
  662. // Initialise history0 to zero for summary calculation
  663. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  664. // We just completed a history data set
  665. // So now recalc read_count based on the whole history thus we will
  666. // initially get more accurate until it completes INFO_HISTORY
  667. // total data sets
  668. count = 0;
  669. for (i = 1 ; i <= INFO_HISTORY; i++) {
  670. history = &(info->history[i]);
  671. if (history->values >= MIN_DATA_COUNT) {
  672. count++;
  673. history0->sumXiTi += history->sumXiTi;
  674. history0->sumXi += history->sumXi;
  675. history0->sumTi += history->sumTi;
  676. history0->sumXi2 += history->sumXi2;
  677. history0->values += history->values;
  678. if (history0->hash_count_max < history->hash_count_max)
  679. history0->hash_count_max = history->hash_count_max;
  680. if (history0->hash_count_min > history->hash_count_min || history0->hash_count_min == 0)
  681. history0->hash_count_min = history->hash_count_min;
  682. }
  683. }
  684. // All history data
  685. Hs = (history0->values*history0->sumXiTi - history0->sumXi*history0->sumTi)
  686. / (history0->values*history0->sumXi2 - history0->sumXi*history0->sumXi);
  687. W = history0->sumTi/history0->values - Hs*history0->sumXi/history0->values;
  688. hash_count_range = history0->hash_count_max - history0->hash_count_min;
  689. values = history0->values;
  690. // Initialise history0 to zero for next data set
  691. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  692. fullnonce = W + Hs * (((double)0xffffffff) + 1);
  693. read_count = (int)(fullnonce * TIME_FACTOR) - 1;
  694. info->Hs = Hs;
  695. info->read_count = read_count;
  696. info->fullnonce = fullnonce;
  697. info->count = count;
  698. info->W = W;
  699. info->values = values;
  700. info->hash_count_range = hash_count_range;
  701. if (info->min_data_count < MAX_MIN_DATA_COUNT)
  702. info->min_data_count *= 2;
  703. else if (info->timing_mode == MODE_SHORT)
  704. info->do_icarus_timing = false;
  705. // applog(LOG_WARNING, "Icarus %d Re-estimate: read_count=%d fullnonce=%fs history count=%d Hs=%e W=%e values=%d hash range=0x%08lx min data count=%u", icarus->device_id, read_count, fullnonce, count, Hs, W, values, hash_count_range, info->min_data_count);
  706. applog(LOG_WARNING, "Icarus %d Re-estimate: Hs=%e W=%e read_count=%d fullnonce=%.3fs",
  707. icarus->device_id, Hs, W, read_count, fullnonce);
  708. }
  709. info->history_count++;
  710. cgtime(&tv_history_finish);
  711. timersub(&tv_history_finish, &tv_history_start, &tv_history_finish);
  712. timeradd(&tv_history_finish, &(info->history_time), &(info->history_time));
  713. }
  714. return hash_count;
  715. }
  716. static struct api_data *icarus_api_stats(struct cgpu_info *cgpu)
  717. {
  718. struct api_data *root = NULL;
  719. struct ICARUS_INFO *info = icarus_info[cgpu->device_id];
  720. // Warning, access to these is not locked - but we don't really
  721. // care since hashing performance is way more important than
  722. // locking access to displaying API debug 'stats'
  723. // If locking becomes an issue for any of them, use copy_data=true also
  724. root = api_add_int(root, "read_count", &(info->read_count), false);
  725. root = api_add_double(root, "fullnonce", &(info->fullnonce), false);
  726. root = api_add_int(root, "count", &(info->count), false);
  727. root = api_add_hs(root, "Hs", &(info->Hs), false);
  728. root = api_add_double(root, "W", &(info->W), false);
  729. root = api_add_uint(root, "total_values", &(info->values), false);
  730. root = api_add_uint64(root, "range", &(info->hash_count_range), false);
  731. root = api_add_uint64(root, "history_count", &(info->history_count), false);
  732. root = api_add_timeval(root, "history_time", &(info->history_time), false);
  733. root = api_add_uint(root, "min_data_count", &(info->min_data_count), false);
  734. root = api_add_uint(root, "timing_values", &(info->history[0].values), false);
  735. root = api_add_const(root, "timing_mode", timing_mode_str(info->timing_mode), false);
  736. root = api_add_bool(root, "is_timing", &(info->do_icarus_timing), false);
  737. root = api_add_int(root, "baud", &(info->baud), false);
  738. root = api_add_int(root, "work_division", &(info->work_division), false);
  739. root = api_add_int(root, "fpga_count", &(info->fpga_count), false);
  740. return root;
  741. }
  742. static void icarus_shutdown(struct thr_info *thr)
  743. {
  744. do_icarus_close(thr);
  745. }
  746. struct device_drv icarus_drv = {
  747. .drv_id = DRIVER_ICARUS,
  748. .dname = "Icarus",
  749. .name = "ICA",
  750. .drv_detect = icarus_detect,
  751. .get_api_stats = icarus_api_stats,
  752. .thread_prepare = icarus_prepare,
  753. .scanhash = icarus_scanhash,
  754. .thread_shutdown = icarus_shutdown,
  755. };