driver-icarus.c 39 KB

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  1. /*
  2. * Copyright 2012-2013 Luke Dashjr
  3. * Copyright 2012 Xiangfu
  4. * Copyright 2012 Andrew Smith
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the Free
  8. * Software Foundation; either version 3 of the License, or (at your option)
  9. * any later version. See COPYING for more details.
  10. */
  11. /*
  12. * Those code should be works fine with V2 and V3 bitstream of Icarus.
  13. * Operation:
  14. * No detection implement.
  15. * Input: 64B = 32B midstate + 20B fill bytes + last 12 bytes of block head.
  16. * Return: send back 32bits immediately when Icarus found a valid nonce.
  17. * no query protocol implemented here, if no data send back in ~11.3
  18. * seconds (full cover time on 32bit nonce range by 380MH/s speed)
  19. * just send another work.
  20. * Notice:
  21. * 1. Icarus will start calculate when you push a work to them, even they
  22. * are busy.
  23. * 2. The 2 FPGAs on Icarus will distribute the job, one will calculate the
  24. * 0 ~ 7FFFFFFF, another one will cover the 80000000 ~ FFFFFFFF.
  25. * 3. It's possible for 2 FPGAs both find valid nonce in the meantime, the 2
  26. * valid nonce will all be send back.
  27. * 4. Icarus will stop work when: a valid nonce has been found or 32 bits
  28. * nonce range is completely calculated.
  29. */
  30. #include "config.h"
  31. #include "miner.h"
  32. #include <limits.h>
  33. #include <pthread.h>
  34. #include <stdbool.h>
  35. #include <stdint.h>
  36. #include <stdio.h>
  37. #include <sys/time.h>
  38. #include <sys/types.h>
  39. #include <dirent.h>
  40. #include <unistd.h>
  41. #ifndef WIN32
  42. #include <termios.h>
  43. #include <sys/stat.h>
  44. #include <fcntl.h>
  45. #ifndef O_CLOEXEC
  46. #define O_CLOEXEC 0
  47. #endif
  48. #else
  49. #include <windows.h>
  50. #include <io.h>
  51. #endif
  52. #ifdef HAVE_SYS_EPOLL_H
  53. #include <sys/epoll.h>
  54. #define HAVE_EPOLL
  55. #endif
  56. #include "compat.h"
  57. #include "dynclock.h"
  58. #include "icarus-common.h"
  59. #include "lowl-vcom.h"
  60. // The serial I/O speed - Linux uses a define 'B115200' in bits/termios.h
  61. #define ICARUS_IO_SPEED 115200
  62. // The number of bytes in a nonce (always 4)
  63. // This is NOT the read-size for the Icarus driver
  64. // That is defined in ICARUS_INFO->read_size
  65. #define ICARUS_NONCE_SIZE 4
  66. #define ASSERT1(condition) __maybe_unused static char sizeof_uint32_t_must_be_4[(condition)?1:-1]
  67. ASSERT1(sizeof(uint32_t) == 4);
  68. #define ICARUS_READ_TIME(baud, read_size) ((double)read_size * (double)8.0 / (double)(baud))
  69. // Defined in deciseconds
  70. // There's no need to have this bigger, since the overhead/latency of extra work
  71. // is pretty small once you get beyond a 10s nonce range time and 10s also
  72. // means that nothing slower than 429MH/s can go idle so most icarus devices
  73. // will always mine without idling
  74. #define ICARUS_READ_COUNT_LIMIT_MAX 100
  75. // In timing mode: Default starting value until an estimate can be obtained
  76. // 5 seconds allows for up to a ~840MH/s device
  77. #define ICARUS_READ_COUNT_TIMING (5 * TIME_FACTOR)
  78. // For a standard Icarus REV3
  79. #define ICARUS_REV3_HASH_TIME 0.00000000264083
  80. // Icarus Rev3 doesn't send a completion message when it finishes
  81. // the full nonce range, so to avoid being idle we must abort the
  82. // work (by starting a new work) shortly before it finishes
  83. //
  84. // Thus we need to estimate 2 things:
  85. // 1) How many hashes were done if the work was aborted
  86. // 2) How high can the timeout be before the Icarus is idle,
  87. // to minimise the number of work started
  88. // We set 2) to 'the calculated estimate' - 1
  89. // to ensure the estimate ends before idle
  90. //
  91. // The simple calculation used is:
  92. // Tn = Total time in seconds to calculate n hashes
  93. // Hs = seconds per hash
  94. // Xn = number of hashes
  95. // W = code overhead per work
  96. //
  97. // Rough but reasonable estimate:
  98. // Tn = Hs * Xn + W (of the form y = mx + b)
  99. //
  100. // Thus:
  101. // Line of best fit (using least squares)
  102. //
  103. // Hs = (n*Sum(XiTi)-Sum(Xi)*Sum(Ti))/(n*Sum(Xi^2)-Sum(Xi)^2)
  104. // W = Sum(Ti)/n - (Hs*Sum(Xi))/n
  105. //
  106. // N.B. W is less when aborting work since we aren't waiting for the reply
  107. // to be transferred back (ICARUS_READ_TIME)
  108. // Calculating the hashes aborted at n seconds is thus just n/Hs
  109. // (though this is still a slight overestimate due to code delays)
  110. //
  111. // Both below must be exceeded to complete a set of data
  112. // Minimum how long after the first, the last data point must be
  113. #define HISTORY_SEC 60
  114. // Minimum how many points a single ICARUS_HISTORY should have
  115. #define MIN_DATA_COUNT 5
  116. // The value above used is doubled each history until it exceeds:
  117. #define MAX_MIN_DATA_COUNT 100
  118. #if (TIME_FACTOR != 10)
  119. #error TIME_FACTOR must be 10
  120. #endif
  121. static struct timeval history_sec = { HISTORY_SEC, 0 };
  122. static const char *MODE_DEFAULT_STR = "default";
  123. static const char *MODE_SHORT_STR = "short";
  124. static const char *MODE_SHORT_STREQ = "short=";
  125. static const char *MODE_LONG_STR = "long";
  126. static const char *MODE_LONG_STREQ = "long=";
  127. static const char *MODE_VALUE_STR = "value";
  128. static const char *MODE_UNKNOWN_STR = "unknown";
  129. #define END_CONDITION 0x0000ffff
  130. #define DEFAULT_DETECT_THRESHOLD 1
  131. BFG_REGISTER_DRIVER(icarus_drv)
  132. extern const struct bfg_set_device_definition icarus_set_device_funcs[];
  133. extern void convert_icarus_to_cairnsmore(struct cgpu_info *);
  134. static void rev(unsigned char *s, size_t l)
  135. {
  136. size_t i, j;
  137. unsigned char t;
  138. for (i = 0, j = l - 1; i < j; i++, j--) {
  139. t = s[i];
  140. s[i] = s[j];
  141. s[j] = t;
  142. }
  143. }
  144. #define icarus_open2(devpath, baud, purge) serial_open(devpath, baud, ICARUS_READ_FAULT_DECISECONDS, purge)
  145. #define icarus_open(devpath, baud) icarus_open2(devpath, baud, false)
  146. int icarus_gets(unsigned char *buf, int fd, struct timeval *tv_finish, struct thr_info *thr, int read_count, int read_size)
  147. {
  148. ssize_t ret = 0;
  149. int rc = 0;
  150. int epollfd = -1;
  151. int epoll_timeout = ICARUS_READ_FAULT_DECISECONDS * 100;
  152. int read_amount = read_size;
  153. bool first = true;
  154. #ifdef HAVE_EPOLL
  155. struct epoll_event ev = {
  156. .events = EPOLLIN,
  157. .data.fd = fd,
  158. };
  159. struct epoll_event evr[2];
  160. if (thr && thr->work_restart_notifier[1] != -1) {
  161. epollfd = epoll_create(2);
  162. if (epollfd != -1) {
  163. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, fd, &ev)) {
  164. close(epollfd);
  165. epollfd = -1;
  166. }
  167. {
  168. ev.data.fd = thr->work_restart_notifier[0];
  169. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, thr->work_restart_notifier[0], &ev))
  170. applog(LOG_ERR, "%s: Error adding work restart fd to epoll", __func__);
  171. else
  172. {
  173. epoll_timeout *= read_count;
  174. read_count = 1;
  175. }
  176. }
  177. }
  178. else
  179. applog(LOG_ERR, "%s: Error creating epoll", __func__);
  180. }
  181. #endif
  182. // Read reply 1 byte at a time to get earliest tv_finish
  183. while (true) {
  184. #ifdef HAVE_EPOLL
  185. if (epollfd != -1 && (ret = epoll_wait(epollfd, evr, 2, epoll_timeout)) != -1)
  186. {
  187. if (ret == 1 && evr[0].data.fd == fd)
  188. ret = read(fd, buf, 1);
  189. else
  190. {
  191. if (ret)
  192. notifier_read(thr->work_restart_notifier);
  193. ret = 0;
  194. }
  195. }
  196. else
  197. #endif
  198. ret = read(fd, buf, 1);
  199. if (ret < 0)
  200. return ICA_GETS_ERROR;
  201. if (first)
  202. cgtime(tv_finish);
  203. if (ret >= read_amount)
  204. {
  205. if (epollfd != -1)
  206. close(epollfd);
  207. return ICA_GETS_OK;
  208. }
  209. if (ret > 0) {
  210. buf += ret;
  211. read_amount -= ret;
  212. first = false;
  213. continue;
  214. }
  215. if (thr && thr->work_restart) {
  216. if (epollfd != -1)
  217. close(epollfd);
  218. applog(LOG_DEBUG, "%s: Interrupted by work restart", __func__);
  219. return ICA_GETS_RESTART;
  220. }
  221. rc++;
  222. if (rc >= read_count) {
  223. if (epollfd != -1)
  224. close(epollfd);
  225. applog(LOG_DEBUG, "%s: No data in %.2f seconds",
  226. __func__,
  227. (float)rc * epoll_timeout / 1000.);
  228. return ICA_GETS_TIMEOUT;
  229. }
  230. }
  231. }
  232. int icarus_write(int fd, const void *buf, size_t bufLen)
  233. {
  234. size_t ret;
  235. if (unlikely(fd == -1))
  236. return 1;
  237. ret = write(fd, buf, bufLen);
  238. if (unlikely(ret != bufLen))
  239. return 1;
  240. return 0;
  241. }
  242. #define icarus_close(fd) serial_close(fd)
  243. static void do_icarus_close(struct thr_info *thr)
  244. {
  245. struct cgpu_info *icarus = thr->cgpu;
  246. const int fd = icarus->device_fd;
  247. if (fd == -1)
  248. return;
  249. icarus_close(fd);
  250. icarus->device_fd = -1;
  251. }
  252. static const char *timing_mode_str(enum timing_mode timing_mode)
  253. {
  254. switch(timing_mode) {
  255. case MODE_DEFAULT:
  256. return MODE_DEFAULT_STR;
  257. case MODE_SHORT:
  258. return MODE_SHORT_STR;
  259. case MODE_LONG:
  260. return MODE_LONG_STR;
  261. case MODE_VALUE:
  262. return MODE_VALUE_STR;
  263. default:
  264. return MODE_UNKNOWN_STR;
  265. }
  266. }
  267. static
  268. const char *icarus_set_timing(struct cgpu_info * const proc, const char * const optname, const char * const buf, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  269. {
  270. struct ICARUS_INFO * const info = proc->device_data;
  271. double Hs;
  272. char *eq;
  273. if (strcasecmp(buf, MODE_SHORT_STR) == 0) {
  274. // short
  275. info->read_count = ICARUS_READ_COUNT_TIMING;
  276. info->read_count_limit = 0; // 0 = no limit
  277. info->timing_mode = MODE_SHORT;
  278. info->do_icarus_timing = true;
  279. } else if (strncasecmp(buf, MODE_SHORT_STREQ, strlen(MODE_SHORT_STREQ)) == 0) {
  280. // short=limit
  281. info->read_count = ICARUS_READ_COUNT_TIMING;
  282. info->timing_mode = MODE_SHORT;
  283. info->do_icarus_timing = true;
  284. info->read_count_limit = atoi(&buf[strlen(MODE_SHORT_STREQ)]);
  285. if (info->read_count_limit < 0)
  286. info->read_count_limit = 0;
  287. if (info->read_count_limit > ICARUS_READ_COUNT_LIMIT_MAX)
  288. info->read_count_limit = ICARUS_READ_COUNT_LIMIT_MAX;
  289. } else if (strcasecmp(buf, MODE_LONG_STR) == 0) {
  290. // long
  291. info->read_count = ICARUS_READ_COUNT_TIMING;
  292. info->read_count_limit = 0; // 0 = no limit
  293. info->timing_mode = MODE_LONG;
  294. info->do_icarus_timing = true;
  295. } else if (strncasecmp(buf, MODE_LONG_STREQ, strlen(MODE_LONG_STREQ)) == 0) {
  296. // long=limit
  297. info->read_count = ICARUS_READ_COUNT_TIMING;
  298. info->timing_mode = MODE_LONG;
  299. info->do_icarus_timing = true;
  300. info->read_count_limit = atoi(&buf[strlen(MODE_LONG_STREQ)]);
  301. if (info->read_count_limit < 0)
  302. info->read_count_limit = 0;
  303. if (info->read_count_limit > ICARUS_READ_COUNT_LIMIT_MAX)
  304. info->read_count_limit = ICARUS_READ_COUNT_LIMIT_MAX;
  305. } else if ((Hs = atof(buf)) != 0) {
  306. // ns[=read_count]
  307. info->Hs = Hs / NANOSEC;
  308. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  309. info->read_count = 0;
  310. if ((eq = strchr(buf, '=')) != NULL)
  311. info->read_count = atoi(eq+1);
  312. if (info->read_count < 1)
  313. info->read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  314. if (unlikely(info->read_count < 1))
  315. info->read_count = 1;
  316. info->read_count_limit = 0; // 0 = no limit
  317. info->timing_mode = MODE_VALUE;
  318. info->do_icarus_timing = false;
  319. } else {
  320. // Anything else in buf just uses DEFAULT mode
  321. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  322. info->read_count = 0;
  323. if ((eq = strchr(buf, '=')) != NULL)
  324. info->read_count = atoi(eq+1);
  325. int def_read_count = ICARUS_READ_COUNT_TIMING;
  326. if (info->timing_mode == MODE_DEFAULT) {
  327. if (proc->drv == &icarus_drv) {
  328. info->do_default_detection = 0x10;
  329. } else {
  330. def_read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  331. }
  332. info->do_icarus_timing = false;
  333. }
  334. if (info->read_count < 1)
  335. info->read_count = def_read_count;
  336. info->read_count_limit = 0; // 0 = no limit
  337. }
  338. info->min_data_count = MIN_DATA_COUNT;
  339. applog(LOG_DEBUG, "%"PRIpreprv": Init: mode=%s read_count=%d limit=%dms Hs=%e",
  340. proc->proc_repr,
  341. timing_mode_str(info->timing_mode),
  342. info->read_count, info->read_count_limit, info->Hs);
  343. return NULL;
  344. }
  345. static uint32_t mask(int work_division)
  346. {
  347. uint32_t nonce_mask = 0x7fffffff;
  348. // yes we can calculate these, but this way it's easy to see what they are
  349. switch (work_division) {
  350. case 1:
  351. nonce_mask = 0xffffffff;
  352. break;
  353. case 2:
  354. nonce_mask = 0x7fffffff;
  355. break;
  356. case 4:
  357. nonce_mask = 0x3fffffff;
  358. break;
  359. case 8:
  360. nonce_mask = 0x1fffffff;
  361. break;
  362. default:
  363. quit(1, "Invalid2 work_division (%d) must be 1, 2, 4 or 8", work_division);
  364. }
  365. return nonce_mask;
  366. }
  367. // Number of bytes remaining after reading a nonce from Icarus
  368. int icarus_excess_nonce_size(int fd, struct ICARUS_INFO *info)
  369. {
  370. // How big a buffer?
  371. int excess_size = info->read_size - ICARUS_NONCE_SIZE;
  372. // Try to read one more to ensure the device doesn't return
  373. // more than we want for this driver
  374. excess_size++;
  375. unsigned char excess_bin[excess_size];
  376. // Read excess_size from Icarus
  377. struct timeval tv_now;
  378. timer_set_now(&tv_now);
  379. //icarus_gets(excess_bin, fd, &tv_now, NULL, 1, excess_size);
  380. int bytes_read = read(fd, excess_bin, excess_size);
  381. // Number of bytes that were still available
  382. return bytes_read;
  383. }
  384. bool icarus_detect_custom(const char *devpath, struct device_drv *api, struct ICARUS_INFO *info)
  385. {
  386. struct timeval tv_start, tv_finish;
  387. int fd;
  388. // Block 171874 nonce = (0xa2870100) = 0x000187a2
  389. // N.B. golden_ob MUST take less time to calculate
  390. // than the timeout set in icarus_open()
  391. // This one takes ~0.53ms on Rev3 Icarus
  392. const char golden_ob[] =
  393. "4679ba4ec99876bf4bfe086082b40025"
  394. "4df6c356451471139a3afa71e48f544a"
  395. "00000000000000000000000000000000"
  396. "0000000087320b1a1426674f2fa722ce";
  397. /* NOTE: This gets sent to basically every port specified in --scan-serial,
  398. * even ones that aren't Icarus; be sure they can all handle it, when
  399. * this is changed...
  400. * BitForce: Ignores entirely
  401. * ModMiner: Starts (useless) work, gets back to clean state
  402. */
  403. const char golden_nonce[] = "000187a2";
  404. unsigned char ob_bin[64], nonce_bin[ICARUS_NONCE_SIZE];
  405. char nonce_hex[(sizeof(nonce_bin) * 2) + 1];
  406. drv_set_defaults(api, icarus_set_device_funcs, info, devpath, detectone_meta_info.serial, 1);
  407. int baud = info->baud;
  408. int work_division = info->work_division;
  409. int fpga_count = info->fpga_count;
  410. applog(LOG_DEBUG, "%s: Attempting to open %s", api->dname, devpath);
  411. fd = icarus_open2(devpath, baud, true);
  412. if (unlikely(fd == -1)) {
  413. applog(LOG_DEBUG, "%s: Failed to open %s", api->dname, devpath);
  414. return false;
  415. }
  416. // Set a default so that individual drivers need not specify
  417. // e.g. Cairnsmore
  418. if (info->read_size == 0)
  419. info->read_size = ICARUS_DEFAULT_READ_SIZE;
  420. hex2bin(ob_bin, golden_ob, sizeof(ob_bin));
  421. icarus_write(fd, ob_bin, sizeof(ob_bin));
  422. cgtime(&tv_start);
  423. memset(nonce_bin, 0, sizeof(nonce_bin));
  424. // Do not use info->read_size here, instead read exactly ICARUS_NONCE_SIZE
  425. // We will then compare the bytes left in fd with info->read_size to determine
  426. // if this is a valid device
  427. icarus_gets(nonce_bin, fd, &tv_finish, NULL, 1, ICARUS_NONCE_SIZE);
  428. // How many bytes were left after reading the above nonce
  429. int bytes_left = icarus_excess_nonce_size(fd, info);
  430. icarus_close(fd);
  431. bin2hex(nonce_hex, nonce_bin, sizeof(nonce_bin));
  432. if (strncmp(nonce_hex, golden_nonce, 8)) {
  433. applog(LOG_DEBUG,
  434. "%s: "
  435. "Test failed at %s: get %s, should: %s",
  436. api->dname,
  437. devpath, nonce_hex, golden_nonce);
  438. return false;
  439. }
  440. if (info->read_size - ICARUS_NONCE_SIZE != bytes_left)
  441. {
  442. applog(LOG_DEBUG,
  443. "%s: "
  444. "Test failed at %s: expected %d bytes, got %d",
  445. api->dname,
  446. devpath, info->read_size, ICARUS_NONCE_SIZE + bytes_left);
  447. return false;
  448. }
  449. applog(LOG_DEBUG,
  450. "%s: "
  451. "Test succeeded at %s: got %s",
  452. api->dname,
  453. devpath, nonce_hex);
  454. if (serial_claim_v(devpath, api))
  455. return false;
  456. /* We have a real Icarus! */
  457. struct cgpu_info *icarus;
  458. icarus = calloc(1, sizeof(struct cgpu_info));
  459. icarus->drv = api;
  460. icarus->device_path = strdup(devpath);
  461. icarus->device_fd = -1;
  462. icarus->threads = 1;
  463. icarus->set_device_funcs = icarus_set_device_funcs;
  464. add_cgpu(icarus);
  465. applog(LOG_INFO, "Found %"PRIpreprv" at %s",
  466. icarus->proc_repr,
  467. devpath);
  468. applog(LOG_DEBUG, "%"PRIpreprv": Init: baud=%d work_division=%d fpga_count=%d",
  469. icarus->proc_repr,
  470. baud, work_division, fpga_count);
  471. icarus->device_data = info;
  472. timersub(&tv_finish, &tv_start, &(info->golden_tv));
  473. icarus_set_timing(icarus, NULL, "", NULL, NULL);
  474. return true;
  475. }
  476. static bool icarus_detect_one(const char *devpath)
  477. {
  478. struct ICARUS_INFO *info = calloc(1, sizeof(struct ICARUS_INFO));
  479. if (unlikely(!info))
  480. quit(1, "Failed to malloc ICARUS_INFO");
  481. // TODO: try some higher speeds with the Icarus and BFL to see
  482. // if they support them and if setting them makes any difference
  483. // N.B. B3000000 doesn't work on Icarus
  484. info->baud = ICARUS_IO_SPEED;
  485. info->reopen_mode = IRM_TIMEOUT;
  486. info->Hs = ICARUS_REV3_HASH_TIME;
  487. info->timing_mode = MODE_DEFAULT;
  488. info->read_size = ICARUS_DEFAULT_READ_SIZE;
  489. if (!icarus_detect_custom(devpath, &icarus_drv, info)) {
  490. free(info);
  491. return false;
  492. }
  493. return true;
  494. }
  495. static
  496. bool icarus_lowl_probe(const struct lowlevel_device_info * const info)
  497. {
  498. return vcom_lowl_probe_wrapper(info, icarus_detect_one);
  499. }
  500. static bool icarus_prepare(struct thr_info *thr)
  501. {
  502. struct cgpu_info *icarus = thr->cgpu;
  503. struct icarus_state *state;
  504. thr->cgpu_data = state = calloc(1, sizeof(*state));
  505. state->firstrun = true;
  506. #ifdef HAVE_EPOLL
  507. int epollfd = epoll_create(2);
  508. if (epollfd != -1)
  509. {
  510. close(epollfd);
  511. notifier_init(thr->work_restart_notifier);
  512. }
  513. #endif
  514. icarus->status = LIFE_INIT2;
  515. return true;
  516. }
  517. static bool icarus_init(struct thr_info *thr)
  518. {
  519. struct cgpu_info *icarus = thr->cgpu;
  520. struct ICARUS_INFO *info = icarus->device_data;
  521. int fd = icarus_open2(icarus->device_path, info->baud, true);
  522. icarus->device_fd = fd;
  523. if (unlikely(-1 == fd)) {
  524. applog(LOG_ERR, "%s: Failed to open %s",
  525. icarus->dev_repr,
  526. icarus->device_path);
  527. return false;
  528. }
  529. applog(LOG_INFO, "%s: Opened %s", icarus->dev_repr, icarus->device_path);
  530. if (!info->work_division)
  531. {
  532. struct timeval tv_finish;
  533. // For reading the nonce from Icarus
  534. unsigned char res_bin[info->read_size];
  535. // For storing the the 32-bit nonce
  536. uint32_t res;
  537. applog(LOG_DEBUG, "%"PRIpreprv": Work division not specified - autodetecting", icarus->proc_repr);
  538. // Special packet to probe work_division
  539. unsigned char pkt[64] =
  540. "\x2e\x4c\x8f\x91\xfd\x59\x5d\x2d\x7e\xa2\x0a\xaa\xcb\x64\xa2\xa0"
  541. "\x43\x82\x86\x02\x77\xcf\x26\xb6\xa1\xee\x04\xc5\x6a\x5b\x50\x4a"
  542. "BFGMiner Probe\0\0"
  543. "BFG\0\x64\x61\x01\x1a\xc9\x06\xa9\x51\xfb\x9b\x3c\x73";
  544. icarus_write(fd, pkt, sizeof(pkt));
  545. memset(res_bin, 0, sizeof(res_bin));
  546. if (ICA_GETS_OK == icarus_gets(res_bin, fd, &tv_finish, NULL, info->read_count, info->read_size))
  547. {
  548. memcpy(&res, res_bin, sizeof(res));
  549. res = be32toh(res);
  550. }
  551. else
  552. res = 0;
  553. switch (res) {
  554. case 0x04C0FDB4:
  555. info->work_division = 1;
  556. break;
  557. case 0x82540E46:
  558. info->work_division = 2;
  559. break;
  560. case 0x417C0F36:
  561. info->work_division = 4;
  562. break;
  563. case 0x60C994D5:
  564. info->work_division = 8;
  565. break;
  566. default:
  567. applog(LOG_ERR, "%"PRIpreprv": Work division autodetection failed (assuming 2): got %08x", icarus->proc_repr, res);
  568. info->work_division = 2;
  569. }
  570. applog(LOG_DEBUG, "%"PRIpreprv": Work division autodetection got %08x (=%d)", icarus->proc_repr, res, info->work_division);
  571. }
  572. if (!info->fpga_count)
  573. info->fpga_count = info->work_division;
  574. info->nonce_mask = mask(info->work_division);
  575. return true;
  576. }
  577. static bool icarus_reopen(struct cgpu_info *icarus, struct icarus_state *state, int *fdp)
  578. {
  579. struct ICARUS_INFO *info = icarus->device_data;
  580. // Reopen the serial port to workaround a USB-host-chipset-specific issue with the Icarus's buggy USB-UART
  581. do_icarus_close(icarus->thr[0]);
  582. *fdp = icarus->device_fd = icarus_open(icarus->device_path, info->baud);
  583. if (unlikely(-1 == *fdp)) {
  584. applog(LOG_ERR, "%"PRIpreprv": Failed to reopen on %s", icarus->proc_repr, icarus->device_path);
  585. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  586. state->firstrun = true;
  587. return false;
  588. }
  589. return true;
  590. }
  591. static
  592. bool icarus_job_prepare(struct thr_info *thr, struct work *work, __maybe_unused uint64_t max_nonce)
  593. {
  594. struct cgpu_info * const icarus = thr->cgpu;
  595. struct icarus_state * const state = thr->cgpu_data;
  596. uint8_t * const ob_bin = state->ob_bin;
  597. memcpy(ob_bin, work->midstate, 32);
  598. memcpy(ob_bin + 52, work->data + 64, 12);
  599. if (!(memcmp(&ob_bin[56], "\xff\xff\xff\xff", 4)
  600. || memcmp(&ob_bin, "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0", 32))) {
  601. // This sequence is used on cairnsmore bitstreams for commands, NEVER send it otherwise
  602. applog(LOG_WARNING, "%"PRIpreprv": Received job attempting to send a command, corrupting it!",
  603. icarus->proc_repr);
  604. ob_bin[56] = 0;
  605. }
  606. rev(ob_bin, 32);
  607. rev(ob_bin + 52, 12);
  608. return true;
  609. }
  610. static bool icarus_job_start(struct thr_info *thr)
  611. {
  612. struct cgpu_info *icarus = thr->cgpu;
  613. struct ICARUS_INFO *info = icarus->device_data;
  614. struct icarus_state *state = thr->cgpu_data;
  615. const uint8_t * const ob_bin = state->ob_bin;
  616. int fd = icarus->device_fd;
  617. int ret;
  618. // Handle dynamic clocking for "subclass" devices
  619. // This needs to run before sending next job, since it hashes the command too
  620. if (info->dclk.freqM && likely(!state->firstrun)) {
  621. dclk_preUpdate(&info->dclk);
  622. dclk_updateFreq(&info->dclk, info->dclk_change_clock_func, thr);
  623. }
  624. cgtime(&state->tv_workstart);
  625. ret = icarus_write(fd, ob_bin, 64);
  626. if (ret) {
  627. do_icarus_close(thr);
  628. applog(LOG_ERR, "%"PRIpreprv": Comms error (werr=%d)", icarus->proc_repr, ret);
  629. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  630. return false; /* This should never happen */
  631. }
  632. if (opt_debug) {
  633. char ob_hex[129];
  634. bin2hex(ob_hex, ob_bin, 64);
  635. applog(LOG_DEBUG, "%"PRIpreprv" sent: %s",
  636. icarus->proc_repr,
  637. ob_hex);
  638. }
  639. return true;
  640. }
  641. static
  642. struct work *icarus_process_worknonce(struct icarus_state *state, uint32_t *nonce)
  643. {
  644. *nonce = be32toh(*nonce);
  645. if (test_nonce(state->last_work, *nonce, false))
  646. return state->last_work;
  647. if (likely(state->last2_work && test_nonce(state->last2_work, *nonce, false)))
  648. return state->last2_work;
  649. return NULL;
  650. }
  651. static
  652. void handle_identify(struct thr_info * const thr, int ret, const bool was_first_run)
  653. {
  654. const struct cgpu_info * const icarus = thr->cgpu;
  655. const struct ICARUS_INFO * const info = icarus->device_data;
  656. struct icarus_state * const state = thr->cgpu_data;
  657. int fd = icarus->device_fd;
  658. struct timeval tv_now;
  659. double delapsed;
  660. // For reading the nonce from Icarus
  661. unsigned char nonce_bin[info->read_size];
  662. // For storing the the 32-bit nonce
  663. uint32_t nonce;
  664. if (fd == -1)
  665. return;
  666. // If identify is requested (block erupters):
  667. // 1. Don't start the next job right away (above)
  668. // 2. Wait for the current job to complete 100%
  669. if (!was_first_run)
  670. {
  671. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Waiting for current job to finish", icarus->proc_repr);
  672. while (true)
  673. {
  674. cgtime(&tv_now);
  675. delapsed = tdiff(&tv_now, &state->tv_workstart);
  676. if (delapsed + 0.1 > info->fullnonce)
  677. break;
  678. // Try to get more nonces (ignoring work restart)
  679. memset(nonce_bin, 0, sizeof(nonce_bin));
  680. ret = icarus_gets(nonce_bin, fd, &tv_now, NULL, (info->fullnonce - delapsed) * 10, info->read_size);
  681. if (ret == ICA_GETS_OK)
  682. {
  683. memcpy(&nonce, nonce_bin, sizeof(nonce));
  684. nonce = be32toh(nonce);
  685. submit_nonce(thr, state->last_work, nonce);
  686. }
  687. }
  688. }
  689. else
  690. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Current job should already be finished", icarus->proc_repr);
  691. // 3. Delay 3 more seconds
  692. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Leaving idle for 3 seconds", icarus->proc_repr);
  693. cgsleep_ms(3000);
  694. // Check for work restart in the meantime
  695. if (thr->work_restart)
  696. {
  697. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Work restart requested during delay", icarus->proc_repr);
  698. goto no_job_start;
  699. }
  700. // 4. Start next job
  701. if (!state->firstrun)
  702. {
  703. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Starting next job", icarus->proc_repr);
  704. if (!icarus_job_start(thr))
  705. no_job_start:
  706. state->firstrun = true;
  707. }
  708. state->identify = false;
  709. }
  710. static
  711. void icarus_transition_work(struct icarus_state *state, struct work *work)
  712. {
  713. if (state->last2_work)
  714. free_work(state->last2_work);
  715. state->last2_work = state->last_work;
  716. state->last_work = copy_work(work);
  717. }
  718. static int64_t icarus_scanhash(struct thr_info *thr, struct work *work,
  719. __maybe_unused int64_t max_nonce)
  720. {
  721. struct cgpu_info *icarus;
  722. int fd;
  723. int ret;
  724. struct ICARUS_INFO *info;
  725. struct work *nonce_work;
  726. int64_t hash_count;
  727. struct timeval tv_start = {.tv_sec=0}, elapsed;
  728. struct timeval tv_history_start, tv_history_finish;
  729. double Ti, Xi;
  730. int i;
  731. bool was_hw_error = false;
  732. bool was_first_run;
  733. struct ICARUS_HISTORY *history0, *history;
  734. int count;
  735. double Hs, W, fullnonce;
  736. int read_count;
  737. bool limited;
  738. int64_t estimate_hashes;
  739. uint32_t values;
  740. int64_t hash_count_range;
  741. elapsed.tv_sec = elapsed.tv_usec = 0;
  742. icarus = thr->cgpu;
  743. struct icarus_state *state = thr->cgpu_data;
  744. was_first_run = state->firstrun;
  745. icarus_job_prepare(thr, work, max_nonce);
  746. // Wait for the previous run's result
  747. fd = icarus->device_fd;
  748. info = icarus->device_data;
  749. // For reading the nonce from Icarus
  750. unsigned char nonce_bin[info->read_size];
  751. // For storing the the 32-bit nonce
  752. uint32_t nonce;
  753. if (unlikely(fd == -1) && !icarus_reopen(icarus, state, &fd))
  754. return -1;
  755. if (!state->firstrun) {
  756. if (state->changework)
  757. {
  758. state->changework = false;
  759. ret = ICA_GETS_RESTART;
  760. }
  761. else
  762. {
  763. read_count = info->read_count;
  764. keepwaiting:
  765. /* Icarus will return info->read_size bytes nonces or nothing */
  766. memset(nonce_bin, 0, sizeof(nonce_bin));
  767. ret = icarus_gets(nonce_bin, fd, &state->tv_workfinish, thr, read_count, info->read_size);
  768. switch (ret) {
  769. case ICA_GETS_RESTART:
  770. // The prepared work is invalid, and the current work is abandoned
  771. // Go back to the main loop to get the next work, and stuff
  772. // Returning to the main loop will clear work_restart, so use a flag...
  773. state->changework = true;
  774. return 0;
  775. case ICA_GETS_ERROR:
  776. do_icarus_close(thr);
  777. applog(LOG_ERR, "%"PRIpreprv": Comms error (rerr)", icarus->proc_repr);
  778. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  779. if (!icarus_reopen(icarus, state, &fd))
  780. return -1;
  781. break;
  782. case ICA_GETS_TIMEOUT:
  783. if (info->reopen_mode == IRM_TIMEOUT && !icarus_reopen(icarus, state, &fd))
  784. return -1;
  785. case ICA_GETS_OK:
  786. break;
  787. }
  788. }
  789. tv_start = state->tv_workstart;
  790. timersub(&state->tv_workfinish, &tv_start, &elapsed);
  791. }
  792. else
  793. {
  794. if (fd == -1 && !icarus_reopen(icarus, state, &fd))
  795. return -1;
  796. // First run; no nonce, no hashes done
  797. ret = ICA_GETS_ERROR;
  798. }
  799. #ifndef WIN32
  800. tcflush(fd, TCOFLUSH);
  801. #endif
  802. if (ret == ICA_GETS_OK)
  803. {
  804. memcpy(&nonce, nonce_bin, sizeof(nonce));
  805. nonce_work = icarus_process_worknonce(state, &nonce);
  806. if (likely(nonce_work))
  807. {
  808. if (nonce_work == state->last2_work)
  809. {
  810. // nonce was for the last job; submit and keep processing the current one
  811. submit_nonce(thr, nonce_work, nonce);
  812. goto keepwaiting;
  813. }
  814. if (info->continue_search)
  815. {
  816. read_count = info->read_count - ((timer_elapsed_us(&state->tv_workstart, NULL) / (1000000 / TIME_FACTOR)) + 1);
  817. if (read_count)
  818. {
  819. submit_nonce(thr, nonce_work, nonce);
  820. goto keepwaiting;
  821. }
  822. }
  823. }
  824. else
  825. was_hw_error = true;
  826. }
  827. // Handle dynamic clocking for "subclass" devices
  828. // This needs to run before sending next job, since it hashes the command too
  829. if (info->dclk.freqM && likely(ret == ICA_GETS_OK || ret == ICA_GETS_TIMEOUT)) {
  830. int qsec = ((4 * elapsed.tv_sec) + (elapsed.tv_usec / 250000)) ?: 1;
  831. for (int n = qsec; n; --n)
  832. dclk_gotNonces(&info->dclk);
  833. if (was_hw_error)
  834. dclk_errorCount(&info->dclk, qsec);
  835. }
  836. // Force a USB close/reopen on any hw error (or on request, eg for baud change)
  837. if (was_hw_error || info->reopen_now)
  838. {
  839. info->reopen_now = false;
  840. if (info->reopen_mode == IRM_CYCLE)
  841. {} // Do nothing here, we reopen after sending the job
  842. else
  843. if (!icarus_reopen(icarus, state, &fd))
  844. state->firstrun = true;
  845. }
  846. if (unlikely(state->identify))
  847. {
  848. // Delay job start until later...
  849. }
  850. else
  851. if (unlikely(icarus->deven != DEV_ENABLED || !icarus_job_start(thr)))
  852. state->firstrun = true;
  853. if (info->reopen_mode == IRM_CYCLE && !icarus_reopen(icarus, state, &fd))
  854. state->firstrun = true;
  855. work->blk.nonce = 0xffffffff;
  856. if (ret == ICA_GETS_ERROR) {
  857. state->firstrun = false;
  858. icarus_transition_work(state, work);
  859. hash_count = 0;
  860. goto out;
  861. }
  862. // OK, done starting Icarus's next job... now process the last run's result!
  863. // aborted before becoming idle, get new work
  864. if (ret == ICA_GETS_TIMEOUT || ret == ICA_GETS_RESTART) {
  865. icarus_transition_work(state, work);
  866. // ONLY up to just when it aborted
  867. // We didn't read a reply so we don't subtract ICARUS_READ_TIME
  868. estimate_hashes = ((double)(elapsed.tv_sec)
  869. + ((double)(elapsed.tv_usec))/((double)1000000)) / info->Hs;
  870. // If some Serial-USB delay allowed the full nonce range to
  871. // complete it can't have done more than a full nonce
  872. if (unlikely(estimate_hashes > 0xffffffff))
  873. estimate_hashes = 0xffffffff;
  874. applog(LOG_DEBUG, "%"PRIpreprv" no nonce = 0x%08"PRIx64" hashes (%"PRId64".%06lus)",
  875. icarus->proc_repr,
  876. (uint64_t)estimate_hashes,
  877. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  878. hash_count = estimate_hashes;
  879. goto out;
  880. }
  881. // Only ICA_GETS_OK gets here
  882. if (likely(!was_hw_error))
  883. submit_nonce(thr, nonce_work, nonce);
  884. else
  885. inc_hw_errors(thr, state->last_work, nonce);
  886. icarus_transition_work(state, work);
  887. hash_count = (nonce & info->nonce_mask);
  888. hash_count++;
  889. hash_count *= info->fpga_count;
  890. applog(LOG_DEBUG, "%"PRIpreprv" nonce = 0x%08x = 0x%08" PRIx64 " hashes (%"PRId64".%06lus)",
  891. icarus->proc_repr,
  892. nonce,
  893. (uint64_t)hash_count,
  894. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  895. if (info->do_default_detection && elapsed.tv_sec >= DEFAULT_DETECT_THRESHOLD) {
  896. int MHs = (double)hash_count / ((double)elapsed.tv_sec * 1e6 + (double)elapsed.tv_usec);
  897. --info->do_default_detection;
  898. applog(LOG_DEBUG, "%"PRIpreprv": Autodetect device speed: %d MH/s", icarus->proc_repr, MHs);
  899. if (MHs <= 370 || MHs > 420) {
  900. // Not a real Icarus: enable short timing
  901. applog(LOG_WARNING, "%"PRIpreprv": Seems too %s to be an Icarus; calibrating with short timing", icarus->proc_repr, MHs>380?"fast":"slow");
  902. info->timing_mode = MODE_SHORT;
  903. info->do_icarus_timing = true;
  904. info->do_default_detection = 0;
  905. }
  906. else
  907. if (MHs <= 380) {
  908. // Real Icarus?
  909. if (!info->do_default_detection) {
  910. applog(LOG_DEBUG, "%"PRIpreprv": Seems to be a real Icarus", icarus->proc_repr);
  911. info->read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  912. }
  913. }
  914. else
  915. if (MHs <= 420) {
  916. // Enterpoint Cairnsmore1
  917. size_t old_repr_len = strlen(icarus->proc_repr);
  918. char old_repr[old_repr_len + 1];
  919. strcpy(old_repr, icarus->proc_repr);
  920. convert_icarus_to_cairnsmore(icarus);
  921. info->do_default_detection = 0;
  922. applog(LOG_WARNING, "%"PRIpreprv": Detected Cairnsmore1 device, upgrading driver to %"PRIpreprv, old_repr, icarus->proc_repr);
  923. }
  924. }
  925. // Ignore possible end condition values ... and hw errors
  926. // TODO: set limitations on calculated values depending on the device
  927. // to avoid crap values caused by CPU/Task Switching/Swapping/etc
  928. if (info->do_icarus_timing
  929. && !was_hw_error
  930. && ((nonce & info->nonce_mask) > END_CONDITION)
  931. && ((nonce & info->nonce_mask) < (info->nonce_mask & ~END_CONDITION))) {
  932. cgtime(&tv_history_start);
  933. history0 = &(info->history[0]);
  934. if (history0->values == 0)
  935. timeradd(&tv_start, &history_sec, &(history0->finish));
  936. Ti = (double)(elapsed.tv_sec)
  937. + ((double)(elapsed.tv_usec))/((double)1000000)
  938. - ((double)ICARUS_READ_TIME(info->baud, info->read_size));
  939. Xi = (double)hash_count;
  940. history0->sumXiTi += Xi * Ti;
  941. history0->sumXi += Xi;
  942. history0->sumTi += Ti;
  943. history0->sumXi2 += Xi * Xi;
  944. history0->values++;
  945. if (history0->hash_count_max < hash_count)
  946. history0->hash_count_max = hash_count;
  947. if (history0->hash_count_min > hash_count || history0->hash_count_min == 0)
  948. history0->hash_count_min = hash_count;
  949. if (history0->values >= info->min_data_count
  950. && timercmp(&tv_start, &(history0->finish), >)) {
  951. for (i = INFO_HISTORY; i > 0; i--)
  952. memcpy(&(info->history[i]),
  953. &(info->history[i-1]),
  954. sizeof(struct ICARUS_HISTORY));
  955. // Initialise history0 to zero for summary calculation
  956. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  957. // We just completed a history data set
  958. // So now recalc read_count based on the whole history thus we will
  959. // initially get more accurate until it completes INFO_HISTORY
  960. // total data sets
  961. count = 0;
  962. for (i = 1 ; i <= INFO_HISTORY; i++) {
  963. history = &(info->history[i]);
  964. if (history->values >= MIN_DATA_COUNT) {
  965. count++;
  966. history0->sumXiTi += history->sumXiTi;
  967. history0->sumXi += history->sumXi;
  968. history0->sumTi += history->sumTi;
  969. history0->sumXi2 += history->sumXi2;
  970. history0->values += history->values;
  971. if (history0->hash_count_max < history->hash_count_max)
  972. history0->hash_count_max = history->hash_count_max;
  973. if (history0->hash_count_min > history->hash_count_min || history0->hash_count_min == 0)
  974. history0->hash_count_min = history->hash_count_min;
  975. }
  976. }
  977. // All history data
  978. Hs = (history0->values*history0->sumXiTi - history0->sumXi*history0->sumTi)
  979. / (history0->values*history0->sumXi2 - history0->sumXi*history0->sumXi);
  980. W = history0->sumTi/history0->values - Hs*history0->sumXi/history0->values;
  981. hash_count_range = history0->hash_count_max - history0->hash_count_min;
  982. values = history0->values;
  983. // Initialise history0 to zero for next data set
  984. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  985. fullnonce = W + Hs * (((double)0xffffffff) + 1);
  986. read_count = (int)(fullnonce * TIME_FACTOR) - 1;
  987. if (info->read_count_limit > 0 && read_count > info->read_count_limit) {
  988. read_count = info->read_count_limit;
  989. limited = true;
  990. } else
  991. limited = false;
  992. info->Hs = Hs;
  993. info->read_count = read_count;
  994. info->fullnonce = fullnonce;
  995. info->count = count;
  996. info->W = W;
  997. info->values = values;
  998. info->hash_count_range = hash_count_range;
  999. if (info->min_data_count < MAX_MIN_DATA_COUNT)
  1000. info->min_data_count *= 2;
  1001. else if (info->timing_mode == MODE_SHORT)
  1002. info->do_icarus_timing = false;
  1003. // applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: read_count=%d%s fullnonce=%fs history count=%d Hs=%e W=%e values=%d hash range=0x%08lx min data count=%u", icarus->proc_repr, read_count, limited ? " (limited)" : "", fullnonce, count, Hs, W, values, hash_count_range, info->min_data_count);
  1004. applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: Hs=%e W=%e read_count=%d%s fullnonce=%.3fs",
  1005. icarus->proc_repr,
  1006. Hs, W, read_count,
  1007. limited ? " (limited)" : "", fullnonce);
  1008. }
  1009. info->history_count++;
  1010. cgtime(&tv_history_finish);
  1011. timersub(&tv_history_finish, &tv_history_start, &tv_history_finish);
  1012. timeradd(&tv_history_finish, &(info->history_time), &(info->history_time));
  1013. }
  1014. out:
  1015. if (unlikely(state->identify))
  1016. handle_identify(thr, ret, was_first_run);
  1017. return hash_count;
  1018. }
  1019. static struct api_data *icarus_drv_stats(struct cgpu_info *cgpu)
  1020. {
  1021. struct api_data *root = NULL;
  1022. struct ICARUS_INFO *info = cgpu->device_data;
  1023. // Warning, access to these is not locked - but we don't really
  1024. // care since hashing performance is way more important than
  1025. // locking access to displaying API debug 'stats'
  1026. // If locking becomes an issue for any of them, use copy_data=true also
  1027. root = api_add_int(root, "read_count", &(info->read_count), false);
  1028. root = api_add_int(root, "read_count_limit", &(info->read_count_limit), false);
  1029. root = api_add_double(root, "fullnonce", &(info->fullnonce), false);
  1030. root = api_add_int(root, "count", &(info->count), false);
  1031. root = api_add_hs(root, "Hs", &(info->Hs), false);
  1032. root = api_add_double(root, "W", &(info->W), false);
  1033. root = api_add_uint(root, "total_values", &(info->values), false);
  1034. root = api_add_uint64(root, "range", &(info->hash_count_range), false);
  1035. root = api_add_uint64(root, "history_count", &(info->history_count), false);
  1036. root = api_add_timeval(root, "history_time", &(info->history_time), false);
  1037. root = api_add_uint(root, "min_data_count", &(info->min_data_count), false);
  1038. root = api_add_uint(root, "timing_values", &(info->history[0].values), false);
  1039. root = api_add_const(root, "timing_mode", timing_mode_str(info->timing_mode), false);
  1040. root = api_add_bool(root, "is_timing", &(info->do_icarus_timing), false);
  1041. root = api_add_int(root, "baud", &(info->baud), false);
  1042. root = api_add_int(root, "work_division", &(info->work_division), false);
  1043. root = api_add_int(root, "fpga_count", &(info->fpga_count), false);
  1044. return root;
  1045. }
  1046. static
  1047. const char *icarus_set_baud(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1048. {
  1049. struct ICARUS_INFO * const info = proc->device_data;
  1050. const int baud = atoi(newvalue);
  1051. if (!valid_baud(baud))
  1052. return "Invalid baud setting";
  1053. if (info->baud != baud)
  1054. {
  1055. info->baud = baud;
  1056. info->reopen_now = true;
  1057. }
  1058. return NULL;
  1059. }
  1060. static
  1061. const char *icarus_set_work_division(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1062. {
  1063. struct ICARUS_INFO * const info = proc->device_data;
  1064. const int work_division = atoi(newvalue);
  1065. if (!(work_division == 1 || work_division == 2 || work_division == 4 || work_division == 8))
  1066. return "Invalid work_division: must be 1, 2, 4 or 8";
  1067. if (info->user_set & IUS_FPGA_COUNT)
  1068. {
  1069. if (info->fpga_count > work_division)
  1070. return "work_division must be >= fpga_count";
  1071. }
  1072. else
  1073. info->fpga_count = work_division;
  1074. info->user_set |= IUS_WORK_DIVISION;
  1075. info->work_division = work_division;
  1076. info->nonce_mask = mask(work_division);
  1077. return NULL;
  1078. }
  1079. static
  1080. const char *icarus_set_fpga_count(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1081. {
  1082. struct ICARUS_INFO * const info = proc->device_data;
  1083. const int fpga_count = atoi(newvalue);
  1084. if (fpga_count < 1 || fpga_count > info->work_division)
  1085. return "Invalid fpga_count: must be >0 and <=work_division";
  1086. info->fpga_count = fpga_count;
  1087. return NULL;
  1088. }
  1089. static
  1090. const char *icarus_set_reopen(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1091. {
  1092. struct ICARUS_INFO * const info = proc->device_data;
  1093. if ((!strcasecmp(newvalue, "never")) || !strcasecmp(newvalue, "-r"))
  1094. info->reopen_mode = IRM_NEVER;
  1095. else
  1096. if (!strcasecmp(newvalue, "timeout"))
  1097. info->reopen_mode = IRM_TIMEOUT;
  1098. else
  1099. if ((!strcasecmp(newvalue, "cycle")) || !strcasecmp(newvalue, "r"))
  1100. info->reopen_mode = IRM_CYCLE;
  1101. else
  1102. if (!strcasecmp(newvalue, "now"))
  1103. info->reopen_now = true;
  1104. else
  1105. return "Invalid reopen mode";
  1106. return NULL;
  1107. }
  1108. static void icarus_shutdown(struct thr_info *thr)
  1109. {
  1110. do_icarus_close(thr);
  1111. free(thr->cgpu_data);
  1112. }
  1113. const struct bfg_set_device_definition icarus_set_device_funcs[] = {
  1114. // NOTE: Order of parameters below is important for --icarus-options
  1115. {"baud" , icarus_set_baud , "serial baud rate"},
  1116. {"work_division", icarus_set_work_division, "number of pieces work is split into"},
  1117. {"fpga_count" , icarus_set_fpga_count , "number of chips working on pieces"},
  1118. {"reopen" , icarus_set_reopen , "how often to reopen device: never, timeout, cycle, (or now for a one-shot reopen)"},
  1119. // NOTE: Below here, order is irrelevant
  1120. {"timing" , icarus_set_timing , "timing of device; see README.FPGA"},
  1121. {NULL},
  1122. };
  1123. struct device_drv icarus_drv = {
  1124. .dname = "icarus",
  1125. .name = "ICA",
  1126. .probe_priority = -115,
  1127. .lowl_probe = icarus_lowl_probe,
  1128. .get_api_stats = icarus_drv_stats,
  1129. .thread_prepare = icarus_prepare,
  1130. .thread_init = icarus_init,
  1131. .scanhash = icarus_scanhash,
  1132. .thread_disable = close_device_fd,
  1133. .thread_shutdown = icarus_shutdown,
  1134. };