libbitfury.c 20 KB

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  1. /*
  2. * Copyright 2013 bitfury
  3. * Copyright 2013 legkodymov
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a copy
  6. * of this software and associated documentation files (the "Software"), to deal
  7. * in the Software without restriction, including without limitation the rights
  8. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  9. * copies of the Software, and to permit persons to whom the Software is
  10. * furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice shall be included in
  13. * all copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  18. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  21. * THE SOFTWARE.
  22. */
  23. #include "config.h"
  24. #include <stdbool.h>
  25. #include <stdint.h>
  26. #include <stdio.h>
  27. #include <unistd.h>
  28. #include <string.h>
  29. #include "logging.h"
  30. #include "miner.h"
  31. #include "libbitfury.h"
  32. #include "spidevc.h"
  33. #include "sha2.h"
  34. #include <time.h>
  35. #define BITFURY_REFRESH_DELAY 100
  36. #define BITFURY_DETECT_TRIES 3000 / BITFURY_REFRESH_DELAY
  37. unsigned decnonce(unsigned in);
  38. /* Configuration registers - control oscillators and such stuff. PROGRAMMED when magic number is matches, UNPROGRAMMED (default) otherwise */
  39. void config_reg(struct spi_port *port, int cfgreg, int ena)
  40. {
  41. static const uint8_t enaconf[4] = { 0xc1, 0x6a, 0x59, 0xe3 };
  42. static const uint8_t disconf[4] = { 0, 0, 0, 0 };
  43. if (ena) spi_emit_data(port, 0x7000+cfgreg*32, enaconf, 4);
  44. else spi_emit_data(port, 0x7000+cfgreg*32, disconf, 4);
  45. }
  46. #define FIRST_BASE 61
  47. #define SECOND_BASE 4
  48. const int8_t counters[16] = { 64, 64,
  49. SECOND_BASE, SECOND_BASE+4, SECOND_BASE+2, SECOND_BASE+2+16, SECOND_BASE, SECOND_BASE+1,
  50. (FIRST_BASE)%65, (FIRST_BASE+1)%65, (FIRST_BASE+3)%65, (FIRST_BASE+3+16)%65, (FIRST_BASE+4)%65, (FIRST_BASE+4+4)%65, (FIRST_BASE+3+3)%65, (FIRST_BASE+3+1+3)%65};
  51. //char counters[16] = { 64, 64,
  52. // SECOND_BASE, SECOND_BASE+4, SECOND_BASE+2, SECOND_BASE+2+16, SECOND_BASE, SECOND_BASE+1,
  53. // (FIRST_BASE)%65, (FIRST_BASE+1)%65, (FIRST_BASE+3)%65, (FIRST_BASE+3+16)%65, (FIRST_BASE+4)%65, (FIRST_BASE+4+4)%65, (FIRST_BASE+3+3)%65, (FIRST_BASE+3+1+3)%65};
  54. /* Oscillator setup variants (maybe more), values inside of chip ANDed to not allow by programming errors work it at higher speeds */
  55. /* WARNING! no chip temperature control limits, etc. It may self-fry and make fried chips with great ease :-) So if trying to overclock */
  56. /* Do not place chip near flammable objects, provide adequate power protection and better wear eye protection ! */
  57. /* Thermal runaway in this case could produce nice flames of chippy fries */
  58. // Thermometer code from left to right - more ones ==> faster clock!
  59. #define rotrFixed(x,y) (((x) >> (y)) | ((x) << (32-(y))))
  60. #define s0(x) (rotrFixed(x,7)^rotrFixed(x,18)^(x>>3))
  61. #define s1(x) (rotrFixed(x,17)^rotrFixed(x,19)^(x>>10))
  62. #define Ch(x,y,z) (z^(x&(y^z)))
  63. #define Maj(x,y,z) (y^((x^y)&(y^z)))
  64. #define S0(x) (rotrFixed(x,2)^rotrFixed(x,13)^rotrFixed(x,22))
  65. #define S1(x) (rotrFixed(x,6)^rotrFixed(x,11)^rotrFixed(x,25))
  66. /* SHA256 CONSTANTS */
  67. static const unsigned SHA_K[64] = {
  68. 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
  69. 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
  70. 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
  71. 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
  72. 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
  73. 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
  74. 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
  75. 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
  76. };
  77. struct timespec t_add(struct timespec time1, struct timespec time2) {
  78. struct timespec result ;
  79. result.tv_sec = time1.tv_sec + time2.tv_sec ;
  80. result.tv_nsec = time1.tv_nsec + time2.tv_nsec ;
  81. if (result.tv_nsec >= 1000000000L) {
  82. result.tv_sec++ ; result.tv_nsec = result.tv_nsec - 1000000000L ;
  83. }
  84. return (result) ;
  85. }
  86. struct timespec t_diff(struct timespec start, struct timespec end)
  87. {
  88. struct timespec temp;
  89. if (end.tv_nsec < start.tv_nsec) {
  90. temp.tv_sec = end.tv_sec-start.tv_sec-1;
  91. temp.tv_nsec = 1000000000LU;
  92. temp.tv_nsec -= start.tv_nsec;
  93. temp.tv_nsec += end.tv_nsec;
  94. } else {
  95. temp.tv_sec = end.tv_sec-start.tv_sec;
  96. temp.tv_nsec = end.tv_nsec-start.tv_nsec;
  97. }
  98. return temp;
  99. }
  100. void ms3_compute(unsigned *p)
  101. {
  102. unsigned a,b,c,d,e,f,g,h, ne, na, i;
  103. a = p[0]; b = p[1]; c = p[2]; d = p[3]; e = p[4]; f = p[5]; g = p[6]; h = p[7];
  104. for (i = 0; i < 3; i++) {
  105. ne = p[i+16] + SHA_K[i] + h + Ch(e,f,g) + S1(e) + d;
  106. na = p[i+16] + SHA_K[i] + h + Ch(e,f,g) + S1(e) + S0(a) + Maj(a,b,c);
  107. d = c; c = b; b = a; a = na;
  108. h = g; g = f; f = e; e = ne;
  109. }
  110. p[15] = a; p[14] = b; p[13] = c; p[12] = d; p[11] = e; p[10] = f; p[9] = g; p[8] = h;
  111. }
  112. void send_conf(struct spi_port *port) {
  113. int i;
  114. for (i = 7; i <= 11; ++i)
  115. config_reg(port, i, 0);
  116. config_reg(port, 6, 0); /* disable OUTSLK */
  117. config_reg(port, 4, 1); /* Enable slow oscillator */
  118. for (i = 1; i <= 3; ++i)
  119. config_reg(port, i, 0);
  120. spi_emit_data(port, 0x0100, counters, 16); /* Program counters correctly for rounds processing, here baby should start consuming power */
  121. }
  122. void send_init(struct spi_port *port) {
  123. /* Prepare internal buffers */
  124. /* PREPARE BUFFERS (INITIAL PROGRAMMING) */
  125. unsigned w[16];
  126. unsigned atrvec[] = {
  127. 0xb0e72d8e, 0x1dc5b862, 0xe9e7c4a6, 0x3050f1f5, 0x8a1a6b7e, 0x7ec384e8, 0x42c1c3fc, 0x8ed158a1, /* MIDSTATE */
  128. 0,0,0,0,0,0,0,0,
  129. 0x8a0bb7b7, 0x33af304f, 0x0b290c1a, 0xf0c4e61f, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  130. };
  131. ms3_compute(&atrvec[0]);
  132. memset(&w, 0, sizeof(w)); w[3] = 0xffffffff; w[4] = 0x80000000; w[15] = 0x00000280;
  133. spi_emit_data(port, 0x1000, w, 16*4);
  134. spi_emit_data(port, 0x1400, w, 8*4);
  135. memset(w, 0, sizeof(w)); w[0] = 0x80000000; w[7] = 0x100;
  136. spi_emit_data(port, 0x1900, &w[0],8*4); /* Prepare MS and W buffers! */
  137. spi_emit_data(port, 0x3000, &atrvec[0], 19*4);
  138. }
  139. void set_freq(struct spi_port *port, int bits) {
  140. uint64_t freq;
  141. const uint8_t *
  142. osc6 = (unsigned char *)&freq;
  143. freq = (1ULL << bits) - 1ULL;
  144. spi_emit_data(port, 0x6000, osc6, 8); /* Program internal on-die slow oscillator frequency */
  145. config_reg(port, 4, 1); /* Enable slow oscillator */
  146. }
  147. void send_reinit(struct spi_port *port, int slot, int chip_n, int n) {
  148. spi_clear_buf(port);
  149. spi_emit_break(port);
  150. spi_emit_fasync(port, chip_n);
  151. set_freq(port, n);
  152. send_conf(port);
  153. send_init(port);
  154. spi_txrx(port);
  155. }
  156. void send_shutdown(struct spi_port *port, int slot, int chip_n) {
  157. spi_clear_buf(port);
  158. spi_emit_break(port);
  159. spi_emit_fasync(port, chip_n);
  160. config_reg(port, 4, 0); /* Disable slow oscillator */
  161. spi_txrx(port);
  162. }
  163. void send_freq(struct spi_port *port, int slot, int chip_n, int bits) {
  164. spi_clear_buf(port);
  165. spi_emit_break(port);
  166. spi_emit_fasync(port, chip_n);
  167. set_freq(port, bits);
  168. spi_txrx(port);
  169. }
  170. unsigned int c_diff(unsigned ocounter, unsigned counter) {
  171. return counter > ocounter ? counter - ocounter : (0x003FFFFF - ocounter) + counter;
  172. }
  173. int get_counter(unsigned int *newbuf, unsigned int *oldbuf) {
  174. int j;
  175. for(j = 0; j < 16; j++) {
  176. if (newbuf[j] != oldbuf[j]) {
  177. unsigned counter = decnonce(newbuf[j]);
  178. if ((counter & 0xFFC00000) == 0xdf800000) {
  179. counter -= 0xdf800000;
  180. return counter;
  181. }
  182. }
  183. }
  184. return 0;
  185. }
  186. int get_diff(unsigned int *newbuf, unsigned int *oldbuf) {
  187. int j;
  188. unsigned counter = 0;
  189. for(j = 0; j < 16; j++) {
  190. if (newbuf[j] != oldbuf[j]) {
  191. counter++;
  192. }
  193. }
  194. return counter;
  195. }
  196. int detect_chip(struct spi_port *port, int chip_n) {
  197. /* Test vectors to calculate (using address-translated loads) */
  198. unsigned atrvec[] = {
  199. 0xb0e72d8e, 0x1dc5b862, 0xe9e7c4a6, 0x3050f1f5, 0x8a1a6b7e, 0x7ec384e8, 0x42c1c3fc, 0x8ed158a1, /* MIDSTATE */
  200. 0,0,0,0,0,0,0,0,
  201. 0x8a0bb7b7, 0x33af304f, 0x0b290c1a, 0xf0c4e61f, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  202. 0x9c4dfdc0, 0xf055c9e1, 0xe60f079d, 0xeeada6da, 0xd459883d, 0xd8049a9d, 0xd49f9a96, 0x15972fed, /* MIDSTATE */
  203. 0,0,0,0,0,0,0,0,
  204. 0x048b2528, 0x7acb2d4f, 0x0b290c1a, 0xbe00084a, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  205. 0x0317b3ea, 0x1d227d06, 0x3cca281e, 0xa6d0b9da, 0x1a359fe2, 0xa7287e27, 0x8b79c296, 0xc4d88274, /* MIDSTATE */
  206. 0,0,0,0,0,0,0,0,
  207. 0x328bcd4f, 0x75462d4f, 0x0b290c1a, 0x002c6dbc, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  208. 0xac4e38b6, 0xba0e3b3b, 0x649ad6f8, 0xf72e4c02, 0x93be06fb, 0x366d1126, 0xf4aae554, 0x4ff19c5b, /* MIDSTATE */
  209. 0,0,0,0,0,0,0,0,
  210. 0x72698140, 0x3bd62b4f, 0x3fd40c1a, 0x801e43e9, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  211. 0x9dbf91c9, 0x12e5066c, 0xf4184b87, 0x8060bc4d, 0x18f9c115, 0xf589d551, 0x0f7f18ae, 0x885aca59, /* MIDSTATE */
  212. 0,0,0,0,0,0,0,0,
  213. 0x6f3806c3, 0x41f82a4f, 0x3fd40c1a, 0x00334b39, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  214. };
  215. int i;
  216. unsigned newbuf[17], oldbuf[17];
  217. unsigned ocounter;
  218. int odiff = 0;
  219. struct timespec t1;
  220. memset(newbuf, 0, 17 * 4);
  221. memset(oldbuf, 0, 17 * 4);
  222. ms3_compute(&atrvec[0]);
  223. ms3_compute(&atrvec[20]);
  224. ms3_compute(&atrvec[40]);
  225. spi_clear_buf(port);
  226. spi_emit_break(port); /* First we want to break chain! Otherwise we'll get all of traffic bounced to output */
  227. spi_emit_fasync(port, chip_n);
  228. set_freq(port, 52); //54 - 3F, 53 - 1F
  229. send_conf(port);
  230. send_init(port);
  231. spi_txrx(port);
  232. ocounter = 0;
  233. for (i = 0; i < BITFURY_DETECT_TRIES; i++) {
  234. int counter;
  235. spi_clear_buf(port);
  236. spi_emit_break(port);
  237. spi_emit_fasync(port, chip_n);
  238. spi_emit_data(port, 0x3000, &atrvec[0], 19*4);
  239. spi_txrx(port);
  240. memcpy(newbuf, spi_getrxbuf(port) + 4 + chip_n, 17*4);
  241. clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &t1);
  242. counter = get_counter(newbuf, oldbuf);
  243. if (ocounter) {
  244. unsigned int cdiff = c_diff(ocounter, counter);
  245. if (cdiff > 5000 && cdiff < 100000 && odiff > 5000 && odiff < 100000)
  246. return 1;
  247. odiff = cdiff;
  248. }
  249. ocounter = counter;
  250. if (newbuf[16] != 0 && newbuf[16] != 0xFFFFFFFF) {
  251. return 0;
  252. }
  253. cgsleep_ms(BITFURY_REFRESH_DELAY / 10);
  254. memcpy(oldbuf, newbuf, 17 * 4);
  255. }
  256. return 0;
  257. }
  258. int libbitfury_detectChips1(struct spi_port *port) {
  259. int n;
  260. for (n = 0; detect_chip(port, n); ++n)
  261. {}
  262. return n;
  263. }
  264. // in = 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10 f e d c b a 9 8 7 6 5 4 3 2 1 0
  265. unsigned decnonce(unsigned in)
  266. {
  267. unsigned out;
  268. /* First part load */
  269. out = (in & 0xFF) << 24; in >>= 8;
  270. /* Byte reversal */
  271. in = (((in & 0xaaaaaaaa) >> 1) | ((in & 0x55555555) << 1));
  272. in = (((in & 0xcccccccc) >> 2) | ((in & 0x33333333) << 2));
  273. in = (((in & 0xf0f0f0f0) >> 4) | ((in & 0x0f0f0f0f) << 4));
  274. out |= (in >> 2)&0x3FFFFF;
  275. /* Extraction */
  276. if (in & 1) out |= (1 << 23);
  277. if (in & 2) out |= (1 << 22);
  278. // out = 7 6 5 4 3 2 1 0 f e 18 19 1a 1b 1c 1d 1e 1f 10 11 12 13 14 15 16 17 8 9 a b c d
  279. out -= 0x800004;
  280. return out;
  281. }
  282. int rehash(const void *midstate, const uint32_t m7, const uint32_t ntime, const uint32_t nbits, uint32_t nnonce) {
  283. unsigned char in[16];
  284. unsigned int *in32 = (unsigned int *)in;
  285. unsigned int *mid32 = (unsigned int *)midstate;
  286. unsigned out32[8];
  287. unsigned char *out = (unsigned char *) out32;
  288. #ifdef BITFURY_REHASH_DEBUG
  289. static unsigned history[512];
  290. static unsigned history_p;
  291. #endif
  292. sha256_ctx ctx;
  293. memset( &ctx, 0, sizeof( sha256_ctx ) );
  294. memcpy(ctx.h, mid32, 8*4);
  295. ctx.tot_len = 64;
  296. ctx.len = 0;
  297. nnonce = bswap_32(nnonce);
  298. in32[0] = bswap_32(m7);
  299. in32[1] = bswap_32(ntime);
  300. in32[2] = bswap_32(nbits);
  301. in32[3] = nnonce;
  302. sha256_update(&ctx, in, 16);
  303. sha256_final(&ctx, out);
  304. sha256(out, 32, out);
  305. if (out32[7] == 0) {
  306. #ifdef BITFURY_REHASH_DEBUG
  307. char hex[65];
  308. bin2hex(hex, out, 32);
  309. applog(LOG_INFO, "! MS0: %08x, m7: %08x, ntime: %08x, nbits: %08x, nnonce: %08x", mid32[0], m7, ntime, nbits, nnonce);
  310. applog(LOG_INFO, " out: %s", hex);
  311. history[history_p] = nnonce;
  312. history_p++; history_p &= 512 - 1;
  313. #endif
  314. return 1;
  315. }
  316. return 0;
  317. }
  318. static
  319. bool fudge_nonce(const void *midstate, const uint32_t m7, const uint32_t ntime, const uint32_t nbits, uint32_t *nonce_p) {
  320. static const uint32_t offsets[] = {0, 0xffc00000, 0xff800000, 0x02800000, 0x02C00000, 0x00400000};
  321. uint32_t nonce;
  322. int i;
  323. for (i = 0; i < 6; ++i)
  324. {
  325. nonce = *nonce_p + offsets[i];
  326. if (rehash(midstate, m7, ntime, nbits, nonce))
  327. {
  328. *nonce_p = nonce;
  329. return true;
  330. }
  331. }
  332. return false;
  333. }
  334. void work_to_payload(struct bitfury_payload *p, struct work *w) {
  335. unsigned char flipped_data[80];
  336. memset(p, 0, sizeof(struct bitfury_payload));
  337. swap32yes(flipped_data, w->data, 80 / 4);
  338. memcpy(p->midstate, w->midstate, 32);
  339. p->m7 = bswap_32(*(unsigned *)(flipped_data + 64));
  340. p->ntime = bswap_32(*(unsigned *)(flipped_data + 68));
  341. p->nbits = bswap_32(*(unsigned *)(flipped_data + 72));
  342. }
  343. void payload_to_atrvec(uint32_t *atrvec, struct bitfury_payload *p)
  344. {
  345. /* Programming next value */
  346. memcpy(atrvec, p, 20*4);
  347. ms3_compute(atrvec);
  348. }
  349. void libbitfury_sendHashData1(int chip_id, struct bitfury_device *d, struct thr_info *thr)
  350. {
  351. struct spi_port *port = d->spi;
  352. unsigned *newbuf = d->newbuf;
  353. unsigned *oldbuf = d->oldbuf;
  354. struct bitfury_payload *p = &(d->payload);
  355. struct bitfury_payload *op = &(d->opayload);
  356. struct bitfury_payload *o2p = &(d->o2payload);
  357. struct timespec d_time;
  358. struct timespec time;
  359. int smart = 0;
  360. int chip = d->fasync;
  361. int buf_diff;
  362. clock_gettime(CLOCK_REALTIME, &(time));
  363. if (!d->second_run) {
  364. d->predict2 = d->predict1 = time;
  365. d->counter1 = d->counter2 = 0;
  366. d->req2_done = 0;
  367. };
  368. d_time = t_diff(time, d->predict1);
  369. if (d_time.tv_sec < 0 && (d->req2_done || !smart)) {
  370. d->otimer1 = d->timer1;
  371. d->timer1 = time;
  372. d->ocounter1 = d->counter1;
  373. /* Programming next value */
  374. spi_clear_buf(port);
  375. spi_emit_break(port);
  376. spi_emit_fasync(port, chip);
  377. spi_emit_data(port, 0x3000, &d->atrvec[0], 19*4);
  378. if (smart) {
  379. config_reg(port, 3, 0);
  380. }
  381. clock_gettime(CLOCK_REALTIME, &(time));
  382. d_time = t_diff(time, d->predict1);
  383. spi_txrx(port);
  384. memcpy(newbuf, spi_getrxbuf(port)+4 + chip, 17*4);
  385. d->counter1 = get_counter(newbuf, oldbuf);
  386. buf_diff = get_diff(newbuf, oldbuf);
  387. if (buf_diff > 4 || (d->counter1 > 0 && d->counter1 < 0x00400000 / 2)) {
  388. if (buf_diff > 4) {
  389. #ifdef BITFURY_SENDHASHDATA_DEBUG
  390. applog(LOG_DEBUG, "AAA chip_id: %d, buf_diff: %d, counter: %08x", chip_id, buf_diff, d->counter1);
  391. #endif
  392. payload_to_atrvec(&d->atrvec[0], p);
  393. spi_clear_buf(port);
  394. spi_emit_break(port);
  395. spi_emit_fasync(port, chip);
  396. spi_emit_data(port, 0x3000, &d->atrvec[0], 19*4);
  397. clock_gettime(CLOCK_REALTIME, &(time));
  398. d_time = t_diff(time, d->predict1);
  399. spi_txrx(port);
  400. memcpy(newbuf, spi_getrxbuf(port)+4 + chip, 17*4);
  401. buf_diff = get_diff(newbuf, oldbuf);
  402. d->counter1 = get_counter(newbuf, oldbuf);
  403. #ifdef BITFURY_SENDHASHDATA_DEBUG
  404. applog(LOG_DEBUG, "AAA _222__ chip_id: %d, buf_diff: %d, counter: %08x", chip_id, buf_diff, d->counter1);
  405. #endif
  406. }
  407. }
  408. d->job_switched = newbuf[16] != oldbuf[16];
  409. int i;
  410. int results_num = 0;
  411. int found = 0;
  412. unsigned * results = d->results;
  413. d->old_nonce = 0;
  414. d->future_nonce = 0;
  415. for (i = 0; i < 16; i++) {
  416. if (oldbuf[i] != newbuf[i] && op && o2p) {
  417. uint32_t pn; // possible nonce
  418. if ((newbuf[i] & 0xFF) == 0xE0)
  419. continue;
  420. pn = decnonce(newbuf[i]);
  421. if (fudge_nonce(op->midstate, op->m7, op->ntime, op->nbits, &pn))
  422. {
  423. int k;
  424. int dup = 0;
  425. for (k = 0; k < results_num; k++) {
  426. if (results[k] == bswap_32(pn))
  427. dup = 1;
  428. }
  429. if (!dup) {
  430. results[results_num++] = bswap_32(pn);
  431. found++;
  432. }
  433. }
  434. else
  435. if (fudge_nonce(o2p->midstate, o2p->m7, o2p->ntime, o2p->nbits, &pn))
  436. {
  437. d->old_nonce = bswap_32(pn);
  438. found++;
  439. }
  440. else
  441. if (fudge_nonce(p->midstate, p->m7, p->ntime, p->nbits, &pn))
  442. {
  443. d->future_nonce = bswap_32(pn);
  444. found++;
  445. }
  446. if (!found) {
  447. inc_hw_errors2(thr, NULL, &pn);
  448. d->strange_counter++;
  449. }
  450. }
  451. }
  452. d->results_n = results_num;
  453. if (smart) {
  454. d_time = t_diff(d->timer2, d->timer1);
  455. } else {
  456. d_time = t_diff(d->otimer1, d->timer1);
  457. }
  458. d->counter1 = get_counter(newbuf, oldbuf);
  459. if (d->counter2 || !smart) {
  460. int shift;
  461. int cycles;
  462. int req1_cycles;
  463. long long unsigned int period;
  464. double ns;
  465. unsigned full_cycles, half_cycles;
  466. double full_delay, half_delay;
  467. long long unsigned delta;
  468. struct timespec t_delta;
  469. double mhz;
  470. #ifdef BITFURY_SENDHASHDATA_DEBUG
  471. int ccase;
  472. #endif
  473. shift = 800000;
  474. if (smart) {
  475. cycles = d->counter1 < d->counter2 ? 0x00400000 - d->counter2 + d->counter1 : d->counter1 - d->counter2; // + 0x003FFFFF;
  476. } else {
  477. if (d->counter1 > (0x00400000 - shift * 2) && d->ocounter1 > (0x00400000 - shift)) {
  478. cycles = 0x00400000 - d->ocounter1 + d->counter1; // + 0x003FFFFF;
  479. #ifdef BITFURY_SENDHASHDATA_DEBUG
  480. ccase = 1;
  481. #endif
  482. } else {
  483. cycles = d->counter1 > d->ocounter1 ? d->counter1 - d->ocounter1 : 0x00400000 - d->ocounter1 + d->counter1;
  484. #ifdef BITFURY_SENDHASHDATA_DEBUG
  485. ccase = 2;
  486. #endif
  487. }
  488. }
  489. req1_cycles = 0x003FFFFF - d->counter1;
  490. period = (long long unsigned int)d_time.tv_sec * 1000000000ULL + (long long unsigned int)d_time.tv_nsec;
  491. ns = (double)period / (double)(cycles);
  492. mhz = 1.0 / ns * 65.0 * 1000.0;
  493. #ifdef BITFURY_SENDHASHDATA_DEBUG
  494. if (d->counter1 > 0 && d->counter1 < 0x001FFFFF) {
  495. applog(LOG_DEBUG, "//AAA chip_id %2d: %llu ms, req1_cycles: %08u, counter1: %08d, ocounter1: %08d, counter2: %08d, cycles: %08d, ns: %.2f, mhz: %.2f ", chip_id, period / 1000000ULL, req1_cycles, d->counter1, d->ocounter1, d->counter2, cycles, ns, mhz);
  496. }
  497. #endif
  498. if (ns > 2000.0 || ns < 20) {
  499. #ifdef BITFURY_SENDHASHDATA_DEBUG
  500. applog(LOG_DEBUG, "AAA %d!Stupid ns chip_id %2d: %llu ms, req1_cycles: %08u, counter1: %08d, ocounter1: %08d, counter2: %08d, cycles: %08d, ns: %.2f, mhz: %.2f ", ccase, chip_id, period / 1000000ULL, req1_cycles, d->counter1, d->ocounter1, d->counter2, cycles, ns, mhz);
  501. #endif
  502. ns = 200.0;
  503. } else {
  504. d->ns = ns;
  505. d->mhz = mhz;
  506. }
  507. if (smart) {
  508. half_cycles = req1_cycles + shift;
  509. full_cycles = 0x003FFFFF - 2 * shift;
  510. } else {
  511. half_cycles = 0;
  512. full_cycles = req1_cycles > shift ? req1_cycles - shift : req1_cycles + 0x00400000 - shift;
  513. }
  514. half_delay = (double)half_cycles * ns * (1 +0.92);
  515. full_delay = (double)full_cycles * ns;
  516. delta = (long long unsigned)(full_delay + half_delay);
  517. t_delta.tv_sec = delta / 1000000000ULL;
  518. t_delta.tv_nsec = delta - t_delta.tv_sec * 1000000000ULL;
  519. d->predict1 = t_add(time, t_delta);
  520. if (smart) {
  521. half_cycles = req1_cycles + shift;
  522. full_cycles = 0;
  523. } else {
  524. full_cycles = req1_cycles + shift;
  525. }
  526. half_delay = (double)half_cycles * ns * (1 + 0.92);
  527. full_delay = (double)full_cycles * ns;
  528. delta = (long long unsigned)(full_delay + half_delay);
  529. t_delta.tv_sec = delta / 1000000000ULL;
  530. t_delta.tv_nsec = delta - t_delta.tv_sec * 1000000000ULL;
  531. d->predict2 = t_add(time, t_delta);
  532. d->req2_done = 0; d->req1_done = 0;
  533. }
  534. if (d->job_switched) {
  535. memcpy(o2p, op, sizeof(struct bitfury_payload));
  536. memcpy(op, p, sizeof(struct bitfury_payload));
  537. memcpy(oldbuf, newbuf, 17 * 4);
  538. }
  539. }
  540. clock_gettime(CLOCK_REALTIME, &(time));
  541. d_time = t_diff(time, d->predict2);
  542. if (d_time.tv_sec < 0 && !d->req2_done) {
  543. if(smart) {
  544. d->otimer2 = d->timer2;
  545. d->timer2 = time;
  546. spi_clear_buf(port);
  547. spi_emit_break(port);
  548. spi_emit_fasync(port, chip);
  549. spi_emit_data(port, 0x3000, &d->atrvec[0], 19*4);
  550. if (smart) {
  551. config_reg(port, 3, 1);
  552. }
  553. spi_txrx(port);
  554. memcpy(newbuf, spi_getrxbuf(port)+4 + chip, 17*4);
  555. d->counter2 = get_counter(newbuf, oldbuf);
  556. d->req2_done = 1;
  557. } else {
  558. d->req2_done = 1;
  559. }
  560. }
  561. d->second_run = true;
  562. }
  563. int libbitfury_readHashData(unsigned int *res) {
  564. return 0;
  565. }