driver-bitmain.c 78 KB

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  1. /*
  2. * Copyright 2012-2013 Lingchao Xu <lingchao.xu@bitmaintech.com>
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 3 of the License, or (at your option)
  7. * any later version. See COPYING for more details.
  8. */
  9. #include "config.h"
  10. #include <limits.h>
  11. #include <pthread.h>
  12. #include <stdio.h>
  13. #include <sys/time.h>
  14. #include <sys/types.h>
  15. #include <dirent.h>
  16. #include <unistd.h>
  17. #ifndef WIN32
  18. #include <sys/select.h>
  19. #include <termios.h>
  20. #include <sys/stat.h>
  21. #include <fcntl.h>
  22. #ifndef O_CLOEXEC
  23. #define O_CLOEXEC 0
  24. #endif
  25. #else
  26. #include "compat.h"
  27. #include <windows.h>
  28. #include <io.h>
  29. #endif
  30. #include "elist.h"
  31. #include "miner.h"
  32. #include "usbutils.h"
  33. #include "driver-bitmain.h"
  34. #include "util.h"
  35. BFG_REGISTER_DRIVER(bitmain_drv)
  36. static inline unsigned int bfg_work_block(struct work * const work)
  37. {
  38. return *((unsigned int*)(&work->data[4]));
  39. }
  40. #define htole8(x) (x)
  41. struct cgpu_info *btm_alloc_cgpu(struct device_drv *drv, int threads)
  42. {
  43. struct cgpu_info *cgpu = calloc(1, sizeof(*cgpu));
  44. if (unlikely(!cgpu))
  45. quit(1, "Failed to calloc cgpu for %s in usb_alloc_cgpu", drv->dname);
  46. cgpu->drv = drv;
  47. cgpu->deven = DEV_ENABLED;
  48. cgpu->threads = threads;
  49. cgpu->device_fd = -1;
  50. return cgpu;
  51. }
  52. struct cgpu_info *btm_free_cgpu(struct cgpu_info *cgpu)
  53. {
  54. if (cgpu->drv->copy)
  55. free(cgpu->drv);
  56. if(cgpu->device_path) {
  57. free(cgpu->device_path);
  58. }
  59. free(cgpu);
  60. return NULL;
  61. }
  62. bool btm_init(struct cgpu_info *cgpu, const char * devpath)
  63. {
  64. #ifdef WIN32
  65. int fd = -1;
  66. signed short timeout = 1;
  67. unsigned long baud = 115200;
  68. bool purge = true;
  69. HANDLE hSerial = NULL;
  70. applog(LOG_DEBUG, "btm_init cgpu->device_fd=%d", cgpu->device_fd);
  71. if(cgpu->device_fd >= 0) {
  72. return false;
  73. }
  74. hSerial = CreateFile(devpath, GENERIC_READ | GENERIC_WRITE, 0, NULL, OPEN_EXISTING, 0, NULL);
  75. if (unlikely(hSerial == INVALID_HANDLE_VALUE))
  76. {
  77. DWORD e = GetLastError();
  78. switch (e) {
  79. case ERROR_ACCESS_DENIED:
  80. applog(LOG_DEBUG, "Do not have user privileges required to open %s", devpath);
  81. break;
  82. case ERROR_SHARING_VIOLATION:
  83. applog(LOG_DEBUG, "%s is already in use by another process", devpath);
  84. break;
  85. default:
  86. applog(LOG_DEBUG, "Open %s failed, GetLastError:%d", devpath, (int)e);
  87. break;
  88. }
  89. } else {
  90. // thanks to af_newbie for pointers about this
  91. COMMCONFIG comCfg = {0};
  92. comCfg.dwSize = sizeof(COMMCONFIG);
  93. comCfg.wVersion = 1;
  94. comCfg.dcb.DCBlength = sizeof(DCB);
  95. comCfg.dcb.BaudRate = baud;
  96. comCfg.dcb.fBinary = 1;
  97. comCfg.dcb.fDtrControl = DTR_CONTROL_ENABLE;
  98. comCfg.dcb.fRtsControl = RTS_CONTROL_ENABLE;
  99. comCfg.dcb.ByteSize = 8;
  100. SetCommConfig(hSerial, &comCfg, sizeof(comCfg));
  101. // Code must specify a valid timeout value (0 means don't timeout)
  102. const DWORD ctoms = (timeout * 100);
  103. COMMTIMEOUTS cto = {ctoms, 0, ctoms, 0, ctoms};
  104. SetCommTimeouts(hSerial, &cto);
  105. if (purge) {
  106. PurgeComm(hSerial, PURGE_RXABORT);
  107. PurgeComm(hSerial, PURGE_TXABORT);
  108. PurgeComm(hSerial, PURGE_RXCLEAR);
  109. PurgeComm(hSerial, PURGE_TXCLEAR);
  110. }
  111. fd = _open_osfhandle((intptr_t)hSerial, 0);
  112. }
  113. #else
  114. int fd = -1;
  115. if(cgpu->device_fd >= 0) {
  116. return false;
  117. }
  118. fd = open(devpath, O_RDWR|O_EXCL|O_NONBLOCK);
  119. #endif
  120. if(fd == -1) {
  121. applog(LOG_DEBUG, "%s open %s error %d",
  122. cgpu->drv->dname, devpath, errno);
  123. return false;
  124. }
  125. cgpu->device_path = strdup(devpath);
  126. cgpu->device_fd = fd;
  127. applog(LOG_DEBUG, "btm_init open device fd = %d", cgpu->device_fd);
  128. return true;
  129. }
  130. void btm_uninit(struct cgpu_info *cgpu)
  131. {
  132. applog(LOG_DEBUG, "BTM uninit %s%i", cgpu->drv->name, cgpu->device_fd);
  133. // May have happened already during a failed initialisation
  134. // if release_cgpu() was called due to a USB NODEV(err)
  135. close(cgpu->device_fd);
  136. if(cgpu->device_path) {
  137. free(cgpu->device_path);
  138. cgpu->device_path = NULL;
  139. }
  140. }
  141. void btm_detect(struct device_drv *drv, bool (*device_detect)(const char*))
  142. {
  143. applog(LOG_DEBUG, "BTM scan devices: checking for %s devices", drv->name);
  144. if (total_count >= total_limit) {
  145. applog(LOG_DEBUG, "BTM scan devices: total limit %d reached", total_limit);
  146. return;
  147. }
  148. if (drv_count[drv->drv_id].count >= drv_count[drv->drv_id].limit) {
  149. applog(LOG_DEBUG,
  150. "BTM scan devices: %s limit %d reached",
  151. drv->dname, drv_count[drv->drv_id].limit);
  152. return;
  153. }
  154. device_detect("asic");
  155. }
  156. int btm_read(struct cgpu_info *cgpu, char *buf, size_t bufsize)
  157. {
  158. int err = 0;
  159. //applog(LOG_DEBUG, "btm_read ----- %d -----", bufsize);
  160. err = read(cgpu->device_fd, buf, bufsize);
  161. return err;
  162. }
  163. int btm_write(struct cgpu_info *cgpu, char *buf, size_t bufsize)
  164. {
  165. int err = 0;
  166. //applog(LOG_DEBUG, "btm_write ----- %d -----", bufsize);
  167. err = write(cgpu->device_fd, buf, bufsize);
  168. return err;
  169. }
  170. #define BITMAIN_CALC_DIFF1 1
  171. #ifdef WIN32
  172. #define BITMAIN_TEST
  173. #endif
  174. #define BITMAIN_TEST_PRINT_WORK 0
  175. #ifdef BITMAIN_TEST
  176. #define BITMAIN_TEST_NUM 19
  177. #define BITMAIN_TEST_USENUM 1
  178. int g_test_index = 0;
  179. const char btm_work_test_data[BITMAIN_TEST_NUM][256] = {
  180. "00000002ddc1ce5579dbec17f17fbb8f31ae218a814b2a0c1900f0d90000000100000000b58aa6ca86546b07a5a46698f736c7ca9c0eedc756d8f28ac33c20cc24d792675276f879190afc85b6888022000000800000000000000000000000000000000000000000000000000000000000000000",
  181. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000eb2d45233c5b02de50ddcb9049ba16040e0ba00e9750a474eec75891571d925b52dfda4a190266667145b02f000000800000000000000000000000000000000000000000000000000000000000000000",
  182. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000090c7d3743e0b0562e4f56d3dd35cece3c5e8275d0abb21bf7e503cb72bd7ed3b52dfda4a190266667bbb58d7000000800000000000000000000000000000000000000000000000000000000000000000",
  183. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000006e0561da06022bfbb42c5ecd74a46bfd91934f201b777e9155cc6c3674724ec652dfda4a19026666a0cd827b000000800000000000000000000000000000000000000000000000000000000000000000",
  184. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000000312f42ce4964cc23f2d8c039f106f25ddd58e10a1faed21b3bba4b0e621807b52dfda4a1902666629c9497d000000800000000000000000000000000000000000000000000000000000000000000000",
  185. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000033093a6540dbe8f7f3d19e3d2af05585ac58dafad890fa9a942e977334a23d6e52dfda4a190266665ae95079000000800000000000000000000000000000000000000000000000000000000000000000",
  186. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000bd7893057d06e69705bddf9a89c7bac6b40c5b32f15e2295fc8c5edf491ea24952dfda4a190266664b89b4d3000000800000000000000000000000000000000000000000000000000000000000000000",
  187. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000075e66f533e53837d14236a793ee4e493985642bc39e016b9e63adf14a584a2aa52dfda4a19026666ab5d638d000000800000000000000000000000000000000000000000000000000000000000000000",
  188. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d936f90c5db5f0fe1d017344443854fbf9e40a07a9b7e74fedc8661c23162bff52dfda4a19026666338e79cb000000800000000000000000000000000000000000000000000000000000000000000000",
  189. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d2c1a7d279a4355b017bc0a4b0a9425707786729f21ee18add3fda4252a31a4152dfda4a190266669bc90806000000800000000000000000000000000000000000000000000000000000000000000000",
  190. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000ad36d19f33d04ca779942843890bc3b083cec83a4b60b6c45cf7d21fc187746552dfda4a1902666675d81ab7000000800000000000000000000000000000000000000000000000000000000000000000",
  191. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000093b809cf82b76082eacb55bc35b79f31882ed0976fd102ef54783cd24341319b52dfda4a1902666642ab4e42000000800000000000000000000000000000000000000000000000000000000000000000",
  192. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000007411ff315430a7bbf41de8a685d457e82d5177c05640d6a4436a40f39e99667852dfda4a190266662affa4b5000000800000000000000000000000000000000000000000000000000000000000000000",
  193. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000001ad0db5b9e1e2b57c8d3654c160f5a51067521eab7e340a270639d97f00a3fa252dfda4a1902666601a47bb6000000800000000000000000000000000000000000000000000000000000000000000000",
  194. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000022e055c442c46bbe16df68603a26891f6e4cf85b90102b39fd7cadb602b4e34552dfda4a1902666695d33cea000000800000000000000000000000000000000000000000000000000000000000000000",
  195. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000009c8baf5a8a1e16de2d6ae949d5fec3ed751f10dcd4c99810f2ce08040fb9e31d52dfda4a19026666fe78849d000000800000000000000000000000000000000000000000000000000000000000000000",
  196. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000e5655532b414887f35eb4652bc7b11ebac12891f65bc08cbe0ce5b277b9e795152dfda4a19026666fcc0d1d1000000800000000000000000000000000000000000000000000000000000000000000000",
  197. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000f272c5508704e2b62dd1c30ea970372c40bf00f9203f9bf69d456b4a7fbfffe352dfda4a19026666c03d4399000000800000000000000000000000000000000000000000000000000000000000000000",
  198. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000fca3b4531ba627ad9b0e23cdd84c888952c23810df196e9c6db0bcecba6a830952dfda4a19026666c14009cb000000800000000000000000000000000000000000000000000000000000000000000000"
  199. };
  200. const char btm_work_test_midstate[BITMAIN_TEST_NUM][256] = {
  201. "2d8738e7f5bcf76dcb8316fec772e20e240cd58c88d47f2d3f5a6a9547ed0a35",
  202. "d31b6ce09c0bfc2af6f3fe3a03475ebefa5aa191fa70a327a354b2c22f9692f1",
  203. "84a8c8224b80d36caeb42eff2a100f634e1ff873e83fd02ef1306a34abef9dbe",
  204. "059882159439b9b32968c79a93c5521e769dbea9d840f56c2a17b9ad87e530b8",
  205. "17fa435d05012574f8f1da26994cc87b6cb9660b5e82072dc6a0881cec150a0d",
  206. "92a28cc5ec4ba6a2688471dfe2032b5fe97c805ca286c503e447d6749796c6af",
  207. "1677a03516d6e9509ac37e273d2482da9af6e077abe8392cdca6a30e916a7ae9",
  208. "50bbe09f1b8ac18c97aeb745d5d2c3b5d669b6ac7803e646f65ac7b763a392d1",
  209. "e46a0022ebdc303a7fb1a0ebfa82b523946c312e745e5b8a116b17ae6b4ce981",
  210. "8f2f61e7f5b4d76d854e6d266acfff4d40347548216838ccc4ef3b9e43d3c9ea",
  211. "0a450588ae99f75d676a08d0326e1ea874a3497f696722c78a80c7b6ee961ea6",
  212. "3c4c0fc2cf040b806c51b46de9ec0dcc678a7cc5cf3eff11c6c03de3bc7818cc",
  213. "f6c7c785ab5daddb8f98e5f854f2cb41879fcaf47289eb2b4196fefc1b28316f",
  214. "005312351ccb0d0794779f5023e4335b5cad221accf0dfa3da7b881266fa9f5a",
  215. "7b26d189c6bba7add54143179aadbba7ccaeff6887bd8d5bec9597d5716126e6",
  216. "a4718f4c801e7ddf913a9474eb71774993525684ffea1915f767ab16e05e6889",
  217. "6b6226a8c18919d0e55684638d33a6892a00d22492cc2f5906ca7a4ac21c74a7",
  218. "383114dccd1cb824b869158aa2984d157fcb02f46234ceca65943e919329e697",
  219. "d4d478df3016852b27cb1ae9e1e98d98617f8d0943bf9dc1217f47f817236222"
  220. };
  221. #endif
  222. char opt_bitmain_dev[256] = {0};
  223. bool opt_bitmain_hwerror = false;
  224. bool opt_bitmain_checkall = false;
  225. bool opt_bitmain_checkn2diff = false;
  226. bool opt_bitmain_nobeeper = false;
  227. bool opt_bitmain_notempoverctrl = false;
  228. bool opt_bitmain_homemode = false;
  229. int opt_bitmain_temp = BITMAIN_TEMP_TARGET;
  230. int opt_bitmain_overheat = BITMAIN_TEMP_OVERHEAT;
  231. int opt_bitmain_fan_min = BITMAIN_DEFAULT_FAN_MIN_PWM;
  232. int opt_bitmain_fan_max = BITMAIN_DEFAULT_FAN_MAX_PWM;
  233. int opt_bitmain_freq_min = BITMAIN_MIN_FREQUENCY;
  234. int opt_bitmain_freq_max = BITMAIN_MAX_FREQUENCY;
  235. bool opt_bitmain_auto;
  236. static int option_offset = -1;
  237. // --------------------------------------------------------------
  238. // CRC16 check table
  239. // --------------------------------------------------------------
  240. const uint8_t chCRCHTalbe[] = // CRC high byte table
  241. {
  242. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  243. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  244. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  245. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  246. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  247. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  248. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  249. 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  250. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  251. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  252. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  253. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  254. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  255. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  256. 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  257. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  258. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  259. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  260. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  261. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  262. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  263. 0x00, 0xC1, 0x81, 0x40
  264. };
  265. const uint8_t chCRCLTalbe[] = // CRC low byte table
  266. {
  267. 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7,
  268. 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E,
  269. 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9,
  270. 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC,
  271. 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
  272. 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32,
  273. 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D,
  274. 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38,
  275. 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF,
  276. 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
  277. 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1,
  278. 0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4,
  279. 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB,
  280. 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA,
  281. 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
  282. 0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0,
  283. 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97,
  284. 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E,
  285. 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89,
  286. 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
  287. 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83,
  288. 0x41, 0x81, 0x80, 0x40
  289. };
  290. static uint16_t CRC16(const uint8_t* p_data, uint16_t w_len)
  291. {
  292. uint8_t chCRCHi = 0xFF; // CRC high byte initialize
  293. uint8_t chCRCLo = 0xFF; // CRC low byte initialize
  294. uint16_t wIndex = 0; // CRC cycling index
  295. while (w_len--) {
  296. wIndex = chCRCLo ^ *p_data++;
  297. chCRCLo = chCRCHi ^ chCRCHTalbe[wIndex];
  298. chCRCHi = chCRCLTalbe[wIndex];
  299. }
  300. return ((chCRCHi << 8) | chCRCLo);
  301. }
  302. static uint32_t num2bit(int num) {
  303. switch(num) {
  304. case 0: return 0x80000000;
  305. case 1: return 0x40000000;
  306. case 2: return 0x20000000;
  307. case 3: return 0x10000000;
  308. case 4: return 0x08000000;
  309. case 5: return 0x04000000;
  310. case 6: return 0x02000000;
  311. case 7: return 0x01000000;
  312. case 8: return 0x00800000;
  313. case 9: return 0x00400000;
  314. case 10: return 0x00200000;
  315. case 11: return 0x00100000;
  316. case 12: return 0x00080000;
  317. case 13: return 0x00040000;
  318. case 14: return 0x00020000;
  319. case 15: return 0x00010000;
  320. case 16: return 0x00008000;
  321. case 17: return 0x00004000;
  322. case 18: return 0x00002000;
  323. case 19: return 0x00001000;
  324. case 20: return 0x00000800;
  325. case 21: return 0x00000400;
  326. case 22: return 0x00000200;
  327. case 23: return 0x00000100;
  328. case 24: return 0x00000080;
  329. case 25: return 0x00000040;
  330. case 26: return 0x00000020;
  331. case 27: return 0x00000010;
  332. case 28: return 0x00000008;
  333. case 29: return 0x00000004;
  334. case 30: return 0x00000002;
  335. case 31: return 0x00000001;
  336. default: return 0x00000000;
  337. }
  338. }
  339. static bool get_options(int this_option_offset, int *baud, int *chain_num,
  340. int *asic_num, int *timeout, int *frequency, char * frequency_t, uint8_t * reg_data, uint8_t * voltage, char * voltage_t)
  341. {
  342. char buf[BUFSIZ+1];
  343. char *ptr, *comma, *colon, *colon2, *colon3, *colon4, *colon5, *colon6;
  344. size_t max;
  345. int i, tmp;
  346. if (opt_bitmain_options == NULL)
  347. buf[0] = '\0';
  348. else {
  349. ptr = opt_bitmain_options;
  350. for (i = 0; i < this_option_offset; i++) {
  351. comma = strchr(ptr, ',');
  352. if (comma == NULL)
  353. break;
  354. ptr = comma + 1;
  355. }
  356. comma = strchr(ptr, ',');
  357. if (comma == NULL)
  358. max = strlen(ptr);
  359. else
  360. max = comma - ptr;
  361. if (max > BUFSIZ)
  362. max = BUFSIZ;
  363. strncpy(buf, ptr, max);
  364. buf[max] = '\0';
  365. }
  366. if (!(*buf))
  367. return false;
  368. colon = strchr(buf, ':');
  369. if (colon)
  370. *(colon++) = '\0';
  371. tmp = atoi(buf);
  372. switch (tmp) {
  373. case 115200:
  374. *baud = 115200;
  375. break;
  376. case 57600:
  377. *baud = 57600;
  378. break;
  379. case 38400:
  380. *baud = 38400;
  381. break;
  382. case 19200:
  383. *baud = 19200;
  384. break;
  385. default:
  386. quit(1, "Invalid bitmain-options for baud (%s) "
  387. "must be 115200, 57600, 38400 or 19200", buf);
  388. }
  389. if (colon && *colon) {
  390. colon2 = strchr(colon, ':');
  391. if (colon2)
  392. *(colon2++) = '\0';
  393. if (*colon) {
  394. tmp = atoi(colon);
  395. if (tmp > 0) {
  396. *chain_num = tmp;
  397. } else {
  398. quit(1, "Invalid bitmain-options for "
  399. "chain_num (%s) must be 1 ~ %d",
  400. colon, BITMAIN_DEFAULT_CHAIN_NUM);
  401. }
  402. }
  403. if (colon2 && *colon2) {
  404. colon3 = strchr(colon2, ':');
  405. if (colon3)
  406. *(colon3++) = '\0';
  407. tmp = atoi(colon2);
  408. if (tmp > 0 && tmp <= BITMAIN_DEFAULT_ASIC_NUM)
  409. *asic_num = tmp;
  410. else {
  411. quit(1, "Invalid bitmain-options for "
  412. "asic_num (%s) must be 1 ~ %d",
  413. colon2, BITMAIN_DEFAULT_ASIC_NUM);
  414. }
  415. if (colon3 && *colon3) {
  416. colon4 = strchr(colon3, ':');
  417. if (colon4)
  418. *(colon4++) = '\0';
  419. tmp = atoi(colon3);
  420. if (tmp > 0 && tmp <= 0xff)
  421. *timeout = tmp;
  422. else {
  423. quit(1, "Invalid bitmain-options for "
  424. "timeout (%s) must be 1 ~ %d",
  425. colon3, 0xff);
  426. }
  427. if (colon4 && *colon4) {
  428. colon5 = strchr(colon4, ':');
  429. if(colon5)
  430. *(colon5++) = '\0';
  431. tmp = atoi(colon4);
  432. if (tmp < BITMAIN_MIN_FREQUENCY || tmp > BITMAIN_MAX_FREQUENCY) {
  433. quit(1, "Invalid bitmain-options for frequency, must be %d <= frequency <= %d",
  434. BITMAIN_MIN_FREQUENCY, BITMAIN_MAX_FREQUENCY);
  435. } else {
  436. *frequency = tmp;
  437. strcpy(frequency_t, colon4);
  438. }
  439. if (colon5 && *colon5) {
  440. colon6 = strchr(colon5, ':');
  441. if(colon6)
  442. *(colon6++) = '\0';
  443. if(strlen(colon5) > 8 || strlen(colon5)%2 != 0 || strlen(colon5)/2 == 0) {
  444. quit(1, "Invalid bitmain-options for reg data, must be hex now: %s",
  445. colon5);
  446. }
  447. memset(reg_data, 0, 4);
  448. if(!hex2bin(reg_data, colon5, strlen(colon5)/2)) {
  449. quit(1, "Invalid bitmain-options for reg data, hex2bin error now: %s",
  450. colon5);
  451. }
  452. if (colon6 && *colon6) {
  453. if(strlen(colon6) > 4 || strlen(colon6)%2 != 0 || strlen(colon6)/2 == 0) {
  454. quit(1, "Invalid bitmain-options for voltage data, must be hex now: %s",
  455. colon6);
  456. }
  457. memset(voltage, 0, 2);
  458. if(!hex2bin(voltage, colon6, strlen(colon6)/2)) {
  459. quit(1, "Invalid bitmain-options for voltage data, hex2bin error now: %s",
  460. colon5);
  461. } else {
  462. sprintf(voltage_t, "%02x%02x", voltage[0], voltage[1]);
  463. voltage_t[5] = 0;
  464. voltage_t[4] = voltage_t[3];
  465. voltage_t[3] = voltage_t[2];
  466. voltage_t[2] = voltage_t[1];
  467. voltage_t[1] = '.';
  468. }
  469. }
  470. }
  471. }
  472. }
  473. }
  474. }
  475. return true;
  476. }
  477. static bool get_option_freq(int *timeout, int *frequency, char * frequency_t, uint8_t * reg_data)
  478. {
  479. char buf[BUFSIZ+1];
  480. char *ptr, *comma, *colon, *colon2;
  481. size_t max;
  482. int tmp;
  483. if (opt_bitmain_freq == NULL)
  484. return true;
  485. else {
  486. ptr = opt_bitmain_freq;
  487. comma = strchr(ptr, ',');
  488. if (comma == NULL)
  489. max = strlen(ptr);
  490. else
  491. max = comma - ptr;
  492. if (max > BUFSIZ)
  493. max = BUFSIZ;
  494. strncpy(buf, ptr, max);
  495. buf[max] = '\0';
  496. }
  497. if (!(*buf))
  498. return false;
  499. colon = strchr(buf, ':');
  500. if (colon)
  501. *(colon++) = '\0';
  502. tmp = atoi(buf);
  503. if (tmp > 0 && tmp <= 0xff)
  504. *timeout = tmp;
  505. else {
  506. quit(1, "Invalid bitmain-freq for "
  507. "timeout (%s) must be 1 ~ %d",
  508. buf, 0xff);
  509. }
  510. if (colon && *colon) {
  511. colon2 = strchr(colon, ':');
  512. if (colon2)
  513. *(colon2++) = '\0';
  514. tmp = atoi(colon);
  515. if (tmp < BITMAIN_MIN_FREQUENCY || tmp > BITMAIN_MAX_FREQUENCY) {
  516. quit(1, "Invalid bitmain-freq for frequency, must be %d <= frequency <= %d",
  517. BITMAIN_MIN_FREQUENCY, BITMAIN_MAX_FREQUENCY);
  518. } else {
  519. *frequency = tmp;
  520. strcpy(frequency_t, colon);
  521. }
  522. if (colon2 && *colon2) {
  523. if(strlen(colon2) > 8 || strlen(colon2)%2 != 0 || strlen(colon2)/2 == 0) {
  524. quit(1, "Invalid bitmain-freq for reg data, must be hex now: %s",
  525. colon2);
  526. }
  527. memset(reg_data, 0, 4);
  528. if(!hex2bin(reg_data, colon2, strlen(colon2)/2)) {
  529. quit(1, "Invalid bitmain-freq for reg data, hex2bin error now: %s",
  530. colon2);
  531. }
  532. }
  533. }
  534. return true;
  535. }
  536. static bool get_option_voltage(uint8_t * voltage, char * voltage_t)
  537. {
  538. if(opt_bitmain_voltage) {
  539. if(strlen(opt_bitmain_voltage) > 4 || strlen(opt_bitmain_voltage)%2 != 0 || strlen(opt_bitmain_voltage)/2 == 0) {
  540. applog(LOG_ERR, "Invalid bitmain-voltage for voltage data, must be hex now: %s,set default_volttage",
  541. opt_bitmain_voltage);
  542. return false;
  543. }
  544. memset(voltage, 0, 2);
  545. if(!hex2bin(voltage, opt_bitmain_voltage, strlen(opt_bitmain_voltage)/2)) {
  546. quit(1, "Invalid bitmain-voltage for voltage data, hex2bin error now: %s",
  547. opt_bitmain_voltage);
  548. } else {
  549. sprintf(voltage_t, "%02x%02x", voltage[0], voltage[1]);
  550. voltage_t[5] = 0;
  551. voltage_t[4] = voltage_t[3];
  552. voltage_t[3] = voltage_t[2];
  553. voltage_t[2] = voltage_t[1];
  554. voltage_t[1] = '.';
  555. }
  556. }
  557. return true;
  558. }
  559. static int bitmain_set_txconfig(struct bitmain_txconfig_token *bm,
  560. uint8_t reset, uint8_t fan_eft, uint8_t timeout_eft, uint8_t frequency_eft,
  561. uint8_t voltage_eft, uint8_t chain_check_time_eft, uint8_t chip_config_eft, uint8_t hw_error_eft,
  562. uint8_t beeper_ctrl, uint8_t temp_over_ctrl,uint8_t fan_home_mode,
  563. uint8_t chain_num, uint8_t asic_num, uint8_t fan_pwm_data, uint8_t timeout_data,
  564. uint16_t frequency, uint8_t * voltage, uint8_t chain_check_time,
  565. uint8_t chip_address, uint8_t reg_address, uint8_t * reg_data)
  566. {
  567. uint16_t crc = 0;
  568. int datalen = 0;
  569. uint8_t version = 0;
  570. uint8_t * sendbuf = (uint8_t *)bm;
  571. if (unlikely(!bm)) {
  572. applog(LOG_WARNING, "bitmain_set_txconfig bitmain_txconfig_token is null");
  573. return -1;
  574. }
  575. if (unlikely(timeout_data <= 0 || asic_num <= 0 || chain_num <= 0)) {
  576. applog(LOG_WARNING, "bitmain_set_txconfig parameter invalid timeout_data(%d) asic_num(%d) chain_num(%d)",
  577. timeout_data, asic_num, chain_num);
  578. return -1;
  579. }
  580. datalen = sizeof(struct bitmain_txconfig_token);
  581. memset(bm, 0, datalen);
  582. bm->token_type = BITMAIN_TOKEN_TYPE_TXCONFIG;
  583. bm->version = version;
  584. bm->length = datalen-4;
  585. bm->length = htole16(bm->length);
  586. bm->reset = reset;
  587. bm->fan_eft = fan_eft;
  588. bm->timeout_eft = timeout_eft;
  589. bm->frequency_eft = frequency_eft;
  590. bm->voltage_eft = voltage_eft;
  591. bm->chain_check_time_eft = chain_check_time_eft;
  592. bm->chip_config_eft = chip_config_eft;
  593. bm->hw_error_eft = hw_error_eft;
  594. bm->beeper_ctrl = beeper_ctrl;
  595. bm->temp_over_ctrl = temp_over_ctrl;
  596. bm->fan_home_mode = fan_home_mode;
  597. sendbuf[4] = htole8(sendbuf[4]);
  598. sendbuf[5] = htole8(sendbuf[5]);
  599. bm->chain_num = chain_num;
  600. bm->asic_num = asic_num;
  601. bm->fan_pwm_data = fan_pwm_data;
  602. bm->timeout_data = timeout_data;
  603. bm->frequency = htole16(frequency);
  604. memcpy(bm->voltage, voltage, 2);
  605. bm->chain_check_time = chain_check_time;
  606. memcpy(bm->reg_data, reg_data, 4);
  607. bm->chip_address = chip_address;
  608. bm->reg_address = reg_address;
  609. crc = CRC16((uint8_t *)bm, datalen-2);
  610. bm->crc = htole16(crc);
  611. applog(LOG_ERR, "BTM TxConfigToken:v(%d) reset(%d) fan_e(%d) tout_e(%d) fq_e(%d) vt_e(%d) chainc_e(%d) chipc_e(%d) hw_e(%d) b_c(%d) t_c(%d) f_m(%d) mnum(%d) anum(%d) fanpwmdata(%d) toutdata(%d) freq(%d) volt(%02x%02x) chainctime(%d) regdata(%02x%02x%02x%02x) chipaddr(%02x) regaddr(%02x) crc(%04x)",
  612. version, reset, fan_eft, timeout_eft, frequency_eft, voltage_eft,
  613. chain_check_time_eft, chip_config_eft, hw_error_eft, beeper_ctrl, temp_over_ctrl,fan_home_mode,chain_num, asic_num,
  614. fan_pwm_data, timeout_data, frequency, voltage[0], voltage[1],
  615. chain_check_time, reg_data[0], reg_data[1], reg_data[2], reg_data[3], chip_address, reg_address, crc);
  616. return datalen;
  617. }
  618. static int bitmain_set_txtask(uint8_t * sendbuf,
  619. unsigned int * last_work_block, struct work **works, int work_array_size, int work_array, int sendworkcount, int * sendcount)
  620. {
  621. uint16_t crc = 0;
  622. uint32_t work_id = 0;
  623. uint8_t version = 0;
  624. int datalen = 0;
  625. int i = 0;
  626. int index = work_array;
  627. uint8_t new_block= 0;
  628. struct bitmain_txtask_token *bm = (struct bitmain_txtask_token *)sendbuf;
  629. *sendcount = 0;
  630. int cursendcount = 0;
  631. int diff = 0;
  632. unsigned int difftmp = 0;
  633. unsigned int pooldiff = 0;
  634. int netdiff = 0;
  635. if (unlikely(!bm)) {
  636. applog(LOG_WARNING, "bitmain_set_txtask bitmain_txtask_token is null");
  637. return -1;
  638. }
  639. if (unlikely(!works)) {
  640. applog(LOG_WARNING, "bitmain_set_txtask work is null");
  641. return -1;
  642. }
  643. memset(bm, 0, sizeof(struct bitmain_txtask_token));
  644. bm->token_type = BITMAIN_TOKEN_TYPE_TXTASK;
  645. bm->version = version;
  646. datalen = 10;
  647. applog(LOG_DEBUG, "BTM send work count %d -----", sendworkcount);
  648. for(i = 0; i < sendworkcount; i++) {
  649. if(index > work_array_size) {
  650. index = 0;
  651. }
  652. if(works[index]) {
  653. const unsigned int work_block = bfg_work_block(works[index]);
  654. if(work_block != *last_work_block) {
  655. applog(LOG_ERR, "BTM send task new block %d old(%d)", work_block, *last_work_block);
  656. new_block = 1;
  657. *last_work_block = work_block;
  658. }
  659. #ifdef BITMAIN_TEST
  660. if(!hex2bin(works[index]->data, btm_work_test_data[g_test_index], 128)) {
  661. applog(LOG_DEBUG, "BTM send task set test data error");
  662. }
  663. if(!hex2bin(works[index]->midstate, btm_work_test_midstate[g_test_index], 32)) {
  664. applog(LOG_DEBUG, "BTM send task set test midstate error");
  665. }
  666. g_test_index++;
  667. if(g_test_index >= BITMAIN_TEST_USENUM) {
  668. g_test_index = 0;
  669. }
  670. applog(LOG_DEBUG, "BTM test index = %d", g_test_index);
  671. #endif
  672. work_id = works[index]->id;
  673. bm->works[cursendcount].work_id = htole32(work_id);
  674. applog(LOG_DEBUG, "BTM send task work id:%d %d", bm->works[cursendcount].work_id, work_id);
  675. memcpy(bm->works[cursendcount].midstate, works[index]->midstate, 32);
  676. memcpy(bm->works[cursendcount].data2, works[index]->data + 64, 12);
  677. if(cursendcount == 0) {
  678. pooldiff = (unsigned int)(works[index]->work_difficulty);
  679. difftmp = pooldiff;
  680. while(1) {
  681. difftmp = difftmp >> 1;
  682. if(difftmp > 0) {
  683. diff++;
  684. if(diff >= 255) {
  685. break;
  686. }
  687. } else {
  688. break;
  689. }
  690. }
  691. struct work * const work = works[index];
  692. const struct pool * const pool = work->pool;
  693. const struct mining_goal_info * const goal = pool->goal;
  694. for (uint64_t netdifftmp = goal->current_diff; netdifftmp > 0; netdifftmp >>= 1) {
  695. ++netdiff;
  696. }
  697. }
  698. if(BITMAIN_TEST_PRINT_WORK) {
  699. char ob_hex[(76 * 2) + 1];
  700. bin2hex(ob_hex, works[index]->data, 76);
  701. applog(LOG_ERR, "work %d data: %s", works[index]->id, ob_hex);
  702. }
  703. cursendcount++;
  704. }
  705. index++;
  706. }
  707. if(cursendcount <= 0) {
  708. applog(LOG_ERR, "BTM send work count %d", cursendcount);
  709. return 0;
  710. }
  711. datalen += 48*cursendcount;
  712. bm->length = datalen-4;
  713. bm->length = htole16(bm->length);
  714. //len = datalen-3;
  715. //len = htole16(len);
  716. //memcpy(sendbuf+1, &len, 2);
  717. bm->new_block = new_block;
  718. bm->diff = diff;
  719. bm->net_diff = htole16(netdiff);
  720. sendbuf[4] = htole8(sendbuf[4]);
  721. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  722. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  723. *sendcount = cursendcount;
  724. crc = CRC16(sendbuf, datalen-2);
  725. crc = htole16(crc);
  726. memcpy(sendbuf+datalen-2, &crc, 2);
  727. applog(LOG_DEBUG, "BitMain TxTask Token: v(%d) new_block(%d) diff(%d pool:%d net:%d) work_num(%d) crc(%04x)",
  728. version, new_block, diff, pooldiff,netdiff, cursendcount, crc);
  729. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  730. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  731. return datalen;
  732. }
  733. static int bitmain_set_rxstatus(struct bitmain_rxstatus_token *bm,
  734. uint8_t chip_status_eft, uint8_t detect_get, uint8_t chip_address, uint8_t reg_address)
  735. {
  736. uint16_t crc = 0;
  737. uint8_t version = 0;
  738. int datalen = 0;
  739. uint8_t * sendbuf = (uint8_t *)bm;
  740. if (unlikely(!bm)) {
  741. applog(LOG_WARNING, "bitmain_set_rxstatus bitmain_rxstatus_token is null");
  742. return -1;
  743. }
  744. datalen = sizeof(struct bitmain_rxstatus_token);
  745. memset(bm, 0, datalen);
  746. bm->token_type = BITMAIN_TOKEN_TYPE_RXSTATUS;
  747. bm->version = version;
  748. bm->length = datalen-4;
  749. bm->length = htole16(bm->length);
  750. bm->chip_status_eft = chip_status_eft;
  751. bm->detect_get = detect_get;
  752. sendbuf[4] = htole8(sendbuf[4]);
  753. bm->chip_address = chip_address;
  754. bm->reg_address = reg_address;
  755. crc = CRC16((uint8_t *)bm, datalen-2);
  756. bm->crc = htole16(crc);
  757. applog(LOG_ERR, "BitMain RxStatus Token: v(%d) chip_status_eft(%d) detect_get(%d) chip_address(%02x) reg_address(%02x) crc(%04x)",
  758. version, chip_status_eft, detect_get, chip_address, reg_address, crc);
  759. return datalen;
  760. }
  761. static int bitmain_parse_rxstatus(const uint8_t * data, int datalen, struct bitmain_rxstatus_data *bm)
  762. {
  763. uint16_t crc = 0;
  764. uint8_t version = 0;
  765. int i = 0, j = 0;
  766. int asic_num = 0;
  767. int dataindex = 0;
  768. uint8_t tmp = 0x01;
  769. if (unlikely(!bm)) {
  770. applog(LOG_WARNING, "bitmain_parse_rxstatus bitmain_rxstatus_data is null");
  771. return -1;
  772. }
  773. if (unlikely(!data || datalen <= 0)) {
  774. applog(LOG_WARNING, "bitmain_parse_rxstatus parameter invalid data is null or datalen(%d) error", datalen);
  775. return -1;
  776. }
  777. memset(bm, 0, sizeof(struct bitmain_rxstatus_data));
  778. memcpy(bm, data, 28);
  779. if (bm->data_type != BITMAIN_DATA_TYPE_RXSTATUS) {
  780. applog(LOG_ERR, "bitmain_parse_rxstatus datatype(%02x) error", bm->data_type);
  781. return -1;
  782. }
  783. if (bm->version != version) {
  784. applog(LOG_ERR, "bitmain_parse_rxstatus version(%02x) error", bm->version);
  785. return -1;
  786. }
  787. bm->length = htole16(bm->length);
  788. if (bm->length+4 != datalen) {
  789. applog(LOG_ERR, "bitmain_parse_rxstatus length(%d) datalen(%d) error", bm->length, datalen);
  790. return -1;
  791. }
  792. crc = CRC16(data, datalen-2);
  793. memcpy(&(bm->crc), data+datalen-2, 2);
  794. bm->crc = htole16(bm->crc);
  795. if(crc != bm->crc) {
  796. applog(LOG_ERR, "bitmain_parse_rxstatus check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  797. return -1;
  798. }
  799. bm->fifo_space = htole16(bm->fifo_space);
  800. bm->fan_exist = htole16(bm->fan_exist);
  801. bm->temp_exist = htole32(bm->temp_exist);
  802. bm->nonce_error = htole32(bm->nonce_error);
  803. if(bm->chain_num > BITMAIN_MAX_CHAIN_NUM) {
  804. applog(LOG_ERR, "bitmain_parse_rxstatus chain_num=%d error", bm->chain_num);
  805. return -1;
  806. }
  807. dataindex = 28;
  808. if(bm->chain_num > 0) {
  809. memcpy(bm->chain_asic_num, data+datalen-2-bm->chain_num-bm->temp_num-bm->fan_num, bm->chain_num);
  810. }
  811. for(i = 0; i < bm->chain_num; i++) {
  812. asic_num = bm->chain_asic_num[i];
  813. if(asic_num <= 0) {
  814. asic_num = 1;
  815. } else {
  816. if(asic_num % 32 == 0) {
  817. asic_num = asic_num / 32;
  818. } else {
  819. asic_num = asic_num / 32 + 1;
  820. }
  821. }
  822. memcpy((uint8_t *)bm->chain_asic_exist+i*32, data+dataindex, asic_num*4);
  823. dataindex += asic_num*4;
  824. }
  825. for(i = 0; i < bm->chain_num; i++) {
  826. asic_num = bm->chain_asic_num[i];
  827. if(asic_num <= 0) {
  828. asic_num = 1;
  829. } else {
  830. if(asic_num % 32 == 0) {
  831. asic_num = asic_num / 32;
  832. } else {
  833. asic_num = asic_num / 32 + 1;
  834. }
  835. }
  836. memcpy((uint8_t *)bm->chain_asic_status+i*32, data+dataindex, asic_num*4);
  837. dataindex += asic_num*4;
  838. }
  839. dataindex += bm->chain_num;
  840. if(dataindex + bm->temp_num + bm->fan_num + 2 != datalen) {
  841. applog(LOG_ERR, "bitmain_parse_rxstatus dataindex(%d) chain_num(%d) temp_num(%d) fan_num(%d) not match datalen(%d)",
  842. dataindex, bm->chain_num, bm->temp_num, bm->fan_num, datalen);
  843. return -1;
  844. }
  845. for(i = 0; i < bm->chain_num; i++) {
  846. //bm->chain_asic_status[i] = swab32(bm->chain_asic_status[i]);
  847. for(j = 0; j < 8; j++) {
  848. bm->chain_asic_exist[i*8+j] = htole32(bm->chain_asic_exist[i*8+j]);
  849. bm->chain_asic_status[i*8+j] = htole32(bm->chain_asic_status[i*8+j]);
  850. }
  851. }
  852. if(bm->temp_num > 0) {
  853. memcpy(bm->temp, data+dataindex, bm->temp_num);
  854. dataindex += bm->temp_num;
  855. }
  856. if(bm->fan_num > 0) {
  857. memcpy(bm->fan, data+dataindex, bm->fan_num);
  858. dataindex += bm->fan_num;
  859. }
  860. if(!opt_bitmain_checkall){
  861. if(tmp != htole8(tmp)){
  862. applog(LOG_ERR, "BitMain RxStatus byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  863. memcpy(&tmp,data+4,1);
  864. bm->chip_value_eft = tmp >>7;
  865. bm->get_blk_num = tmp >> 4;
  866. bm->reserved1 = ((tmp << 4) & 0xff) >> 5;
  867. }
  868. found_blocks = bm->get_blk_num;
  869. applog(LOG_ERR, "BitMain RxStatus tmp :0x%02x byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",tmp,*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  870. }
  871. applog(LOG_DEBUG, "BitMain RxStatusData: chipv_e(%d) chainnum(%d) fifos(%d) v1(%d) v2(%d) v3(%d) v4(%d) fann(%d) tempn(%d) fanet(%04x) tempet(%08x) ne(%d) regvalue(%d) crc(%04x)",
  872. bm->chip_value_eft, bm->chain_num, bm->fifo_space, bm->hw_version[0], bm->hw_version[1], bm->hw_version[2], bm->hw_version[3], bm->fan_num, bm->temp_num, bm->fan_exist, bm->temp_exist, bm->nonce_error, bm->reg_value, bm->crc);
  873. applog(LOG_DEBUG, "BitMain RxStatus Data chain info:");
  874. for(i = 0; i < bm->chain_num; i++) {
  875. applog(LOG_DEBUG, "BitMain RxStatus Data chain(%d) asic num=%d asic_exist=%08x asic_status=%08x", i+1, bm->chain_asic_num[i], bm->chain_asic_exist[i*8], bm->chain_asic_status[i*8]);
  876. }
  877. applog(LOG_DEBUG, "BitMain RxStatus Data temp info:");
  878. for(i = 0; i < bm->temp_num; i++) {
  879. applog(LOG_DEBUG, "BitMain RxStatus Data temp(%d) temp=%d", i+1, bm->temp[i]);
  880. }
  881. applog(LOG_DEBUG, "BitMain RxStatus Data fan info:");
  882. for(i = 0; i < bm->fan_num; i++) {
  883. applog(LOG_DEBUG, "BitMain RxStatus Data fan(%d) fan=%d", i+1, bm->fan[i]);
  884. }
  885. return 0;
  886. }
  887. static int bitmain_parse_rxnonce(const uint8_t * data, int datalen, struct bitmain_rxnonce_data *bm, int * nonce_num)
  888. {
  889. int i = 0;
  890. uint16_t crc = 0;
  891. uint8_t version = 0;
  892. int curnoncenum = 0;
  893. if (unlikely(!bm)) {
  894. applog(LOG_ERR, "bitmain_parse_rxnonce bitmain_rxstatus_data null");
  895. return -1;
  896. }
  897. if (unlikely(!data || datalen <= 0)) {
  898. applog(LOG_ERR, "bitmain_parse_rxnonce data null or datalen(%d) error", datalen);
  899. return -1;
  900. }
  901. memcpy(bm, data, sizeof(struct bitmain_rxnonce_data));
  902. if (bm->data_type != BITMAIN_DATA_TYPE_RXNONCE) {
  903. applog(LOG_ERR, "bitmain_parse_rxnonce datatype(%02x) error", bm->data_type);
  904. return -1;
  905. }
  906. if (bm->version != version) {
  907. applog(LOG_ERR, "bitmain_parse_rxnonce version(%02x) error", bm->version);
  908. return -1;
  909. }
  910. bm->length = htole16(bm->length);
  911. if (bm->length+4 != datalen) {
  912. applog(LOG_ERR, "bitmain_parse_rxnonce length(%d) error", bm->length);
  913. return -1;
  914. }
  915. crc = CRC16(data, datalen-2);
  916. memcpy(&(bm->crc), data+datalen-2, 2);
  917. bm->crc = htole16(bm->crc);
  918. if(crc != bm->crc) {
  919. applog(LOG_ERR, "bitmain_parse_rxnonce check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  920. return -1;
  921. }
  922. bm->fifo_space = htole16(bm->fifo_space);
  923. bm->diff = htole16(bm->diff);
  924. bm->total_nonce_num = htole64(bm->total_nonce_num);
  925. curnoncenum = (datalen-14)/8;
  926. applog(LOG_DEBUG, "BitMain RxNonce Data: nonce_num(%d) fifo_space(%d) diff(%d) tnn(%lld)", curnoncenum, bm->fifo_space, bm->diff, bm->total_nonce_num);
  927. for(i = 0; i < curnoncenum; i++) {
  928. bm->nonces[i].work_id = htole32(bm->nonces[i].work_id);
  929. bm->nonces[i].nonce = htole32(bm->nonces[i].nonce);
  930. applog(LOG_DEBUG, "BitMain RxNonce Data %d: work_id(%d) nonce(%08x)(%d)",
  931. i, bm->nonces[i].work_id, bm->nonces[i].nonce, bm->nonces[i].nonce);
  932. }
  933. *nonce_num = curnoncenum;
  934. return 0;
  935. }
  936. static int bitmain_read(struct cgpu_info *bitmain, unsigned char *buf,
  937. size_t bufsize, int timeout)
  938. {
  939. int err = 0;
  940. size_t total = 0;
  941. if(bitmain == NULL || buf == NULL || bufsize <= 0) {
  942. applog(LOG_WARNING, "bitmain_read parameter error bufsize(%d)", bufsize);
  943. return -1;
  944. }
  945. {
  946. err = btm_read(bitmain, buf, bufsize);
  947. total = err;
  948. }
  949. return total;
  950. }
  951. static int bitmain_write(struct cgpu_info *bitmain, char *buf, ssize_t len)
  952. {
  953. int err;
  954. {
  955. int havelen = 0;
  956. while(havelen < len) {
  957. err = btm_write(bitmain, buf+havelen, len-havelen);
  958. if(err < 0) {
  959. applog(LOG_DEBUG, "%s%i: btm_write got err %d", bitmain->drv->name,
  960. bitmain->device_id, err);
  961. applog(LOG_WARNING, "usb_write error on bitmain_write");
  962. return BTM_SEND_ERROR;
  963. } else {
  964. havelen += err;
  965. }
  966. }
  967. }
  968. return BTM_SEND_OK;
  969. }
  970. static int bitmain_send_data(const uint8_t * data, int datalen, struct cgpu_info *bitmain)
  971. {
  972. int delay, ret;
  973. struct bitmain_info *info = NULL;
  974. cgtimer_t ts_start;
  975. if(datalen <= 0) {
  976. return 0;
  977. }
  978. info = bitmain->device_data;
  979. //delay = datalen * 10 * 1000000;
  980. //delay = delay / info->baud;
  981. //delay += 4000;
  982. if(opt_debug) {
  983. char hex[(datalen * 2) + 1];
  984. bin2hex(hex, data, datalen);
  985. applog(LOG_DEBUG, "BitMain: Sent(%d): %s", datalen, hex);
  986. }
  987. //cgsleep_prepare_r(&ts_start);
  988. //applog(LOG_DEBUG, "----bitmain_send_data start");
  989. ret = bitmain_write(bitmain, (char *)data, datalen);
  990. applog(LOG_DEBUG, "----bitmain_send_data stop ret=%d datalen=%d", ret, datalen);
  991. //cgsleep_us_r(&ts_start, delay);
  992. //applog(LOG_DEBUG, "BitMain: Sent: Buffer delay: %dus", delay);
  993. return ret;
  994. }
  995. static bool bitmain_decode_nonce(struct thr_info *thr, struct cgpu_info *bitmain,
  996. struct bitmain_info *info, uint32_t nonce, struct work *work)
  997. {
  998. info = bitmain->device_data;
  999. //info->matching_work[work->subid]++;
  1000. if(opt_bitmain_hwerror) {
  1001. applog(LOG_DEBUG, "BitMain: submit direct nonce = %08x", nonce);
  1002. if(opt_bitmain_checkall) {
  1003. applog(LOG_DEBUG, "BitMain check all");
  1004. return submit_nonce(thr, work, nonce);
  1005. } else {
  1006. if(opt_bitmain_checkn2diff) {
  1007. int diff = 0;
  1008. diff = work->work_difficulty;
  1009. if(diff&&(diff&(diff-1))) {
  1010. applog(LOG_DEBUG, "BitMain %d not diff 2 submit_nonce", diff);
  1011. return submit_nonce(thr, work, nonce);
  1012. } else {
  1013. applog(LOG_DEBUG, "BitMain %d diff 2 submit_nonce_direct", diff);
  1014. return submit_nonce_direct(thr, work, nonce);
  1015. }
  1016. } else {
  1017. return submit_nonce_direct(thr, work, nonce);
  1018. }
  1019. }
  1020. } else {
  1021. applog(LOG_DEBUG, "BitMain: submit nonce = %08x", nonce);
  1022. return submit_nonce(thr, work, nonce);
  1023. }
  1024. }
  1025. static void bitmain_inc_nvw(struct bitmain_info *info, struct thr_info *thr)
  1026. {
  1027. applog(LOG_INFO, "%s%d: No matching work - HW error",
  1028. thr->cgpu->drv->name, thr->cgpu->device_id);
  1029. inc_hw_errors_only(thr);
  1030. info->no_matching_work++;
  1031. }
  1032. static inline void record_temp_fan(struct bitmain_info *info, struct bitmain_rxstatus_data *bm, double *temp_avg)
  1033. {
  1034. int i = 0;
  1035. int maxfan = 0, maxtemp = 0;
  1036. *temp_avg = 0;
  1037. info->fan_num = bm->fan_num;
  1038. for(i = 0; i < bm->fan_num; i++) {
  1039. info->fan[i] = bm->fan[i] * BITMAIN_FAN_FACTOR;
  1040. if(info->fan[i] > maxfan)
  1041. maxfan = info->fan[i];
  1042. }
  1043. info->temp_num = bm->temp_num;
  1044. for(i = 0; i < bm->temp_num; i++) {
  1045. info->temp[i] = bm->temp[i];
  1046. /*
  1047. if(bm->temp[i] & 0x80) {
  1048. bm->temp[i] &= 0x7f;
  1049. info->temp[i] = 0 - ((~bm->temp[i] & 0x7f) + 1);
  1050. }*/
  1051. *temp_avg += info->temp[i];
  1052. if(info->temp[i] > info->temp_max) {
  1053. info->temp_max = info->temp[i];
  1054. }
  1055. if(info->temp[i] > maxtemp)
  1056. maxtemp = info->temp[i];
  1057. }
  1058. if(bm->temp_num > 0) {
  1059. *temp_avg = *temp_avg / bm->temp_num;
  1060. info->temp_avg = *temp_avg;
  1061. }
  1062. inc_dev_status(maxfan, maxtemp);
  1063. }
  1064. static void bitmain_update_temps(struct cgpu_info *bitmain, struct bitmain_info *info,
  1065. struct bitmain_rxstatus_data *bm)
  1066. {
  1067. char tmp[64] = {0};
  1068. char msg[10240] = {0};
  1069. int i = 0;
  1070. record_temp_fan(info, bm, &(bitmain->temp));
  1071. strcpy(msg, "BitMain: ");
  1072. for(i = 0; i < bm->fan_num; i++) {
  1073. if(i != 0) {
  1074. strcat(msg, ", ");
  1075. }
  1076. sprintf(tmp, "Fan%d: %d/m", i+1, info->fan[i]);
  1077. strcat(msg, tmp);
  1078. }
  1079. strcat(msg, "\t");
  1080. for(i = 0; i < bm->temp_num; i++) {
  1081. if(i != 0) {
  1082. strcat(msg, ", ");
  1083. }
  1084. sprintf(tmp, "Temp%d: %dC", i+1, info->temp[i]);
  1085. strcat(msg, tmp);
  1086. }
  1087. sprintf(tmp, ", TempMAX: %dC", info->temp_max);
  1088. strcat(msg, tmp);
  1089. applog(LOG_INFO, msg);
  1090. info->temp_history_index++;
  1091. info->temp_sum += bitmain->temp;
  1092. applog(LOG_DEBUG, "BitMain: temp_index: %d, temp_count: %d, temp_old: %d",
  1093. info->temp_history_index, info->temp_history_count, info->temp_old);
  1094. if (info->temp_history_index == info->temp_history_count) {
  1095. info->temp_history_index = 0;
  1096. info->temp_sum = 0;
  1097. }
  1098. if (unlikely(info->temp_old >= opt_bitmain_overheat)) {
  1099. applog(LOG_WARNING, "BTM%d overheat! Idling", bitmain->device_id);
  1100. info->overheat = true;
  1101. } else if (info->overheat && info->temp_old <= opt_bitmain_temp) {
  1102. applog(LOG_WARNING, "BTM%d cooled, restarting", bitmain->device_id);
  1103. info->overheat = false;
  1104. }
  1105. }
  1106. extern void cg_logwork_uint32(struct work *work, uint32_t nonce, bool ok);
  1107. static void bitmain_parse_results(struct cgpu_info *bitmain, struct bitmain_info *info,
  1108. struct thr_info *thr, uint8_t *buf, int *offset)
  1109. {
  1110. int i, j, n, m, r, errordiff, spare = BITMAIN_READ_SIZE;
  1111. uint32_t checkbit = 0x00000000;
  1112. bool found = false;
  1113. struct work *work = NULL;
  1114. struct bitmain_packet_head packethead;
  1115. int asicnum = 0;
  1116. int idiff = 0;
  1117. int mod = 0,tmp = 0;
  1118. for (i = 0; i <= spare; i++) {
  1119. if(buf[i] == 0xa1) {
  1120. struct bitmain_rxstatus_data rxstatusdata;
  1121. applog(LOG_DEBUG, "bitmain_parse_results RxStatus Data");
  1122. if(*offset < 4) {
  1123. return;
  1124. }
  1125. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  1126. packethead.length = htole16(packethead.length);
  1127. if(packethead.length > 1130) {
  1128. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus datalen=%d error", packethead.length+4);
  1129. continue;
  1130. }
  1131. if(*offset < packethead.length + 4) {
  1132. return;
  1133. }
  1134. if(bitmain_parse_rxstatus(buf+i, packethead.length+4, &rxstatusdata) != 0) {
  1135. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus error len=%d", packethead.length+4);
  1136. } else {
  1137. mutex_lock(&info->qlock);
  1138. info->chain_num = rxstatusdata.chain_num;
  1139. info->fifo_space = rxstatusdata.fifo_space;
  1140. info->hw_version[0] = rxstatusdata.hw_version[0];
  1141. info->hw_version[1] = rxstatusdata.hw_version[1];
  1142. info->hw_version[2] = rxstatusdata.hw_version[2];
  1143. info->hw_version[3] = rxstatusdata.hw_version[3];
  1144. info->nonce_error = rxstatusdata.nonce_error;
  1145. errordiff = info->nonce_error-info->last_nonce_error;
  1146. //sprintf(g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  1147. applog(LOG_ERR, "bitmain_parse_results v=%d chain=%d fifo=%d hwv1=%d hwv2=%d hwv3=%d hwv4=%d nerr=%d-%d freq=%d chain info:",
  1148. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  1149. info->last_nonce_error, info->nonce_error, info->frequency);
  1150. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  1151. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  1152. for(n = 0; n < rxstatusdata.chain_num; n++) {
  1153. info->chain_asic_num[n] = rxstatusdata.chain_asic_num[n];
  1154. memset(info->chain_asic_status_t[n], 0, 320);
  1155. j = 0;
  1156. mod = 0;
  1157. if(info->chain_asic_num[n] <= 0) {
  1158. asicnum = 0;
  1159. } else {
  1160. mod = info->chain_asic_num[n] % 32;
  1161. if(mod == 0) {
  1162. asicnum = info->chain_asic_num[n] / 32;
  1163. } else {
  1164. asicnum = info->chain_asic_num[n] / 32 + 1;
  1165. }
  1166. }
  1167. if(asicnum > 0) {
  1168. for(m = asicnum-1; m >= 0; m--) {
  1169. tmp = mod ? (32-mod): 0;
  1170. for(r = tmp;r < 32;r++){
  1171. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  1172. info->chain_asic_status_t[n][j] = ' ';
  1173. j++;
  1174. }
  1175. checkbit = num2bit(r);
  1176. if(rxstatusdata.chain_asic_exist[n*8+m] & checkbit) {
  1177. if(rxstatusdata.chain_asic_status[n*8+m] & checkbit) {
  1178. info->chain_asic_status_t[n][j] = 'o';
  1179. } else {
  1180. info->chain_asic_status_t[n][j] = 'x';
  1181. }
  1182. } else {
  1183. info->chain_asic_status_t[n][j] = '-';
  1184. }
  1185. j++;
  1186. }
  1187. info->chain_asic_status_t[n][j] = ' ';
  1188. j++;
  1189. mod = 0;
  1190. }
  1191. }
  1192. applog(LOG_DEBUG, "bitmain_parse_results chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  1193. n, info->chain_asic_num[n],
  1194. info->chain_asic_exist[n*8+0], info->chain_asic_exist[n*8+1], info->chain_asic_exist[n*8+2], info->chain_asic_exist[n*8+3], info->chain_asic_exist[n*8+4], info->chain_asic_exist[n*8+5], info->chain_asic_exist[n*8+6], info->chain_asic_exist[n*8+7],
  1195. info->chain_asic_status[n*8+0], info->chain_asic_status[n*8+1], info->chain_asic_status[n*8+2], info->chain_asic_status[n*8+3], info->chain_asic_status[n*8+4], info->chain_asic_status[n*8+5], info->chain_asic_status[n*8+6], info->chain_asic_status[n*8+7]);
  1196. applog(LOG_ERR, "bitmain_parse_results chain(%d) asic_num=%d asic_status=%s", n, info->chain_asic_num[n], info->chain_asic_status_t[n]);
  1197. }
  1198. mutex_unlock(&info->qlock);
  1199. if(errordiff > 0) {
  1200. for(j = 0; j < errordiff; j++) {
  1201. bitmain_inc_nvw(info, thr);
  1202. }
  1203. mutex_lock(&info->qlock);
  1204. info->last_nonce_error += errordiff;
  1205. mutex_unlock(&info->qlock);
  1206. }
  1207. bitmain_update_temps(bitmain, info, &rxstatusdata);
  1208. }
  1209. found = true;
  1210. spare = packethead.length + 4 + i;
  1211. if(spare > *offset) {
  1212. applog(LOG_ERR, "bitmain_parse_rxresults space(%d) > offset(%d)", spare, *offset);
  1213. spare = *offset;
  1214. }
  1215. break;
  1216. } else if(buf[i] == 0xa2) {
  1217. struct bitmain_rxnonce_data rxnoncedata;
  1218. int nonce_num = 0;
  1219. applog(LOG_DEBUG, "bitmain_parse_results RxNonce Data");
  1220. if(*offset < 4) {
  1221. return;
  1222. }
  1223. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  1224. packethead.length = htole16(packethead.length);
  1225. if(packethead.length > 1030) {
  1226. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce datalen=%d error", packethead.length+4);
  1227. continue;
  1228. }
  1229. if(*offset < packethead.length + 4) {
  1230. return;
  1231. }
  1232. if(bitmain_parse_rxnonce(buf+i, packethead.length+4, &rxnoncedata, &nonce_num) != 0) {
  1233. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce error len=%d", packethead.length+4);
  1234. } else {
  1235. struct pool * pool = NULL;
  1236. for(j = 0; j < nonce_num; j++) {
  1237. work = clone_queued_work_byid(bitmain, rxnoncedata.nonces[j].work_id);
  1238. if(work) {
  1239. pool = work->pool;
  1240. if(BITMAIN_TEST_PRINT_WORK) {
  1241. applog(LOG_ERR, "bitmain_parse_results nonce find work(%d-%d)(%08x)", work->id, rxnoncedata.nonces[j].work_id, rxnoncedata.nonces[j].nonce);
  1242. char ob_hex[(32 * 2) + 1];
  1243. bin2hex(ob_hex, work->midstate, 32);
  1244. applog(LOG_ERR, "work %d midstate: %s", work->id, ob_hex);
  1245. bin2hex(ob_hex, &work->data[64], 12);
  1246. applog(LOG_ERR, "work %d data2: %s", work->id, ob_hex);
  1247. }
  1248. if(bfg_work_block(work) != info->last_work_block) {
  1249. applog(LOG_ERR, "BitMain: bitmain_parse_rxnonce work(%d) nonce stale", rxnoncedata.nonces[j].work_id);
  1250. } else {
  1251. if (bitmain_decode_nonce(thr, bitmain, info, rxnoncedata.nonces[j].nonce, work)) {
  1252. cg_logwork_uint32(work, rxnoncedata.nonces[j].nonce, true);
  1253. if(opt_bitmain_hwerror) {
  1254. #ifndef BITMAIN_CALC_DIFF1
  1255. mutex_lock(&info->qlock);
  1256. idiff = (int)work->work_difficulty;
  1257. info->nonces+=idiff;
  1258. info->auto_nonces+=idiff;
  1259. mutex_unlock(&info->qlock);
  1260. inc_work_status(thr, pool, idiff);
  1261. #endif
  1262. } else {
  1263. mutex_lock(&info->qlock);
  1264. info->nonces++;
  1265. info->auto_nonces++;
  1266. mutex_unlock(&info->qlock);
  1267. }
  1268. } else {
  1269. //bitmain_inc_nvw(info, thr);
  1270. applog(LOG_ERR, "BitMain: bitmain_decode_nonce error work(%d)", rxnoncedata.nonces[j].work_id);
  1271. }
  1272. }
  1273. free_work(work);
  1274. } else {
  1275. //bitmain_inc_nvw(info, thr);
  1276. applog(LOG_ERR, "BitMain: Nonce not find work(%d)", rxnoncedata.nonces[j].work_id);
  1277. }
  1278. }
  1279. #ifdef BITMAIN_CALC_DIFF1
  1280. if(opt_bitmain_hwerror) {
  1281. int difftmp = 0;
  1282. difftmp = rxnoncedata.diff;
  1283. idiff = 1;
  1284. while(difftmp > 0) {
  1285. difftmp--;
  1286. idiff = idiff << 1;
  1287. }
  1288. mutex_lock(&info->qlock);
  1289. difftmp = idiff*(rxnoncedata.total_nonce_num-info->total_nonce_num);
  1290. if(difftmp < 0)
  1291. difftmp = 0;
  1292. info->nonces = info->nonces+difftmp;
  1293. info->auto_nonces = info->auto_nonces+difftmp;
  1294. info->total_nonce_num = rxnoncedata.total_nonce_num;
  1295. info->fifo_space = rxnoncedata.fifo_space;
  1296. mutex_unlock(&info->qlock);
  1297. inc_work_stats(thr, pool, difftmp);
  1298. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d diff=%d rxtnn=%lld tnn=%lld", info->fifo_space, idiff, rxnoncedata.total_nonce_num, info->total_nonce_num);
  1299. } else {
  1300. mutex_lock(&info->qlock);
  1301. info->fifo_space = rxnoncedata.fifo_space;
  1302. mutex_unlock(&info->qlock);
  1303. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  1304. }
  1305. #else
  1306. mutex_lock(&info->qlock);
  1307. info->fifo_space = rxnoncedata.fifo_space;
  1308. mutex_unlock(&info->qlock);
  1309. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  1310. #endif
  1311. #ifndef WIN32
  1312. if(nonce_num < BITMAIN_MAX_NONCE_NUM)
  1313. cgsleep_ms(5);
  1314. #endif
  1315. }
  1316. found = true;
  1317. spare = packethead.length + 4 + i;
  1318. if(spare > *offset) {
  1319. applog(LOG_ERR, "bitmain_parse_rxnonce space(%d) > offset(%d)", spare, *offset);
  1320. spare = *offset;
  1321. }
  1322. break;
  1323. } else {
  1324. applog(LOG_ERR, "bitmain_parse_results data type error=%02x", buf[i]);
  1325. }
  1326. }
  1327. if (!found) {
  1328. spare = *offset - BITMAIN_READ_SIZE;
  1329. /* We are buffering and haven't accumulated one more corrupt
  1330. * work result. */
  1331. if (spare < (int)BITMAIN_READ_SIZE)
  1332. return;
  1333. bitmain_inc_nvw(info, thr);
  1334. }
  1335. *offset -= spare;
  1336. memmove(buf, buf + spare, *offset);
  1337. }
  1338. static void bitmain_running_reset(struct cgpu_info *bitmain, struct bitmain_info *info)
  1339. {
  1340. bitmain->results = 0;
  1341. info->reset = false;
  1342. }
  1343. static void *bitmain_get_results(void *userdata)
  1344. {
  1345. struct cgpu_info *bitmain = (struct cgpu_info *)userdata;
  1346. struct bitmain_info *info = bitmain->device_data;
  1347. int offset = 0, ret = 0;
  1348. const int rsize = BITMAIN_FTDI_READSIZE;
  1349. char readbuf[BITMAIN_READBUF_SIZE];
  1350. struct thr_info *thr = info->thr;
  1351. char threadname[24];
  1352. int errorcount = 0;
  1353. snprintf(threadname, 24, "btm_recv/%d", bitmain->device_id);
  1354. RenameThread(threadname);
  1355. while (likely(!bitmain->shutdown)) {
  1356. unsigned char buf[rsize];
  1357. //applog(LOG_DEBUG, "+++++++bitmain_get_results offset=%d", offset);
  1358. if (offset >= (int)BITMAIN_READ_SIZE) {
  1359. //applog(LOG_DEBUG, "======start bitmain_get_results ");
  1360. bitmain_parse_results(bitmain, info, thr, readbuf, &offset);
  1361. //applog(LOG_DEBUG, "======stop bitmain_get_results ");
  1362. }
  1363. if (unlikely(offset + rsize >= BITMAIN_READBUF_SIZE)) {
  1364. /* This should never happen */
  1365. applog(LOG_DEBUG, "BitMain readbuf overflow, resetting buffer");
  1366. offset = 0;
  1367. }
  1368. if (unlikely(info->reset)) {
  1369. bitmain_running_reset(bitmain, info);
  1370. /* Discard anything in the buffer */
  1371. offset = 0;
  1372. }
  1373. /* As the usb read returns after just 1ms, sleep long enough
  1374. * to leave the interface idle for writes to occur, but do not
  1375. * sleep if we have been receiving data as more may be coming. */
  1376. //if (offset == 0) {
  1377. // cgsleep_ms_r(&ts_start, BITMAIN_READ_TIMEOUT);
  1378. //}
  1379. //cgsleep_prepare_r(&ts_start);
  1380. //applog(LOG_DEBUG, "======start bitmain_get_results bitmain_read");
  1381. ret = bitmain_read(bitmain, buf, rsize, BITMAIN_READ_TIMEOUT);
  1382. //applog(LOG_DEBUG, "======stop bitmain_get_results bitmain_read=%d", ret);
  1383. if ((ret < 1) || (ret == 18)) {
  1384. errorcount++;
  1385. #ifdef WIN32
  1386. if(errorcount > 200) {
  1387. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1388. cgsleep_ms(20);
  1389. errorcount = 0;
  1390. }
  1391. #else
  1392. if(errorcount > 3) {
  1393. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1394. cgsleep_ms(20);
  1395. errorcount = 0;
  1396. }
  1397. #endif
  1398. if(ret < 1)
  1399. continue;
  1400. }
  1401. if (opt_debug) {
  1402. char hex[(ret * 2) + 1];
  1403. bin2hex(hex, buf, ret);
  1404. applog(LOG_DEBUG, "BitMain: get: %s", hex);
  1405. }
  1406. memcpy(readbuf+offset, buf, ret);
  1407. offset += ret;
  1408. }
  1409. return NULL;
  1410. }
  1411. static void bitmain_set_timeout(struct bitmain_info *info)
  1412. {
  1413. info->timeout = BITMAIN_TIMEOUT_FACTOR / info->frequency;
  1414. }
  1415. static void bitmain_init(struct cgpu_info *bitmain)
  1416. {
  1417. applog(LOG_INFO, "BitMain: Opened on %s", bitmain->device_path);
  1418. }
  1419. static bool bitmain_prepare(struct thr_info *thr)
  1420. {
  1421. struct cgpu_info *bitmain = thr->cgpu;
  1422. struct bitmain_info *info = bitmain->device_data;
  1423. free(bitmain->works);
  1424. bitmain->works = calloc(BITMAIN_MAX_WORK_NUM * sizeof(struct work *),
  1425. BITMAIN_ARRAY_SIZE);
  1426. if (!bitmain->works)
  1427. quit(1, "Failed to calloc bitmain works in bitmain_prepare");
  1428. info->thr = thr;
  1429. mutex_init(&info->lock);
  1430. mutex_init(&info->qlock);
  1431. if (unlikely(pthread_cond_init(&info->qcond, NULL)))
  1432. quit(1, "Failed to pthread_cond_init bitmain qcond");
  1433. if (pthread_create(&info->read_thr, NULL, bitmain_get_results, (void *)bitmain))
  1434. quit(1, "Failed to create bitmain read_thr");
  1435. bitmain_init(bitmain);
  1436. return true;
  1437. }
  1438. static int bitmain_initialize(struct cgpu_info *bitmain)
  1439. {
  1440. uint8_t data[BITMAIN_READBUF_SIZE];
  1441. struct bitmain_info *info = NULL;
  1442. int ret = 0;
  1443. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1444. int readlen = 0;
  1445. int sendlen = 0;
  1446. int trycount = 3;
  1447. struct timespec p;
  1448. struct bitmain_rxstatus_data rxstatusdata;
  1449. int i = 0, j = 0, m = 0, r = 0, statusok = 0;
  1450. uint32_t checkbit = 0x00000000;
  1451. int hwerror_eft = 0;
  1452. int beeper_ctrl = 1;
  1453. int tempover_ctrl = 1;
  1454. int home_mode = 0;
  1455. struct bitmain_packet_head packethead;
  1456. int asicnum = 0;
  1457. int mod = 0,tmp = 0;
  1458. /* Send reset, then check for result */
  1459. if(!bitmain) {
  1460. applog(LOG_WARNING, "bitmain_initialize cgpu_info is null");
  1461. return -1;
  1462. }
  1463. info = bitmain->device_data;
  1464. /* clear read buf */
  1465. ret = bitmain_read(bitmain, data, BITMAIN_READBUF_SIZE,
  1466. BITMAIN_RESET_TIMEOUT);
  1467. if(ret > 0) {
  1468. if (opt_debug) {
  1469. char hex[(ret * 2) + 1];
  1470. bin2hex(hex, data, ret);
  1471. applog(LOG_DEBUG, "BTM%d Clear Read(%d): %s", bitmain->device_id, ret, hex);
  1472. }
  1473. }
  1474. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *)sendbuf, 0, 1, 0, 0);
  1475. if(sendlen <= 0) {
  1476. applog(LOG_ERR, "bitmain_initialize bitmain_set_rxstatus error(%d)", sendlen);
  1477. return -1;
  1478. }
  1479. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1480. if (unlikely(ret == BTM_SEND_ERROR)) {
  1481. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1482. return -1;
  1483. }
  1484. while(trycount >= 0) {
  1485. ret = bitmain_read(bitmain, data+readlen, BITMAIN_READBUF_SIZE, BITMAIN_RESET_TIMEOUT);
  1486. if(ret > 0) {
  1487. readlen += ret;
  1488. if(readlen > BITMAIN_READ_SIZE) {
  1489. for(i = 0; i < readlen; i++) {
  1490. if(data[i] == 0xa1) {
  1491. if (opt_debug) {
  1492. char hex[(readlen * 2) + 1];
  1493. bin2hex(hex, data, readlen);
  1494. applog(LOG_DEBUG, "%s%d initset: get: %s", bitmain->drv->name, bitmain->device_id, hex);
  1495. }
  1496. memcpy(&packethead, data+i, sizeof(struct bitmain_packet_head));
  1497. packethead.length = htole16(packethead.length);
  1498. if(packethead.length > 1130) {
  1499. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d error", packethead.length+4);
  1500. continue;
  1501. }
  1502. if(readlen-i < packethead.length+4) {
  1503. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d<%d low", readlen-i, packethead.length+4);
  1504. continue;
  1505. }
  1506. if (bitmain_parse_rxstatus(data+i, packethead.length+4, &rxstatusdata) != 0) {
  1507. applog(LOG_ERR, "bitmain_initialize bitmain_parse_rxstatus error");
  1508. continue;
  1509. }
  1510. info->chain_num = rxstatusdata.chain_num;
  1511. info->fifo_space = rxstatusdata.fifo_space;
  1512. info->hw_version[0] = rxstatusdata.hw_version[0];
  1513. info->hw_version[1] = rxstatusdata.hw_version[1];
  1514. info->hw_version[2] = rxstatusdata.hw_version[2];
  1515. info->hw_version[3] = rxstatusdata.hw_version[3];
  1516. info->nonce_error = 0;
  1517. info->last_nonce_error = 0;
  1518. sprintf(g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  1519. applog(LOG_ERR, "bitmain_initialize rxstatus v(%d) chain(%d) fifo(%d) hwv1(%d) hwv2(%d) hwv3(%d) hwv4(%d) nerr(%d) freq=%d",
  1520. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  1521. rxstatusdata.nonce_error, info->frequency);
  1522. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  1523. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  1524. for(i = 0; i < rxstatusdata.chain_num; i++) {
  1525. info->chain_asic_num[i] = rxstatusdata.chain_asic_num[i];
  1526. memset(info->chain_asic_status_t[i], 0, 320);
  1527. j = 0;
  1528. mod = 0;
  1529. if(info->chain_asic_num[i] <= 0) {
  1530. asicnum = 0;
  1531. } else {
  1532. mod = info->chain_asic_num[i] % 32;
  1533. if(mod == 0) {
  1534. asicnum = info->chain_asic_num[i] / 32;
  1535. } else {
  1536. asicnum = info->chain_asic_num[i] / 32 + 1;
  1537. }
  1538. }
  1539. if(asicnum > 0) {
  1540. for(m = asicnum-1; m >= 0; m--) {
  1541. tmp = mod ? (32-mod):0;
  1542. for(r = tmp;r < 32;r++){
  1543. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  1544. info->chain_asic_status_t[i][j] = ' ';
  1545. j++;
  1546. }
  1547. checkbit = num2bit(r);
  1548. if(rxstatusdata.chain_asic_exist[i*8+m] & checkbit) {
  1549. if(rxstatusdata.chain_asic_status[i*8+m] & checkbit) {
  1550. info->chain_asic_status_t[i][j] = 'o';
  1551. } else {
  1552. info->chain_asic_status_t[i][j] = 'x';
  1553. }
  1554. } else {
  1555. info->chain_asic_status_t[i][j] = '-';
  1556. }
  1557. j++;
  1558. }
  1559. info->chain_asic_status_t[i][j] = ' ';
  1560. j++;
  1561. mod = 0;
  1562. }
  1563. }
  1564. applog(LOG_DEBUG, "bitmain_initialize chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  1565. i, info->chain_asic_num[i],
  1566. info->chain_asic_exist[i*8+0], info->chain_asic_exist[i*8+1], info->chain_asic_exist[i*8+2], info->chain_asic_exist[i*8+3], info->chain_asic_exist[i*8+4], info->chain_asic_exist[i*8+5], info->chain_asic_exist[i*8+6], info->chain_asic_exist[i*8+7],
  1567. info->chain_asic_status[i*8+0], info->chain_asic_status[i*8+1], info->chain_asic_status[i*8+2], info->chain_asic_status[i*8+3], info->chain_asic_status[i*8+4], info->chain_asic_status[i*8+5], info->chain_asic_status[i*8+6], info->chain_asic_status[i*8+7]);
  1568. applog(LOG_ERR, "bitmain_initialize chain(%d) asic_num=%d asic_status=%s", i, info->chain_asic_num[i], info->chain_asic_status_t[i]);
  1569. }
  1570. bitmain_update_temps(bitmain, info, &rxstatusdata);
  1571. statusok = 1;
  1572. break;
  1573. }
  1574. }
  1575. if(statusok) {
  1576. break;
  1577. }
  1578. }
  1579. }
  1580. trycount--;
  1581. p.tv_sec = 0;
  1582. p.tv_nsec = BITMAIN_RESET_PITCH;
  1583. nanosleep(&p, NULL);
  1584. }
  1585. p.tv_sec = 0;
  1586. p.tv_nsec = BITMAIN_RESET_PITCH;
  1587. nanosleep(&p, NULL);
  1588. cgtime(&info->last_status_time);
  1589. if(statusok) {
  1590. applog(LOG_ERR, "bitmain_initialize start send txconfig");
  1591. if(opt_bitmain_hwerror)
  1592. hwerror_eft = 1;
  1593. else
  1594. hwerror_eft = 0;
  1595. if(opt_bitmain_nobeeper)
  1596. beeper_ctrl = 0;
  1597. else
  1598. beeper_ctrl = 1;
  1599. if(opt_bitmain_notempoverctrl)
  1600. tempover_ctrl = 0;
  1601. else
  1602. tempover_ctrl = 1;
  1603. if(opt_bitmain_homemode)
  1604. home_mode= 1;
  1605. else
  1606. home_mode= 0;
  1607. sendlen = bitmain_set_txconfig((struct bitmain_txconfig_token *)sendbuf, 1, 1, 1, 1, 1, 0, 1, hwerror_eft, beeper_ctrl, tempover_ctrl,home_mode,
  1608. info->chain_num, info->asic_num, BITMAIN_DEFAULT_FAN_MAX_PWM, info->timeout,
  1609. info->frequency, info->voltage, 0, 0, 0x04, info->reg_data);
  1610. if(sendlen <= 0) {
  1611. applog(LOG_ERR, "bitmain_initialize bitmain_set_txconfig error(%d)", sendlen);
  1612. return -1;
  1613. }
  1614. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1615. if (unlikely(ret == BTM_SEND_ERROR)) {
  1616. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1617. return -1;
  1618. }
  1619. applog(LOG_WARNING, "BMM%d: InitSet succeeded", bitmain->device_id);
  1620. } else {
  1621. applog(LOG_WARNING, "BMS%d: InitSet error", bitmain->device_id);
  1622. return -1;
  1623. }
  1624. return 0;
  1625. }
  1626. static bool bitmain_detect_one(const char * devpath)
  1627. {
  1628. int baud, chain_num, asic_num, timeout, frequency = 0;
  1629. char frequency_t[256] = {0};
  1630. uint8_t reg_data[4] = {0};
  1631. uint8_t voltage[2] = {0};
  1632. char voltage_t[8] = {0};
  1633. int this_option_offset = ++option_offset;
  1634. struct bitmain_info *info;
  1635. struct cgpu_info *bitmain;
  1636. bool configured;
  1637. int ret;
  1638. if (opt_bitmain_options == NULL)
  1639. return false;
  1640. bitmain = btm_alloc_cgpu(&bitmain_drv, BITMAIN_MINER_THREADS);
  1641. configured = get_options(this_option_offset, &baud, &chain_num,
  1642. &asic_num, &timeout, &frequency, frequency_t, reg_data, voltage, voltage_t);
  1643. get_option_freq(&timeout, &frequency, frequency_t, reg_data);
  1644. get_option_voltage(voltage, voltage_t);
  1645. if (!btm_init(bitmain, opt_bitmain_dev))
  1646. goto shin;
  1647. applog(LOG_ERR, "bitmain_detect_one btm init ok");
  1648. bitmain->device_data = calloc(sizeof(struct bitmain_info), 1);
  1649. /* make sure initialize successfully*/
  1650. memset(bitmain->device_data,0,sizeof(struct bitmain_info));
  1651. if (unlikely(!(bitmain->device_data)))
  1652. quit(1, "Failed to calloc bitmain_info data");
  1653. info = bitmain->device_data;
  1654. if (configured) {
  1655. info->baud = baud;
  1656. info->chain_num = chain_num;
  1657. info->asic_num = asic_num;
  1658. info->timeout = timeout;
  1659. info->frequency = frequency;
  1660. strcpy(info->frequency_t, frequency_t);
  1661. memcpy(info->reg_data, reg_data, 4);
  1662. memcpy(info->voltage, voltage, 2);
  1663. strcpy(info->voltage_t, voltage_t);
  1664. } else {
  1665. info->baud = BITMAIN_IO_SPEED;
  1666. info->chain_num = BITMAIN_DEFAULT_CHAIN_NUM;
  1667. info->asic_num = BITMAIN_DEFAULT_ASIC_NUM;
  1668. info->timeout = BITMAIN_DEFAULT_TIMEOUT;
  1669. info->frequency = BITMAIN_DEFAULT_FREQUENCY;
  1670. sprintf(info->frequency_t, "%d", BITMAIN_DEFAULT_FREQUENCY);
  1671. memset(info->reg_data, 0, 4);
  1672. info->voltage[0] = BITMAIN_DEFAULT_VOLTAGE0;
  1673. info->voltage[1] = BITMAIN_DEFAULT_VOLTAGE1;
  1674. strcpy(info->voltage_t, BITMAIN_DEFAULT_VOLTAGE_T);
  1675. }
  1676. info->fan_pwm = BITMAIN_DEFAULT_FAN_MIN_PWM;
  1677. info->temp_max = 0;
  1678. /* This is for check the temp/fan every 3~4s */
  1679. info->temp_history_count = (4 / (float)((float)info->timeout * ((float)1.67/0x32))) + 1;
  1680. if (info->temp_history_count <= 0)
  1681. info->temp_history_count = 1;
  1682. info->temp_history_index = 0;
  1683. info->temp_sum = 0;
  1684. info->temp_old = 0;
  1685. if (!add_cgpu(bitmain))
  1686. goto unshin;
  1687. ret = bitmain_initialize(bitmain);
  1688. applog(LOG_ERR, "bitmain_detect_one stop bitmain_initialize %d", ret);
  1689. if (ret && !configured)
  1690. goto unshin;
  1691. info->errorcount = 0;
  1692. applog(LOG_ERR, "BitMain Detected: %s "
  1693. "(chain_num=%d asic_num=%d timeout=%d freq=%d-%s volt=%02x%02x-%s)",
  1694. bitmain->device_path, info->chain_num, info->asic_num, info->timeout,
  1695. info->frequency, info->frequency_t, info->voltage[0], info->voltage[1], info->voltage_t);
  1696. return true;
  1697. unshin:
  1698. btm_uninit(bitmain);
  1699. shin:
  1700. free(bitmain->device_data);
  1701. bitmain->device_data = NULL;
  1702. free(bitmain);
  1703. return false;
  1704. }
  1705. static void bitmain_detect(bool __maybe_unused hotplug)
  1706. {
  1707. applog(LOG_DEBUG, "BTM detect dev: %s", opt_bitmain_dev);
  1708. if (strlen(opt_bitmain_dev) > 0) {
  1709. btm_detect(&bitmain_drv, bitmain_detect_one);
  1710. }
  1711. }
  1712. static void do_bitmain_close(struct thr_info *thr)
  1713. {
  1714. struct cgpu_info *bitmain = thr->cgpu;
  1715. struct bitmain_info *info = bitmain->device_data;
  1716. pthread_join(info->read_thr, NULL);
  1717. bitmain_running_reset(bitmain, info);
  1718. info->no_matching_work = 0;
  1719. }
  1720. static void get_bitmain_statline_before(char *buf, size_t bufsiz, struct cgpu_info *bitmain)
  1721. {
  1722. struct bitmain_info *info = bitmain->device_data;
  1723. int lowfan = 10000;
  1724. int i = 0;
  1725. /* Find the lowest fan speed of the ASIC cooling fans. */
  1726. for(i = 0; i < info->fan_num; i++) {
  1727. if (info->fan[i] >= 0 && info->fan[i] < lowfan)
  1728. lowfan = info->fan[i];
  1729. }
  1730. tailsprintf(buf, bufsiz, "%2d/%3dC %04dR | ", info->temp_avg, info->temp_max, lowfan);
  1731. }
  1732. /* We use a replacement algorithm to only remove references to work done from
  1733. * the buffer when we need the extra space for new work. */
  1734. static bool bitmain_fill(struct cgpu_info *bitmain)
  1735. {
  1736. struct bitmain_info *info = bitmain->device_data;
  1737. int subid, slot;
  1738. struct work *work;
  1739. bool ret = true;
  1740. int sendret = 0, sendcount = 0, neednum = 0, queuednum = 0, sendnum = 0, sendlen = 0;
  1741. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1742. int senderror = 0;
  1743. struct timeval now;
  1744. int timediff = 0;
  1745. //applog(LOG_DEBUG, "BTM bitmain_fill start--------");
  1746. mutex_lock(&info->qlock);
  1747. if(info->fifo_space <= 0) {
  1748. //applog(LOG_DEBUG, "BTM bitmain_fill fifo space empty--------");
  1749. ret = true;
  1750. goto out_unlock;
  1751. }
  1752. if (bitmain->queued >= BITMAIN_MAX_WORK_QUEUE_NUM) {
  1753. ret = true;
  1754. } else {
  1755. ret = false;
  1756. }
  1757. while(info->fifo_space > 0) {
  1758. neednum = info->fifo_space<BITMAIN_MAX_WORK_NUM?info->fifo_space:BITMAIN_MAX_WORK_NUM;
  1759. queuednum = bitmain->queued;
  1760. applog(LOG_DEBUG, "BTM: Work task queued(%d) fifo space(%d) needsend(%d)", queuednum, info->fifo_space, neednum);
  1761. if(queuednum < neednum) {
  1762. while(true) {
  1763. work = get_queued(bitmain);
  1764. if (unlikely(!work)) {
  1765. break;
  1766. } else {
  1767. applog(LOG_DEBUG, "BTM get work queued number:%d neednum:%d", queuednum, neednum);
  1768. subid = bitmain->queued++;
  1769. work->subid = subid;
  1770. slot = bitmain->work_array + subid;
  1771. if (slot > BITMAIN_ARRAY_SIZE) {
  1772. applog(LOG_DEBUG, "bitmain_fill array cyc %d", BITMAIN_ARRAY_SIZE);
  1773. slot = 0;
  1774. }
  1775. if (likely(bitmain->works[slot])) {
  1776. applog(LOG_DEBUG, "bitmain_fill work_completed %d", slot);
  1777. work_completed(bitmain, bitmain->works[slot]);
  1778. }
  1779. bitmain->works[slot] = work;
  1780. queuednum++;
  1781. if(queuednum >= neednum) {
  1782. break;
  1783. }
  1784. }
  1785. }
  1786. }
  1787. if(queuednum < BITMAIN_MAX_DEAL_QUEUE_NUM) {
  1788. if(queuednum < neednum) {
  1789. applog(LOG_DEBUG, "BTM: No enough work to send, queue num=%d", queuednum);
  1790. break;
  1791. }
  1792. }
  1793. sendnum = queuednum < neednum ? queuednum : neednum;
  1794. sendlen = bitmain_set_txtask(sendbuf, &(info->last_work_block), bitmain->works, BITMAIN_ARRAY_SIZE, bitmain->work_array, sendnum, &sendcount);
  1795. bitmain->queued -= sendnum;
  1796. info->send_full_space += sendnum;
  1797. if (bitmain->queued < 0)
  1798. bitmain->queued = 0;
  1799. if (bitmain->work_array + sendnum > BITMAIN_ARRAY_SIZE) {
  1800. bitmain->work_array = bitmain->work_array + sendnum-BITMAIN_ARRAY_SIZE;
  1801. } else {
  1802. bitmain->work_array += sendnum;
  1803. }
  1804. applog(LOG_DEBUG, "BTM: Send work array %d", bitmain->work_array);
  1805. if (sendlen > 0) {
  1806. info->fifo_space -= sendcount;
  1807. if (info->fifo_space < 0)
  1808. info->fifo_space = 0;
  1809. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1810. if (unlikely(sendret == BTM_SEND_ERROR)) {
  1811. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  1812. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  1813. info->reset = true;
  1814. info->errorcount++;
  1815. senderror = 1;
  1816. if (info->errorcount > 1000) {
  1817. info->errorcount = 0;
  1818. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  1819. bitmain->shutdown = true;
  1820. }
  1821. break;
  1822. } else {
  1823. applog(LOG_DEBUG, "bitmain_send_data send ret=%d", sendret);
  1824. info->errorcount = 0;
  1825. }
  1826. } else {
  1827. applog(LOG_DEBUG, "BTM: Send work bitmain_set_txtask error: %d", sendlen);
  1828. break;
  1829. }
  1830. }
  1831. out_unlock:
  1832. cgtime(&now);
  1833. timediff = now.tv_sec - info->last_status_time.tv_sec;
  1834. if(timediff < 0) timediff = -timediff;
  1835. if (timediff > BITMAIN_SEND_STATUS_TIME) {
  1836. applog(LOG_DEBUG, "BTM: Send RX Status Token fifo_space(%d) timediff(%d)", info->fifo_space, timediff);
  1837. copy_time(&(info->last_status_time), &now);
  1838. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *) sendbuf, 0, 0, 0, 0);
  1839. if (sendlen > 0) {
  1840. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1841. if (unlikely(sendret == BTM_SEND_ERROR)) {
  1842. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  1843. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  1844. info->reset = true;
  1845. info->errorcount++;
  1846. senderror = 1;
  1847. if (info->errorcount > 1000) {
  1848. info->errorcount = 0;
  1849. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  1850. bitmain->shutdown = true;
  1851. }
  1852. } else {
  1853. info->errorcount = 0;
  1854. if (info->fifo_space <= 0) {
  1855. senderror = 1;
  1856. }
  1857. }
  1858. }
  1859. }
  1860. if(info->send_full_space > BITMAIN_SEND_FULL_SPACE) {
  1861. info->send_full_space = 0;
  1862. ret = true;
  1863. cgsleep_ms(1);
  1864. }
  1865. mutex_unlock(&info->qlock);
  1866. if(senderror) {
  1867. ret = true;
  1868. applog(LOG_DEBUG, "bitmain_fill send task sleep");
  1869. //cgsleep_ms(1);
  1870. }
  1871. return ret;
  1872. }
  1873. static int64_t bitmain_scanhash(struct thr_info *thr)
  1874. {
  1875. struct cgpu_info *bitmain = thr->cgpu;
  1876. struct bitmain_info *info = bitmain->device_data;
  1877. const int chain_num = info->chain_num;
  1878. int64_t hash_count;
  1879. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock start");
  1880. mutex_lock(&info->qlock);
  1881. hash_count = 0xffffffffull * (uint64_t)info->nonces;
  1882. bitmain->results += info->nonces + info->idle;
  1883. if (bitmain->results > chain_num)
  1884. bitmain->results = chain_num;
  1885. if (!info->reset)
  1886. bitmain->results--;
  1887. info->nonces = info->idle = 0;
  1888. mutex_unlock(&info->qlock);
  1889. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock stop");
  1890. /* Check for nothing but consecutive bad results or consistently less
  1891. * results than we should be getting and reset the FPGA if necessary */
  1892. //if (bitmain->results < -chain_num && !info->reset) {
  1893. // applog(LOG_ERR, "BTM%d: Result return rate low, resetting!",
  1894. // bitmain->device_id);
  1895. // info->reset = true;
  1896. //}
  1897. /* This hashmeter is just a utility counter based on returned shares */
  1898. return hash_count;
  1899. }
  1900. static void bitmain_flush_work(struct cgpu_info *bitmain)
  1901. {
  1902. struct bitmain_info *info = bitmain->device_data;
  1903. int i = 0;
  1904. mutex_lock(&info->qlock);
  1905. /* Will overwrite any work queued */
  1906. applog(LOG_ERR, "bitmain_flush_work queued=%d array=%d", bitmain->queued, bitmain->work_array);
  1907. if(bitmain->queued > 0) {
  1908. if (bitmain->work_array + bitmain->queued > BITMAIN_ARRAY_SIZE) {
  1909. bitmain->work_array = bitmain->work_array + bitmain->queued-BITMAIN_ARRAY_SIZE;
  1910. } else {
  1911. bitmain->work_array += bitmain->queued;
  1912. }
  1913. }
  1914. bitmain->queued = 0;
  1915. //bitmain->work_array = 0;
  1916. //for(i = 0; i < BITMAIN_ARRAY_SIZE; i++) {
  1917. // bitmain->works[i] = NULL;
  1918. //}
  1919. //pthread_cond_signal(&info->qcond);
  1920. mutex_unlock(&info->qlock);
  1921. }
  1922. static struct api_data *bitmain_api_stats(struct cgpu_info *cgpu)
  1923. {
  1924. struct api_data *root = NULL;
  1925. struct bitmain_info *info = cgpu->device_data;
  1926. int i = 0;
  1927. double hwp = (cgpu->hw_errors + cgpu->diff1) ?
  1928. (double)(cgpu->hw_errors) / (double)(cgpu->hw_errors + cgpu->diff1) : 0;
  1929. root = api_add_int(root, "baud", &(info->baud), false);
  1930. root = api_add_int(root, "miner_count", &(info->chain_num), false);
  1931. root = api_add_int(root, "asic_count", &(info->asic_num), false);
  1932. root = api_add_int(root, "timeout", &(info->timeout), false);
  1933. root = api_add_string(root, "frequency", info->frequency_t, false);
  1934. root = api_add_string(root, "voltage", info->voltage_t, false);
  1935. root = api_add_int(root, "hwv1", &(info->hw_version[0]), false);
  1936. root = api_add_int(root, "hwv2", &(info->hw_version[1]), false);
  1937. root = api_add_int(root, "hwv3", &(info->hw_version[2]), false);
  1938. root = api_add_int(root, "hwv4", &(info->hw_version[3]), false);
  1939. root = api_add_int(root, "fan_num", &(info->fan_num), false);
  1940. root = api_add_int(root, "fan1", &(info->fan[0]), false);
  1941. root = api_add_int(root, "fan2", &(info->fan[1]), false);
  1942. root = api_add_int(root, "fan3", &(info->fan[2]), false);
  1943. root = api_add_int(root, "fan4", &(info->fan[3]), false);
  1944. root = api_add_int(root, "fan5", &(info->fan[4]), false);
  1945. root = api_add_int(root, "fan6", &(info->fan[5]), false);
  1946. root = api_add_int(root, "fan7", &(info->fan[6]), false);
  1947. root = api_add_int(root, "fan8", &(info->fan[7]), false);
  1948. root = api_add_int(root, "fan9", &(info->fan[8]), false);
  1949. root = api_add_int(root, "fan10", &(info->fan[9]), false);
  1950. root = api_add_int(root, "fan11", &(info->fan[10]), false);
  1951. root = api_add_int(root, "fan12", &(info->fan[11]), false);
  1952. root = api_add_int(root, "fan13", &(info->fan[12]), false);
  1953. root = api_add_int(root, "fan14", &(info->fan[13]), false);
  1954. root = api_add_int(root, "fan15", &(info->fan[14]), false);
  1955. root = api_add_int(root, "fan16", &(info->fan[15]), false);
  1956. root = api_add_int(root, "temp_num", &(info->temp_num), false);
  1957. root = api_add_int(root, "temp1", &(info->temp[0]), false);
  1958. root = api_add_int(root, "temp2", &(info->temp[1]), false);
  1959. root = api_add_int(root, "temp3", &(info->temp[2]), false);
  1960. root = api_add_int(root, "temp4", &(info->temp[3]), false);
  1961. root = api_add_int(root, "temp5", &(info->temp[4]), false);
  1962. root = api_add_int(root, "temp6", &(info->temp[5]), false);
  1963. root = api_add_int(root, "temp7", &(info->temp[6]), false);
  1964. root = api_add_int(root, "temp8", &(info->temp[7]), false);
  1965. root = api_add_int(root, "temp9", &(info->temp[8]), false);
  1966. root = api_add_int(root, "temp10", &(info->temp[9]), false);
  1967. root = api_add_int(root, "temp11", &(info->temp[10]), false);
  1968. root = api_add_int(root, "temp12", &(info->temp[11]), false);
  1969. root = api_add_int(root, "temp13", &(info->temp[12]), false);
  1970. root = api_add_int(root, "temp14", &(info->temp[13]), false);
  1971. root = api_add_int(root, "temp15", &(info->temp[14]), false);
  1972. root = api_add_int(root, "temp16", &(info->temp[15]), false);
  1973. root = api_add_int(root, "temp_avg", &(info->temp_avg), false);
  1974. root = api_add_int(root, "temp_max", &(info->temp_max), false);
  1975. root = api_add_percent(root, "Device Hardware%", &hwp, true);
  1976. root = api_add_int(root, "no_matching_work", &(info->no_matching_work), false);
  1977. /*
  1978. for (i = 0; i < info->chain_num; i++) {
  1979. char mcw[24];
  1980. sprintf(mcw, "match_work_count%d", i + 1);
  1981. root = api_add_int(root, mcw, &(info->matching_work[i]), false);
  1982. }*/
  1983. root = api_add_int(root, "chain_acn1", &(info->chain_asic_num[0]), false);
  1984. root = api_add_int(root, "chain_acn2", &(info->chain_asic_num[1]), false);
  1985. root = api_add_int(root, "chain_acn3", &(info->chain_asic_num[2]), false);
  1986. root = api_add_int(root, "chain_acn4", &(info->chain_asic_num[3]), false);
  1987. root = api_add_int(root, "chain_acn5", &(info->chain_asic_num[4]), false);
  1988. root = api_add_int(root, "chain_acn6", &(info->chain_asic_num[5]), false);
  1989. root = api_add_int(root, "chain_acn7", &(info->chain_asic_num[6]), false);
  1990. root = api_add_int(root, "chain_acn8", &(info->chain_asic_num[7]), false);
  1991. root = api_add_int(root, "chain_acn9", &(info->chain_asic_num[8]), false);
  1992. root = api_add_int(root, "chain_acn10", &(info->chain_asic_num[9]), false);
  1993. root = api_add_int(root, "chain_acn11", &(info->chain_asic_num[10]), false);
  1994. root = api_add_int(root, "chain_acn12", &(info->chain_asic_num[11]), false);
  1995. root = api_add_int(root, "chain_acn13", &(info->chain_asic_num[12]), false);
  1996. root = api_add_int(root, "chain_acn14", &(info->chain_asic_num[13]), false);
  1997. root = api_add_int(root, "chain_acn15", &(info->chain_asic_num[14]), false);
  1998. root = api_add_int(root, "chain_acn16", &(info->chain_asic_num[15]), false);
  1999. //applog(LOG_ERR, "chain asic status:%s", info->chain_asic_status_t[0]);
  2000. root = api_add_string(root, "chain_acs1", info->chain_asic_status_t[0], false);
  2001. root = api_add_string(root, "chain_acs2", info->chain_asic_status_t[1], false);
  2002. root = api_add_string(root, "chain_acs3", info->chain_asic_status_t[2], false);
  2003. root = api_add_string(root, "chain_acs4", info->chain_asic_status_t[3], false);
  2004. root = api_add_string(root, "chain_acs5", info->chain_asic_status_t[4], false);
  2005. root = api_add_string(root, "chain_acs6", info->chain_asic_status_t[5], false);
  2006. root = api_add_string(root, "chain_acs7", info->chain_asic_status_t[6], false);
  2007. root = api_add_string(root, "chain_acs8", info->chain_asic_status_t[7], false);
  2008. root = api_add_string(root, "chain_acs9", info->chain_asic_status_t[8], false);
  2009. root = api_add_string(root, "chain_acs10", info->chain_asic_status_t[9], false);
  2010. root = api_add_string(root, "chain_acs11", info->chain_asic_status_t[10], false);
  2011. root = api_add_string(root, "chain_acs12", info->chain_asic_status_t[11], false);
  2012. root = api_add_string(root, "chain_acs13", info->chain_asic_status_t[12], false);
  2013. root = api_add_string(root, "chain_acs14", info->chain_asic_status_t[13], false);
  2014. root = api_add_string(root, "chain_acs15", info->chain_asic_status_t[14], false);
  2015. root = api_add_string(root, "chain_acs16", info->chain_asic_status_t[15], false);
  2016. //root = api_add_int(root, "chain_acs1", &(info->chain_asic_status[0]), false);
  2017. //root = api_add_int(root, "chain_acs2", &(info->chain_asic_status[1]), false);
  2018. //root = api_add_int(root, "chain_acs3", &(info->chain_asic_status[2]), false);
  2019. //root = api_add_int(root, "chain_acs4", &(info->chain_asic_status[3]), false);
  2020. return root;
  2021. }
  2022. static void bitmain_shutdown(struct thr_info *thr)
  2023. {
  2024. do_bitmain_close(thr);
  2025. }
  2026. char *set_bitmain_dev(char *arg)
  2027. {
  2028. if(arg == NULL || strlen(arg) <= 0) {
  2029. memcpy(opt_bitmain_dev, 0, 256);
  2030. } else {
  2031. strncpy(opt_bitmain_dev, arg, 256);
  2032. }
  2033. applog(LOG_DEBUG, "BTM set device: %s", opt_bitmain_dev);
  2034. return NULL;
  2035. }
  2036. char *set_bitmain_fan(char *arg)
  2037. {
  2038. int val1, val2, ret;
  2039. ret = sscanf(arg, "%d-%d", &val1, &val2);
  2040. if (ret < 1)
  2041. return "No values passed to bitmain-fan";
  2042. if (ret == 1)
  2043. val2 = val1;
  2044. if (val1 < 0 || val1 > 100 || val2 < 0 || val2 > 100 || val2 < val1)
  2045. return "Invalid value passed to bitmain-fan";
  2046. opt_bitmain_fan_min = val1 * BITMAIN_PWM_MAX / 100;
  2047. opt_bitmain_fan_max = val2 * BITMAIN_PWM_MAX / 100;
  2048. return NULL;
  2049. }
  2050. char *set_bitmain_freq(char *arg)
  2051. {
  2052. int val1, val2, ret;
  2053. ret = sscanf(arg, "%d-%d", &val1, &val2);
  2054. if (ret < 1)
  2055. return "No values passed to bitmain-freq";
  2056. if (ret == 1)
  2057. val2 = val1;
  2058. if (val1 < BITMAIN_MIN_FREQUENCY || val1 > BITMAIN_MAX_FREQUENCY ||
  2059. val2 < BITMAIN_MIN_FREQUENCY || val2 > BITMAIN_MAX_FREQUENCY ||
  2060. val2 < val1)
  2061. return "Invalid value passed to bitmain-freq";
  2062. opt_bitmain_freq_min = val1;
  2063. opt_bitmain_freq_max = val2;
  2064. return NULL;
  2065. }
  2066. struct device_drv bitmain_drv = {
  2067. .dname = "bitmain",
  2068. .name = "BTM",
  2069. .drv_detect = bitmain_detect,
  2070. .thread_prepare = bitmain_prepare,
  2071. .minerloop = hash_queued_work,
  2072. .queue_full = bitmain_fill,
  2073. .scanwork = bitmain_scanhash,
  2074. .flush_work = bitmain_flush_work,
  2075. .get_api_stats = bitmain_api_stats,
  2076. .get_statline_before = get_bitmain_statline_before,
  2077. .reinit_device = bitmain_init,
  2078. .thread_shutdown = bitmain_shutdown,
  2079. };