driver-bab.c 49 KB

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  1. /*
  2. * Copyright 2013 Andrew Smith
  3. * Copyright 2013 bitfury
  4. *
  5. * Details for BitFury GPIO development of this driver are from
  6. * the chainminer code: https://github.com/bfsb/chainminer
  7. * (coz there seems to be no good documentation of it anywhere ...)
  8. * Thanks to the developer of chainminer for providing the source
  9. * to base the first version of the gpio/spi code in this BitFury chip
  10. * driver :)
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the Free
  14. * Software Foundation; either version 3 of the License, or (at your option)
  15. * any later version. See COPYING for more details.
  16. */
  17. #include "config.h"
  18. #include "compat.h"
  19. #include "miner.h"
  20. #include "sha2.h"
  21. /*
  22. * This code has been tested on RPi running Raspbian
  23. * with a BlackArrow BitFury V1 16 chip GPIO board
  24. */
  25. #ifndef LINUX
  26. static void bab_detect(__maybe_unused bool hotplug)
  27. {
  28. }
  29. #else
  30. #include <unistd.h>
  31. #include <linux/spi/spidev.h>
  32. #include <sys/mman.h>
  33. #include <sys/ioctl.h>
  34. #include <fcntl.h>
  35. #define BAB_SPI_BUS 0
  36. #define BAB_SPI_CHIP 0
  37. #define BAB_SPI_SPEED 96000
  38. #define BAB_SPI_BUFSIZ 1024
  39. #define BAB_ADDR(_n) (*((babinfo->gpio) + (_n)))
  40. #define BAB_INP_GPIO(_n) BAB_ADDR((_n) / 10) &= (~(7 << (((_n) % 10) * 3)))
  41. #define BAB_OUT_GPIO(_n) BAB_ADDR((_n) / 10) |= (1 << (((_n) % 10) * 3))
  42. #define BAB_OUT_GPIO_V(_n, _v) BAB_ADDR((_n) / 10) |= (((_v) <= 3 ? (_v) + 4 : \
  43. ((_v) == 4 ? 3 : 2)) << (((_n) % 10) * 3))
  44. #define BAB_GPIO_SET BAB_ADDR(7)
  45. #define BAB_GPIO_CLR BAB_ADDR(10)
  46. #define BAB_GPIO_LEVEL BAB_ADDR(13)
  47. #define BAB_MAXCHIPS 256
  48. #define BAB_MAXBUF (BAB_MAXCHIPS * 512)
  49. #define BAB_MAXBANKS 4
  50. #define BAB_CORES 16
  51. #define BAB_X_COORD 21
  52. #define BAB_Y_COORD 36
  53. #define BAB_BREAK ((uint8_t *)"\04")
  54. #define BAB_ASYNC ((uint8_t *)"\05")
  55. #define BAB_SYNC ((uint8_t *)"\06")
  56. #define BAB_FFL " - from %s %s() line %d"
  57. #define BAB_FFL_HERE __FILE__, __func__, __LINE__
  58. #define BAB_FFL_PASS file, func, line
  59. #define bab_reset(_bank, _times) _bab_reset(babcgpu, babinfo, _bank, _times)
  60. #define bab_txrx(_buf, _siz, _det) _bab_txrx(babcgpu, babinfo, _buf, _siz, _det, BAB_FFL_HERE)
  61. #define bab_add_buf(_data) _bab_add_buf(babcgpu, babinfo, _data, sizeof(_data)-1, BAB_FFL_HERE)
  62. #define BAB_ADD_BREAK() _bab_add_buf(babcgpu, babinfo, BAB_BREAK, 1, BAB_FFL_HERE)
  63. #define BAB_ADD_ASYNC() _bab_add_buf(babcgpu, babinfo, BAB_ASYNC, 1, BAB_FFL_HERE)
  64. #define bab_config_reg(_reg, _ena) _bab_config_reg(babcgpu, babinfo, _reg, _ena, BAB_FFL_HERE)
  65. #define bab_add_data(_addr, _data, _siz) _bab_add_data(babcgpu, babinfo, _addr, (const uint8_t *)(_data), _siz, BAB_FFL_HERE)
  66. #define BAB_ADD_MIN 4
  67. #define BAB_ADD_MAX 128
  68. #define BAB_STATE_DONE 0
  69. #define BAB_STATE_READY 1
  70. #define BAB_STATE_SENDING 2
  71. #define BAB_STATE_SENT 3
  72. #define BAB_STATE_READING 4
  73. #define BAB_SPI_BUFFERS 2
  74. #define BAB_BASEA 4
  75. #define BAB_BASEB 61
  76. #define BAB_COUNTERS 16
  77. static const uint8_t bab_counters[BAB_COUNTERS] = {
  78. 64, 64,
  79. BAB_BASEA, BAB_BASEA+4,
  80. BAB_BASEA+2, BAB_BASEA+2+16,
  81. BAB_BASEA, BAB_BASEA+1,
  82. (BAB_BASEB)%65, (BAB_BASEB+1)%65,
  83. (BAB_BASEB+3)%65, (BAB_BASEB+3+16)%65,
  84. (BAB_BASEB+4)%65, (BAB_BASEB+4+4)%65,
  85. (BAB_BASEB+3+3)%65, (BAB_BASEB+3+1+3)%65
  86. };
  87. #define BAB_W1 16
  88. static const uint32_t bab_w1[BAB_W1] = {
  89. 0, 0, 0, 0xffffffff,
  90. 0x80000000, 0, 0, 0,
  91. 0, 0, 0, 0,
  92. 0, 0, 0, 0x00000280
  93. };
  94. #define BAB_W2 8
  95. static const uint32_t bab_w2[BAB_W2] = {
  96. 0x80000000, 0, 0, 0,
  97. 0, 0, 0, 0x00000100
  98. };
  99. #define BAB_TEST_DATA 19
  100. static const uint32_t bab_test_data[BAB_TEST_DATA] = {
  101. 0xb0e72d8e, 0x1dc5b862, 0xe9e7c4a6, 0x3050f1f5,
  102. 0x8a1a6b7e, 0x7ec384e8, 0x42c1c3fc, 0x8ed158a1,
  103. 0x8a1a6b7e, 0x6f484872, 0x4ff0bb9b, 0x12c97f07,
  104. 0xb0e72d8e, 0x55d979bc, 0x39403296, 0x40f09e84,
  105. 0x8a0bb7b7, 0x33af304f, 0x0b290c1a //, 0xf0c4e61f
  106. };
  107. //maximum number of chips on alternative bank
  108. // #define BANKCHIPS 64
  109. //maximum chip speed available for auto tuner
  110. //speed/nrate/hrate/watt
  111. // 53/ 97/ 100/ 84
  112. // 54/ 98/ 107/ 88
  113. // 55/ 99/ 115/ 93
  114. // 56/ 101/ 125/ 99
  115. #define BAB_MAXSPEED 57
  116. #define BAB_DEFSPEED 54
  117. #define BAB_MINSPEED 52
  118. #define MIDSTATE_BYTES 32
  119. #define MERKLE_OFFSET 64
  120. #define MERKLE_BYTES 12
  121. #define BLOCK_HEADER_BYTES 80
  122. #define MIDSTATE_UINTS (MIDSTATE_BYTES / sizeof(uint32_t))
  123. #define DATA_UINTS ((BLOCK_HEADER_BYTES / sizeof(uint32_t)) - 1)
  124. // Auto adjust
  125. #define BAB_AUTO_REG 0
  126. #define BAB_AUTO_VAL 0x01
  127. // iclk
  128. #define BAB_ICLK_REG 1
  129. #define BAB_ICLK_VAL 0x02
  130. // No fast clock
  131. #define BAB_FAST_REG 2
  132. #define BAB_FAST_VAL 0x04
  133. // Divide by 2
  134. #define BAB_DIV2_REG 3
  135. #define BAB_DIV2_VAL 0x08
  136. // Slow Clock
  137. #define BAB_SLOW_REG 4
  138. #define BAB_SLOW_VAL 0x10
  139. // No oclk
  140. #define BAB_OCLK_REG 6
  141. #define BAB_OCLK_VAL 0x20
  142. // Has configured
  143. #define BAB_CFGD_VAL 0x40
  144. #define BAB_DEFCONF (BAB_AUTO_VAL | \
  145. BAB_ICLK_VAL | \
  146. BAB_DIV2_VAL | \
  147. BAB_SLOW_VAL)
  148. #define BAB_REG_CLR_FROM 7
  149. #define BAB_REG_CLR_TO 11
  150. #define BAB_AUTO_SET(_c) ((_c) & BAB_AUTO_VAL)
  151. #define BAB_ICLK_SET(_c) ((_c) & BAB_ICLK_VAL)
  152. #define BAB_FAST_SET(_c) ((_c) & BAB_FAST_VAL)
  153. #define BAB_DIV2_SET(_c) ((_c) & BAB_DIV2_VAL)
  154. #define BAB_SLOW_SET(_c) ((_c) & BAB_SLOW_VAL)
  155. #define BAB_OCLK_SET(_c) ((_c) & BAB_OCLK_VAL)
  156. #define BAB_CFGD_SET(_c) ((_c) & BAB_CFGD_VAL)
  157. #define BAB_AUTO_BIT(_c) (BAB_AUTO_SET(_c) ? true : false)
  158. #define BAB_ICLK_BIT(_c) (BAB_ICLK_SET(_c) ? false : true)
  159. #define BAB_FAST_BIT(_c) (BAB_FAST_SET(_c) ? true : false)
  160. #define BAB_DIV2_BIT(_c) (BAB_DIV2_SET(_c) ? false : true)
  161. #define BAB_SLOW_BIT(_c) (BAB_SLOW_SET(_c) ? true : false)
  162. #define BAB_OCLK_BIT(_c) (BAB_OCLK_SET(_c) ? true : false)
  163. #define BAB_COUNT_ADDR 0x0100
  164. #define BAB_W1A_ADDR 0x1000
  165. #define BAB_W1B_ADDR 0x1400
  166. #define BAB_W2_ADDR 0x1900
  167. #define BAB_INP_ADDR 0x3000
  168. #define BAB_OSC_ADDR 0x6000
  169. #define BAB_REG_ADDR 0x7000
  170. // valid: 0x01 0x03 0x07 0x0F 0x1F 0x3F 0x7F 0xFF
  171. //max { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0x00 }
  172. //max { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x3F, 0x00 }
  173. //avg { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00 }
  174. //slo { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x3F, 0x00 }
  175. //min { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
  176. // good: 0x1F (97) 0x3F (104) 0x7F (109) 0xFF (104)
  177. #define BAB_OSC 8
  178. static const uint8_t bab_osc_bits[BAB_OSC] =
  179. { 0x01, 0x03, 0x07, 0x0F, 0x1F, 0x3F, 0x7F, 0xFF };
  180. static const uint8_t bab_reg_ena[4] = { 0xc1, 0x6a, 0x59, 0xe3 };
  181. static const uint8_t bab_reg_dis[4] = { 0x00, 0x00, 0x00, 0x00 };
  182. #define BAB_NONCE_OFFSETS 3
  183. static const uint32_t bab_nonce_offsets[] = {-0x800000, 0, -0x400000};
  184. struct bab_work_send {
  185. uint32_t midstate[MIDSTATE_UINTS];
  186. uint32_t ms3steps[MIDSTATE_UINTS];
  187. uint32_t merkle7;
  188. uint32_t ntime;
  189. uint32_t bits;
  190. };
  191. #define BAB_REPLY_NONCES 16
  192. struct bab_work_reply {
  193. uint32_t nonce[BAB_REPLY_NONCES];
  194. uint32_t jobsel;
  195. };
  196. #define MAX_BLISTS 4096
  197. typedef struct blist {
  198. struct blist *prev;
  199. struct blist *next;
  200. struct work *work;
  201. int nonces;
  202. } BLIST;
  203. #define MAX_RLISTS 256
  204. typedef struct rlist {
  205. struct rlist *prev;
  206. struct rlist *next;
  207. int chip;
  208. uint32_t nonce;
  209. bool first_second;
  210. } RLIST;
  211. struct bab_info {
  212. struct thr_info spi_thr;
  213. struct thr_info res_thr;
  214. pthread_mutex_t spi_lock;
  215. pthread_mutex_t res_lock;
  216. pthread_mutex_t did_lock;
  217. cglock_t blist_lock;
  218. // All GPIO goes through this
  219. volatile unsigned *gpio;
  220. int spifd;
  221. int chips;
  222. uint32_t chip_spis[BAB_MAXCHIPS+1];
  223. int buffer;
  224. int buf_status[BAB_SPI_BUFFERS];
  225. uint8_t buf_write[BAB_SPI_BUFFERS][BAB_MAXBUF];
  226. uint8_t buf_read[BAB_SPI_BUFFERS][BAB_MAXBUF];
  227. uint32_t buf_used[BAB_SPI_BUFFERS];
  228. uint32_t chip_off[BAB_SPI_BUFFERS][BAB_MAXCHIPS+1];
  229. uint32_t bank_off[BAB_SPI_BUFFERS][BAB_MAXBANKS+2];
  230. struct bab_work_send chip_input[BAB_MAXCHIPS];
  231. struct bab_work_reply chip_results[BAB_MAXCHIPS];
  232. struct bab_work_reply chip_prev[BAB_MAXCHIPS];
  233. uint8_t chip_fast[BAB_MAXCHIPS];
  234. uint8_t chip_conf[BAB_MAXCHIPS];
  235. uint8_t old_fast[BAB_MAXCHIPS];
  236. uint8_t old_conf[BAB_MAXCHIPS];
  237. uint8_t chip_bank[BAB_MAXCHIPS+1];
  238. uint8_t osc[BAB_OSC];
  239. int fixchip;
  240. /*
  241. * Ignore errors in the first work reply since
  242. * they may be from a previous run or random junk
  243. * There can be >100 with just a 16 chip board
  244. */
  245. uint32_t initial_ignored;
  246. bool nonce_before[BAB_MAXCHIPS];
  247. bool not_first_reply[BAB_MAXCHIPS];
  248. // Stats
  249. struct timeval chip_start[BAB_MAXCHIPS];
  250. int chip_busy[BAB_MAXCHIPS];
  251. uint64_t core_good[BAB_MAXCHIPS][BAB_CORES];
  252. uint64_t core_bad[BAB_MAXCHIPS][BAB_CORES];
  253. uint64_t chip_spie[BAB_MAXCHIPS]; // spi errors
  254. uint64_t chip_miso[BAB_MAXCHIPS]; // msio errors
  255. uint64_t chip_nonces[BAB_MAXCHIPS];
  256. uint64_t chip_good[BAB_MAXCHIPS];
  257. uint64_t chip_bad[BAB_MAXCHIPS];
  258. uint64_t chip_ncore[BAB_MAXCHIPS][BAB_X_COORD][BAB_Y_COORD];
  259. uint64_t untested_nonces;
  260. uint64_t tested_nonces;
  261. uint64_t new_nonces;
  262. uint64_t ok_nonces;
  263. uint64_t nonce_offset_count[BAB_NONCE_OFFSETS];
  264. uint64_t total_tests;
  265. uint64_t max_tests_per_nonce;
  266. uint64_t total_links;
  267. uint64_t max_links;
  268. int blist_count;
  269. int bfree_count;
  270. int work_count;
  271. int chip_count;
  272. BLIST *bfree_list;
  273. BLIST *work_list;
  274. BLIST *chip_list[BAB_MAXCHIPS];
  275. int rlist_count;
  276. int rfree_count;
  277. int res_count;
  278. RLIST *rfree_list;
  279. RLIST *res_list_head;
  280. RLIST *res_list_tail;
  281. struct timeval last_did;
  282. bool initialised;
  283. };
  284. static BLIST *new_blist_set(struct cgpu_info *babcgpu)
  285. {
  286. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  287. BLIST *blist = NULL;
  288. int i;
  289. blist = calloc(MAX_BLISTS, sizeof(*blist));
  290. if (!blist)
  291. quithere(1, "Failed to calloc blist - when old count=%d", babinfo->blist_count);
  292. babinfo->blist_count += MAX_BLISTS;
  293. babinfo->bfree_count = MAX_BLISTS;
  294. blist[0].prev = NULL;
  295. blist[0].next = &(blist[1]);
  296. for (i = 1; i < MAX_BLISTS-1; i++) {
  297. blist[i].prev = &blist[i-1];
  298. blist[i].next = &blist[i+1];
  299. }
  300. blist[MAX_BLISTS-1].prev = &(blist[MAX_BLISTS-2]);
  301. blist[MAX_BLISTS-1].next = NULL;
  302. return blist;
  303. }
  304. static BLIST *next_work(struct cgpu_info *babcgpu, int chip)
  305. {
  306. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  307. BLIST *bitem;
  308. cg_wlock(&babinfo->blist_lock);
  309. bitem = babinfo->work_list;
  310. if (bitem) {
  311. // Unlink it from work
  312. if (bitem->next)
  313. bitem->next->prev = NULL;
  314. babinfo->work_list = bitem->next;
  315. babinfo->work_count--;
  316. // Add it to the chip
  317. bitem->next = babinfo->chip_list[chip];
  318. bitem->prev = NULL;
  319. if (bitem->next)
  320. bitem->next->prev = bitem;
  321. babinfo->chip_list[chip] = bitem;
  322. babinfo->chip_count++;
  323. }
  324. cg_wunlock(&babinfo->blist_lock);
  325. return bitem;
  326. }
  327. static void discard_last(struct cgpu_info *babcgpu, int chip)
  328. {
  329. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  330. BLIST *bitem;
  331. cg_wlock(&babinfo->blist_lock);
  332. bitem = babinfo->chip_list[chip];
  333. if (bitem) {
  334. // Unlink it from the chip
  335. if (bitem->next)
  336. bitem->next->prev = NULL;
  337. babinfo->chip_list[chip] = bitem->next;
  338. babinfo->chip_count--;
  339. // Put it in the free list
  340. bitem->next = babinfo->bfree_list;
  341. bitem->prev = NULL;
  342. if (bitem->next)
  343. bitem->next->prev = bitem;
  344. babinfo->bfree_list = bitem;
  345. babinfo->bfree_count++;
  346. }
  347. cg_wunlock(&babinfo->blist_lock);
  348. }
  349. static BLIST *store_work(struct cgpu_info *babcgpu, struct work *work)
  350. {
  351. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  352. BLIST *bitem = NULL;
  353. int ran_out = 0;
  354. cg_wlock(&babinfo->blist_lock);
  355. if (babinfo->bfree_list == NULL) {
  356. ran_out = babinfo->blist_count;
  357. babinfo->bfree_list = new_blist_set(babcgpu);
  358. }
  359. // unlink from free
  360. bitem = babinfo->bfree_list;
  361. babinfo->bfree_list = babinfo->bfree_list->next;
  362. if (babinfo->bfree_list)
  363. babinfo->bfree_list->prev = NULL;
  364. babinfo->bfree_count--;
  365. // add to work
  366. bitem->next = babinfo->work_list;
  367. bitem->prev = NULL;
  368. if (bitem->next)
  369. bitem->next->prev = bitem;
  370. babinfo->work_list = bitem;
  371. babinfo->work_count++;
  372. bitem->work = work;
  373. bitem->nonces = 0;
  374. cg_wunlock(&babinfo->blist_lock);
  375. if (ran_out > 0) {
  376. applog(LOG_ERR, "%s%i: BLIST used count exceeded %d, now %d (work=%d chip=%d)",
  377. babcgpu->drv->name, babcgpu->device_id,
  378. ran_out, babinfo->blist_count,
  379. babinfo->work_count,
  380. babinfo->chip_count);
  381. }
  382. return bitem;
  383. }
  384. static void free_blist(struct cgpu_info *babcgpu, BLIST *bhead, int chip)
  385. {
  386. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  387. struct work *work;
  388. BLIST *bitem;
  389. if (!bhead)
  390. return;
  391. // Unlink it from the chip
  392. cg_wlock(&babinfo->blist_lock);
  393. if (unlikely(bhead == babinfo->chip_list[chip])) {
  394. // Removing the chip head is an error
  395. bhead = bhead->next;
  396. babinfo->chip_list[chip]->next = NULL;
  397. } else
  398. bhead->prev->next = NULL;
  399. bitem = bhead;
  400. while (bitem) {
  401. babinfo->chip_count--;
  402. bitem = bitem->next;
  403. }
  404. cg_wunlock(&babinfo->blist_lock);
  405. while (bhead) {
  406. bitem = bhead;
  407. bhead = bitem->next;
  408. // add to free
  409. cg_wlock(&babinfo->blist_lock);
  410. bitem->next = babinfo->bfree_list;
  411. if (babinfo->bfree_list)
  412. babinfo->bfree_list->prev = bitem;
  413. bitem->prev = NULL;
  414. babinfo->bfree_list = bitem;
  415. babinfo->bfree_count++;
  416. work = bitem->work;
  417. cg_wunlock(&babinfo->blist_lock);
  418. work_completed(babcgpu, work);
  419. }
  420. }
  421. static RLIST *new_rlist_set(struct cgpu_info *babcgpu)
  422. {
  423. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  424. RLIST *rlist = NULL;
  425. int i;
  426. rlist = calloc(MAX_RLISTS, sizeof(*rlist));
  427. if (!rlist)
  428. quithere(1, "Failed to calloc rlist - when old count=%d", babinfo->rlist_count);
  429. babinfo->rlist_count += MAX_RLISTS;
  430. babinfo->rfree_count = MAX_RLISTS;
  431. rlist[0].prev = NULL;
  432. rlist[0].next = &(rlist[1]);
  433. for (i = 1; i < MAX_RLISTS-1; i++) {
  434. rlist[i].prev = &rlist[i-1];
  435. rlist[i].next = &rlist[i+1];
  436. }
  437. rlist[MAX_RLISTS-1].prev = &(rlist[MAX_RLISTS-2]);
  438. rlist[MAX_RLISTS-1].next = NULL;
  439. return rlist;
  440. }
  441. static RLIST *store_nonce(struct cgpu_info *babcgpu, int chip, uint32_t nonce, bool first_second)
  442. {
  443. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  444. RLIST *ritem = NULL;
  445. int ran_out = 0;
  446. mutex_lock(&(babinfo->res_lock));
  447. if (babinfo->rfree_list == NULL) {
  448. ran_out = babinfo->rlist_count;
  449. babinfo->rfree_list = new_rlist_set(babcgpu);
  450. }
  451. // unlink from rfree
  452. ritem = babinfo->rfree_list;
  453. babinfo->rfree_list = babinfo->rfree_list->next;
  454. if (babinfo->rfree_list)
  455. babinfo->rfree_list->prev = NULL;
  456. babinfo->rfree_count--;
  457. // add to head of results
  458. ritem->next = babinfo->res_list_head;
  459. ritem->prev = NULL;
  460. babinfo->res_list_head = ritem;
  461. if (ritem->next)
  462. ritem->next->prev = ritem;
  463. else
  464. babinfo->res_list_tail = ritem;
  465. babinfo->res_count++;
  466. ritem->chip = chip;
  467. ritem->nonce = nonce;
  468. ritem->first_second = first_second;
  469. mutex_unlock(&(babinfo->res_lock));
  470. if (ran_out > 0) {
  471. applog(LOG_ERR, "%s%i: RLIST used count exceeded %d, now %d (work=%d chip=%d)",
  472. babcgpu->drv->name, babcgpu->device_id,
  473. ran_out, babinfo->rlist_count,
  474. babinfo->work_count,
  475. babinfo->chip_count);
  476. }
  477. return ritem;
  478. }
  479. static bool oldest_nonce(struct cgpu_info *babcgpu, int *chip, uint32_t *nonce, bool *first_second)
  480. {
  481. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  482. RLIST *ritem = NULL;
  483. bool found = false;
  484. mutex_lock(&(babinfo->res_lock));
  485. if (babinfo->res_list_tail) {
  486. // unlink from res
  487. ritem = babinfo->res_list_tail;
  488. if (ritem->prev) {
  489. ritem->prev->next = NULL;
  490. babinfo->res_list_tail = ritem->prev;
  491. } else
  492. babinfo->res_list_head = babinfo->res_list_tail = NULL;
  493. babinfo->res_count--;
  494. found = true;
  495. *chip = ritem->chip;
  496. *nonce = ritem->nonce;
  497. *first_second = ritem->first_second;
  498. // add to rfree
  499. ritem->next = babinfo->rfree_list;
  500. ritem->prev = NULL;
  501. if (ritem->next)
  502. ritem->next->prev = ritem;
  503. babinfo->rfree_list = ritem;
  504. babinfo->rfree_count++;
  505. }
  506. mutex_unlock(&(babinfo->res_lock));
  507. return found;
  508. }
  509. static void _bab_reset(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo, int bank, int times)
  510. {
  511. const int banks[4] = { 18, 23, 24, 25 };
  512. int i;
  513. BAB_INP_GPIO(10);
  514. BAB_OUT_GPIO(10);
  515. BAB_INP_GPIO(11);
  516. BAB_OUT_GPIO(11);
  517. if (bank) {
  518. for (i = 0; i < 4; i++) {
  519. BAB_INP_GPIO(banks[i]);
  520. BAB_OUT_GPIO(banks[i]);
  521. if (bank == i+1)
  522. BAB_GPIO_SET = 1 << banks[i];
  523. else
  524. BAB_GPIO_CLR = 1 << banks[i];
  525. }
  526. cgsleep_us(4096);
  527. } else {
  528. for (i = 0; i < 4; i++)
  529. BAB_INP_GPIO(banks[i]);
  530. }
  531. BAB_GPIO_SET = 1 << 11;
  532. for (i = 0; i < times; i++) { // 1us = 1MHz
  533. BAB_GPIO_SET = 1 << 10;
  534. cgsleep_us(1);
  535. BAB_GPIO_CLR = 1 << 10;
  536. cgsleep_us(1);
  537. }
  538. BAB_GPIO_CLR = 1 << 11;
  539. BAB_INP_GPIO(11);
  540. BAB_INP_GPIO(10);
  541. BAB_INP_GPIO(9);
  542. BAB_OUT_GPIO_V(11, 0);
  543. BAB_OUT_GPIO_V(10, 0);
  544. BAB_OUT_GPIO_V(9, 0);
  545. }
  546. // TODO: handle a false return where this is called?
  547. static bool _bab_txrx(struct cgpu_info *babcgpu, struct bab_info *babinfo, int buf, uint32_t siz, bool detect_ignore, const char *file, const char *func, const int line)
  548. {
  549. int bank, i;
  550. uint32_t pos;
  551. struct spi_ioc_transfer tran;
  552. uintptr_t rbuf, wbuf;
  553. wbuf = (uintptr_t)(babinfo->buf_write[buf]);
  554. rbuf = (uintptr_t)(babinfo->buf_read[buf]);
  555. memset(&tran, 0, sizeof(tran));
  556. tran.delay_usecs = 0;
  557. tran.speed_hz = BAB_SPI_SPEED;
  558. i = 0;
  559. pos = 0;
  560. for (bank = 0; bank <= BAB_MAXBANKS; bank++) {
  561. if (babinfo->bank_off[buf][bank]) {
  562. bab_reset(bank, 64);
  563. break;
  564. }
  565. }
  566. if (unlikely(bank > BAB_MAXBANKS)) {
  567. applog(LOG_ERR, "%s%d: %s() failed to find a bank" BAB_FFL,
  568. babcgpu->drv->name, babcgpu->device_id,
  569. __func__, BAB_FFL_PASS);
  570. return false;
  571. }
  572. while (siz > 0) {
  573. tran.tx_buf = wbuf;
  574. tran.rx_buf = rbuf;
  575. tran.speed_hz = BAB_SPI_SPEED;
  576. if (pos == babinfo->bank_off[buf][bank]) {
  577. for (; ++bank <= BAB_MAXBANKS; ) {
  578. if (babinfo->bank_off[buf][bank] > pos) {
  579. bab_reset(bank, 64);
  580. break;
  581. }
  582. }
  583. }
  584. if (siz < BAB_SPI_BUFSIZ)
  585. tran.len = siz;
  586. else
  587. tran.len = BAB_SPI_BUFSIZ;
  588. if (pos < babinfo->bank_off[buf][bank] &&
  589. babinfo->bank_off[buf][bank] < (pos + tran.len))
  590. tran.len = babinfo->bank_off[buf][bank] - pos;
  591. for (; i < babinfo->chips; i++) {
  592. if (!babinfo->chip_off[buf][i])
  593. continue;
  594. if (babinfo->chip_off[buf][i] >= pos + tran.len) {
  595. tran.speed_hz = babinfo->chip_spis[i];
  596. break;
  597. }
  598. }
  599. if (unlikely(i > babinfo->chips)) {
  600. applog(LOG_ERR, "%s%d: %s() failed to find chip" BAB_FFL,
  601. babcgpu->drv->name, babcgpu->device_id,
  602. __func__, BAB_FFL_PASS);
  603. return false;
  604. }
  605. if (unlikely(babinfo->chip_spis[i] == BAB_SPI_SPEED)) {
  606. applog(LOG_DEBUG, "%s%d: %s() chip[%d] speed %d shouldn't be %d" BAB_FFL,
  607. babcgpu->drv->name, babcgpu->device_id,
  608. __func__, i, (int)babinfo->chip_spis[i],
  609. BAB_SPI_SPEED, BAB_FFL_PASS);
  610. }
  611. if (unlikely(tran.speed_hz == BAB_SPI_SPEED)) {
  612. applog(LOG_DEBUG, "%s%d: %s() transfer speed %d shouldn't be %d" BAB_FFL,
  613. babcgpu->drv->name, babcgpu->device_id,
  614. __func__, (int)tran.speed_hz,
  615. BAB_SPI_SPEED, BAB_FFL_PASS);
  616. }
  617. if (ioctl(babinfo->spifd, SPI_IOC_MESSAGE(1), (void *)&tran) < 0) {
  618. if (!detect_ignore || errno != 110) {
  619. applog(LOG_ERR, "%s%d: ioctl failed err=%d" BAB_FFL,
  620. babcgpu->drv->name, babcgpu->device_id,
  621. errno, BAB_FFL_PASS);
  622. }
  623. return false;
  624. }
  625. siz -= tran.len;
  626. wbuf += tran.len;
  627. rbuf += tran.len;
  628. pos += tran.len;
  629. }
  630. mutex_lock(&(babinfo->did_lock));
  631. cgtime(&(babinfo->last_did));
  632. mutex_unlock(&(babinfo->did_lock));
  633. return true;
  634. }
  635. static void _bab_add_buf_rev(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo, const uint8_t *data, uint32_t siz, const char *file, const char *func, const int line)
  636. {
  637. uint8_t tmp;
  638. uint32_t now_used, i;
  639. int buf;
  640. buf = babinfo->buffer;
  641. now_used = babinfo->buf_used[buf];
  642. if (now_used + siz >= BAB_MAXBUF) {
  643. quitfrom(1, file, func, line,
  644. "%s() buffer %d limit of %d exceeded=%d siz=%d",
  645. __func__, buf, BAB_MAXBUF, now_used + siz, siz);
  646. }
  647. for (i = 0; i < siz; i++) {
  648. tmp = data[i];
  649. tmp = ((tmp & 0xaa)>>1) | ((tmp & 0x55) << 1);
  650. tmp = ((tmp & 0xcc)>>2) | ((tmp & 0x33) << 2);
  651. tmp = ((tmp & 0xf0)>>4) | ((tmp & 0x0f) << 4);
  652. babinfo->buf_write[buf][now_used + i] = tmp;
  653. }
  654. babinfo->buf_used[buf] += siz;
  655. }
  656. static void _bab_add_buf(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo, const uint8_t *data, size_t siz, const char *file, const char *func, const int line)
  657. {
  658. uint32_t now_used;
  659. int buf;
  660. buf = babinfo->buffer;
  661. now_used = babinfo->buf_used[buf];
  662. if (now_used + siz >= BAB_MAXBUF) {
  663. quitfrom(1, file, func, line,
  664. "%s() buffer %d limit of %d exceeded=%d siz=%d",
  665. __func__, buf, BAB_MAXBUF, (int)(now_used + siz), (int)siz);
  666. }
  667. memcpy(&(babinfo->buf_write[buf][now_used]), data, siz);
  668. babinfo->buf_used[buf] += siz;
  669. }
  670. static void _bab_add_data(struct cgpu_info *babcgpu, struct bab_info *babinfo, uint32_t addr, const uint8_t *data, size_t siz, const char *file, const char *func, const int line)
  671. {
  672. uint8_t tmp[3];
  673. int trf_siz;
  674. if (siz < BAB_ADD_MIN || siz > BAB_ADD_MAX) {
  675. quitfrom(1, file, func, line,
  676. "%s() called with invalid siz=%d (min=%d max=%d)",
  677. __func__, (int)siz, BAB_ADD_MIN, BAB_ADD_MAX);
  678. }
  679. trf_siz = siz / 4;
  680. tmp[0] = (trf_siz - 1) | 0xE0;
  681. tmp[1] = (addr >> 8) & 0xff;
  682. tmp[2] = addr & 0xff;
  683. _bab_add_buf(babcgpu, babinfo, tmp, sizeof(tmp), BAB_FFL_PASS);
  684. _bab_add_buf_rev(babcgpu, babinfo, data, siz, BAB_FFL_PASS);
  685. }
  686. static void _bab_config_reg(struct cgpu_info *babcgpu, struct bab_info *babinfo, uint32_t reg, bool enable, const char *file, const char *func, const int line)
  687. {
  688. if (enable) {
  689. _bab_add_data(babcgpu, babinfo, BAB_REG_ADDR + reg*32,
  690. bab_reg_ena, sizeof(bab_reg_ena), BAB_FFL_PASS);
  691. } else {
  692. _bab_add_data(babcgpu, babinfo, BAB_REG_ADDR + reg*32,
  693. bab_reg_dis, sizeof(bab_reg_dis), BAB_FFL_PASS);
  694. }
  695. }
  696. static void bab_set_osc(struct bab_info *babinfo, int chip)
  697. {
  698. int fast, i;
  699. fast = babinfo->chip_fast[chip];
  700. for (i = 0; i < BAB_OSC && fast > BAB_OSC; i++, fast -= BAB_OSC) {
  701. babinfo->osc[i] = 0xff;
  702. }
  703. if (i < BAB_OSC && fast > 0 && fast <= BAB_OSC)
  704. babinfo->osc[i++] = bab_osc_bits[fast - 1];
  705. for (; i < BAB_OSC; i++)
  706. babinfo->osc[i] = 0x00;
  707. applog(LOG_DEBUG, "@osc(chip=%d) fast=%d 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x", chip, fast, babinfo->osc[0], babinfo->osc[1], babinfo->osc[2], babinfo->osc[3], babinfo->osc[4], babinfo->osc[5], babinfo->osc[6], babinfo->osc[7]);
  708. }
  709. static bool bab_put(struct cgpu_info *babcgpu, struct bab_info *babinfo)
  710. {
  711. int buf, i, reg, bank = 0;
  712. babinfo->buffer = -1;
  713. mutex_lock(&(babinfo->spi_lock));
  714. if (babinfo->buf_status[0] == BAB_STATE_DONE) {
  715. babinfo->buffer = 0;
  716. } else if (babinfo->buf_status[1] == BAB_STATE_DONE) {
  717. babinfo->buffer = 1;
  718. } else if (babinfo->buf_status[0] == BAB_STATE_READY) {
  719. babinfo->buf_status[0] = BAB_STATE_DONE;
  720. babinfo->buffer = 0;
  721. } else if (babinfo->buf_status[1] == BAB_STATE_READY) {
  722. babinfo->buf_status[1] = BAB_STATE_DONE;
  723. babinfo->buffer = 1;
  724. }
  725. mutex_unlock(&(babinfo->spi_lock));
  726. if (babinfo->buffer == -1)
  727. return false;
  728. buf = babinfo->buffer;
  729. babinfo->buf_used[buf] = 0;
  730. memset(babinfo->bank_off[buf], 0, sizeof(babinfo->bank_off) / BAB_SPI_BUFFERS);
  731. BAB_ADD_BREAK();
  732. for (i = 0; i < babinfo->chips; i++) {
  733. if (babinfo->chip_bank[i] != bank) {
  734. babinfo->bank_off[buf][bank] = babinfo->buf_used[buf];
  735. bank = babinfo->chip_bank[i];
  736. BAB_ADD_BREAK();
  737. }
  738. if (i == babinfo->fixchip &&
  739. (BAB_CFGD_SET(babinfo->chip_conf[i]) ||
  740. !babinfo->chip_conf[i])) {
  741. bab_set_osc(babinfo, i);
  742. bab_add_data(BAB_OSC_ADDR, babinfo->osc, sizeof(babinfo->osc));
  743. bab_config_reg(BAB_ICLK_REG, BAB_ICLK_BIT(babinfo->chip_conf[i]));
  744. bab_config_reg(BAB_FAST_REG, BAB_FAST_BIT(babinfo->chip_conf[i]));
  745. bab_config_reg(BAB_DIV2_REG, BAB_DIV2_BIT(babinfo->chip_conf[i]));
  746. bab_config_reg(BAB_SLOW_REG, BAB_SLOW_BIT(babinfo->chip_conf[i]));
  747. bab_config_reg(BAB_OCLK_REG, BAB_OCLK_BIT(babinfo->chip_conf[i]));
  748. for (reg = BAB_REG_CLR_FROM; reg <= BAB_REG_CLR_TO; reg++)
  749. bab_config_reg(reg, false);
  750. if (babinfo->chip_conf[i]) {
  751. bab_add_data(BAB_COUNT_ADDR, bab_counters, sizeof(bab_counters));
  752. bab_add_data(BAB_W1A_ADDR, bab_w1, sizeof(bab_w1));
  753. bab_add_data(BAB_W1B_ADDR, bab_w1, sizeof(bab_w1)/2);
  754. bab_add_data(BAB_W2_ADDR, bab_w2, sizeof(bab_w2));
  755. babinfo->chip_conf[i] ^= BAB_CFGD_VAL;
  756. }
  757. babinfo->old_fast[i] = babinfo->chip_fast[i];
  758. babinfo->old_conf[i] = babinfo->chip_conf[i];
  759. } else {
  760. if (babinfo->old_fast[i] != babinfo->chip_fast[i]) {
  761. bab_set_osc(babinfo, i);
  762. bab_add_data(BAB_OSC_ADDR, babinfo->osc, sizeof(babinfo->osc));
  763. babinfo->old_fast[i] = babinfo->chip_fast[i];
  764. }
  765. if (babinfo->old_conf[i] != babinfo->chip_conf[i]) {
  766. if (BAB_ICLK_SET(babinfo->old_conf[i]) !=
  767. BAB_ICLK_SET(babinfo->chip_conf[i]))
  768. bab_config_reg(BAB_ICLK_REG,
  769. BAB_ICLK_BIT(babinfo->chip_conf[i]));
  770. if (BAB_FAST_SET(babinfo->old_conf[i]) !=
  771. BAB_FAST_SET(babinfo->chip_conf[i]))
  772. bab_config_reg(BAB_FAST_REG,
  773. BAB_FAST_BIT(babinfo->chip_conf[i]));
  774. if (BAB_DIV2_SET(babinfo->old_conf[i]) !=
  775. BAB_DIV2_SET(babinfo->chip_conf[i]))
  776. bab_config_reg(BAB_DIV2_REG,
  777. BAB_DIV2_BIT(babinfo->chip_conf[i]));
  778. if (BAB_SLOW_SET(babinfo->old_conf[i]) !=
  779. BAB_SLOW_SET(babinfo->chip_conf[i]))
  780. bab_config_reg(BAB_SLOW_REG,
  781. BAB_SLOW_BIT(babinfo->chip_conf[i]));
  782. if (BAB_OCLK_SET(babinfo->old_conf[i]) !=
  783. BAB_OCLK_SET(babinfo->chip_conf[i]))
  784. bab_config_reg(BAB_OCLK_REG,
  785. BAB_OCLK_BIT(babinfo->chip_conf[i]));
  786. babinfo->old_conf[i] = babinfo->chip_conf[i];
  787. }
  788. }
  789. babinfo->chip_off[buf][i] = babinfo->buf_used[buf] + 3;
  790. if (babinfo->chip_conf[i])
  791. bab_add_data(BAB_INP_ADDR, (uint8_t *)(&(babinfo->chip_input[i])),
  792. sizeof(babinfo->chip_input[i]));
  793. BAB_ADD_ASYNC();
  794. }
  795. babinfo->chip_off[buf][i] = babinfo->buf_used[buf];
  796. babinfo->bank_off[buf][bank] = babinfo->buf_used[buf];
  797. mutex_lock(&(babinfo->spi_lock));
  798. babinfo->buf_status[buf] = BAB_STATE_READY;
  799. mutex_unlock(&(babinfo->spi_lock));
  800. babinfo->fixchip = (babinfo->fixchip + 1) % babinfo->chips;
  801. return true;
  802. }
  803. static bool bab_get(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo)
  804. {
  805. int buf, i;
  806. babinfo->buffer = -1;
  807. mutex_lock(&(babinfo->spi_lock));
  808. if (babinfo->buf_status[0] == BAB_STATE_SENT) {
  809. babinfo->buf_status[0] = BAB_STATE_READING;
  810. babinfo->buffer = 0;
  811. } else if (babinfo->buf_status[1] == BAB_STATE_SENT) {
  812. babinfo->buf_status[1] = BAB_STATE_READING;
  813. babinfo->buffer = 1;
  814. }
  815. mutex_unlock(&(babinfo->spi_lock));
  816. if (babinfo->buffer == -1)
  817. return false;
  818. buf = babinfo->buffer;
  819. for (i = 0; i < babinfo->chips; i++) {
  820. if (babinfo->chip_conf[i] & 0x7f) {
  821. memcpy((void *)&(babinfo->chip_results[i]),
  822. (void *)(babinfo->buf_read[buf] + babinfo->chip_off[buf][i]),
  823. sizeof(babinfo->chip_results[0]));
  824. }
  825. }
  826. mutex_lock(&(babinfo->spi_lock));
  827. babinfo->buf_status[buf] = BAB_STATE_DONE;
  828. mutex_unlock(&(babinfo->spi_lock));
  829. return true;
  830. }
  831. void bab_detect_chips(struct cgpu_info *babcgpu, struct bab_info *babinfo, int bank, int first, int last)
  832. {
  833. int buf, i, reg, j;
  834. if (sizeof(struct bab_work_send) != sizeof(bab_test_data)) {
  835. quithere(1, "struct bab_work_send (%d) and bab_test_data (%d)"
  836. " must be the same size",
  837. (int)sizeof(struct bab_work_send),
  838. (int)sizeof(bab_test_data));
  839. }
  840. memset(babinfo->bank_off, 0, sizeof(babinfo->bank_off));
  841. buf = babinfo->buffer = 0;
  842. babinfo->buf_used[buf] = 0;
  843. BAB_ADD_BREAK();
  844. for (i = first; i < last && i < BAB_MAXCHIPS; i++) {
  845. bab_set_osc(babinfo, i);
  846. bab_add_data(BAB_OSC_ADDR, babinfo->osc, sizeof(babinfo->osc));
  847. bab_config_reg(BAB_ICLK_REG, BAB_ICLK_BIT(babinfo->chip_conf[i]));
  848. bab_config_reg(BAB_FAST_REG, BAB_FAST_BIT(babinfo->chip_conf[i]));
  849. bab_config_reg(BAB_DIV2_REG, BAB_DIV2_BIT(babinfo->chip_conf[i]));
  850. bab_config_reg(BAB_SLOW_REG, BAB_SLOW_BIT(babinfo->chip_conf[i]));
  851. bab_config_reg(BAB_OCLK_REG, BAB_OCLK_BIT(babinfo->chip_conf[i]));
  852. for (reg = BAB_REG_CLR_FROM; reg <= BAB_REG_CLR_TO; reg++)
  853. bab_config_reg(reg, false);
  854. bab_add_data(BAB_COUNT_ADDR, bab_counters, sizeof(bab_counters));
  855. bab_add_data(BAB_W1A_ADDR, bab_w1, sizeof(bab_w1));
  856. bab_add_data(BAB_W1B_ADDR, bab_w1, sizeof(bab_w1)/2);
  857. bab_add_data(BAB_W2_ADDR, bab_w2, sizeof(bab_w2));
  858. babinfo->chip_off[buf][i] = babinfo->buf_used[buf] + 3;
  859. bab_add_data(BAB_INP_ADDR, bab_test_data, sizeof(bab_test_data));
  860. babinfo->chip_off[buf][i+1] = babinfo->buf_used[buf];
  861. babinfo->bank_off[buf][bank] = babinfo->buf_used[buf];
  862. babinfo->chips = i + 1;
  863. bab_txrx(buf, babinfo->buf_used[buf], false);
  864. babinfo->buf_used[buf] = 0;
  865. BAB_ADD_BREAK();
  866. for (j = first; j <= i; j++) {
  867. babinfo->chip_off[buf][j] = babinfo->buf_used[buf] + 3;
  868. BAB_ADD_ASYNC();
  869. }
  870. }
  871. buf = babinfo->buffer = 1;
  872. babinfo->buf_used[buf] = 0;
  873. BAB_ADD_BREAK();
  874. for (i = first; i < last && i < BAB_MAXCHIPS; i++) {
  875. babinfo->chip_off[buf][i] = babinfo->buf_used[buf] + 3;
  876. bab_add_data(BAB_INP_ADDR, bab_test_data, sizeof(bab_test_data));
  877. BAB_ADD_ASYNC();
  878. }
  879. babinfo->chip_off[buf][i] = babinfo->buf_used[buf];
  880. babinfo->bank_off[buf][bank] = babinfo->buf_used[buf];
  881. babinfo->chips = i;
  882. bab_txrx(buf, babinfo->buf_used[buf], true);
  883. babinfo->buf_used[buf] = 0;
  884. babinfo->chips = first;
  885. for (i = first; i < last && i < BAB_MAXCHIPS; i++) {
  886. uint32_t tmp[DATA_UINTS-1];
  887. memcpy(tmp, babinfo->buf_read[buf]+babinfo->chip_off[buf][i], sizeof(tmp));
  888. for (j = 0; j < BAB_SPI_BUFFERS; j++)
  889. babinfo->chip_off[j][i] = 0;
  890. for (j = 0; j < BAB_REPLY_NONCES; j++) {
  891. if (tmp[j] != 0xffffffff && tmp[j] != 0x00000000) {
  892. babinfo->chip_bank[i] = bank;
  893. babinfo->chips = i + 1;
  894. break;
  895. }
  896. }
  897. }
  898. for (i = first ; i < babinfo->chips; i++)
  899. babinfo->chip_bank[i] = bank;
  900. }
  901. static const char *bab_modules[] = {
  902. "i2c-dev",
  903. "i2c-bcm2708",
  904. "spidev",
  905. "spi-bcm2708",
  906. NULL
  907. };
  908. static const char *bab_memory = "/dev/mem";
  909. static int bab_memory_addr = 0x20200000;
  910. static struct {
  911. int request;
  912. int value;
  913. } bab_ioc[] = {
  914. { SPI_IOC_RD_MODE, 0 },
  915. { SPI_IOC_WR_MODE, 0 },
  916. { SPI_IOC_RD_BITS_PER_WORD, 8 },
  917. { SPI_IOC_WR_BITS_PER_WORD, 8 },
  918. { SPI_IOC_RD_MAX_SPEED_HZ, 1000000 },
  919. { SPI_IOC_WR_MAX_SPEED_HZ, 1000000 },
  920. { -1, -1 }
  921. };
  922. static bool bab_init_gpio(struct cgpu_info *babcgpu, struct bab_info *babinfo, int bus, int chip)
  923. {
  924. int i, err, memfd, data;
  925. char buf[64];
  926. for (i = 0; bab_modules[i]; i++) {
  927. snprintf(buf, sizeof(buf), "modprobe %s", bab_modules[i]);
  928. err = system(buf);
  929. if (err) {
  930. applog(LOG_ERR, "%s failed to modprobe %s (%d) - you need to be root?",
  931. babcgpu->drv->dname,
  932. bab_modules[i], err);
  933. goto bad_out;
  934. }
  935. }
  936. memfd = open(bab_memory, O_RDWR | O_SYNC);
  937. if (memfd < 0) {
  938. applog(LOG_ERR, "%s failed open %s (%d)",
  939. babcgpu->drv->dname,
  940. bab_memory, errno);
  941. goto bad_out;
  942. }
  943. babinfo->gpio = (volatile unsigned *)mmap(NULL, BAB_SPI_BUFSIZ,
  944. PROT_READ | PROT_WRITE,
  945. MAP_SHARED, memfd,
  946. bab_memory_addr);
  947. if (babinfo->gpio == MAP_FAILED) {
  948. close(memfd);
  949. applog(LOG_ERR, "%s failed mmap gpio (%d)",
  950. babcgpu->drv->dname,
  951. errno);
  952. goto bad_out;
  953. }
  954. close(memfd);
  955. snprintf(buf, sizeof(buf), "/dev/spidev%d.%d", bus, chip);
  956. babinfo->spifd = open(buf, O_RDWR);
  957. if (babinfo->spifd < 0) {
  958. applog(LOG_ERR, "%s failed to open spidev (%d)",
  959. babcgpu->drv->dname,
  960. errno);
  961. goto map_out;
  962. }
  963. babcgpu->device_path = strdup(buf);
  964. for (i = 0; bab_ioc[i].value != -1; i++) {
  965. data = bab_ioc[i].value;
  966. err = ioctl(babinfo->spifd, bab_ioc[i].request, (void *)&data);
  967. if (err < 0) {
  968. applog(LOG_ERR, "%s failed ioctl (%d) (%d)",
  969. babcgpu->drv->dname,
  970. i, errno);
  971. goto close_out;
  972. }
  973. }
  974. for (i = 0; i < BAB_MAXCHIPS; i++)
  975. babinfo->chip_spis[i] = (int)((1000000.0 / (100.0 + 31.0 * (i + 1))) * 1000);
  976. return true;
  977. close_out:
  978. close(babinfo->spifd);
  979. babinfo->spifd = 0;
  980. free(babcgpu->device_path);
  981. babcgpu->device_path = NULL;
  982. map_out:
  983. munmap((void *)(babinfo->gpio), BAB_SPI_BUFSIZ);
  984. babinfo->gpio = NULL;
  985. bad_out:
  986. return false;
  987. }
  988. static void bab_init_chips(struct cgpu_info *babcgpu, struct bab_info *babinfo)
  989. {
  990. bab_detect_chips(babcgpu, babinfo, 0, 0, BAB_MAXCHIPS);
  991. memcpy(babinfo->old_conf, babinfo->chip_conf, sizeof(babinfo->old_conf));
  992. memcpy(babinfo->old_fast, babinfo->chip_fast, sizeof(babinfo->old_fast));
  993. }
  994. static void bab_detect(bool hotplug)
  995. {
  996. struct cgpu_info *babcgpu = NULL;
  997. struct bab_info *babinfo = NULL;
  998. int i;
  999. if (hotplug)
  1000. return;
  1001. babcgpu = calloc(1, sizeof(*babcgpu));
  1002. if (unlikely(!babcgpu))
  1003. quithere(1, "Failed to calloc babcgpu");
  1004. babcgpu->drv = &bab_drv;
  1005. babcgpu->deven = DEV_ENABLED;
  1006. babcgpu->threads = 1;
  1007. babinfo = calloc(1, sizeof(*babinfo));
  1008. if (unlikely(!babinfo))
  1009. quithere(1, "Failed to calloc babinfo");
  1010. babcgpu->device_data = (void *)babinfo;
  1011. for (i = 0; i < BAB_MAXCHIPS; i++) {
  1012. babinfo->chip_conf[i] = BAB_DEFCONF;
  1013. babinfo->chip_fast[i] = BAB_DEFSPEED;
  1014. }
  1015. mutex_init(&babinfo->spi_lock);
  1016. if (!bab_init_gpio(babcgpu, babinfo, BAB_SPI_BUS, BAB_SPI_CHIP))
  1017. goto unalloc;
  1018. applog(LOG_WARNING, "%s V1 testing for %d chips ...", babcgpu->drv->dname, BAB_MAXCHIPS);
  1019. bab_init_chips(babcgpu, babinfo);
  1020. applog(LOG_WARNING, "%s found %d chips", babcgpu->drv->dname, babinfo->chips);
  1021. if (babinfo->chips == 0)
  1022. goto cleanup;
  1023. if (!add_cgpu(babcgpu))
  1024. goto cleanup;
  1025. mutex_init(&babinfo->res_lock);
  1026. mutex_init(&babinfo->did_lock);
  1027. cglock_init(&babinfo->blist_lock);
  1028. babinfo->initialised = true;
  1029. return;
  1030. cleanup:
  1031. close(babinfo->spifd);
  1032. munmap((void *)(babinfo->gpio), BAB_SPI_BUFSIZ);
  1033. unalloc:
  1034. mutex_destroy(&babinfo->spi_lock);
  1035. free(babinfo);
  1036. free(babcgpu);
  1037. }
  1038. static void bab_identify(__maybe_unused struct cgpu_info *babcgpu)
  1039. {
  1040. }
  1041. #define BAB_LONG_WAIT_uS 1200000
  1042. #define BAB_WAIT_MSG_EVERY 10
  1043. #define BAB_LONG_WAIT_SLEEP_uS 100000
  1044. #define BAB_STD_WAIT_uS 3000
  1045. // thread to do spi txrx
  1046. static void *bab_spi(void *userdata)
  1047. {
  1048. struct cgpu_info *babcgpu = (struct cgpu_info *)userdata;
  1049. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1050. struct timeval start, stop;
  1051. double wait;
  1052. int i, buf, msgs;
  1053. applog(LOG_DEBUG, "%s%i: SPIing...",
  1054. babcgpu->drv->name, babcgpu->device_id);
  1055. // Wait until we're ready
  1056. while (babcgpu->shutdown == false) {
  1057. if (babinfo->initialised) {
  1058. break;
  1059. }
  1060. cgsleep_ms(3);
  1061. }
  1062. msgs = 0;
  1063. cgtime(&start);
  1064. while (babcgpu->shutdown == false) {
  1065. buf = -1;
  1066. mutex_lock(&(babinfo->spi_lock));
  1067. for (i = 0; i < BAB_SPI_BUFFERS; i++) {
  1068. if (babinfo->buf_status[i] == BAB_STATE_READY) {
  1069. babinfo->buf_status[i] = BAB_STATE_SENDING;
  1070. buf = i;
  1071. cgtime(&start);
  1072. break;
  1073. }
  1074. }
  1075. mutex_unlock(&(babinfo->spi_lock));
  1076. if (buf == -1) {
  1077. cgtime(&stop);
  1078. wait = us_tdiff(&stop, &start);
  1079. if (wait > BAB_LONG_WAIT_uS) {
  1080. if ((msgs++ % BAB_WAIT_MSG_EVERY) == 0) {
  1081. applog(LOG_WARNING, "%s%i: SPI waiting %.0fus ...",
  1082. babcgpu->drv->name,
  1083. babcgpu->device_id,
  1084. (float)wait);
  1085. }
  1086. }
  1087. cgsleep_us(BAB_LONG_WAIT_SLEEP_uS);
  1088. continue;
  1089. }
  1090. bab_txrx(buf, babinfo->buf_used[buf], false);
  1091. cgtime(&stop);
  1092. wait = us_tdiff(&stop, &start);
  1093. if (wait < BAB_STD_WAIT_uS)
  1094. cgsleep_us((uint64_t)(BAB_STD_WAIT_uS - wait));
  1095. else if (wait > BAB_LONG_WAIT_uS) {
  1096. applog(LOG_DEBUG, "%s%i: SPI waited %.0fus",
  1097. babcgpu->drv->name, babcgpu->device_id,
  1098. (float)wait);
  1099. }
  1100. mutex_lock(&(babinfo->spi_lock));
  1101. babinfo->buf_status[i] = BAB_STATE_SENT;
  1102. mutex_unlock(&(babinfo->spi_lock));
  1103. msgs = 0;
  1104. }
  1105. return NULL;
  1106. }
  1107. static void bab_flush_work(struct cgpu_info *babcgpu)
  1108. {
  1109. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1110. applog(LOG_DEBUG, "%s%i: flushing work",
  1111. babcgpu->drv->name, babcgpu->device_id);
  1112. mutex_lock(&(babinfo->did_lock));
  1113. memset(&(babinfo->last_did), 0, sizeof(babinfo->last_did));
  1114. mutex_unlock(&(babinfo->did_lock));
  1115. }
  1116. static void ms3steps(uint32_t *p)
  1117. {
  1118. uint32_t a, b, c, d, e, f, g, h, new_e, new_a;
  1119. int i;
  1120. a = p[0];
  1121. b = p[1];
  1122. c = p[2];
  1123. d = p[3];
  1124. e = p[4];
  1125. f = p[5];
  1126. g = p[6];
  1127. h = p[7];
  1128. for (i = 0; i < 3; i++) {
  1129. new_e = p[i+16] + sha256_k[i] + h + CH(e,f,g) + SHA256_F2(e) + d;
  1130. new_a = p[i+16] + sha256_k[i] + h + CH(e,f,g) + SHA256_F2(e) +
  1131. SHA256_F1(a) + MAJ(a,b,c);
  1132. d = c;
  1133. c = b;
  1134. b = a;
  1135. a = new_a;
  1136. h = g;
  1137. g = f;
  1138. f = e;
  1139. e = new_e;
  1140. }
  1141. p[15] = a;
  1142. p[14] = b;
  1143. p[13] = c;
  1144. p[12] = d;
  1145. p[11] = e;
  1146. p[10] = f;
  1147. p[9] = g;
  1148. p[8] = h;
  1149. }
  1150. #define DATA_MERKLE7 16
  1151. #define DATA_NTIME 17
  1152. #define DATA_BITS 18
  1153. #define DATA_NONCE 19
  1154. #define WORK_MERKLE7 (16*4)
  1155. #define WORK_NTIME (17*4)
  1156. #define WORK_BITS (18*4)
  1157. #define WORK_NONCE (19*4)
  1158. static uint32_t decnonce(uint32_t in)
  1159. {
  1160. uint32_t out;
  1161. /* First part load */
  1162. out = (in & 0xFF) << 24;
  1163. in >>= 8;
  1164. /* Byte reversal */
  1165. in = (((in & 0xaaaaaaaa) >> 1) | ((in & 0x55555555) << 1));
  1166. in = (((in & 0xcccccccc) >> 2) | ((in & 0x33333333) << 2));
  1167. in = (((in & 0xf0f0f0f0) >> 4) | ((in & 0x0f0f0f0f) << 4));
  1168. out |= (in >> 2) & 0x3FFFFF;
  1169. /* Extraction */
  1170. if (in & 1)
  1171. out |= (1 << 23);
  1172. if (in & 2)
  1173. out |= (1 << 22);
  1174. out -= 0x800004;
  1175. return out;
  1176. }
  1177. /*
  1178. * Find the matching work item by checking the nonce against each work
  1179. * item for the chip
  1180. * Discard any work items older than a match
  1181. */
  1182. static bool oknonce(struct thr_info *thr, struct cgpu_info *babcgpu, int chip, uint32_t nonce)
  1183. {
  1184. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1185. BLIST *bitem;
  1186. unsigned int links, tests;
  1187. int i;
  1188. babinfo->chip_nonces[chip]++;
  1189. nonce = decnonce(nonce);
  1190. /*
  1191. * We can grab the head of the chip work queue and then
  1192. * release the lock and follow it to the end
  1193. * since the other thread will only add items above the
  1194. * head - it wont touch the list->next pointers from the
  1195. * head to the end - only the head->prev pointer may get
  1196. * changed
  1197. */
  1198. cg_rlock(&babinfo->blist_lock);
  1199. bitem = babinfo->chip_list[chip];
  1200. cg_runlock(&babinfo->blist_lock);
  1201. if (!bitem) {
  1202. applog(LOG_ERR, "%s%i: chip %d has no work!",
  1203. babcgpu->drv->name, babcgpu->device_id, chip);
  1204. babinfo->untested_nonces++;
  1205. return false;
  1206. }
  1207. babinfo->tested_nonces++;
  1208. tests = 0;
  1209. links = 0;
  1210. while (bitem) {
  1211. if (!bitem->work) {
  1212. applog(LOG_ERR, "%s%i: chip %d bitem links %d has no work!",
  1213. babcgpu->drv->name,
  1214. babcgpu->device_id,
  1215. chip, links);
  1216. } else {
  1217. for (i = 0; i < BAB_NONCE_OFFSETS; i++) {
  1218. tests++;
  1219. if (test_nonce(bitem->work, nonce + bab_nonce_offsets[i])) {
  1220. submit_tested_work(thr, bitem->work);
  1221. babinfo->nonce_offset_count[i]++;
  1222. babinfo->chip_good[chip]++;
  1223. bitem->nonces++;
  1224. babinfo->new_nonces++;
  1225. babinfo->ok_nonces++;
  1226. free_blist(babcgpu, bitem->next, chip);
  1227. babinfo->total_tests += tests;
  1228. if (babinfo->max_tests_per_nonce < tests)
  1229. babinfo->max_tests_per_nonce = tests;
  1230. babinfo->total_links += links;
  1231. if (babinfo->max_links < links)
  1232. babinfo->max_links = links;
  1233. return true;
  1234. }
  1235. }
  1236. }
  1237. bitem = bitem->next;
  1238. links++;
  1239. }
  1240. if (babinfo->not_first_reply[chip]) {
  1241. babinfo->chip_bad[chip]++;
  1242. inc_hw_errors(thr);
  1243. } else
  1244. babinfo->initial_ignored++;
  1245. return false;
  1246. }
  1247. // Results checking thread
  1248. static void *bab_res(void *userdata)
  1249. {
  1250. struct cgpu_info *babcgpu = (struct cgpu_info *)userdata;
  1251. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1252. struct thr_info *thr = babcgpu->thr[0];
  1253. bool first_second;
  1254. uint32_t nonce;
  1255. int chip;
  1256. applog(LOG_DEBUG, "%s%i: Results...",
  1257. babcgpu->drv->name, babcgpu->device_id);
  1258. // Wait until we're ready
  1259. while (babcgpu->shutdown == false) {
  1260. if (babinfo->initialised) {
  1261. break;
  1262. }
  1263. cgsleep_ms(3);
  1264. }
  1265. while (babcgpu->shutdown == false) {
  1266. if (!oldest_nonce(babcgpu, &chip, &nonce, &first_second)) {
  1267. cgsleep_ms(3);
  1268. continue;
  1269. }
  1270. if (first_second)
  1271. babinfo->not_first_reply[chip] = true;
  1272. oknonce(thr, babcgpu, chip, nonce);
  1273. }
  1274. return NULL;
  1275. }
  1276. static bool bab_do_work(struct cgpu_info *babcgpu)
  1277. {
  1278. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1279. int busy, newbusy, match, work_items = 0;
  1280. int spi, mis, miso;
  1281. int i, j;
  1282. BLIST *bitem;
  1283. bool res, got_a_nonce;
  1284. for (i = 0; i < babinfo->chips; i++) {
  1285. bitem = next_work(babcgpu, i);
  1286. if (!bitem) {
  1287. applog(LOG_ERR, "%s%i: short work list (%i) expected %d - discarded",
  1288. babcgpu->drv->name, babcgpu->device_id,
  1289. i, babinfo->chips);
  1290. for (j = 0; j < i; i++)
  1291. discard_last(babcgpu, j);
  1292. return false;
  1293. }
  1294. memcpy((void *)&(babinfo->chip_input[i].midstate[0]),
  1295. bitem->work->midstate, sizeof(bitem->work->midstate));
  1296. memcpy((void *)&(babinfo->chip_input[i].merkle7),
  1297. (void *)&(bitem->work->data[WORK_MERKLE7]), 12);
  1298. ms3steps((void *)&(babinfo->chip_input[i]));
  1299. work_items++;
  1300. }
  1301. // Send
  1302. res = bab_put(babcgpu, babinfo);
  1303. if (!res) {
  1304. applog(LOG_DEBUG, "%s%i: couldn't put work ...",
  1305. babcgpu->drv->name, babcgpu->device_id);
  1306. }
  1307. // Receive
  1308. res = bab_get(babcgpu, babinfo);
  1309. if (!res) {
  1310. applog(LOG_DEBUG, "%s%i: didn't get work reply ...",
  1311. babcgpu->drv->name, babcgpu->device_id);
  1312. return false;
  1313. }
  1314. applog(LOG_DEBUG, "%s%i: Did get work reply ...",
  1315. babcgpu->drv->name, babcgpu->device_id);
  1316. spi = mis = miso = 0;
  1317. for (i = 0; i < babinfo->chips; i++) {
  1318. match = 0;
  1319. newbusy = busy = babinfo->chip_busy[i];
  1320. if (!babinfo->chip_conf[i])
  1321. continue;
  1322. for (j = 1; j < BAB_REPLY_NONCES; j++) {
  1323. if (babinfo->chip_results[i].nonce[(busy+j) % BAB_REPLY_NONCES] !=
  1324. babinfo->chip_prev[i].nonce[(busy+j) % BAB_REPLY_NONCES])
  1325. newbusy = (busy+j) % BAB_REPLY_NONCES;
  1326. else
  1327. match++;
  1328. }
  1329. if (!match) {
  1330. if (!miso) {
  1331. mis++;
  1332. // ignore for now ... babinfo->chip_miso[i]++;
  1333. }
  1334. miso = 1;
  1335. continue;
  1336. }
  1337. miso = 0;
  1338. if (babinfo->chip_results[i].jobsel != 0xffffffff &&
  1339. babinfo->chip_results[i].jobsel != 0x00000000) {
  1340. spi++;
  1341. babinfo->chip_spie[i]++;
  1342. applog(LOG_DEBUG, "%s%i: SPI ERROR on chip %d (0x%08x)",
  1343. babcgpu->drv->name, babcgpu->device_id,
  1344. i, babinfo->chip_results[i].jobsel);
  1345. }
  1346. // Not used yet
  1347. // if (babinfo->chip_results[i].jobsel != babinfo->chip_prev[i].jobsel) {
  1348. got_a_nonce = false;
  1349. for (; newbusy != busy; busy = (busy + 1) % BAB_REPLY_NONCES) {
  1350. if (babinfo->chip_results[i].nonce[busy] == 0xffffffff ||
  1351. babinfo->chip_results[i].nonce[busy] == 0x00000000) {
  1352. babinfo->chip_results[i].nonce[busy] = babinfo->chip_prev[i].nonce[busy];
  1353. spi = 1;
  1354. continue;
  1355. }
  1356. store_nonce(babcgpu, i,
  1357. babinfo->chip_results[i].nonce[busy],
  1358. babinfo->nonce_before[i]);
  1359. got_a_nonce = true;
  1360. }
  1361. /*
  1362. * We only care about this after the first reply we find a nonce
  1363. * After that, the value has no more effect
  1364. */
  1365. if (got_a_nonce)
  1366. babinfo->nonce_before[i] = true;
  1367. mis += miso;
  1368. babinfo->chip_miso[i] += miso;
  1369. babinfo->chip_busy[i] = busy;
  1370. }
  1371. memcpy((void *)(&(babinfo->chip_prev[0])),
  1372. (void *)(&(babinfo->chip_results[0])),
  1373. sizeof(babinfo->chip_prev));
  1374. applog(LOG_DEBUG, "Work: items:%d spi:%d miso:%d",
  1375. work_items, spi, mis);
  1376. return true;
  1377. }
  1378. static bool bab_thread_prepare(struct thr_info *thr)
  1379. {
  1380. struct cgpu_info *babcgpu = thr->cgpu;
  1381. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1382. if (thr_info_create(&(babinfo->spi_thr), NULL, bab_spi, (void *)babcgpu)) {
  1383. applog(LOG_ERR, "%s%i: SPI thread create failed",
  1384. babcgpu->drv->name, babcgpu->device_id);
  1385. return false;
  1386. }
  1387. pthread_detach(babinfo->spi_thr.pth);
  1388. /*
  1389. * We require a seperate results checking thread since there is a lot
  1390. * of work done checking the results multiple times - thus we don't
  1391. * want that delay affecting sending/receiving work to/from the device
  1392. */
  1393. if (thr_info_create(&(babinfo->res_thr), NULL, bab_res, (void *)babcgpu)) {
  1394. applog(LOG_ERR, "%s%i: Results thread create failed",
  1395. babcgpu->drv->name, babcgpu->device_id);
  1396. return false;
  1397. }
  1398. pthread_detach(babinfo->res_thr.pth);
  1399. return true;
  1400. }
  1401. static void bab_shutdown(struct thr_info *thr)
  1402. {
  1403. struct cgpu_info *babcgpu = thr->cgpu;
  1404. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1405. int i;
  1406. applog(LOG_DEBUG, "%s%i: shutting down",
  1407. babcgpu->drv->name, babcgpu->device_id);
  1408. for (i = 0; i < babinfo->chips; i++)
  1409. // bab_shutdown(babcgpu, babinfo, i);
  1410. ;
  1411. babcgpu->shutdown = true;
  1412. }
  1413. static bool bab_queue_full(struct cgpu_info *babcgpu)
  1414. {
  1415. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1416. struct work *work;
  1417. bool ret;
  1418. if (babinfo->work_count >= babinfo->chips)
  1419. ret = true;
  1420. else {
  1421. work = get_queued(babcgpu);
  1422. if (work)
  1423. store_work(babcgpu, work);
  1424. else
  1425. // Avoid a hard loop when we can't get work fast enough
  1426. cgsleep_ms(10);
  1427. ret = false;
  1428. }
  1429. return ret;
  1430. }
  1431. /*
  1432. * 1.0s per nonce = 4.2GH/s
  1433. * So anything around 4GH/s or less per chip should be fine
  1434. */
  1435. #define BAB_STD_WORK_uS 1000000
  1436. #define BAB_STD_DELAY_uS 30000
  1437. /*
  1438. * TODO: allow this to run through more than once - the second+
  1439. * time not sending any new work unless a flush occurs since:
  1440. * at the moment we have BAB_STD_WORK_uS latency added to earliest replies
  1441. */
  1442. static int64_t bab_scanwork(__maybe_unused struct thr_info *thr)
  1443. {
  1444. struct cgpu_info *babcgpu = thr->cgpu;
  1445. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1446. int64_t hashcount = 0;
  1447. struct timeval now;
  1448. double delay;
  1449. bab_do_work(babcgpu);
  1450. // Sleep now so we get the work "bab_queue_full()" just before we use it
  1451. while (80085) {
  1452. cgtime(&now);
  1453. mutex_lock(&(babinfo->did_lock));
  1454. delay = us_tdiff(&now, &(babinfo->last_did));
  1455. mutex_unlock(&(babinfo->did_lock));
  1456. if (delay < (BAB_STD_WORK_uS - BAB_STD_DELAY_uS))
  1457. cgsleep_us(BAB_STD_DELAY_uS);
  1458. else
  1459. break;
  1460. }
  1461. if (babinfo->new_nonces) {
  1462. hashcount += 0xffffffffull * babinfo->new_nonces;
  1463. babinfo->new_nonces = 0;
  1464. }
  1465. return hashcount;
  1466. }
  1467. #define CHIPS_PER_STAT 16
  1468. static struct api_data *bab_api_stats(struct cgpu_info *babcgpu)
  1469. {
  1470. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1471. struct api_data *root = NULL;
  1472. char data[2048];
  1473. char buf[32];
  1474. int i, to, j;
  1475. if (babinfo->initialised == false)
  1476. return NULL;
  1477. root = api_add_int(root, "Chips", &(babinfo->chips), true);
  1478. for (i = 0; i < babinfo->chips; i += CHIPS_PER_STAT) {
  1479. to = i + CHIPS_PER_STAT - 1;
  1480. if (to >= babinfo->chips)
  1481. to = babinfo->chips - 1;
  1482. data[0] = '\0';
  1483. for (j = i; j <= to; j++) {
  1484. snprintf(buf, sizeof(buf),
  1485. "%s%"PRIu64,
  1486. j == i ? "" : " ",
  1487. babinfo->chip_nonces[j]);
  1488. strcat(data, buf);
  1489. }
  1490. snprintf(buf, sizeof(buf), "Nonces %d - %d", i, to);
  1491. root = api_add_string(root, buf, data, true);
  1492. data[0] = '\0';
  1493. for (j = i; j <= to; j++) {
  1494. snprintf(buf, sizeof(buf),
  1495. "%s%"PRIu64,
  1496. j == i ? "" : " ",
  1497. babinfo->chip_good[j]);
  1498. strcat(data, buf);
  1499. }
  1500. snprintf(buf, sizeof(buf), "Good %d - %d", i, to);
  1501. root = api_add_string(root, buf, data, true);
  1502. data[0] = '\0';
  1503. for (j = i; j <= to; j++) {
  1504. snprintf(buf, sizeof(buf),
  1505. "%s%"PRIu64,
  1506. j == i ? "" : " ",
  1507. babinfo->chip_bad[j]);
  1508. strcat(data, buf);
  1509. }
  1510. snprintf(buf, sizeof(buf), "Bad %d - %d", i, to);
  1511. root = api_add_string(root, buf, data, true);
  1512. data[0] = '\0';
  1513. for (j = i; j <= to; j++) {
  1514. snprintf(buf, sizeof(buf),
  1515. "%s0x%02x",
  1516. j == i ? "" : " ",
  1517. (int)(babinfo->chip_conf[j]));
  1518. strcat(data, buf);
  1519. }
  1520. snprintf(buf, sizeof(buf), "Conf %d - %d", i, to);
  1521. root = api_add_string(root, buf, data, true);
  1522. data[0] = '\0';
  1523. for (j = i; j <= to; j++) {
  1524. snprintf(buf, sizeof(buf),
  1525. "%s0x%02x",
  1526. j == i ? "" : " ",
  1527. (int)(babinfo->chip_fast[j]));
  1528. strcat(data, buf);
  1529. }
  1530. snprintf(buf, sizeof(buf), "Fast %d - %d", i, to);
  1531. root = api_add_string(root, buf, data, true);
  1532. }
  1533. for (i = 0; i < BAB_NONCE_OFFSETS; i++) {
  1534. snprintf(buf, sizeof(buf), "Nonce Offset 0x%08x", bab_nonce_offsets[i]);
  1535. root = api_add_uint64(root, buf, &(babinfo->nonce_offset_count[i]), true);
  1536. }
  1537. root = api_add_uint64(root, "Tested", &(babinfo->tested_nonces), true);
  1538. root = api_add_uint64(root, "Total Tests", &(babinfo->total_tests), true);
  1539. root = api_add_uint64(root, "Max Tests", &(babinfo->max_tests_per_nonce), true);
  1540. float avg = babinfo->tested_nonces ? (float)(babinfo->total_tests) /
  1541. (float)(babinfo->tested_nonces) : 0;
  1542. // TODO: add a API_AVG which is 3 places - double/float?
  1543. root = api_add_volts(root, "Avg Tests", &avg, true);
  1544. root = api_add_uint64(root, "Untested", &(babinfo->untested_nonces), true);
  1545. root = api_add_uint64(root, "Work Links", &(babinfo->total_links), true);
  1546. root = api_add_uint64(root, "Max Links", &(babinfo->max_links), true);
  1547. avg = babinfo->tested_nonces ? (float)(babinfo->total_links) /
  1548. (float)(babinfo->tested_nonces) : 0;
  1549. root = api_add_volts(root, "Avg Links", &avg, true);
  1550. root = api_add_uint32(root, "Initial Ignored", &(babinfo->initial_ignored), true);
  1551. root = api_add_int(root, "BList Count", &(babinfo->blist_count), true);
  1552. root = api_add_int(root, "BFree Count", &(babinfo->bfree_count), true);
  1553. root = api_add_int(root, "Work Count", &(babinfo->work_count), true);
  1554. root = api_add_int(root, "Chip Count", &(babinfo->chip_count), true);
  1555. root = api_add_int(root, "RList Count", &(babinfo->rlist_count), true);
  1556. root = api_add_int(root, "RFree Count", &(babinfo->rfree_count), true);
  1557. root = api_add_int(root, "Result Count", &(babinfo->res_count), true);
  1558. return root;
  1559. }
  1560. #endif
  1561. struct device_drv bab_drv = {
  1562. .drv_id = DRIVER_bab,
  1563. .dname = "BlackArrowBitFuryGPIO",
  1564. .name = "BaB",
  1565. .drv_detect = bab_detect,
  1566. #ifdef LINUX
  1567. .get_api_stats = bab_api_stats,
  1568. //TODO: .get_statline_before = get_bab_statline_before,
  1569. .identify_device = bab_identify,
  1570. .thread_prepare = bab_thread_prepare,
  1571. .hash_work = hash_queued_work,
  1572. .scanwork = bab_scanwork,
  1573. .queue_full = bab_queue_full,
  1574. .flush_work = bab_flush_work,
  1575. .thread_shutdown = bab_shutdown
  1576. #endif
  1577. };