lowl-spi.c 8.8 KB

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  1. /*
  2. * Copyright 2013 bitfury
  3. * Copyright 2013-2014 Luke Dashjr
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a copy
  6. * of this software and associated documentation files (the "Software"), to deal
  7. * in the Software without restriction, including without limitation the rights
  8. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  9. * copies of the Software, and to permit persons to whom the Software is
  10. * furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice shall be included in
  13. * all copies or substantial portions of the Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  18. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  21. * THE SOFTWARE.
  22. */
  23. #include "config.h"
  24. #ifdef HAVE_LINUX_SPI_SPIDEV_H
  25. #define HAVE_LINUX_SPI
  26. #endif
  27. #include <stdbool.h>
  28. #include <stdint.h>
  29. #include <unistd.h>
  30. #include <stdio.h>
  31. #include <stdlib.h>
  32. #include <string.h>
  33. #include <getopt.h>
  34. #ifdef HAVE_LINUX_SPI
  35. #include <sys/mman.h>
  36. #include <fcntl.h>
  37. #include <sys/ioctl.h>
  38. #include <linux/types.h>
  39. #include <signal.h>
  40. #include <sys/types.h>
  41. #include <linux/spi/spidev.h>
  42. #include <time.h>
  43. #include <unistd.h>
  44. #include <sys/stat.h>
  45. #endif
  46. #include "logging.h"
  47. #include "lowl-spi.h"
  48. #include "miner.h"
  49. #include "util.h"
  50. #ifdef HAVE_LINUX_SPI
  51. bool sys_spi_txrx(struct spi_port *port);
  52. static volatile unsigned *gpio;
  53. #endif
  54. struct spi_port *sys_spi;
  55. void spi_init(void)
  56. {
  57. #ifdef HAVE_LINUX_SPI
  58. int fd;
  59. fd = open("/dev/mem",O_RDWR|O_SYNC);
  60. if (fd < 0)
  61. {
  62. perror("/dev/mem trouble");
  63. return;
  64. }
  65. gpio = mmap(0,4096,PROT_READ|PROT_WRITE,MAP_SHARED,fd,0x20200000);
  66. if (gpio == MAP_FAILED)
  67. {
  68. perror("gpio mmap trouble");
  69. return;
  70. }
  71. close(fd);
  72. sys_spi = malloc(sizeof(*sys_spi));
  73. *sys_spi = (struct spi_port){
  74. .txrx = sys_spi_txrx,
  75. };
  76. #endif
  77. }
  78. #ifdef HAVE_LINUX_SPI
  79. int spi_open(struct spi_port * const spi, const char * const devpath)
  80. {
  81. const int fd = open(devpath, O_RDWR);
  82. if (fd < 0)
  83. return fd;
  84. if (ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &spi->speed) < 0
  85. || ioctl(fd, SPI_IOC_WR_MODE, &spi->mode) < 0
  86. || ioctl(fd, SPI_IOC_WR_BITS_PER_WORD, &spi->bits) < 0)
  87. {
  88. close(fd);
  89. return -1;
  90. }
  91. spi->fd = fd;
  92. return fd;
  93. }
  94. #define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3))
  95. #define OUT_GPIO(g) *(gpio+((g)/10)) |= (1<<(((g)%10)*3))
  96. #define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3))
  97. #define GPIO_SET *(gpio+7) // sets bits which are 1 ignores bits which are 0
  98. #define GPIO_CLR *(gpio+10) // clears bits which are 1 ignores bits which are 0
  99. #define GPIO_LEV *(gpio+13)
  100. void bfg_gpio_setpin_output(const unsigned pin)
  101. {
  102. INP_GPIO(pin);
  103. OUT_GPIO(pin);
  104. }
  105. void bfg_gpio_set_high(const unsigned mask)
  106. {
  107. GPIO_SET = mask;
  108. }
  109. void bfg_gpio_set_low(const unsigned mask)
  110. {
  111. GPIO_CLR = mask;
  112. }
  113. unsigned bfg_gpio_get()
  114. {
  115. return GPIO_LEV;
  116. }
  117. // Bit-banging reset, to reset more chips in chain - toggle for longer period... Each 3 reset cycles reset first chip in chain
  118. static
  119. int spi_reset(int a)
  120. {
  121. int i,j;
  122. int len = 8;
  123. INP_GPIO(10); OUT_GPIO(10);
  124. INP_GPIO(11); OUT_GPIO(11);
  125. GPIO_SET = 1 << 11; // Set SCK
  126. for (i = 0; i < 32; i++) { // On standard settings this unoptimized code produces 1 Mhz freq.
  127. GPIO_SET = 1 << 10;
  128. for (j = 0; j < len; j++) {
  129. a *= a;
  130. }
  131. GPIO_CLR = 1 << 10;
  132. for (j = 0; j < len; j++) {
  133. a *= a;
  134. }
  135. }
  136. GPIO_CLR = 1 << 10;
  137. GPIO_CLR = 1 << 11;
  138. INP_GPIO(10);
  139. SET_GPIO_ALT(10,0);
  140. INP_GPIO(11);
  141. SET_GPIO_ALT(11,0);
  142. INP_GPIO(9);
  143. SET_GPIO_ALT(9,0);
  144. return a;
  145. }
  146. #define BAILOUT(s) do{ \
  147. perror(s); \
  148. close(fd); \
  149. return false; \
  150. }while(0)
  151. bool sys_spi_txrx(struct spi_port *port)
  152. {
  153. const void *wrbuf = spi_gettxbuf(port);
  154. void *rdbuf = spi_getrxbuf(port);
  155. size_t bufsz = spi_getbufsz(port);
  156. int fd;
  157. int mode, bits, speed, rv, i, j;
  158. struct spi_ioc_transfer tr[16];
  159. memset(&tr,0,sizeof(tr));
  160. mode = 0; bits = 8; speed = 4000000;
  161. if (port->speed)
  162. speed = port->speed;
  163. spi_reset(1234);
  164. fd = open("/dev/spidev0.0", O_RDWR);
  165. if (fd < 0) {
  166. perror("Unable to open SPI device");
  167. return false;
  168. }
  169. if (ioctl(fd, SPI_IOC_WR_MODE, &mode) < 0)
  170. BAILOUT("Unable to set WR MODE");
  171. if (ioctl(fd, SPI_IOC_RD_MODE, &mode) < 0)
  172. BAILOUT("Unable to set RD MODE");
  173. if (ioctl(fd, SPI_IOC_WR_BITS_PER_WORD, &bits) < 0)
  174. BAILOUT("Unable to set WR_BITS_PER_WORD");
  175. if (ioctl(fd, SPI_IOC_RD_BITS_PER_WORD, &bits) < 0)
  176. BAILOUT("Unable to set RD_BITS_PER_WORD");
  177. if (ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed) < 0)
  178. BAILOUT("Unable to set WR_MAX_SPEED_HZ");
  179. if (ioctl(fd, SPI_IOC_RD_MAX_SPEED_HZ, &speed) < 0)
  180. BAILOUT("Unable to set RD_MAX_SPEED_HZ");
  181. rv = 0;
  182. while (bufsz >= 4096) {
  183. tr[rv].tx_buf = (uintptr_t) wrbuf;
  184. tr[rv].rx_buf = (uintptr_t) rdbuf;
  185. tr[rv].len = 4096;
  186. tr[rv].delay_usecs = 1;
  187. tr[rv].speed_hz = speed;
  188. tr[rv].bits_per_word = bits;
  189. bufsz -= 4096;
  190. wrbuf += 4096; rdbuf += 4096; rv ++;
  191. }
  192. if (bufsz > 0) {
  193. tr[rv].tx_buf = (uintptr_t) wrbuf;
  194. tr[rv].rx_buf = (uintptr_t) rdbuf;
  195. tr[rv].len = (unsigned)bufsz;
  196. tr[rv].delay_usecs = 1;
  197. tr[rv].speed_hz = speed;
  198. tr[rv].bits_per_word = bits;
  199. rv ++;
  200. }
  201. i = rv;
  202. for (j = 0; j < i; j++) {
  203. rv = (int)ioctl(fd, SPI_IOC_MESSAGE(1), (intptr_t)&tr[j]);
  204. if (rv < 0)
  205. BAILOUT("WTF!");
  206. }
  207. close(fd);
  208. spi_reset(4321);
  209. return true;
  210. }
  211. bool linux_spi_txrx(struct spi_port * const spi)
  212. {
  213. const void * const wrbuf = spi_gettxbuf(spi);
  214. void * const rdbuf = spi_getrxbuf(spi);
  215. const size_t bufsz = spi_getbufsz(spi);
  216. const int fd = spi->fd;
  217. struct spi_ioc_transfer xf = {
  218. .tx_buf = (uintptr_t) wrbuf,
  219. .rx_buf = (uintptr_t) rdbuf,
  220. .len = bufsz,
  221. .delay_usecs = spi->delay,
  222. .speed_hz = spi->speed,
  223. .bits_per_word = spi->bits,
  224. };
  225. return (ioctl(fd, SPI_IOC_MESSAGE(1), &xf) > 0);
  226. }
  227. bool linux_spi_txrx2(struct spi_port * const spi)
  228. {
  229. const size_t bufsz = spi_getbufsz(spi);
  230. if (opt_dev_protocol)
  231. {
  232. const void * const txbuf = spi_gettxbuf(spi);
  233. char hex[(bufsz * 2) + 1];
  234. bin2hex(hex, txbuf, bufsz);
  235. applog(LOG_DEBUG, "%s: %cX %s", spi->repr, 'T', hex);
  236. }
  237. bool rv = linux_spi_txrx(spi);
  238. if (opt_dev_protocol)
  239. {
  240. if (likely(rv))
  241. {
  242. void * const rxbuf = spi_getrxbuf(spi);
  243. char hex[(bufsz * 2) + 1];
  244. bin2hex(hex, rxbuf, bufsz);
  245. applog(LOG_DEBUG, "%s: %cX %s", spi->repr, 'R', hex);
  246. }
  247. else
  248. applog(LOG_DEBUG, "%s: SPI ERROR", spi->repr);
  249. }
  250. return rv;
  251. }
  252. #endif
  253. static
  254. void *spi_emit_buf_reverse(struct spi_port *port, const void *p, size_t sz)
  255. {
  256. const unsigned char *str = p;
  257. void * const rv = &port->spibuf_rx[port->spibufsz];
  258. if (port->spibufsz + sz >= SPIMAXSZ)
  259. return NULL;
  260. for (size_t i = 0; i < sz; ++i)
  261. {
  262. // Reverse bit order in each byte!
  263. port->spibuf[port->spibufsz++] = bitflip8(str[i]);
  264. }
  265. return rv;
  266. }
  267. void spi_emit_buf(struct spi_port * const port, const void * const str, const size_t sz)
  268. {
  269. if (port->spibufsz + sz >= SPIMAXSZ)
  270. return;
  271. memcpy(&port->spibuf[port->spibufsz], str, sz);
  272. port->spibufsz += sz;
  273. }
  274. /* TODO: in production, emit just bit-sequences! Eliminate padding to byte! */
  275. void spi_emit_break(struct spi_port *port)
  276. {
  277. spi_emit_buf(port, "\x4", 1);
  278. }
  279. void spi_emit_fsync(struct spi_port *port)
  280. {
  281. spi_emit_buf(port, "\x6", 1);
  282. }
  283. void spi_emit_fasync(struct spi_port *port, int n)
  284. {
  285. int i;
  286. for (i = 0; i < n; i++) {
  287. spi_emit_buf(port, "\x5", 1);
  288. }
  289. }
  290. void spi_emit_nop(struct spi_port *port, int n) {
  291. int i;
  292. for (i = 0; i < n; ++i) {
  293. spi_emit_buf(port, "\x0", 1);
  294. }
  295. }
  296. void *spi_emit_data(struct spi_port *port, uint16_t addr, const void *buf, size_t len)
  297. {
  298. unsigned char otmp[3];
  299. if (len < 4 || len > 128)
  300. return NULL; /* This cannot be programmed in single frame! */
  301. len /= 4; /* Strip */
  302. otmp[0] = (len - 1) | 0xE0;
  303. otmp[1] = (addr >> 8)&0xFF; otmp[2] = addr & 0xFF;
  304. spi_emit_buf(port, otmp, 3);
  305. return spi_emit_buf_reverse(port, buf, len*4);
  306. }
  307. #ifdef USE_BFSB
  308. void spi_bfsb_select_bank(int bank)
  309. {
  310. static int last_bank = -2;
  311. if (bank == last_bank)
  312. return;
  313. const int banks[4]={18,23,24,25}; // GPIO connected to OE of level shifters
  314. int i;
  315. for(i=0;i<4;i++)
  316. {
  317. if (i == bank)
  318. continue;
  319. INP_GPIO(banks[i]);
  320. OUT_GPIO(banks[i]);
  321. GPIO_CLR = 1 << banks[i];
  322. }
  323. if (bank != -1)
  324. {
  325. OUT_GPIO(banks[bank]);
  326. GPIO_SET = 1 << banks[bank];
  327. }
  328. last_bank = bank;
  329. }
  330. #endif