driver-knc-spi-fpga.c 19 KB

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  1. /* cgminer driver for KnCminer Jupiter */
  2. #include <stdlib.h>
  3. #include <assert.h>
  4. #include <fcntl.h>
  5. #include <limits.h>
  6. #include <unistd.h>
  7. #include <sys/ioctl.h>
  8. #include <linux/types.h>
  9. #include <linux/spi/spidev.h>
  10. #include "logging.h"
  11. #include "miner.h"
  12. #define MAX_SPIS 1
  13. #define MAX_BYTES_IN_SPI_XSFER 4096
  14. /* /dev/spidevB.C, where B = bus, C = chipselect */
  15. #define SPI_DEVICE_TEMPLATE "/dev/spidev%d.%d"
  16. #define SPI_MODE (SPI_CPHA | SPI_CPOL | SPI_CS_HIGH)
  17. #define SPI_BITS_PER_WORD 32
  18. #define SPI_MAX_SPEED 3000000
  19. #define SPI_DELAY_USECS 0
  20. /* Max number of ASICs permitted on one SPI device */
  21. #define MAX_ASICS 6
  22. /* How many hardware errors in a row before disabling the core */
  23. #define HW_ERR_LIMIT 10
  24. #define DISA_ERR_LIMIT 3
  25. #define MAX_ACTIVE_WORKS (192 * 2 * 6 * 2)
  26. #define WORK_MIDSTATE_WORDS 8
  27. #define WORK_DATA_WORDS 3
  28. #define WORK_STALE_US 60000000
  29. /* Keep core disabled for no longer than 15 minutes */
  30. #define CORE_DISA_PERIOD_US (15 * 60 * 1000000)
  31. struct spidev_context {
  32. int fd;
  33. uint32_t speed;
  34. uint16_t delay;
  35. uint8_t mode;
  36. uint8_t bits;
  37. };
  38. struct spi_request {
  39. #define CMD_NOP 0
  40. #define CMD_GET_VERSION 1
  41. #define CMD_SUBMIT_WORK 2
  42. #define CMD_FLUSH_QUEUE 3
  43. #define WORK_ID_MASK 0x7FFF
  44. #if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
  45. uint32_t cmd :4;
  46. uint32_t rsvd :1; /* set to zero */
  47. uint32_t queue_id :12;
  48. uint32_t work_id :15;
  49. #else
  50. uint32_t work_id :15;
  51. uint32_t queue_id :12;
  52. uint32_t rsvd :1; /* set to zero */
  53. uint32_t cmd :4;
  54. #endif
  55. uint32_t midstate[WORK_MIDSTATE_WORDS];
  56. uint32_t data[WORK_DATA_WORDS];
  57. };
  58. struct spi_response {
  59. #define RESPONSE_TYPE_NOP 0
  60. #define RESPONSE_TYPE_NONCE_FOUND 1
  61. #define RESPONSE_TYPE_WORK_DONE 2
  62. #if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
  63. uint32_t type :2;
  64. uint32_t asic :3;
  65. uint32_t queue_id :12;
  66. uint32_t work_id :15;
  67. #else
  68. uint32_t work_id :15;
  69. uint32_t queue_id :12;
  70. uint32_t asic :3;
  71. uint32_t type :2;
  72. #endif
  73. uint32_t nonce;
  74. uint32_t core;
  75. };
  76. #define MAX_REQUESTS_IN_BATCH ( MAX_BYTES_IN_SPI_XSFER / \
  77. sizeof(struct spi_request) \
  78. )
  79. static struct spi_request spi_txbuf[MAX_REQUESTS_IN_BATCH];
  80. #define MAX_RESPONSES_IN_BATCH ( (sizeof(spi_txbuf) - 12) / \
  81. sizeof(struct spi_response) \
  82. )
  83. struct spi_rx_t {
  84. #if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
  85. uint32_t rsvd_1 :31;
  86. uint32_t response_queue_full :1;
  87. #else
  88. uint32_t response_queue_full :1;
  89. uint32_t rsvd_1 :31;
  90. #endif
  91. #if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
  92. uint32_t rsvd_2 :16;
  93. uint32_t works_accepted :16;
  94. #else
  95. uint32_t works_accepted :16;
  96. uint32_t rsvd_2 :16;
  97. #endif
  98. uint32_t rsvd_3;
  99. struct spi_response responses[MAX_RESPONSES_IN_BATCH];
  100. };
  101. static struct spi_rx_t spi_rxbuf;
  102. struct active_work {
  103. struct work *work;
  104. uint32_t work_id;
  105. struct timeval begin;
  106. };
  107. struct core_disa_data {
  108. struct timeval disa_begin;
  109. uint8_t asic;
  110. uint8_t core;
  111. };
  112. struct knc_state {
  113. struct spidev_context *ctx;
  114. int devices;
  115. uint32_t salt;
  116. uint32_t next_work_id;
  117. /* read - last read item, next is at (read + 1) mod BUFSIZE
  118. * write - next write item, last written at (write - 1) mod BUFSIZE
  119. * When buffer is empty, read + 1 == write
  120. * Buffer full condition: read == write
  121. */
  122. int read_q, write_q;
  123. #define KNC_QUEUED_BUFFER_SIZE (MAX_REQUESTS_IN_BATCH + 1)
  124. struct active_work queued_fifo[KNC_QUEUED_BUFFER_SIZE];
  125. int read_a, write_a;
  126. #define KNC_ACTIVE_BUFFER_SIZE (MAX_ACTIVE_WORKS + 1)
  127. struct active_work active_fifo[KNC_ACTIVE_BUFFER_SIZE];
  128. uint8_t hwerrs[MAX_ASICS * 256];
  129. uint8_t disa_cnt[MAX_ASICS * 256];
  130. uint32_t hwerr_work_id[MAX_ASICS * 256];
  131. int read_d, write_d;
  132. #define KNC_DISA_CORES_SIZE (MAX_ASICS * 256)
  133. struct core_disa_data disa_cores_fifo[KNC_DISA_CORES_SIZE];
  134. pthread_mutex_t lock;
  135. };
  136. static inline bool knc_queued_fifo_full(struct knc_state *knc)
  137. {
  138. return (knc->read_q == knc->write_q);
  139. }
  140. static inline bool knc_active_fifo_full(struct knc_state *knc)
  141. {
  142. return (knc->read_a == knc->write_a);
  143. }
  144. static inline void knc_queued_fifo_inc_idx(int *idx)
  145. {
  146. if (unlikely(*idx >= ((int)KNC_QUEUED_BUFFER_SIZE - 1)))
  147. *idx = 0;
  148. else
  149. ++(*idx);
  150. }
  151. static inline void knc_active_fifo_inc_idx(int *idx)
  152. {
  153. if (unlikely(*idx >= (KNC_ACTIVE_BUFFER_SIZE - 1)))
  154. *idx = 0;
  155. else
  156. ++(*idx);
  157. }
  158. static inline void knc_disa_cores_fifo_inc_idx(int *idx)
  159. {
  160. if (unlikely(*idx >= (KNC_DISA_CORES_SIZE - 1)))
  161. *idx = 0;
  162. else
  163. ++(*idx);
  164. }
  165. /* Find SPI device with index idx, init it */
  166. static struct spidev_context *spi_new(int idx)
  167. {
  168. struct spidev_context *ctx;
  169. char dev_fname[PATH_MAX];
  170. if (NULL == (ctx = malloc(sizeof(struct spidev_context)))) {
  171. applog(LOG_ERR, "KnC spi: Out of memory");
  172. goto l_exit_error;
  173. }
  174. ctx->mode = SPI_MODE;
  175. ctx->bits = SPI_BITS_PER_WORD;
  176. ctx->speed = SPI_MAX_SPEED;
  177. ctx->delay = SPI_DELAY_USECS;
  178. ctx->fd = -1;
  179. sprintf(dev_fname, SPI_DEVICE_TEMPLATE,
  180. idx, /* bus */
  181. 0 /* chipselect */
  182. );
  183. if (0 > (ctx->fd = open(dev_fname, O_RDWR))) {
  184. applog(LOG_ERR, "KnC spi: Can not open SPI device %s: %m",
  185. dev_fname);
  186. goto l_free_exit_error;
  187. }
  188. /*
  189. * spi mode
  190. */
  191. if (0 > ioctl(ctx->fd, SPI_IOC_WR_MODE, &ctx->mode))
  192. goto l_ioctl_error;
  193. if (0 > ioctl(ctx->fd, SPI_IOC_RD_MODE, &ctx->mode))
  194. goto l_ioctl_error;
  195. /*
  196. * bits per word
  197. */
  198. if (0 > ioctl(ctx->fd, SPI_IOC_WR_BITS_PER_WORD, &ctx->bits))
  199. goto l_ioctl_error;
  200. if (0 > ioctl(ctx->fd, SPI_IOC_RD_BITS_PER_WORD, &ctx->bits))
  201. goto l_ioctl_error;
  202. /*
  203. * max speed hz
  204. */
  205. if (0 > ioctl(ctx->fd, SPI_IOC_WR_MAX_SPEED_HZ, &ctx->speed))
  206. goto l_ioctl_error;
  207. if (0 > ioctl(ctx->fd, SPI_IOC_RD_MAX_SPEED_HZ, &ctx->speed))
  208. goto l_ioctl_error;
  209. applog(LOG_INFO, "KnC spi: device %s uses mode %hhu, bits %hhu, speed %u",
  210. dev_fname, ctx->mode, ctx->bits, ctx->speed);
  211. return ctx;
  212. l_ioctl_error:
  213. applog(LOG_ERR, "KnC spi: ioctl error on SPI device %s: %m", dev_fname);
  214. close(ctx->fd);
  215. l_free_exit_error:
  216. free(ctx);
  217. l_exit_error:
  218. return NULL;
  219. }
  220. static void spi_free(struct spidev_context *ctx)
  221. {
  222. if (NULL == ctx)
  223. return;
  224. close(ctx->fd);
  225. free(ctx);
  226. }
  227. static int spi_transfer(struct spidev_context *ctx, uint8_t *txbuf,
  228. uint8_t *rxbuf, int len)
  229. {
  230. struct spi_ioc_transfer xfr;
  231. int ret;
  232. memset(rxbuf, 0xff, len);
  233. ret = len;
  234. xfr.tx_buf = (unsigned long)txbuf;
  235. xfr.rx_buf = (unsigned long)rxbuf;
  236. xfr.len = len;
  237. xfr.speed_hz = ctx->speed;
  238. xfr.delay_usecs = ctx->delay;
  239. xfr.bits_per_word = ctx->bits;
  240. xfr.cs_change = 0;
  241. xfr.pad = 0;
  242. if (1 > (ret = ioctl(ctx->fd, SPI_IOC_MESSAGE(1), &xfr)))
  243. applog(LOG_ERR, "KnC spi xfer: ioctl error on SPI device: %m");
  244. return ret;
  245. }
  246. static void disable_core(uint8_t asic, uint8_t core)
  247. {
  248. char str[256];
  249. snprintf(str, sizeof(str), "i2cset -y 2 0x2%hhu %hhu 0", asic, core);
  250. if (0 != WEXITSTATUS(system(str)))
  251. applog(LOG_ERR, "KnC: system call failed");
  252. }
  253. static void enable_core(uint8_t asic, uint8_t core)
  254. {
  255. char str[256];
  256. snprintf(str, sizeof(str), "i2cset -y 2 0x2%hhu %hhu 1", asic, core);
  257. if (0 != WEXITSTATUS(system(str)))
  258. applog(LOG_ERR, "KnC: system call failed");
  259. }
  260. static int64_t timediff(const struct timeval *a, const struct timeval *b)
  261. {
  262. struct timeval diff;
  263. timersub(a, b, &diff);
  264. return diff.tv_sec * 1000000 + diff.tv_usec;
  265. }
  266. static void knc_check_disabled_cores(struct knc_state *knc)
  267. {
  268. struct core_disa_data *core;
  269. int next_read_d, cidx;
  270. struct timeval now;
  271. int64_t us;
  272. next_read_d = knc->read_d;
  273. knc_disa_cores_fifo_inc_idx(&next_read_d);
  274. if (next_read_d == knc->write_d)
  275. return; /* queue empty */
  276. core = &knc->disa_cores_fifo[next_read_d];
  277. gettimeofday(&now, NULL);
  278. us = timediff(&now, &core->disa_begin);
  279. if ((us >= 0) && (us < CORE_DISA_PERIOD_US))
  280. return; /* latest disabled core still not expired */
  281. cidx = core->asic * 256 + core->core;
  282. enable_core(core->asic, core->core);
  283. knc->hwerrs[cidx] = 0;
  284. applog(LOG_NOTICE,
  285. "KnC: core %u-%u was enabled back from disabled state",
  286. core->asic, core->core);
  287. knc->read_d = next_read_d;
  288. }
  289. static void knc_work_from_queue_to_spi(struct knc_state *knc,
  290. struct active_work *q_work,
  291. struct spi_request *spi_req)
  292. {
  293. uint32_t *buf_from, *buf_to;
  294. int i;
  295. spi_req->cmd = CMD_SUBMIT_WORK;
  296. spi_req->queue_id = 0; /* at the moment we have one and only queue #0 */
  297. spi_req->work_id = (knc->next_work_id ^ knc->salt) & WORK_ID_MASK;
  298. q_work->work_id = spi_req->work_id;
  299. ++(knc->next_work_id);
  300. buf_to = spi_req->midstate;
  301. buf_from = (uint32_t *)q_work->work->midstate;
  302. for (i = 0; i < WORK_MIDSTATE_WORDS; ++i)
  303. buf_to[i] = le32toh(buf_from[8 - i - 1]);
  304. buf_to = spi_req->data;
  305. buf_from = (uint32_t *)&(q_work->work->data[16 * 4]);
  306. for (i = 0; i < WORK_DATA_WORDS; ++i)
  307. buf_to[i] = le32toh(buf_from[3 - i - 1]);
  308. }
  309. static int64_t knc_process_response(struct thr_info *thr, struct cgpu_info *cgpu,
  310. struct spi_rx_t *rxbuf)
  311. {
  312. struct knc_state *knc = cgpu->device_data;
  313. int submitted, successful, i, num_sent;
  314. int next_read_q, next_read_a;
  315. struct timeval now;
  316. struct work *work;
  317. int64_t us;
  318. num_sent = knc->write_q - knc->read_q - 1;
  319. if (knc->write_q <= knc->read_q)
  320. num_sent += KNC_QUEUED_BUFFER_SIZE;
  321. /* Actually process SPI response */
  322. if (rxbuf->works_accepted) {
  323. applog(LOG_DEBUG, "KnC spi: raw response %08X %08X",
  324. ((uint32_t *)rxbuf)[0], ((uint32_t *)rxbuf)[1]);
  325. applog(LOG_DEBUG,
  326. "KnC spi: response, accepted %u (from %u), full %u",
  327. rxbuf->works_accepted, num_sent,
  328. rxbuf->response_queue_full);
  329. }
  330. /* move works_accepted number of items from queued_fifo to active_fifo */
  331. gettimeofday(&now, NULL);
  332. submitted = 0;
  333. for (i = 0; i < rxbuf->works_accepted; ++i) {
  334. next_read_q = knc->read_q;
  335. knc_queued_fifo_inc_idx(&next_read_q);
  336. if ((next_read_q == knc->write_q) || knc_active_fifo_full(knc))
  337. break;
  338. memcpy(&knc->active_fifo[knc->write_a],
  339. &knc->queued_fifo[next_read_q],
  340. sizeof(struct active_work));
  341. knc->active_fifo[knc->write_a].begin = now;
  342. knc->queued_fifo[next_read_q].work = NULL;
  343. knc->read_q = next_read_q;
  344. knc_active_fifo_inc_idx(&knc->write_a);
  345. ++submitted;
  346. }
  347. if (submitted != rxbuf->works_accepted) {
  348. applog(LOG_ERR,
  349. "KnC: accepted by FPGA %u works, but only %d submitted",
  350. rxbuf->works_accepted, submitted);
  351. }
  352. /* check for completed works and calculated nonces */
  353. gettimeofday(&now, NULL);
  354. successful = 0;
  355. for (i = 0; i < (int)MAX_RESPONSES_IN_BATCH; ++i) {
  356. if ((rxbuf->responses[i].type != RESPONSE_TYPE_NONCE_FOUND) &&
  357. (rxbuf->responses[i].type != RESPONSE_TYPE_WORK_DONE))
  358. continue;
  359. applog(LOG_DEBUG, "KnC spi: raw response %08X %08X",
  360. ((uint32_t *)&rxbuf->responses[i])[0],
  361. ((uint32_t *)&rxbuf->responses[i])[1]);
  362. applog(LOG_DEBUG, "KnC spi: response, T:%u C:%u-%u Q:%u W:%u",
  363. rxbuf->responses[i].type,
  364. rxbuf->responses[i].asic, rxbuf->responses[i].core,
  365. rxbuf->responses[i].queue_id,
  366. rxbuf->responses[i].work_id);
  367. /* Find active work with matching ID */
  368. next_read_a = knc->read_a;
  369. knc_active_fifo_inc_idx(&next_read_a);
  370. while (next_read_a != knc->write_a) {
  371. if (knc->active_fifo[next_read_a].work_id ==
  372. rxbuf->responses[i].work_id)
  373. break;
  374. /* check for stale works */
  375. us = timediff(&now,
  376. &knc->active_fifo[next_read_a].begin);
  377. if ((us < 0) || (us >= WORK_STALE_US)) {
  378. applog(LOG_DEBUG,
  379. "KnC spi: remove stale work %u",
  380. knc->active_fifo[next_read_a].work_id);
  381. work = knc->active_fifo[next_read_a].work;
  382. knc_active_fifo_inc_idx(&knc->read_a);
  383. work_completed(cgpu, work);
  384. if (next_read_a != knc->read_a) {
  385. memcpy(&(knc->active_fifo[next_read_a]),
  386. &(knc->active_fifo[knc->read_a]),
  387. sizeof(struct active_work));
  388. }
  389. knc->active_fifo[knc->read_a].work = NULL;
  390. }
  391. knc_active_fifo_inc_idx(&next_read_a);
  392. }
  393. if (next_read_a == knc->write_a)
  394. continue;
  395. applog(LOG_DEBUG, "KnC spi: response work %u found",
  396. rxbuf->responses[i].work_id);
  397. work = knc->active_fifo[next_read_a].work;
  398. if (rxbuf->responses[i].type == RESPONSE_TYPE_NONCE_FOUND) {
  399. if (NULL != thr) {
  400. int cidx = rxbuf->responses[i].asic * 256 +
  401. rxbuf->responses[i].core;
  402. if (submit_nonce(thr, work,
  403. rxbuf->responses[i].nonce)) {
  404. if (cidx < (int)sizeof(knc->hwerrs)) {
  405. knc->hwerrs[cidx] = 0;
  406. knc->disa_cnt[cidx] = 0;
  407. knc->hwerr_work_id[cidx] = 0xFFFFFFFF;
  408. }
  409. successful++;
  410. } else {
  411. if ((cidx < (int)sizeof(knc->hwerrs)) &&
  412. (knc->hwerr_work_id[cidx] != rxbuf->responses[i].work_id)) {
  413. knc->hwerr_work_id[cidx] = rxbuf->responses[i].work_id;
  414. if (++(knc->hwerrs[cidx]) >= HW_ERR_LIMIT) {
  415. struct core_disa_data *core;
  416. core = &knc->disa_cores_fifo[knc->write_d];
  417. core->disa_begin = now;
  418. core->asic = rxbuf->responses[i].asic;
  419. core->core = rxbuf->responses[i].core;
  420. disable_core(core->asic, core->core);
  421. if (++(knc->disa_cnt[cidx]) >= DISA_ERR_LIMIT) {
  422. applog(LOG_WARNING,
  423. "KnC: core %u-%u was disabled permanently", core->asic, core->core);
  424. } else {
  425. applog(LOG_WARNING,
  426. "KnC: core %u-%u was disabled due to %u HW errors in a row",
  427. core->asic, core->core, HW_ERR_LIMIT);
  428. knc_disa_cores_fifo_inc_idx(&knc->write_d);
  429. }
  430. }
  431. }
  432. };
  433. }
  434. continue;
  435. }
  436. /* Work completed */
  437. knc_active_fifo_inc_idx(&knc->read_a);
  438. work_completed(cgpu, work);
  439. if (next_read_a != knc->read_a) {
  440. memcpy(&(knc->active_fifo[next_read_a]),
  441. &(knc->active_fifo[knc->read_a]),
  442. sizeof(struct active_work));
  443. }
  444. knc->active_fifo[knc->read_a].work = NULL;
  445. }
  446. return ((uint64_t)successful) * 0x100000000UL;
  447. }
  448. /* Send flush command via SPI */
  449. static int _internal_knc_flush_fpga(struct knc_state *knc)
  450. {
  451. int len;
  452. spi_txbuf[0].cmd = CMD_FLUSH_QUEUE;
  453. spi_txbuf[0].queue_id = 0; /* at the moment we have one and only queue #0 */
  454. len = spi_transfer(knc->ctx, (uint8_t *)spi_txbuf,
  455. (uint8_t *)&spi_rxbuf, sizeof(struct spi_request));
  456. if (len != sizeof(struct spi_request))
  457. return -1;
  458. len /= sizeof(struct spi_response);
  459. return len;
  460. }
  461. static bool knc_detect_one(struct spidev_context *ctx)
  462. {
  463. /* Scan device for ASICs */
  464. int chip_id, devices = 0;
  465. struct cgpu_info *cgpu;
  466. struct knc_state *knc;
  467. for (chip_id = 0; chip_id < MAX_ASICS; ++chip_id) {
  468. /* TODO: perform the ASIC test/detection */
  469. ++devices;
  470. }
  471. if (!devices) {
  472. applog(LOG_INFO, "SPI detected, but not KnCminer ASICs");
  473. return false;
  474. }
  475. applog(LOG_INFO, "Found a KnC miner with %d ASICs", devices);
  476. cgpu = calloc(1, sizeof(*cgpu));
  477. knc = calloc(1, sizeof(*knc));
  478. if (!cgpu || !knc) {
  479. applog(LOG_ERR, "KnC miner detected, but failed to allocate memory");
  480. return false;
  481. }
  482. knc->ctx = ctx;
  483. knc->devices = devices;
  484. knc->read_q = 0;
  485. knc->write_q = 1;
  486. knc->read_a = 0;
  487. knc->write_a = 1;
  488. knc->read_d = 0;
  489. knc->write_d = 1;
  490. knc->salt = rand();
  491. mutex_init(&knc->lock);
  492. memset(knc->hwerr_work_id, 0xFF, sizeof(knc->hwerr_work_id));
  493. _internal_knc_flush_fpga(knc);
  494. cgpu->drv = &knc_drv;
  495. cgpu->name = "KnCminer";
  496. cgpu->threads = 1; // .. perhaps our number of devices?
  497. cgpu->device_data = knc;
  498. add_cgpu(cgpu);
  499. return true;
  500. }
  501. // http://www.concentric.net/~Ttwang/tech/inthash.htm
  502. static unsigned long mix(unsigned long a, unsigned long b, unsigned long c)
  503. {
  504. a = a - b; a = a - c; a = a ^ (c >> 13);
  505. b = b - c; b = b - a; b = b ^ (a << 8);
  506. c = c - a; c = c - b; c = c ^ (b >> 13);
  507. a = a - b; a = a - c; a = a ^ (c >> 12);
  508. b = b - c; b = b - a; b = b ^ (a << 16);
  509. c = c - a; c = c - b; c = c ^ (b >> 5);
  510. a = a - b; a = a - c; a = a ^ (c >> 3);
  511. b = b - c; b = b - a; b = b ^ (a << 10);
  512. c = c - a; c = c - b; c = c ^ (b >> 15);
  513. return c;
  514. }
  515. /* Probe devices and register with add_cgpu */
  516. void knc_detect(bool __maybe_unused hotplug)
  517. {
  518. int idx;
  519. srand(mix(clock(), time(NULL), getpid()));
  520. /* Loop through all possible SPI interfaces */
  521. for (idx = 0; idx < MAX_SPIS; ++idx) {
  522. struct spidev_context *ctx = spi_new(idx + 1);
  523. if (ctx != NULL) {
  524. if (!knc_detect_one(ctx))
  525. spi_free(ctx);
  526. }
  527. }
  528. }
  529. /* return value is number of nonces that have been checked since
  530. * previous call
  531. */
  532. static int64_t knc_scanwork(struct thr_info *thr)
  533. {
  534. struct cgpu_info *cgpu = thr->cgpu;
  535. struct knc_state *knc = cgpu->device_data;
  536. int len, num, next_read_q;
  537. int64_t ret;
  538. applog(LOG_DEBUG, "KnC running scanwork");
  539. knc_check_disabled_cores(knc);
  540. /* Prepare tx buffer */
  541. memset(spi_txbuf, 0, sizeof(spi_txbuf));
  542. num = 0;
  543. mutex_lock(&knc->lock);
  544. next_read_q = knc->read_q;
  545. knc_queued_fifo_inc_idx(&next_read_q);
  546. while (next_read_q != knc->write_q) {
  547. knc_work_from_queue_to_spi(knc, &knc->queued_fifo[next_read_q],
  548. &spi_txbuf[num]);
  549. knc_queued_fifo_inc_idx(&next_read_q);
  550. ++num;
  551. }
  552. /* knc->read_q is advanced in knc_process_response, not here */
  553. len = spi_transfer(knc->ctx, (uint8_t *)spi_txbuf,
  554. (uint8_t *)&spi_rxbuf, sizeof(spi_txbuf));
  555. if (len != sizeof(spi_rxbuf)) {
  556. ret = -1;
  557. goto out_unlock;
  558. }
  559. applog(LOG_DEBUG, "KnC spi: %d works in request", num);
  560. ret = knc_process_response(thr, cgpu, &spi_rxbuf);
  561. out_unlock:
  562. mutex_unlock(&knc->lock);
  563. return ret;
  564. }
  565. static bool knc_queue_full(struct cgpu_info *cgpu)
  566. {
  567. struct knc_state *knc = cgpu->device_data;
  568. int queue_full = false;
  569. struct work *work;
  570. applog(LOG_DEBUG, "KnC running queue full");
  571. mutex_lock(&knc->lock);
  572. if (knc_queued_fifo_full(knc)) {
  573. queue_full = true;
  574. goto out_unlock;
  575. }
  576. work = get_queued(cgpu);
  577. if (!work)
  578. goto out_unlock;
  579. knc->queued_fifo[knc->write_q].work = work;
  580. knc_queued_fifo_inc_idx(&(knc->write_q));
  581. if (knc_queued_fifo_full(knc))
  582. queue_full = true;
  583. out_unlock:
  584. mutex_unlock(&knc->lock);
  585. return queue_full;
  586. }
  587. static void knc_flush_work(struct cgpu_info *cgpu)
  588. {
  589. struct knc_state *knc = cgpu->device_data;
  590. int len, next_read_q, next_read_a;
  591. struct work *work;
  592. applog(LOG_ERR, "KnC running flushwork");
  593. mutex_lock(&knc->lock);
  594. /* Drain queued works */
  595. next_read_q = knc->read_q;
  596. knc_queued_fifo_inc_idx(&next_read_q);
  597. while (next_read_q != knc->write_q) {
  598. work = knc->queued_fifo[next_read_q].work;
  599. work_completed(cgpu, work);
  600. knc->queued_fifo[next_read_q].work = NULL;
  601. knc->read_q = next_read_q;
  602. knc_queued_fifo_inc_idx(&next_read_q);
  603. }
  604. /* Drain active works */
  605. next_read_a = knc->read_a;
  606. knc_active_fifo_inc_idx(&next_read_a);
  607. while (next_read_a != knc->write_a) {
  608. work = knc->active_fifo[next_read_a].work;
  609. work_completed(cgpu, work);
  610. knc->active_fifo[next_read_a].work = NULL;
  611. knc->read_a = next_read_a;
  612. knc_active_fifo_inc_idx(&next_read_a);
  613. }
  614. len = _internal_knc_flush_fpga(knc);
  615. if (len > 0)
  616. knc_process_response(NULL, cgpu, &spi_rxbuf);
  617. mutex_unlock(&knc->lock);
  618. }
  619. struct device_drv knc_drv = {
  620. .drv_id = DRIVER_knc,
  621. .dname = "KnCminer",
  622. .name = "KnC",
  623. .drv_detect = knc_detect, // Probe for devices, add with add_cgpu
  624. .hash_work = hash_queued_work,
  625. .scanwork = knc_scanwork,
  626. .queue_full = knc_queue_full,
  627. .flush_work = knc_flush_work,
  628. };