driver-icarus.c 40 KB

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  1. /*
  2. * Copyright 2012-2013 Luke Dashjr
  3. * Copyright 2012 Xiangfu
  4. * Copyright 2012 Andrew Smith
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the Free
  8. * Software Foundation; either version 3 of the License, or (at your option)
  9. * any later version. See COPYING for more details.
  10. */
  11. /*
  12. * Those code should be works fine with V2 and V3 bitstream of Icarus.
  13. * Operation:
  14. * No detection implement.
  15. * Input: 64B = 32B midstate + 20B fill bytes + last 12 bytes of block head.
  16. * Return: send back 32bits immediately when Icarus found a valid nonce.
  17. * no query protocol implemented here, if no data send back in ~11.3
  18. * seconds (full cover time on 32bit nonce range by 380MH/s speed)
  19. * just send another work.
  20. * Notice:
  21. * 1. Icarus will start calculate when you push a work to them, even they
  22. * are busy.
  23. * 2. The 2 FPGAs on Icarus will distribute the job, one will calculate the
  24. * 0 ~ 7FFFFFFF, another one will cover the 80000000 ~ FFFFFFFF.
  25. * 3. It's possible for 2 FPGAs both find valid nonce in the meantime, the 2
  26. * valid nonce will all be send back.
  27. * 4. Icarus will stop work when: a valid nonce has been found or 32 bits
  28. * nonce range is completely calculated.
  29. */
  30. #include "config.h"
  31. #include "miner.h"
  32. #include <limits.h>
  33. #include <pthread.h>
  34. #include <stdbool.h>
  35. #include <stdint.h>
  36. #include <stdio.h>
  37. #include <sys/time.h>
  38. #include <sys/types.h>
  39. #include <dirent.h>
  40. #include <unistd.h>
  41. #ifndef WIN32
  42. #include <termios.h>
  43. #include <sys/stat.h>
  44. #include <fcntl.h>
  45. #ifndef O_CLOEXEC
  46. #define O_CLOEXEC 0
  47. #endif
  48. #else
  49. #include <windows.h>
  50. #include <io.h>
  51. #endif
  52. #ifdef HAVE_SYS_EPOLL_H
  53. #include <sys/epoll.h>
  54. #define HAVE_EPOLL
  55. #endif
  56. #include "compat.h"
  57. #include "dynclock.h"
  58. #include "icarus-common.h"
  59. #include "lowl-vcom.h"
  60. // The serial I/O speed - Linux uses a define 'B115200' in bits/termios.h
  61. #define ICARUS_IO_SPEED 115200
  62. // The number of bytes in a nonce (always 4)
  63. // This is NOT the read-size for the Icarus driver
  64. // That is defined in ICARUS_INFO->read_size
  65. #define ICARUS_NONCE_SIZE 4
  66. #define ASSERT1(condition) __maybe_unused static char sizeof_uint32_t_must_be_4[(condition)?1:-1]
  67. ASSERT1(sizeof(uint32_t) == 4);
  68. #define ICARUS_READ_TIME(baud, read_size) ((double)read_size * (double)8.0 / (double)(baud))
  69. // Defined in deciseconds
  70. // There's no need to have this bigger, since the overhead/latency of extra work
  71. // is pretty small once you get beyond a 10s nonce range time and 10s also
  72. // means that nothing slower than 429MH/s can go idle so most icarus devices
  73. // will always mine without idling
  74. #define ICARUS_READ_COUNT_LIMIT_MAX 100
  75. // In timing mode: Default starting value until an estimate can be obtained
  76. // 5 seconds allows for up to a ~840MH/s device
  77. #define ICARUS_READ_COUNT_TIMING (5 * TIME_FACTOR)
  78. // For a standard Icarus REV3
  79. #define ICARUS_REV3_HASH_TIME 0.00000000264083
  80. // Icarus Rev3 doesn't send a completion message when it finishes
  81. // the full nonce range, so to avoid being idle we must abort the
  82. // work (by starting a new work) shortly before it finishes
  83. //
  84. // Thus we need to estimate 2 things:
  85. // 1) How many hashes were done if the work was aborted
  86. // 2) How high can the timeout be before the Icarus is idle,
  87. // to minimise the number of work started
  88. // We set 2) to 'the calculated estimate' - 1
  89. // to ensure the estimate ends before idle
  90. //
  91. // The simple calculation used is:
  92. // Tn = Total time in seconds to calculate n hashes
  93. // Hs = seconds per hash
  94. // Xn = number of hashes
  95. // W = code overhead per work
  96. //
  97. // Rough but reasonable estimate:
  98. // Tn = Hs * Xn + W (of the form y = mx + b)
  99. //
  100. // Thus:
  101. // Line of best fit (using least squares)
  102. //
  103. // Hs = (n*Sum(XiTi)-Sum(Xi)*Sum(Ti))/(n*Sum(Xi^2)-Sum(Xi)^2)
  104. // W = Sum(Ti)/n - (Hs*Sum(Xi))/n
  105. //
  106. // N.B. W is less when aborting work since we aren't waiting for the reply
  107. // to be transferred back (ICARUS_READ_TIME)
  108. // Calculating the hashes aborted at n seconds is thus just n/Hs
  109. // (though this is still a slight overestimate due to code delays)
  110. //
  111. // Both below must be exceeded to complete a set of data
  112. // Minimum how long after the first, the last data point must be
  113. #define HISTORY_SEC 60
  114. // Minimum how many points a single ICARUS_HISTORY should have
  115. #define MIN_DATA_COUNT 5
  116. // The value above used is doubled each history until it exceeds:
  117. #define MAX_MIN_DATA_COUNT 100
  118. #if (TIME_FACTOR != 10)
  119. #error TIME_FACTOR must be 10
  120. #endif
  121. static struct timeval history_sec = { HISTORY_SEC, 0 };
  122. static const char *MODE_DEFAULT_STR = "default";
  123. static const char *MODE_SHORT_STR = "short";
  124. static const char *MODE_SHORT_STREQ = "short=";
  125. static const char *MODE_LONG_STR = "long";
  126. static const char *MODE_LONG_STREQ = "long=";
  127. static const char *MODE_VALUE_STR = "value";
  128. static const char *MODE_UNKNOWN_STR = "unknown";
  129. #define END_CONDITION 0x0000ffff
  130. #define DEFAULT_DETECT_THRESHOLD 1
  131. BFG_REGISTER_DRIVER(icarus_drv)
  132. extern const struct bfg_set_device_definition icarus_set_device_funcs[];
  133. extern void convert_icarus_to_cairnsmore(struct cgpu_info *);
  134. static void rev(unsigned char *s, size_t l)
  135. {
  136. size_t i, j;
  137. unsigned char t;
  138. for (i = 0, j = l - 1; i < j; i++, j--) {
  139. t = s[i];
  140. s[i] = s[j];
  141. s[j] = t;
  142. }
  143. }
  144. static inline
  145. uint32_t icarus_nonce32toh(const struct ICARUS_INFO * const info, const uint32_t nonce)
  146. {
  147. return info->nonce_littleendian ? le32toh(nonce) : be32toh(nonce);
  148. }
  149. #define icarus_open2(devpath, baud, purge) serial_open(devpath, baud, ICARUS_READ_FAULT_DECISECONDS, purge)
  150. #define icarus_open(devpath, baud) icarus_open2(devpath, baud, false)
  151. static
  152. void icarus_log_protocol(int fd, const void *buf, size_t bufLen, const char *prefix)
  153. {
  154. char hex[(bufLen * 2) + 1];
  155. bin2hex(hex, buf, bufLen);
  156. applog(LOG_DEBUG, "%s fd=%d: DEVPROTO: %s %s", icarus_drv.dname, fd, prefix, hex);
  157. }
  158. int icarus_gets(unsigned char *buf, int fd, struct timeval *tv_finish, struct thr_info *thr, int read_count, int read_size)
  159. {
  160. ssize_t ret = 0;
  161. int rc = 0;
  162. int epollfd = -1;
  163. int epoll_timeout = ICARUS_READ_FAULT_DECISECONDS * 100;
  164. int read_amount = read_size;
  165. bool first = true;
  166. #ifdef HAVE_EPOLL
  167. struct epoll_event ev = {
  168. .events = EPOLLIN,
  169. .data.fd = fd,
  170. };
  171. struct epoll_event evr[2];
  172. if (thr && thr->work_restart_notifier[1] != -1) {
  173. epollfd = epoll_create(2);
  174. if (epollfd != -1) {
  175. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, fd, &ev)) {
  176. close(epollfd);
  177. epollfd = -1;
  178. }
  179. {
  180. ev.data.fd = thr->work_restart_notifier[0];
  181. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, thr->work_restart_notifier[0], &ev))
  182. applog(LOG_ERR, "%s: Error adding work restart fd to epoll", __func__);
  183. else
  184. {
  185. epoll_timeout *= read_count;
  186. read_count = 1;
  187. }
  188. }
  189. }
  190. else
  191. applog(LOG_ERR, "%s: Error creating epoll", __func__);
  192. }
  193. #endif
  194. // Read reply 1 byte at a time to get earliest tv_finish
  195. while (true) {
  196. #ifdef HAVE_EPOLL
  197. if (epollfd != -1 && (ret = epoll_wait(epollfd, evr, 2, epoll_timeout)) != -1)
  198. {
  199. if (ret == 1 && evr[0].data.fd == fd)
  200. ret = read(fd, buf, 1);
  201. else
  202. {
  203. if (ret)
  204. notifier_read(thr->work_restart_notifier);
  205. ret = 0;
  206. }
  207. }
  208. else
  209. #endif
  210. ret = read(fd, buf, 1);
  211. if (ret < 0)
  212. return ICA_GETS_ERROR;
  213. if (first)
  214. cgtime(tv_finish);
  215. if (ret >= read_amount)
  216. {
  217. if (epollfd != -1)
  218. close(epollfd);
  219. if (opt_dev_protocol && opt_debug)
  220. icarus_log_protocol(fd, buf, read_size, "RECV");
  221. return ICA_GETS_OK;
  222. }
  223. if (ret > 0) {
  224. buf += ret;
  225. read_amount -= ret;
  226. first = false;
  227. continue;
  228. }
  229. if (thr && thr->work_restart) {
  230. if (epollfd != -1)
  231. close(epollfd);
  232. applog(LOG_DEBUG, "%s: Interrupted by work restart", __func__);
  233. return ICA_GETS_RESTART;
  234. }
  235. rc++;
  236. if (rc >= read_count) {
  237. if (epollfd != -1)
  238. close(epollfd);
  239. applog(LOG_DEBUG, "%s: No data in %.2f seconds",
  240. __func__,
  241. (float)rc * epoll_timeout / 1000.);
  242. return ICA_GETS_TIMEOUT;
  243. }
  244. }
  245. }
  246. int icarus_write(int fd, const void *buf, size_t bufLen)
  247. {
  248. size_t ret;
  249. if (opt_dev_protocol && opt_debug)
  250. icarus_log_protocol(fd, buf, bufLen, "SEND");
  251. if (unlikely(fd == -1))
  252. return 1;
  253. ret = write(fd, buf, bufLen);
  254. if (unlikely(ret != bufLen))
  255. return 1;
  256. return 0;
  257. }
  258. #define icarus_close(fd) serial_close(fd)
  259. void do_icarus_close(struct thr_info *thr)
  260. {
  261. struct cgpu_info *icarus = thr->cgpu;
  262. const int fd = icarus->device_fd;
  263. if (fd == -1)
  264. return;
  265. icarus_close(fd);
  266. icarus->device_fd = -1;
  267. }
  268. static const char *timing_mode_str(enum timing_mode timing_mode)
  269. {
  270. switch(timing_mode) {
  271. case MODE_DEFAULT:
  272. return MODE_DEFAULT_STR;
  273. case MODE_SHORT:
  274. return MODE_SHORT_STR;
  275. case MODE_LONG:
  276. return MODE_LONG_STR;
  277. case MODE_VALUE:
  278. return MODE_VALUE_STR;
  279. default:
  280. return MODE_UNKNOWN_STR;
  281. }
  282. }
  283. static
  284. const char *icarus_set_timing(struct cgpu_info * const proc, const char * const optname, const char * const buf, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  285. {
  286. struct ICARUS_INFO * const info = proc->device_data;
  287. double Hs;
  288. char *eq;
  289. if (strcasecmp(buf, MODE_SHORT_STR) == 0) {
  290. // short
  291. info->read_count = ICARUS_READ_COUNT_TIMING;
  292. info->read_count_limit = 0; // 0 = no limit
  293. info->timing_mode = MODE_SHORT;
  294. info->do_icarus_timing = true;
  295. } else if (strncasecmp(buf, MODE_SHORT_STREQ, strlen(MODE_SHORT_STREQ)) == 0) {
  296. // short=limit
  297. info->read_count = ICARUS_READ_COUNT_TIMING;
  298. info->timing_mode = MODE_SHORT;
  299. info->do_icarus_timing = true;
  300. info->read_count_limit = atoi(&buf[strlen(MODE_SHORT_STREQ)]);
  301. if (info->read_count_limit < 0)
  302. info->read_count_limit = 0;
  303. if (info->read_count_limit > ICARUS_READ_COUNT_LIMIT_MAX)
  304. info->read_count_limit = ICARUS_READ_COUNT_LIMIT_MAX;
  305. } else if (strcasecmp(buf, MODE_LONG_STR) == 0) {
  306. // long
  307. info->read_count = ICARUS_READ_COUNT_TIMING;
  308. info->read_count_limit = 0; // 0 = no limit
  309. info->timing_mode = MODE_LONG;
  310. info->do_icarus_timing = true;
  311. } else if (strncasecmp(buf, MODE_LONG_STREQ, strlen(MODE_LONG_STREQ)) == 0) {
  312. // long=limit
  313. info->read_count = ICARUS_READ_COUNT_TIMING;
  314. info->timing_mode = MODE_LONG;
  315. info->do_icarus_timing = true;
  316. info->read_count_limit = atoi(&buf[strlen(MODE_LONG_STREQ)]);
  317. if (info->read_count_limit < 0)
  318. info->read_count_limit = 0;
  319. if (info->read_count_limit > ICARUS_READ_COUNT_LIMIT_MAX)
  320. info->read_count_limit = ICARUS_READ_COUNT_LIMIT_MAX;
  321. } else if ((Hs = atof(buf)) != 0) {
  322. // ns[=read_count]
  323. info->Hs = Hs / NANOSEC;
  324. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  325. info->read_count = 0;
  326. if ((eq = strchr(buf, '=')) != NULL)
  327. info->read_count = atoi(eq+1);
  328. if (info->read_count < 1)
  329. info->read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  330. if (unlikely(info->read_count < 1))
  331. info->read_count = 1;
  332. info->read_count_limit = 0; // 0 = no limit
  333. info->timing_mode = MODE_VALUE;
  334. info->do_icarus_timing = false;
  335. } else {
  336. // Anything else in buf just uses DEFAULT mode
  337. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  338. info->read_count = 0;
  339. if ((eq = strchr(buf, '=')) != NULL)
  340. info->read_count = atoi(eq+1);
  341. int def_read_count = ICARUS_READ_COUNT_TIMING;
  342. if (info->timing_mode == MODE_DEFAULT) {
  343. if (proc->drv == &icarus_drv) {
  344. info->do_default_detection = 0x10;
  345. } else {
  346. def_read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  347. }
  348. info->do_icarus_timing = false;
  349. }
  350. if (info->read_count < 1)
  351. info->read_count = def_read_count;
  352. info->read_count_limit = 0; // 0 = no limit
  353. }
  354. info->min_data_count = MIN_DATA_COUNT;
  355. applog(LOG_DEBUG, "%"PRIpreprv": Init: mode=%s read_count=%d limit=%dms Hs=%e",
  356. proc->proc_repr,
  357. timing_mode_str(info->timing_mode),
  358. info->read_count, info->read_count_limit, info->Hs);
  359. return NULL;
  360. }
  361. static uint32_t mask(int work_division)
  362. {
  363. uint32_t nonce_mask = 0x7fffffff;
  364. // yes we can calculate these, but this way it's easy to see what they are
  365. switch (work_division) {
  366. case 1:
  367. nonce_mask = 0xffffffff;
  368. break;
  369. case 2:
  370. nonce_mask = 0x7fffffff;
  371. break;
  372. case 4:
  373. nonce_mask = 0x3fffffff;
  374. break;
  375. case 8:
  376. nonce_mask = 0x1fffffff;
  377. break;
  378. default:
  379. quit(1, "Invalid2 work_division (%d) must be 1, 2, 4 or 8", work_division);
  380. }
  381. return nonce_mask;
  382. }
  383. // Number of bytes remaining after reading a nonce from Icarus
  384. int icarus_excess_nonce_size(int fd, struct ICARUS_INFO *info)
  385. {
  386. // How big a buffer?
  387. int excess_size = info->read_size - ICARUS_NONCE_SIZE;
  388. // Try to read one more to ensure the device doesn't return
  389. // more than we want for this driver
  390. excess_size++;
  391. unsigned char excess_bin[excess_size];
  392. // Read excess_size from Icarus
  393. struct timeval tv_now;
  394. timer_set_now(&tv_now);
  395. //icarus_gets(excess_bin, fd, &tv_now, NULL, 1, excess_size);
  396. int bytes_read = read(fd, excess_bin, excess_size);
  397. // Number of bytes that were still available
  398. return bytes_read;
  399. }
  400. bool icarus_detect_custom(const char *devpath, struct device_drv *api, struct ICARUS_INFO *info)
  401. {
  402. struct timeval tv_start, tv_finish;
  403. int fd;
  404. unsigned char nonce_bin[ICARUS_NONCE_SIZE];
  405. char nonce_hex[(sizeof(nonce_bin) * 2) + 1];
  406. drv_set_defaults(api, icarus_set_device_funcs, info, devpath, detectone_meta_info.serial, 1);
  407. int baud = info->baud;
  408. int work_division = info->work_division;
  409. int fpga_count = info->fpga_count;
  410. applog(LOG_DEBUG, "%s: Attempting to open %s", api->dname, devpath);
  411. fd = icarus_open2(devpath, baud, true);
  412. if (unlikely(fd == -1)) {
  413. applog(LOG_DEBUG, "%s: Failed to open %s", api->dname, devpath);
  414. return false;
  415. }
  416. // Set a default so that individual drivers need not specify
  417. // e.g. Cairnsmore
  418. if (info->read_size == 0)
  419. info->read_size = ICARUS_DEFAULT_READ_SIZE;
  420. if (!info->golden_ob)
  421. {
  422. // Block 171874 nonce = (0xa2870100) = 0x000187a2
  423. // NOTE: this MUST take less time to calculate
  424. // than the timeout set in icarus_open()
  425. // This one takes ~0.53ms on Rev3 Icarus
  426. info->golden_ob =
  427. "4679ba4ec99876bf4bfe086082b40025"
  428. "4df6c356451471139a3afa71e48f544a"
  429. "00000000000000000000000000000000"
  430. "0000000087320b1a1426674f2fa722ce";
  431. /* NOTE: This gets sent to basically every port specified in --scan-serial,
  432. * even ones that aren't Icarus; be sure they can all handle it, when
  433. * this is changed...
  434. * BitForce: Ignores entirely
  435. * ModMiner: Starts (useless) work, gets back to clean state
  436. */
  437. info->golden_nonce = "000187a2";
  438. }
  439. if (info->detect_init_func)
  440. info->detect_init_func(devpath, fd, info);
  441. int ob_size = strlen(info->golden_ob) / 2;
  442. unsigned char ob_bin[ob_size];
  443. BFGINIT(info->ob_size, ob_size);
  444. hex2bin(ob_bin, info->golden_ob, sizeof(ob_bin));
  445. icarus_write(fd, ob_bin, sizeof(ob_bin));
  446. cgtime(&tv_start);
  447. memset(nonce_bin, 0, sizeof(nonce_bin));
  448. // Do not use info->read_size here, instead read exactly ICARUS_NONCE_SIZE
  449. // We will then compare the bytes left in fd with info->read_size to determine
  450. // if this is a valid device
  451. icarus_gets(nonce_bin, fd, &tv_finish, NULL, 1, ICARUS_NONCE_SIZE);
  452. // How many bytes were left after reading the above nonce
  453. int bytes_left = icarus_excess_nonce_size(fd, info);
  454. icarus_close(fd);
  455. bin2hex(nonce_hex, nonce_bin, sizeof(nonce_bin));
  456. if (strncmp(nonce_hex, info->golden_nonce, 8))
  457. {
  458. applog(LOG_DEBUG,
  459. "%s: "
  460. "Test failed at %s: get %s, should: %s",
  461. api->dname,
  462. devpath, nonce_hex, info->golden_nonce);
  463. return false;
  464. }
  465. if (info->read_size - ICARUS_NONCE_SIZE != bytes_left)
  466. {
  467. applog(LOG_DEBUG,
  468. "%s: "
  469. "Test failed at %s: expected %d bytes, got %d",
  470. api->dname,
  471. devpath, info->read_size, ICARUS_NONCE_SIZE + bytes_left);
  472. return false;
  473. }
  474. applog(LOG_DEBUG,
  475. "%s: "
  476. "Test succeeded at %s: got %s",
  477. api->dname,
  478. devpath, nonce_hex);
  479. if (serial_claim_v(devpath, api))
  480. return false;
  481. /* We have a real Icarus! */
  482. struct cgpu_info *icarus;
  483. icarus = calloc(1, sizeof(struct cgpu_info));
  484. icarus->drv = api;
  485. icarus->device_path = strdup(devpath);
  486. icarus->device_fd = -1;
  487. icarus->threads = 1;
  488. icarus->set_device_funcs = icarus_set_device_funcs;
  489. add_cgpu(icarus);
  490. applog(LOG_INFO, "Found %"PRIpreprv" at %s",
  491. icarus->proc_repr,
  492. devpath);
  493. applog(LOG_DEBUG, "%"PRIpreprv": Init: baud=%d work_division=%d fpga_count=%d",
  494. icarus->proc_repr,
  495. baud, work_division, fpga_count);
  496. icarus->device_data = info;
  497. timersub(&tv_finish, &tv_start, &(info->golden_tv));
  498. icarus_set_timing(icarus, NULL, "", NULL, NULL);
  499. return true;
  500. }
  501. static bool icarus_detect_one(const char *devpath)
  502. {
  503. struct ICARUS_INFO *info = calloc(1, sizeof(struct ICARUS_INFO));
  504. if (unlikely(!info))
  505. quit(1, "Failed to malloc ICARUS_INFO");
  506. // TODO: try some higher speeds with the Icarus and BFL to see
  507. // if they support them and if setting them makes any difference
  508. // N.B. B3000000 doesn't work on Icarus
  509. info->baud = ICARUS_IO_SPEED;
  510. info->reopen_mode = IRM_TIMEOUT;
  511. info->Hs = ICARUS_REV3_HASH_TIME;
  512. info->timing_mode = MODE_DEFAULT;
  513. info->read_size = ICARUS_DEFAULT_READ_SIZE;
  514. if (!icarus_detect_custom(devpath, &icarus_drv, info)) {
  515. free(info);
  516. return false;
  517. }
  518. return true;
  519. }
  520. static
  521. bool icarus_lowl_probe(const struct lowlevel_device_info * const info)
  522. {
  523. return vcom_lowl_probe_wrapper(info, icarus_detect_one);
  524. }
  525. static bool icarus_prepare(struct thr_info *thr)
  526. {
  527. struct cgpu_info *icarus = thr->cgpu;
  528. struct icarus_state *state;
  529. thr->cgpu_data = state = calloc(1, sizeof(*state));
  530. state->firstrun = true;
  531. #ifdef HAVE_EPOLL
  532. int epollfd = epoll_create(2);
  533. if (epollfd != -1)
  534. {
  535. close(epollfd);
  536. notifier_init(thr->work_restart_notifier);
  537. }
  538. #endif
  539. icarus->status = LIFE_INIT2;
  540. return true;
  541. }
  542. bool icarus_init(struct thr_info *thr)
  543. {
  544. struct cgpu_info *icarus = thr->cgpu;
  545. struct ICARUS_INFO *info = icarus->device_data;
  546. struct icarus_state * const state = thr->cgpu_data;
  547. int fd = icarus_open2(icarus->device_path, info->baud, true);
  548. icarus->device_fd = fd;
  549. if (unlikely(-1 == fd)) {
  550. applog(LOG_ERR, "%s: Failed to open %s",
  551. icarus->dev_repr,
  552. icarus->device_path);
  553. return false;
  554. }
  555. applog(LOG_INFO, "%s: Opened %s", icarus->dev_repr, icarus->device_path);
  556. BFGINIT(info->job_start_func, icarus_job_start);
  557. BFGINIT(state->ob_bin, malloc(info->ob_size));
  558. if (!info->work_division)
  559. {
  560. struct timeval tv_finish;
  561. // For reading the nonce from Icarus
  562. unsigned char res_bin[info->read_size];
  563. // For storing the the 32-bit nonce
  564. uint32_t res;
  565. applog(LOG_DEBUG, "%"PRIpreprv": Work division not specified - autodetecting", icarus->proc_repr);
  566. // Special packet to probe work_division
  567. unsigned char pkt[64] =
  568. "\x2e\x4c\x8f\x91\xfd\x59\x5d\x2d\x7e\xa2\x0a\xaa\xcb\x64\xa2\xa0"
  569. "\x43\x82\x86\x02\x77\xcf\x26\xb6\xa1\xee\x04\xc5\x6a\x5b\x50\x4a"
  570. "BFGMiner Probe\0\0"
  571. "BFG\0\x64\x61\x01\x1a\xc9\x06\xa9\x51\xfb\x9b\x3c\x73";
  572. icarus_write(fd, pkt, sizeof(pkt));
  573. memset(res_bin, 0, sizeof(res_bin));
  574. if (ICA_GETS_OK == icarus_gets(res_bin, fd, &tv_finish, NULL, info->read_count, info->read_size))
  575. {
  576. memcpy(&res, res_bin, sizeof(res));
  577. res = icarus_nonce32toh(info, res);
  578. }
  579. else
  580. res = 0;
  581. switch (res) {
  582. case 0x04C0FDB4:
  583. info->work_division = 1;
  584. break;
  585. case 0x82540E46:
  586. info->work_division = 2;
  587. break;
  588. case 0x417C0F36:
  589. info->work_division = 4;
  590. break;
  591. case 0x60C994D5:
  592. info->work_division = 8;
  593. break;
  594. default:
  595. applog(LOG_ERR, "%"PRIpreprv": Work division autodetection failed (assuming 2): got %08x", icarus->proc_repr, res);
  596. info->work_division = 2;
  597. }
  598. applog(LOG_DEBUG, "%"PRIpreprv": Work division autodetection got %08x (=%d)", icarus->proc_repr, res, info->work_division);
  599. }
  600. if (!info->fpga_count)
  601. info->fpga_count = info->work_division;
  602. info->nonce_mask = mask(info->work_division);
  603. return true;
  604. }
  605. static bool icarus_reopen(struct cgpu_info *icarus, struct icarus_state *state, int *fdp)
  606. {
  607. struct ICARUS_INFO *info = icarus->device_data;
  608. // Reopen the serial port to workaround a USB-host-chipset-specific issue with the Icarus's buggy USB-UART
  609. do_icarus_close(icarus->thr[0]);
  610. *fdp = icarus->device_fd = icarus_open(icarus->device_path, info->baud);
  611. if (unlikely(-1 == *fdp)) {
  612. applog(LOG_ERR, "%"PRIpreprv": Failed to reopen on %s", icarus->proc_repr, icarus->device_path);
  613. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  614. state->firstrun = true;
  615. return false;
  616. }
  617. return true;
  618. }
  619. static
  620. bool icarus_job_prepare(struct thr_info *thr, struct work *work, __maybe_unused uint64_t max_nonce)
  621. {
  622. struct cgpu_info * const icarus = thr->cgpu;
  623. struct icarus_state * const state = thr->cgpu_data;
  624. uint8_t * const ob_bin = state->ob_bin;
  625. memcpy(ob_bin, work->midstate, 32);
  626. memcpy(ob_bin + 52, work->data + 64, 12);
  627. if (!(memcmp(&ob_bin[56], "\xff\xff\xff\xff", 4)
  628. || memcmp(&ob_bin, "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0", 32))) {
  629. // This sequence is used on cairnsmore bitstreams for commands, NEVER send it otherwise
  630. applog(LOG_WARNING, "%"PRIpreprv": Received job attempting to send a command, corrupting it!",
  631. icarus->proc_repr);
  632. ob_bin[56] = 0;
  633. }
  634. rev(ob_bin, 32);
  635. rev(ob_bin + 52, 12);
  636. return true;
  637. }
  638. bool icarus_job_start(struct thr_info *thr)
  639. {
  640. struct cgpu_info *icarus = thr->cgpu;
  641. struct ICARUS_INFO *info = icarus->device_data;
  642. struct icarus_state *state = thr->cgpu_data;
  643. const uint8_t * const ob_bin = state->ob_bin;
  644. int fd = icarus->device_fd;
  645. int ret;
  646. // Handle dynamic clocking for "subclass" devices
  647. // This needs to run before sending next job, since it hashes the command too
  648. if (info->dclk.freqM && likely(!state->firstrun)) {
  649. dclk_preUpdate(&info->dclk);
  650. dclk_updateFreq(&info->dclk, info->dclk_change_clock_func, thr);
  651. }
  652. cgtime(&state->tv_workstart);
  653. ret = icarus_write(fd, ob_bin, info->ob_size);
  654. if (ret) {
  655. do_icarus_close(thr);
  656. applog(LOG_ERR, "%"PRIpreprv": Comms error (werr=%d)", icarus->proc_repr, ret);
  657. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  658. return false; /* This should never happen */
  659. }
  660. if (opt_debug) {
  661. char ob_hex[(info->ob_size * 2) + 1];
  662. bin2hex(ob_hex, ob_bin, info->ob_size);
  663. applog(LOG_DEBUG, "%"PRIpreprv" sent: %s",
  664. icarus->proc_repr,
  665. ob_hex);
  666. }
  667. return true;
  668. }
  669. static
  670. struct work *icarus_process_worknonce(const struct ICARUS_INFO * const info, struct icarus_state *state, uint32_t *nonce)
  671. {
  672. *nonce = icarus_nonce32toh(info, *nonce);
  673. if (test_nonce(state->last_work, *nonce, false))
  674. return state->last_work;
  675. if (likely(state->last2_work && test_nonce(state->last2_work, *nonce, false)))
  676. return state->last2_work;
  677. return NULL;
  678. }
  679. static
  680. void handle_identify(struct thr_info * const thr, int ret, const bool was_first_run)
  681. {
  682. const struct cgpu_info * const icarus = thr->cgpu;
  683. const struct ICARUS_INFO * const info = icarus->device_data;
  684. struct icarus_state * const state = thr->cgpu_data;
  685. int fd = icarus->device_fd;
  686. struct timeval tv_now;
  687. double delapsed;
  688. // For reading the nonce from Icarus
  689. unsigned char nonce_bin[info->read_size];
  690. // For storing the the 32-bit nonce
  691. uint32_t nonce;
  692. if (fd == -1)
  693. return;
  694. // If identify is requested (block erupters):
  695. // 1. Don't start the next job right away (above)
  696. // 2. Wait for the current job to complete 100%
  697. if (!was_first_run)
  698. {
  699. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Waiting for current job to finish", icarus->proc_repr);
  700. while (true)
  701. {
  702. cgtime(&tv_now);
  703. delapsed = tdiff(&tv_now, &state->tv_workstart);
  704. if (delapsed + 0.1 > info->fullnonce)
  705. break;
  706. // Try to get more nonces (ignoring work restart)
  707. memset(nonce_bin, 0, sizeof(nonce_bin));
  708. ret = icarus_gets(nonce_bin, fd, &tv_now, NULL, (info->fullnonce - delapsed) * 10, info->read_size);
  709. if (ret == ICA_GETS_OK)
  710. {
  711. memcpy(&nonce, nonce_bin, sizeof(nonce));
  712. nonce = icarus_nonce32toh(info, nonce);
  713. submit_nonce(thr, state->last_work, nonce);
  714. }
  715. }
  716. }
  717. else
  718. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Current job should already be finished", icarus->proc_repr);
  719. // 3. Delay 3 more seconds
  720. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Leaving idle for 3 seconds", icarus->proc_repr);
  721. cgsleep_ms(3000);
  722. // Check for work restart in the meantime
  723. if (thr->work_restart)
  724. {
  725. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Work restart requested during delay", icarus->proc_repr);
  726. goto no_job_start;
  727. }
  728. // 4. Start next job
  729. if (!state->firstrun)
  730. {
  731. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Starting next job", icarus->proc_repr);
  732. if (!info->job_start_func(thr))
  733. no_job_start:
  734. state->firstrun = true;
  735. }
  736. state->identify = false;
  737. }
  738. static
  739. void icarus_transition_work(struct icarus_state *state, struct work *work)
  740. {
  741. if (state->last2_work)
  742. free_work(state->last2_work);
  743. state->last2_work = state->last_work;
  744. state->last_work = copy_work(work);
  745. }
  746. static int64_t icarus_scanhash(struct thr_info *thr, struct work *work,
  747. __maybe_unused int64_t max_nonce)
  748. {
  749. struct cgpu_info *icarus;
  750. int fd;
  751. int ret;
  752. struct ICARUS_INFO *info;
  753. struct work *nonce_work;
  754. int64_t hash_count;
  755. struct timeval tv_start = {.tv_sec=0}, elapsed;
  756. struct timeval tv_history_start, tv_history_finish;
  757. double Ti, Xi;
  758. int i;
  759. bool was_hw_error = false;
  760. bool was_first_run;
  761. struct ICARUS_HISTORY *history0, *history;
  762. int count;
  763. double Hs, W, fullnonce;
  764. int read_count;
  765. bool limited;
  766. int64_t estimate_hashes;
  767. uint32_t values;
  768. int64_t hash_count_range;
  769. elapsed.tv_sec = elapsed.tv_usec = 0;
  770. icarus = thr->cgpu;
  771. struct icarus_state *state = thr->cgpu_data;
  772. was_first_run = state->firstrun;
  773. icarus->drv->job_prepare(thr, work, max_nonce);
  774. // Wait for the previous run's result
  775. fd = icarus->device_fd;
  776. info = icarus->device_data;
  777. // For reading the nonce from Icarus
  778. unsigned char nonce_bin[info->read_size];
  779. // For storing the the 32-bit nonce
  780. uint32_t nonce;
  781. if (unlikely(fd == -1) && !icarus_reopen(icarus, state, &fd))
  782. return -1;
  783. if (!state->firstrun) {
  784. if (state->changework)
  785. {
  786. state->changework = false;
  787. ret = ICA_GETS_RESTART;
  788. }
  789. else
  790. {
  791. read_count = info->read_count;
  792. keepwaiting:
  793. /* Icarus will return info->read_size bytes nonces or nothing */
  794. memset(nonce_bin, 0, sizeof(nonce_bin));
  795. ret = icarus_gets(nonce_bin, fd, &state->tv_workfinish, thr, read_count, info->read_size);
  796. switch (ret) {
  797. case ICA_GETS_RESTART:
  798. // The prepared work is invalid, and the current work is abandoned
  799. // Go back to the main loop to get the next work, and stuff
  800. // Returning to the main loop will clear work_restart, so use a flag...
  801. state->changework = true;
  802. return 0;
  803. case ICA_GETS_ERROR:
  804. do_icarus_close(thr);
  805. applog(LOG_ERR, "%"PRIpreprv": Comms error (rerr)", icarus->proc_repr);
  806. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  807. if (!icarus_reopen(icarus, state, &fd))
  808. return -1;
  809. break;
  810. case ICA_GETS_TIMEOUT:
  811. if (info->reopen_mode == IRM_TIMEOUT && !icarus_reopen(icarus, state, &fd))
  812. return -1;
  813. case ICA_GETS_OK:
  814. break;
  815. }
  816. }
  817. tv_start = state->tv_workstart;
  818. timersub(&state->tv_workfinish, &tv_start, &elapsed);
  819. }
  820. else
  821. {
  822. if (fd == -1 && !icarus_reopen(icarus, state, &fd))
  823. return -1;
  824. // First run; no nonce, no hashes done
  825. ret = ICA_GETS_ERROR;
  826. }
  827. #ifndef WIN32
  828. tcflush(fd, TCOFLUSH);
  829. #endif
  830. if (ret == ICA_GETS_OK)
  831. {
  832. memcpy(&nonce, nonce_bin, sizeof(nonce));
  833. nonce_work = icarus_process_worknonce(info, state, &nonce);
  834. if (likely(nonce_work))
  835. {
  836. if (nonce_work == state->last2_work)
  837. {
  838. // nonce was for the last job; submit and keep processing the current one
  839. submit_nonce(thr, nonce_work, nonce);
  840. goto keepwaiting;
  841. }
  842. if (info->continue_search)
  843. {
  844. read_count = info->read_count - ((timer_elapsed_us(&state->tv_workstart, NULL) / (1000000 / TIME_FACTOR)) + 1);
  845. if (read_count)
  846. {
  847. submit_nonce(thr, nonce_work, nonce);
  848. goto keepwaiting;
  849. }
  850. }
  851. }
  852. else
  853. was_hw_error = true;
  854. }
  855. // Handle dynamic clocking for "subclass" devices
  856. // This needs to run before sending next job, since it hashes the command too
  857. if (info->dclk.freqM && likely(ret == ICA_GETS_OK || ret == ICA_GETS_TIMEOUT)) {
  858. int qsec = ((4 * elapsed.tv_sec) + (elapsed.tv_usec / 250000)) ?: 1;
  859. for (int n = qsec; n; --n)
  860. dclk_gotNonces(&info->dclk);
  861. if (was_hw_error)
  862. dclk_errorCount(&info->dclk, qsec);
  863. }
  864. // Force a USB close/reopen on any hw error (or on request, eg for baud change)
  865. if (was_hw_error || info->reopen_now)
  866. {
  867. info->reopen_now = false;
  868. if (info->reopen_mode == IRM_CYCLE)
  869. {} // Do nothing here, we reopen after sending the job
  870. else
  871. if (!icarus_reopen(icarus, state, &fd))
  872. state->firstrun = true;
  873. }
  874. if (unlikely(state->identify))
  875. {
  876. // Delay job start until later...
  877. }
  878. else
  879. if (unlikely(icarus->deven != DEV_ENABLED || !info->job_start_func(thr)))
  880. state->firstrun = true;
  881. if (info->reopen_mode == IRM_CYCLE && !icarus_reopen(icarus, state, &fd))
  882. state->firstrun = true;
  883. work->blk.nonce = 0xffffffff;
  884. if (ret == ICA_GETS_ERROR) {
  885. state->firstrun = false;
  886. icarus_transition_work(state, work);
  887. hash_count = 0;
  888. goto out;
  889. }
  890. // OK, done starting Icarus's next job... now process the last run's result!
  891. // aborted before becoming idle, get new work
  892. if (ret == ICA_GETS_TIMEOUT || ret == ICA_GETS_RESTART) {
  893. icarus_transition_work(state, work);
  894. // ONLY up to just when it aborted
  895. // We didn't read a reply so we don't subtract ICARUS_READ_TIME
  896. estimate_hashes = ((double)(elapsed.tv_sec)
  897. + ((double)(elapsed.tv_usec))/((double)1000000)) / info->Hs;
  898. // If some Serial-USB delay allowed the full nonce range to
  899. // complete it can't have done more than a full nonce
  900. if (unlikely(estimate_hashes > 0xffffffff))
  901. estimate_hashes = 0xffffffff;
  902. applog(LOG_DEBUG, "%"PRIpreprv" no nonce = 0x%08"PRIx64" hashes (%"PRId64".%06lus)",
  903. icarus->proc_repr,
  904. (uint64_t)estimate_hashes,
  905. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  906. hash_count = estimate_hashes;
  907. goto out;
  908. }
  909. // Only ICA_GETS_OK gets here
  910. if (likely(!was_hw_error))
  911. submit_nonce(thr, nonce_work, nonce);
  912. else
  913. inc_hw_errors(thr, state->last_work, nonce);
  914. icarus_transition_work(state, work);
  915. hash_count = (nonce & info->nonce_mask);
  916. hash_count++;
  917. hash_count *= info->fpga_count;
  918. applog(LOG_DEBUG, "%"PRIpreprv" nonce = 0x%08x = 0x%08" PRIx64 " hashes (%"PRId64".%06lus)",
  919. icarus->proc_repr,
  920. nonce,
  921. (uint64_t)hash_count,
  922. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  923. if (info->do_default_detection && elapsed.tv_sec >= DEFAULT_DETECT_THRESHOLD) {
  924. int MHs = (double)hash_count / ((double)elapsed.tv_sec * 1e6 + (double)elapsed.tv_usec);
  925. --info->do_default_detection;
  926. applog(LOG_DEBUG, "%"PRIpreprv": Autodetect device speed: %d MH/s", icarus->proc_repr, MHs);
  927. if (MHs <= 370 || MHs > 420) {
  928. // Not a real Icarus: enable short timing
  929. applog(LOG_WARNING, "%"PRIpreprv": Seems too %s to be an Icarus; calibrating with short timing", icarus->proc_repr, MHs>380?"fast":"slow");
  930. info->timing_mode = MODE_SHORT;
  931. info->do_icarus_timing = true;
  932. info->do_default_detection = 0;
  933. }
  934. else
  935. if (MHs <= 380) {
  936. // Real Icarus?
  937. if (!info->do_default_detection) {
  938. applog(LOG_DEBUG, "%"PRIpreprv": Seems to be a real Icarus", icarus->proc_repr);
  939. info->read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  940. }
  941. }
  942. else
  943. if (MHs <= 420) {
  944. // Enterpoint Cairnsmore1
  945. size_t old_repr_len = strlen(icarus->proc_repr);
  946. char old_repr[old_repr_len + 1];
  947. strcpy(old_repr, icarus->proc_repr);
  948. convert_icarus_to_cairnsmore(icarus);
  949. info->do_default_detection = 0;
  950. applog(LOG_WARNING, "%"PRIpreprv": Detected Cairnsmore1 device, upgrading driver to %"PRIpreprv, old_repr, icarus->proc_repr);
  951. }
  952. }
  953. // Ignore possible end condition values ... and hw errors
  954. // TODO: set limitations on calculated values depending on the device
  955. // to avoid crap values caused by CPU/Task Switching/Swapping/etc
  956. if (info->do_icarus_timing
  957. && !was_hw_error
  958. && ((nonce & info->nonce_mask) > END_CONDITION)
  959. && ((nonce & info->nonce_mask) < (info->nonce_mask & ~END_CONDITION))) {
  960. cgtime(&tv_history_start);
  961. history0 = &(info->history[0]);
  962. if (history0->values == 0)
  963. timeradd(&tv_start, &history_sec, &(history0->finish));
  964. Ti = (double)(elapsed.tv_sec)
  965. + ((double)(elapsed.tv_usec))/((double)1000000)
  966. - ((double)ICARUS_READ_TIME(info->baud, info->read_size));
  967. Xi = (double)hash_count;
  968. history0->sumXiTi += Xi * Ti;
  969. history0->sumXi += Xi;
  970. history0->sumTi += Ti;
  971. history0->sumXi2 += Xi * Xi;
  972. history0->values++;
  973. if (history0->hash_count_max < hash_count)
  974. history0->hash_count_max = hash_count;
  975. if (history0->hash_count_min > hash_count || history0->hash_count_min == 0)
  976. history0->hash_count_min = hash_count;
  977. if (history0->values >= info->min_data_count
  978. && timercmp(&tv_start, &(history0->finish), >)) {
  979. for (i = INFO_HISTORY; i > 0; i--)
  980. memcpy(&(info->history[i]),
  981. &(info->history[i-1]),
  982. sizeof(struct ICARUS_HISTORY));
  983. // Initialise history0 to zero for summary calculation
  984. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  985. // We just completed a history data set
  986. // So now recalc read_count based on the whole history thus we will
  987. // initially get more accurate until it completes INFO_HISTORY
  988. // total data sets
  989. count = 0;
  990. for (i = 1 ; i <= INFO_HISTORY; i++) {
  991. history = &(info->history[i]);
  992. if (history->values >= MIN_DATA_COUNT) {
  993. count++;
  994. history0->sumXiTi += history->sumXiTi;
  995. history0->sumXi += history->sumXi;
  996. history0->sumTi += history->sumTi;
  997. history0->sumXi2 += history->sumXi2;
  998. history0->values += history->values;
  999. if (history0->hash_count_max < history->hash_count_max)
  1000. history0->hash_count_max = history->hash_count_max;
  1001. if (history0->hash_count_min > history->hash_count_min || history0->hash_count_min == 0)
  1002. history0->hash_count_min = history->hash_count_min;
  1003. }
  1004. }
  1005. // All history data
  1006. Hs = (history0->values*history0->sumXiTi - history0->sumXi*history0->sumTi)
  1007. / (history0->values*history0->sumXi2 - history0->sumXi*history0->sumXi);
  1008. W = history0->sumTi/history0->values - Hs*history0->sumXi/history0->values;
  1009. hash_count_range = history0->hash_count_max - history0->hash_count_min;
  1010. values = history0->values;
  1011. // Initialise history0 to zero for next data set
  1012. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  1013. fullnonce = W + Hs * (((double)0xffffffff) + 1);
  1014. read_count = (int)(fullnonce * TIME_FACTOR) - 1;
  1015. if (info->read_count_limit > 0 && read_count > info->read_count_limit) {
  1016. read_count = info->read_count_limit;
  1017. limited = true;
  1018. } else
  1019. limited = false;
  1020. info->Hs = Hs;
  1021. info->read_count = read_count;
  1022. info->fullnonce = fullnonce;
  1023. info->count = count;
  1024. info->W = W;
  1025. info->values = values;
  1026. info->hash_count_range = hash_count_range;
  1027. if (info->min_data_count < MAX_MIN_DATA_COUNT)
  1028. info->min_data_count *= 2;
  1029. else if (info->timing_mode == MODE_SHORT)
  1030. info->do_icarus_timing = false;
  1031. // applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: read_count=%d%s fullnonce=%fs history count=%d Hs=%e W=%e values=%d hash range=0x%08lx min data count=%u", icarus->proc_repr, read_count, limited ? " (limited)" : "", fullnonce, count, Hs, W, values, hash_count_range, info->min_data_count);
  1032. applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: Hs=%e W=%e read_count=%d%s fullnonce=%.3fs",
  1033. icarus->proc_repr,
  1034. Hs, W, read_count,
  1035. limited ? " (limited)" : "", fullnonce);
  1036. }
  1037. info->history_count++;
  1038. cgtime(&tv_history_finish);
  1039. timersub(&tv_history_finish, &tv_history_start, &tv_history_finish);
  1040. timeradd(&tv_history_finish, &(info->history_time), &(info->history_time));
  1041. }
  1042. out:
  1043. if (unlikely(state->identify))
  1044. handle_identify(thr, ret, was_first_run);
  1045. return hash_count;
  1046. }
  1047. static struct api_data *icarus_drv_stats(struct cgpu_info *cgpu)
  1048. {
  1049. struct api_data *root = NULL;
  1050. struct ICARUS_INFO *info = cgpu->device_data;
  1051. // Warning, access to these is not locked - but we don't really
  1052. // care since hashing performance is way more important than
  1053. // locking access to displaying API debug 'stats'
  1054. // If locking becomes an issue for any of them, use copy_data=true also
  1055. root = api_add_int(root, "read_count", &(info->read_count), false);
  1056. root = api_add_int(root, "read_count_limit", &(info->read_count_limit), false);
  1057. root = api_add_double(root, "fullnonce", &(info->fullnonce), false);
  1058. root = api_add_int(root, "count", &(info->count), false);
  1059. root = api_add_hs(root, "Hs", &(info->Hs), false);
  1060. root = api_add_double(root, "W", &(info->W), false);
  1061. root = api_add_uint(root, "total_values", &(info->values), false);
  1062. root = api_add_uint64(root, "range", &(info->hash_count_range), false);
  1063. root = api_add_uint64(root, "history_count", &(info->history_count), false);
  1064. root = api_add_timeval(root, "history_time", &(info->history_time), false);
  1065. root = api_add_uint(root, "min_data_count", &(info->min_data_count), false);
  1066. root = api_add_uint(root, "timing_values", &(info->history[0].values), false);
  1067. root = api_add_const(root, "timing_mode", timing_mode_str(info->timing_mode), false);
  1068. root = api_add_bool(root, "is_timing", &(info->do_icarus_timing), false);
  1069. root = api_add_int(root, "baud", &(info->baud), false);
  1070. root = api_add_int(root, "work_division", &(info->work_division), false);
  1071. root = api_add_int(root, "fpga_count", &(info->fpga_count), false);
  1072. return root;
  1073. }
  1074. static
  1075. const char *icarus_set_baud(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1076. {
  1077. struct ICARUS_INFO * const info = proc->device_data;
  1078. const int baud = atoi(newvalue);
  1079. if (!valid_baud(baud))
  1080. return "Invalid baud setting";
  1081. if (info->baud != baud)
  1082. {
  1083. info->baud = baud;
  1084. info->reopen_now = true;
  1085. }
  1086. return NULL;
  1087. }
  1088. static
  1089. const char *icarus_set_work_division(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1090. {
  1091. struct ICARUS_INFO * const info = proc->device_data;
  1092. const int work_division = atoi(newvalue);
  1093. if (!(work_division == 1 || work_division == 2 || work_division == 4 || work_division == 8))
  1094. return "Invalid work_division: must be 1, 2, 4 or 8";
  1095. if (info->user_set & IUS_FPGA_COUNT)
  1096. {
  1097. if (info->fpga_count > work_division)
  1098. return "work_division must be >= fpga_count";
  1099. }
  1100. else
  1101. info->fpga_count = work_division;
  1102. info->user_set |= IUS_WORK_DIVISION;
  1103. info->work_division = work_division;
  1104. info->nonce_mask = mask(work_division);
  1105. return NULL;
  1106. }
  1107. static
  1108. const char *icarus_set_fpga_count(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1109. {
  1110. struct ICARUS_INFO * const info = proc->device_data;
  1111. const int fpga_count = atoi(newvalue);
  1112. if (fpga_count < 1 || fpga_count > info->work_division)
  1113. return "Invalid fpga_count: must be >0 and <=work_division";
  1114. info->fpga_count = fpga_count;
  1115. return NULL;
  1116. }
  1117. static
  1118. const char *icarus_set_reopen(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1119. {
  1120. struct ICARUS_INFO * const info = proc->device_data;
  1121. if ((!strcasecmp(newvalue, "never")) || !strcasecmp(newvalue, "-r"))
  1122. info->reopen_mode = IRM_NEVER;
  1123. else
  1124. if (!strcasecmp(newvalue, "timeout"))
  1125. info->reopen_mode = IRM_TIMEOUT;
  1126. else
  1127. if ((!strcasecmp(newvalue, "cycle")) || !strcasecmp(newvalue, "r"))
  1128. info->reopen_mode = IRM_CYCLE;
  1129. else
  1130. if (!strcasecmp(newvalue, "now"))
  1131. info->reopen_now = true;
  1132. else
  1133. return "Invalid reopen mode";
  1134. return NULL;
  1135. }
  1136. static void icarus_shutdown(struct thr_info *thr)
  1137. {
  1138. do_icarus_close(thr);
  1139. free(thr->cgpu_data);
  1140. }
  1141. const struct bfg_set_device_definition icarus_set_device_funcs[] = {
  1142. // NOTE: Order of parameters below is important for --icarus-options
  1143. {"baud" , icarus_set_baud , "serial baud rate"},
  1144. {"work_division", icarus_set_work_division, "number of pieces work is split into"},
  1145. {"fpga_count" , icarus_set_fpga_count , "number of chips working on pieces"},
  1146. {"reopen" , icarus_set_reopen , "how often to reopen device: never, timeout, cycle, (or now for a one-shot reopen)"},
  1147. // NOTE: Below here, order is irrelevant
  1148. {"timing" , icarus_set_timing , "timing of device; see README.FPGA"},
  1149. {NULL},
  1150. };
  1151. struct device_drv icarus_drv = {
  1152. .dname = "icarus",
  1153. .name = "ICA",
  1154. .probe_priority = -115,
  1155. .lowl_probe = icarus_lowl_probe,
  1156. .get_api_stats = icarus_drv_stats,
  1157. .thread_prepare = icarus_prepare,
  1158. .thread_init = icarus_init,
  1159. .scanhash = icarus_scanhash,
  1160. .job_prepare = icarus_job_prepare,
  1161. .thread_disable = close_device_fd,
  1162. .thread_shutdown = icarus_shutdown,
  1163. };