driver-bitmain.c 73 KB

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  1. /*
  2. * Copyright 2012-2014 Lingchao Xu
  3. * Copyright 2015 Luke Dashjr
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the Free
  7. * Software Foundation; either version 3 of the License, or (at your option)
  8. * any later version. See COPYING for more details.
  9. */
  10. #include "config.h"
  11. #include <limits.h>
  12. #include <math.h>
  13. #include <pthread.h>
  14. #include <stdio.h>
  15. #include <sys/time.h>
  16. #include <sys/types.h>
  17. #include <dirent.h>
  18. #include <unistd.h>
  19. #ifndef WIN32
  20. #include <sys/select.h>
  21. #include <termios.h>
  22. #include <sys/stat.h>
  23. #include <fcntl.h>
  24. #ifndef O_CLOEXEC
  25. #define O_CLOEXEC 0
  26. #endif
  27. #else
  28. #include "compat.h"
  29. #include <windows.h>
  30. #include <io.h>
  31. #endif
  32. #include <curl/curl.h>
  33. #include <uthash.h>
  34. #include "deviceapi.h"
  35. #include "miner.h"
  36. #include "driver-bitmain.h"
  37. #include "lowl-vcom.h"
  38. #include "util.h"
  39. const bool opt_bitmain_hwerror = true;
  40. BFG_REGISTER_DRIVER(bitmain_drv)
  41. static const struct bfg_set_device_definition bitmain_set_device_funcs_init[];
  42. static inline unsigned int bfg_work_block(struct work * const work)
  43. {
  44. return *((unsigned int*)(&work->data[4]));
  45. }
  46. #define htole8(x) (x)
  47. #define BITMAIN_USING_CURL -2
  48. static
  49. struct cgpu_info *btm_alloc_cgpu(struct device_drv *drv, int threads)
  50. {
  51. struct cgpu_info *cgpu = calloc(1, sizeof(*cgpu));
  52. if (unlikely(!cgpu))
  53. quit(1, "Failed to calloc cgpu for %s in usb_alloc_cgpu", drv->dname);
  54. cgpu->drv = drv;
  55. cgpu->deven = DEV_ENABLED;
  56. cgpu->threads = threads;
  57. cgpu->device_fd = -1;
  58. struct bitmain_info *info = malloc(sizeof(*info));
  59. if (unlikely(!info))
  60. quit(1, "Failed to calloc bitmain_info data");
  61. cgpu->device_data = info;
  62. *info = (struct bitmain_info){
  63. .baud = BITMAIN_IO_SPEED,
  64. .chain_num = BITMAIN_DEFAULT_CHAIN_NUM,
  65. .asic_num = BITMAIN_DEFAULT_ASIC_NUM,
  66. .timeout = BITMAIN_DEFAULT_TIMEOUT,
  67. .frequency = BITMAIN_DEFAULT_FREQUENCY,
  68. .voltage[0] = BITMAIN_DEFAULT_VOLTAGE0,
  69. .voltage[1] = BITMAIN_DEFAULT_VOLTAGE1,
  70. };
  71. sprintf(info->frequency_t, "%d", BITMAIN_DEFAULT_FREQUENCY),
  72. strcpy(info->voltage_t, BITMAIN_DEFAULT_VOLTAGE_T);
  73. return cgpu;
  74. }
  75. static curl_socket_t bitmain_grab_socket_opensocket_cb(void *clientp, __maybe_unused curlsocktype purpose, struct curl_sockaddr *addr)
  76. {
  77. struct bitmain_info * const info = clientp;
  78. curl_socket_t sck = bfg_socket(addr->family, addr->socktype, addr->protocol);
  79. info->curl_sock = sck;
  80. return sck;
  81. }
  82. static
  83. bool btm_init(struct cgpu_info *cgpu, const char * devpath)
  84. {
  85. applog(LOG_DEBUG, "btm_init cgpu->device_fd=%d", cgpu->device_fd);
  86. int fd = -1;
  87. if(cgpu->device_fd >= 0) {
  88. return false;
  89. }
  90. struct bitmain_info *info = cgpu->device_data;
  91. if (!strncmp(devpath, "ip:", 3)) {
  92. CURL *curl = curl_easy_init();
  93. if (!curl)
  94. applogr(false, LOG_ERR, "%s: curl_easy_init failed", cgpu->drv->dname);
  95. // CURLINFO_LASTSOCKET is broken on Win64 (which has a wider SOCKET type than curl_easy_getinfo returns), so we use this hack for now
  96. info->curl_sock = -1;
  97. curl_easy_setopt(curl, CURLOPT_OPENSOCKETFUNCTION, bitmain_grab_socket_opensocket_cb);
  98. curl_easy_setopt(curl, CURLOPT_OPENSOCKETDATA, info);
  99. curl_easy_setopt(curl, CURLOPT_FRESH_CONNECT, 1);
  100. curl_easy_setopt(curl, CURLOPT_CONNECTTIMEOUT, 5);
  101. curl_easy_setopt(curl, CURLOPT_NOSIGNAL, 1);
  102. curl_easy_setopt(curl, CURLOPT_TCP_NODELAY, 1);
  103. curl_easy_setopt(curl, CURLOPT_CONNECT_ONLY, 1);
  104. curl_easy_setopt(curl, CURLOPT_URL, &devpath[3]);
  105. if (curl_easy_perform(curl)) {
  106. curl_easy_cleanup(curl);
  107. applogr(false, LOG_ERR, "%s: curl_easy_perform failed for %s", cgpu->drv->dname, &devpath[3]);
  108. }
  109. cgpu->device_path = strdup(devpath);
  110. cgpu->device_fd = BITMAIN_USING_CURL;
  111. info->device_curl = curl;
  112. return true;
  113. }
  114. fd = serial_open(devpath, info->baud, 1, true);
  115. if(fd == -1) {
  116. applog(LOG_DEBUG, "%s open %s error %d",
  117. cgpu->drv->dname, devpath, errno);
  118. return false;
  119. }
  120. cgpu->device_path = strdup(devpath);
  121. cgpu->device_fd = fd;
  122. applog(LOG_DEBUG, "btm_init open device fd = %d", cgpu->device_fd);
  123. return true;
  124. }
  125. static
  126. void btm_uninit(struct cgpu_info *cgpu)
  127. {
  128. struct bitmain_info * const info = cgpu->device_data;
  129. applog(LOG_DEBUG, "BTM uninit %s%i", cgpu->drv->name, cgpu->device_fd);
  130. // May have happened already during a failed initialisation
  131. // if release_cgpu() was called due to a USB NODEV(err)
  132. if (cgpu->device_fd >= 0) {
  133. serial_close(cgpu->device_fd);
  134. cgpu->device_fd = -1;
  135. }
  136. if (info->device_curl) {
  137. curl_easy_cleanup(info->device_curl);
  138. info->device_curl = NULL;
  139. }
  140. if(cgpu->device_path) {
  141. free((char*)cgpu->device_path);
  142. cgpu->device_path = NULL;
  143. }
  144. }
  145. bool bitmain_curl_all(const bool is_recv, const int fd, CURL * const curl, void *p, size_t remsz)
  146. {
  147. CURLcode (* const func)(CURL *, void *, size_t, size_t *) = is_recv ? (void*)curl_easy_recv : (void*)curl_easy_send;
  148. CURLcode r;
  149. size_t sz;
  150. while (remsz) {
  151. fd_set otherfds, thisfds;
  152. FD_ZERO(&otherfds);
  153. FD_ZERO(&thisfds);
  154. FD_SET(fd, &thisfds);
  155. select(fd + 1, is_recv ? &thisfds : &otherfds, is_recv ? &otherfds : &thisfds, &thisfds, NULL);
  156. r = func(curl, p, remsz, &sz);
  157. switch (r) {
  158. case CURLE_OK:
  159. remsz -= sz;
  160. p += sz;
  161. break;
  162. case CURLE_AGAIN:
  163. break;
  164. default:
  165. return false;
  166. }
  167. }
  168. return true;
  169. }
  170. static
  171. int btm_read(struct cgpu_info * const cgpu, void * const buf, const size_t bufsize)
  172. {
  173. int err = 0;
  174. //applog(LOG_DEBUG, "btm_read ----- %d -----", bufsize);
  175. if (unlikely(cgpu->device_fd == BITMAIN_USING_CURL)) {
  176. struct bitmain_info * const info = cgpu->device_data;
  177. uint8_t headbuf[5];
  178. headbuf[0] = 0;
  179. pk_u32be(headbuf, 1, bufsize);
  180. if (!bitmain_curl_all(false, info->curl_sock, info->device_curl, headbuf, sizeof(headbuf)))
  181. return -1;
  182. if (!bitmain_curl_all( true, info->curl_sock, info->device_curl, headbuf, 4))
  183. return -1;
  184. if (headbuf[0] == 0xff && headbuf[1] == 0xff && headbuf[2] == 0xff && headbuf[3] == 0xff)
  185. return -1;
  186. size_t sz = upk_u32be(headbuf, 0);
  187. if (!bitmain_curl_all( true, info->curl_sock, info->device_curl, buf, sz))
  188. return -1;
  189. return sz;
  190. }
  191. err = read(cgpu->device_fd, buf, bufsize);
  192. return err;
  193. }
  194. static
  195. int btm_write(struct cgpu_info * const cgpu, void * const buf, const size_t bufsize)
  196. {
  197. int err = 0;
  198. //applog(LOG_DEBUG, "btm_write ----- %d -----", bufsize);
  199. if (unlikely(cgpu->device_fd == BITMAIN_USING_CURL)) {
  200. struct bitmain_info * const info = cgpu->device_data;
  201. uint8_t headbuf[5];
  202. headbuf[0] = 1;
  203. pk_u32be(headbuf, 1, bufsize);
  204. if (!bitmain_curl_all(false, info->curl_sock, info->device_curl, headbuf, sizeof(headbuf)))
  205. return -1;
  206. if (!bitmain_curl_all(false, info->curl_sock, info->device_curl, buf, bufsize))
  207. return -1;
  208. if (!bitmain_curl_all( true, info->curl_sock, info->device_curl, headbuf, 4))
  209. return -1;
  210. if (headbuf[0] == 0xff && headbuf[1] == 0xff && headbuf[2] == 0xff && headbuf[3] == 0xff)
  211. return -1;
  212. return upk_u32be(headbuf, 0);
  213. }
  214. err = write(cgpu->device_fd, buf, bufsize);
  215. return err;
  216. }
  217. #define BITMAIN_CALC_DIFF1 1
  218. #ifdef WIN32
  219. #define BITMAIN_TEST
  220. #endif
  221. #define BITMAIN_TEST_PRINT_WORK 0
  222. #ifdef BITMAIN_TEST
  223. #define BITMAIN_TEST_NUM 19
  224. #define BITMAIN_TEST_USENUM 1
  225. int g_test_index = 0;
  226. const char btm_work_test_data[BITMAIN_TEST_NUM][256] = {
  227. "00000002ddc1ce5579dbec17f17fbb8f31ae218a814b2a0c1900f0d90000000100000000b58aa6ca86546b07a5a46698f736c7ca9c0eedc756d8f28ac33c20cc24d792675276f879190afc85b6888022000000800000000000000000000000000000000000000000000000000000000000000000",
  228. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000eb2d45233c5b02de50ddcb9049ba16040e0ba00e9750a474eec75891571d925b52dfda4a190266667145b02f000000800000000000000000000000000000000000000000000000000000000000000000",
  229. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000090c7d3743e0b0562e4f56d3dd35cece3c5e8275d0abb21bf7e503cb72bd7ed3b52dfda4a190266667bbb58d7000000800000000000000000000000000000000000000000000000000000000000000000",
  230. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000006e0561da06022bfbb42c5ecd74a46bfd91934f201b777e9155cc6c3674724ec652dfda4a19026666a0cd827b000000800000000000000000000000000000000000000000000000000000000000000000",
  231. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000000312f42ce4964cc23f2d8c039f106f25ddd58e10a1faed21b3bba4b0e621807b52dfda4a1902666629c9497d000000800000000000000000000000000000000000000000000000000000000000000000",
  232. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000033093a6540dbe8f7f3d19e3d2af05585ac58dafad890fa9a942e977334a23d6e52dfda4a190266665ae95079000000800000000000000000000000000000000000000000000000000000000000000000",
  233. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000bd7893057d06e69705bddf9a89c7bac6b40c5b32f15e2295fc8c5edf491ea24952dfda4a190266664b89b4d3000000800000000000000000000000000000000000000000000000000000000000000000",
  234. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000075e66f533e53837d14236a793ee4e493985642bc39e016b9e63adf14a584a2aa52dfda4a19026666ab5d638d000000800000000000000000000000000000000000000000000000000000000000000000",
  235. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d936f90c5db5f0fe1d017344443854fbf9e40a07a9b7e74fedc8661c23162bff52dfda4a19026666338e79cb000000800000000000000000000000000000000000000000000000000000000000000000",
  236. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d2c1a7d279a4355b017bc0a4b0a9425707786729f21ee18add3fda4252a31a4152dfda4a190266669bc90806000000800000000000000000000000000000000000000000000000000000000000000000",
  237. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000ad36d19f33d04ca779942843890bc3b083cec83a4b60b6c45cf7d21fc187746552dfda4a1902666675d81ab7000000800000000000000000000000000000000000000000000000000000000000000000",
  238. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000093b809cf82b76082eacb55bc35b79f31882ed0976fd102ef54783cd24341319b52dfda4a1902666642ab4e42000000800000000000000000000000000000000000000000000000000000000000000000",
  239. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000007411ff315430a7bbf41de8a685d457e82d5177c05640d6a4436a40f39e99667852dfda4a190266662affa4b5000000800000000000000000000000000000000000000000000000000000000000000000",
  240. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000001ad0db5b9e1e2b57c8d3654c160f5a51067521eab7e340a270639d97f00a3fa252dfda4a1902666601a47bb6000000800000000000000000000000000000000000000000000000000000000000000000",
  241. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000022e055c442c46bbe16df68603a26891f6e4cf85b90102b39fd7cadb602b4e34552dfda4a1902666695d33cea000000800000000000000000000000000000000000000000000000000000000000000000",
  242. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000009c8baf5a8a1e16de2d6ae949d5fec3ed751f10dcd4c99810f2ce08040fb9e31d52dfda4a19026666fe78849d000000800000000000000000000000000000000000000000000000000000000000000000",
  243. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000e5655532b414887f35eb4652bc7b11ebac12891f65bc08cbe0ce5b277b9e795152dfda4a19026666fcc0d1d1000000800000000000000000000000000000000000000000000000000000000000000000",
  244. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000f272c5508704e2b62dd1c30ea970372c40bf00f9203f9bf69d456b4a7fbfffe352dfda4a19026666c03d4399000000800000000000000000000000000000000000000000000000000000000000000000",
  245. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000fca3b4531ba627ad9b0e23cdd84c888952c23810df196e9c6db0bcecba6a830952dfda4a19026666c14009cb000000800000000000000000000000000000000000000000000000000000000000000000"
  246. };
  247. const char btm_work_test_midstate[BITMAIN_TEST_NUM][256] = {
  248. "2d8738e7f5bcf76dcb8316fec772e20e240cd58c88d47f2d3f5a6a9547ed0a35",
  249. "d31b6ce09c0bfc2af6f3fe3a03475ebefa5aa191fa70a327a354b2c22f9692f1",
  250. "84a8c8224b80d36caeb42eff2a100f634e1ff873e83fd02ef1306a34abef9dbe",
  251. "059882159439b9b32968c79a93c5521e769dbea9d840f56c2a17b9ad87e530b8",
  252. "17fa435d05012574f8f1da26994cc87b6cb9660b5e82072dc6a0881cec150a0d",
  253. "92a28cc5ec4ba6a2688471dfe2032b5fe97c805ca286c503e447d6749796c6af",
  254. "1677a03516d6e9509ac37e273d2482da9af6e077abe8392cdca6a30e916a7ae9",
  255. "50bbe09f1b8ac18c97aeb745d5d2c3b5d669b6ac7803e646f65ac7b763a392d1",
  256. "e46a0022ebdc303a7fb1a0ebfa82b523946c312e745e5b8a116b17ae6b4ce981",
  257. "8f2f61e7f5b4d76d854e6d266acfff4d40347548216838ccc4ef3b9e43d3c9ea",
  258. "0a450588ae99f75d676a08d0326e1ea874a3497f696722c78a80c7b6ee961ea6",
  259. "3c4c0fc2cf040b806c51b46de9ec0dcc678a7cc5cf3eff11c6c03de3bc7818cc",
  260. "f6c7c785ab5daddb8f98e5f854f2cb41879fcaf47289eb2b4196fefc1b28316f",
  261. "005312351ccb0d0794779f5023e4335b5cad221accf0dfa3da7b881266fa9f5a",
  262. "7b26d189c6bba7add54143179aadbba7ccaeff6887bd8d5bec9597d5716126e6",
  263. "a4718f4c801e7ddf913a9474eb71774993525684ffea1915f767ab16e05e6889",
  264. "6b6226a8c18919d0e55684638d33a6892a00d22492cc2f5906ca7a4ac21c74a7",
  265. "383114dccd1cb824b869158aa2984d157fcb02f46234ceca65943e919329e697",
  266. "d4d478df3016852b27cb1ae9e1e98d98617f8d0943bf9dc1217f47f817236222"
  267. };
  268. #endif
  269. bool opt_bitmain_checkall = false;
  270. bool opt_bitmain_nobeeper = false;
  271. bool opt_bitmain_notempoverctrl = false;
  272. bool opt_bitmain_homemode = false;
  273. bool opt_bitmain_auto;
  274. // --------------------------------------------------------------
  275. // CRC16 check table
  276. // --------------------------------------------------------------
  277. static
  278. const uint8_t chCRCHTalbe[] = // CRC high byte table
  279. {
  280. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  281. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  282. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  283. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  284. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  285. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  286. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  287. 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  288. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  289. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  290. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  291. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  292. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  293. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  294. 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  295. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  296. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  297. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  298. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  299. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  300. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  301. 0x00, 0xC1, 0x81, 0x40
  302. };
  303. static
  304. const uint8_t chCRCLTalbe[] = // CRC low byte table
  305. {
  306. 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7,
  307. 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E,
  308. 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9,
  309. 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC,
  310. 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
  311. 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32,
  312. 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D,
  313. 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38,
  314. 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF,
  315. 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
  316. 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1,
  317. 0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4,
  318. 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB,
  319. 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA,
  320. 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
  321. 0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0,
  322. 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97,
  323. 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E,
  324. 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89,
  325. 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
  326. 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83,
  327. 0x41, 0x81, 0x80, 0x40
  328. };
  329. static uint16_t CRC16(const uint8_t* p_data, uint16_t w_len)
  330. {
  331. uint8_t chCRCHi = 0xFF; // CRC high byte initialize
  332. uint8_t chCRCLo = 0xFF; // CRC low byte initialize
  333. uint16_t wIndex = 0; // CRC cycling index
  334. while (w_len--) {
  335. wIndex = chCRCLo ^ *p_data++;
  336. chCRCLo = chCRCHi ^ chCRCHTalbe[wIndex];
  337. chCRCHi = chCRCLTalbe[wIndex];
  338. }
  339. return ((chCRCHi << 8) | chCRCLo);
  340. }
  341. static uint32_t num2bit(int num) {
  342. return 1L << (31 - num);
  343. }
  344. static int bitmain_set_txconfig(struct bitmain_txconfig_token *bm,
  345. uint8_t reset, uint8_t fan_eft, uint8_t timeout_eft, uint8_t frequency_eft,
  346. uint8_t voltage_eft, uint8_t chain_check_time_eft, uint8_t chip_config_eft, uint8_t hw_error_eft,
  347. uint8_t beeper_ctrl, uint8_t temp_over_ctrl,uint8_t fan_home_mode,
  348. uint8_t chain_num, uint8_t asic_num, uint8_t fan_pwm_data, uint8_t timeout_data,
  349. uint16_t frequency, uint8_t * voltage, uint8_t chain_check_time,
  350. uint8_t chip_address, uint8_t reg_address, uint8_t * reg_data)
  351. {
  352. uint16_t crc = 0;
  353. int datalen = 0;
  354. uint8_t version = 0;
  355. uint8_t * sendbuf = (uint8_t *)bm;
  356. if (unlikely(!bm)) {
  357. applog(LOG_WARNING, "bitmain_set_txconfig bitmain_txconfig_token is null");
  358. return -1;
  359. }
  360. if (unlikely(timeout_data <= 0 || asic_num <= 0 || chain_num <= 0)) {
  361. applog(LOG_WARNING, "bitmain_set_txconfig parameter invalid timeout_data(%d) asic_num(%d) chain_num(%d)",
  362. timeout_data, asic_num, chain_num);
  363. return -1;
  364. }
  365. datalen = sizeof(struct bitmain_txconfig_token);
  366. memset(bm, 0, datalen);
  367. bm->token_type = BITMAIN_TOKEN_TYPE_TXCONFIG;
  368. bm->version = version;
  369. bm->length = datalen-4;
  370. bm->length = htole16(bm->length);
  371. bm->reset = reset;
  372. bm->fan_eft = fan_eft;
  373. bm->timeout_eft = timeout_eft;
  374. bm->frequency_eft = frequency_eft;
  375. bm->voltage_eft = voltage_eft;
  376. bm->chain_check_time_eft = chain_check_time_eft;
  377. bm->chip_config_eft = chip_config_eft;
  378. bm->hw_error_eft = hw_error_eft;
  379. bm->beeper_ctrl = beeper_ctrl;
  380. bm->temp_over_ctrl = temp_over_ctrl;
  381. bm->fan_home_mode = fan_home_mode;
  382. sendbuf[4] = htole8(sendbuf[4]);
  383. sendbuf[5] = htole8(sendbuf[5]);
  384. bm->chain_num = chain_num;
  385. bm->asic_num = asic_num;
  386. bm->fan_pwm_data = fan_pwm_data;
  387. bm->timeout_data = timeout_data;
  388. bm->frequency = htole16(frequency);
  389. memcpy(bm->voltage, voltage, 2);
  390. bm->chain_check_time = chain_check_time;
  391. memcpy(bm->reg_data, reg_data, 4);
  392. bm->chip_address = chip_address;
  393. bm->reg_address = reg_address;
  394. crc = CRC16((uint8_t *)bm, datalen-2);
  395. bm->crc = htole16(crc);
  396. applog(LOG_ERR, "BTM TxConfigToken:v(%d) reset(%d) fan_e(%d) tout_e(%d) fq_e(%d) vt_e(%d) chainc_e(%d) chipc_e(%d) hw_e(%d) b_c(%d) t_c(%d) f_m(%d) mnum(%d) anum(%d) fanpwmdata(%d) toutdata(%d) freq(%d) volt(%02x%02x) chainctime(%d) regdata(%02x%02x%02x%02x) chipaddr(%02x) regaddr(%02x) crc(%04x)",
  397. version, reset, fan_eft, timeout_eft, frequency_eft, voltage_eft,
  398. chain_check_time_eft, chip_config_eft, hw_error_eft, beeper_ctrl, temp_over_ctrl,fan_home_mode,chain_num, asic_num,
  399. fan_pwm_data, timeout_data, frequency, voltage[0], voltage[1],
  400. chain_check_time, reg_data[0], reg_data[1], reg_data[2], reg_data[3], chip_address, reg_address, crc);
  401. return datalen;
  402. }
  403. static int bitmain_set_txtask(uint8_t * sendbuf,
  404. unsigned int * last_work_block, struct work **works, int work_array_size, int work_array, int sendworkcount, int * sendcount)
  405. {
  406. uint16_t crc = 0;
  407. uint32_t work_id = 0;
  408. uint8_t version = 0;
  409. int datalen = 0;
  410. int i = 0;
  411. int index = work_array;
  412. uint8_t new_block= 0;
  413. struct bitmain_txtask_token *bm = (struct bitmain_txtask_token *)sendbuf;
  414. *sendcount = 0;
  415. int cursendcount = 0;
  416. int diff = 0;
  417. unsigned int difftmp = 0;
  418. unsigned int pooldiff = 0;
  419. int netdiff = 0;
  420. if (unlikely(!bm)) {
  421. applog(LOG_WARNING, "bitmain_set_txtask bitmain_txtask_token is null");
  422. return -1;
  423. }
  424. if (unlikely(!works)) {
  425. applog(LOG_WARNING, "bitmain_set_txtask work is null");
  426. return -1;
  427. }
  428. memset(bm, 0, sizeof(struct bitmain_txtask_token));
  429. bm->token_type = BITMAIN_TOKEN_TYPE_TXTASK;
  430. bm->version = version;
  431. datalen = 10;
  432. applog(LOG_DEBUG, "BTM send work count %d -----", sendworkcount);
  433. pooldiff = 0x100;
  434. unsigned lowest_goal_diff = UINT_MAX;
  435. for (i = 0; i < sendworkcount; ++i) {
  436. if (index > work_array_size) {
  437. index = 0;
  438. }
  439. if (!works[index]) {
  440. continue;
  441. }
  442. struct work * const work = works[index];
  443. if (work->work_difficulty < pooldiff)
  444. pooldiff = work->work_difficulty;
  445. const struct pool * const pool = work->pool;
  446. const struct mining_goal_info * const goal = pool->goal;
  447. if (goal->current_diff < lowest_goal_diff)
  448. lowest_goal_diff = goal->current_diff;
  449. }
  450. {
  451. difftmp = pooldiff;
  452. while(1) {
  453. difftmp = difftmp >> 1;
  454. if(difftmp > 0) {
  455. diff++;
  456. if(diff >= 255) {
  457. break;
  458. }
  459. } else {
  460. break;
  461. }
  462. }
  463. for (uint64_t netdifftmp = lowest_goal_diff; netdifftmp > 0; netdifftmp >>= 1) {
  464. ++netdiff;
  465. }
  466. pooldiff = pow(2, diff);
  467. }
  468. applog(LOG_DEBUG, "bitmain_set_txtask using nonce_diff=%u (log2=%d) and goal_diff=%u (log2=%d)", pooldiff, diff, lowest_goal_diff, netdiff);
  469. for(i = 0; i < sendworkcount; i++) {
  470. if(index > work_array_size) {
  471. index = 0;
  472. }
  473. if(works[index]) {
  474. const unsigned int work_block = bfg_work_block(works[index]);
  475. if(work_block != *last_work_block) {
  476. applog(LOG_ERR, "BTM send task new block %d old(%d)", work_block, *last_work_block);
  477. new_block = 1;
  478. *last_work_block = work_block;
  479. }
  480. #ifdef BITMAIN_TEST
  481. if(!hex2bin(works[index]->data, btm_work_test_data[g_test_index], 128)) {
  482. applog(LOG_DEBUG, "BTM send task set test data error");
  483. }
  484. if(!hex2bin(works[index]->midstate, btm_work_test_midstate[g_test_index], 32)) {
  485. applog(LOG_DEBUG, "BTM send task set test midstate error");
  486. }
  487. g_test_index++;
  488. if(g_test_index >= BITMAIN_TEST_USENUM) {
  489. g_test_index = 0;
  490. }
  491. applog(LOG_DEBUG, "BTM test index = %d", g_test_index);
  492. #endif
  493. work_id = works[index]->id;
  494. bm->works[cursendcount].work_id = htole32(work_id);
  495. applog(LOG_DEBUG, "BTM send task work id:%d %d", bm->works[cursendcount].work_id, work_id);
  496. memcpy(bm->works[cursendcount].midstate, works[index]->midstate, 32);
  497. memcpy(bm->works[cursendcount].data2, works[index]->data + 64, 12);
  498. works[index]->nonce_diff = pooldiff;
  499. if(BITMAIN_TEST_PRINT_WORK) {
  500. char ob_hex[(76 * 2) + 1];
  501. bin2hex(ob_hex, works[index]->data, 76);
  502. applog(LOG_ERR, "work %d data: %s", works[index]->id, ob_hex);
  503. }
  504. cursendcount++;
  505. }
  506. index++;
  507. }
  508. if(cursendcount <= 0) {
  509. applog(LOG_ERR, "BTM send work count %d", cursendcount);
  510. return 0;
  511. }
  512. datalen += 48*cursendcount;
  513. bm->length = datalen-4;
  514. bm->length = htole16(bm->length);
  515. //len = datalen-3;
  516. //len = htole16(len);
  517. //memcpy(sendbuf+1, &len, 2);
  518. bm->new_block = new_block;
  519. bm->diff = diff;
  520. bm->net_diff = htole16(netdiff);
  521. sendbuf[4] = htole8(sendbuf[4]);
  522. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  523. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  524. *sendcount = cursendcount;
  525. crc = CRC16(sendbuf, datalen-2);
  526. crc = htole16(crc);
  527. memcpy(sendbuf+datalen-2, &crc, 2);
  528. applog(LOG_DEBUG, "BitMain TxTask Token: v(%d) new_block(%d) diff(%d pool:%d net:%d) work_num(%d) crc(%04x)",
  529. version, new_block, diff, pooldiff,netdiff, cursendcount, crc);
  530. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  531. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  532. return datalen;
  533. }
  534. static int bitmain_set_rxstatus(struct bitmain_rxstatus_token *bm,
  535. uint8_t chip_status_eft, uint8_t detect_get, uint8_t chip_address, uint8_t reg_address)
  536. {
  537. uint16_t crc = 0;
  538. uint8_t version = 0;
  539. int datalen = 0;
  540. uint8_t * sendbuf = (uint8_t *)bm;
  541. if (unlikely(!bm)) {
  542. applog(LOG_WARNING, "bitmain_set_rxstatus bitmain_rxstatus_token is null");
  543. return -1;
  544. }
  545. datalen = sizeof(struct bitmain_rxstatus_token);
  546. memset(bm, 0, datalen);
  547. bm->token_type = BITMAIN_TOKEN_TYPE_RXSTATUS;
  548. bm->version = version;
  549. bm->length = datalen-4;
  550. bm->length = htole16(bm->length);
  551. bm->chip_status_eft = chip_status_eft;
  552. bm->detect_get = detect_get;
  553. sendbuf[4] = htole8(sendbuf[4]);
  554. bm->chip_address = chip_address;
  555. bm->reg_address = reg_address;
  556. crc = CRC16((uint8_t *)bm, datalen-2);
  557. bm->crc = htole16(crc);
  558. applog(LOG_ERR, "BitMain RxStatus Token: v(%d) chip_status_eft(%d) detect_get(%d) chip_address(%02x) reg_address(%02x) crc(%04x)",
  559. version, chip_status_eft, detect_get, chip_address, reg_address, crc);
  560. return datalen;
  561. }
  562. static int bitmain_parse_rxstatus(const uint8_t * data, int datalen, struct bitmain_rxstatus_data *bm)
  563. {
  564. uint16_t crc = 0;
  565. uint8_t version = 0;
  566. int i = 0, j = 0;
  567. int asic_num = 0;
  568. int dataindex = 0;
  569. uint8_t tmp = 0x01;
  570. if (unlikely(!bm)) {
  571. applog(LOG_WARNING, "bitmain_parse_rxstatus bitmain_rxstatus_data is null");
  572. return -1;
  573. }
  574. if (unlikely(!data || datalen <= 0)) {
  575. applog(LOG_WARNING, "bitmain_parse_rxstatus parameter invalid data is null or datalen(%d) error", datalen);
  576. return -1;
  577. }
  578. memset(bm, 0, sizeof(struct bitmain_rxstatus_data));
  579. memcpy(bm, data, 28);
  580. if (bm->data_type != BITMAIN_DATA_TYPE_RXSTATUS) {
  581. applog(LOG_ERR, "bitmain_parse_rxstatus datatype(%02x) error", bm->data_type);
  582. return -1;
  583. }
  584. if (bm->version != version) {
  585. applog(LOG_ERR, "bitmain_parse_rxstatus version(%02x) error", bm->version);
  586. return -1;
  587. }
  588. bm->length = htole16(bm->length);
  589. if (bm->length+4 != datalen) {
  590. applog(LOG_ERR, "bitmain_parse_rxstatus length(%d) datalen(%d) error", bm->length, datalen);
  591. return -1;
  592. }
  593. crc = CRC16(data, datalen-2);
  594. memcpy(&(bm->crc), data+datalen-2, 2);
  595. bm->crc = htole16(bm->crc);
  596. if(crc != bm->crc) {
  597. applog(LOG_ERR, "bitmain_parse_rxstatus check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  598. return -1;
  599. }
  600. bm->fifo_space = htole16(bm->fifo_space);
  601. bm->fan_exist = htole16(bm->fan_exist);
  602. bm->temp_exist = htole32(bm->temp_exist);
  603. bm->nonce_error = htole32(bm->nonce_error);
  604. if(bm->chain_num > BITMAIN_MAX_CHAIN_NUM) {
  605. applog(LOG_ERR, "bitmain_parse_rxstatus chain_num=%d error", bm->chain_num);
  606. return -1;
  607. }
  608. dataindex = 28;
  609. if(bm->chain_num > 0) {
  610. memcpy(bm->chain_asic_num, data+datalen-2-bm->chain_num-bm->temp_num-bm->fan_num, bm->chain_num);
  611. }
  612. for(i = 0; i < bm->chain_num; i++) {
  613. asic_num = bm->chain_asic_num[i];
  614. if(asic_num <= 0) {
  615. asic_num = 1;
  616. } else {
  617. if(asic_num % 32 == 0) {
  618. asic_num = asic_num / 32;
  619. } else {
  620. asic_num = asic_num / 32 + 1;
  621. }
  622. }
  623. memcpy((uint8_t *)bm->chain_asic_exist+i*32, data+dataindex, asic_num*4);
  624. dataindex += asic_num*4;
  625. }
  626. for(i = 0; i < bm->chain_num; i++) {
  627. asic_num = bm->chain_asic_num[i];
  628. if(asic_num <= 0) {
  629. asic_num = 1;
  630. } else {
  631. if(asic_num % 32 == 0) {
  632. asic_num = asic_num / 32;
  633. } else {
  634. asic_num = asic_num / 32 + 1;
  635. }
  636. }
  637. memcpy((uint8_t *)bm->chain_asic_status+i*32, data+dataindex, asic_num*4);
  638. dataindex += asic_num*4;
  639. }
  640. dataindex += bm->chain_num;
  641. if(dataindex + bm->temp_num + bm->fan_num + 2 != datalen) {
  642. applog(LOG_ERR, "bitmain_parse_rxstatus dataindex(%d) chain_num(%d) temp_num(%d) fan_num(%d) not match datalen(%d)",
  643. dataindex, bm->chain_num, bm->temp_num, bm->fan_num, datalen);
  644. return -1;
  645. }
  646. for(i = 0; i < bm->chain_num; i++) {
  647. //bm->chain_asic_status[i] = swab32(bm->chain_asic_status[i]);
  648. for(j = 0; j < 8; j++) {
  649. bm->chain_asic_exist[i*8+j] = htole32(bm->chain_asic_exist[i*8+j]);
  650. bm->chain_asic_status[i*8+j] = htole32(bm->chain_asic_status[i*8+j]);
  651. }
  652. }
  653. if(bm->temp_num > 0) {
  654. memcpy(bm->temp, data+dataindex, bm->temp_num);
  655. dataindex += bm->temp_num;
  656. }
  657. if(bm->fan_num > 0) {
  658. memcpy(bm->fan, data+dataindex, bm->fan_num);
  659. dataindex += bm->fan_num;
  660. }
  661. if(!opt_bitmain_checkall){
  662. if(tmp != htole8(tmp)){
  663. applog(LOG_ERR, "BitMain RxStatus byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  664. memcpy(&tmp,data+4,1);
  665. bm->chip_value_eft = tmp >>7;
  666. bm->get_blk_num = tmp >> 4;
  667. bm->reserved1 = ((tmp << 4) & 0xff) >> 5;
  668. }
  669. found_blocks = bm->get_blk_num;
  670. applog(LOG_ERR, "BitMain RxStatus tmp :0x%02x byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",tmp,*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  671. }
  672. applog(LOG_DEBUG, "BitMain RxStatusData: chipv_e(%d) chainnum(%d) fifos(%d) v1(%d) v2(%d) v3(%d) v4(%d) fann(%d) tempn(%d) fanet(%04x) tempet(%08x) ne(%d) regvalue(%d) crc(%04x)",
  673. bm->chip_value_eft, bm->chain_num, bm->fifo_space, bm->hw_version[0], bm->hw_version[1], bm->hw_version[2], bm->hw_version[3], bm->fan_num, bm->temp_num, bm->fan_exist, bm->temp_exist, bm->nonce_error, bm->reg_value, bm->crc);
  674. applog(LOG_DEBUG, "BitMain RxStatus Data chain info:");
  675. for(i = 0; i < bm->chain_num; i++) {
  676. applog(LOG_DEBUG, "BitMain RxStatus Data chain(%d) asic num=%d asic_exist=%08x asic_status=%08x", i+1, bm->chain_asic_num[i], bm->chain_asic_exist[i*8], bm->chain_asic_status[i*8]);
  677. }
  678. applog(LOG_DEBUG, "BitMain RxStatus Data temp info:");
  679. for(i = 0; i < bm->temp_num; i++) {
  680. applog(LOG_DEBUG, "BitMain RxStatus Data temp(%d) temp=%d", i+1, bm->temp[i]);
  681. }
  682. applog(LOG_DEBUG, "BitMain RxStatus Data fan info:");
  683. for(i = 0; i < bm->fan_num; i++) {
  684. applog(LOG_DEBUG, "BitMain RxStatus Data fan(%d) fan=%d", i+1, bm->fan[i]);
  685. }
  686. return 0;
  687. }
  688. static int bitmain_parse_rxnonce(const uint8_t * data, int datalen, struct bitmain_rxnonce_data *bm, int * nonce_num)
  689. {
  690. int i = 0;
  691. uint16_t crc = 0;
  692. uint8_t version = 0;
  693. int curnoncenum = 0;
  694. if (unlikely(!bm)) {
  695. applog(LOG_ERR, "bitmain_parse_rxnonce bitmain_rxstatus_data null");
  696. return -1;
  697. }
  698. if (unlikely(!data || datalen <= 0)) {
  699. applog(LOG_ERR, "bitmain_parse_rxnonce data null or datalen(%d) error", datalen);
  700. return -1;
  701. }
  702. memcpy(bm, data, sizeof(struct bitmain_rxnonce_data));
  703. if (bm->data_type != BITMAIN_DATA_TYPE_RXNONCE) {
  704. applog(LOG_ERR, "bitmain_parse_rxnonce datatype(%02x) error", bm->data_type);
  705. return -1;
  706. }
  707. if (bm->version != version) {
  708. applog(LOG_ERR, "bitmain_parse_rxnonce version(%02x) error", bm->version);
  709. return -1;
  710. }
  711. bm->length = htole16(bm->length);
  712. if (bm->length+4 != datalen) {
  713. applog(LOG_ERR, "bitmain_parse_rxnonce length(%d) error", bm->length);
  714. return -1;
  715. }
  716. crc = CRC16(data, datalen-2);
  717. memcpy(&(bm->crc), data+datalen-2, 2);
  718. bm->crc = htole16(bm->crc);
  719. if(crc != bm->crc) {
  720. applog(LOG_ERR, "bitmain_parse_rxnonce check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  721. return -1;
  722. }
  723. bm->fifo_space = htole16(bm->fifo_space);
  724. bm->diff = htole16(bm->diff);
  725. bm->total_nonce_num = htole64(bm->total_nonce_num);
  726. curnoncenum = (datalen-14)/8;
  727. applog(LOG_DEBUG, "BitMain RxNonce Data: nonce_num(%d) fifo_space(%d) diff(%d) tnn(%"PRIu64")", curnoncenum, bm->fifo_space, bm->diff, bm->total_nonce_num);
  728. for(i = 0; i < curnoncenum; i++) {
  729. bm->nonces[i].work_id = htole32(bm->nonces[i].work_id);
  730. bm->nonces[i].nonce = htole32(bm->nonces[i].nonce);
  731. applog(LOG_DEBUG, "BitMain RxNonce Data %d: work_id(%d) nonce(%08x)(%d)",
  732. i, bm->nonces[i].work_id, bm->nonces[i].nonce, bm->nonces[i].nonce);
  733. }
  734. *nonce_num = curnoncenum;
  735. return 0;
  736. }
  737. static int bitmain_read(struct cgpu_info *bitmain, unsigned char *buf,
  738. size_t bufsize, int timeout)
  739. {
  740. int err = 0;
  741. size_t total = 0;
  742. if(bitmain == NULL || buf == NULL || bufsize <= 0) {
  743. applog(LOG_WARNING, "bitmain_read parameter error bufsize(%llu)", (unsigned long long)bufsize);
  744. return -1;
  745. }
  746. {
  747. err = btm_read(bitmain, buf, bufsize);
  748. total = err;
  749. }
  750. return total;
  751. }
  752. static int bitmain_write(struct cgpu_info *bitmain, char *buf, ssize_t len)
  753. {
  754. int err;
  755. {
  756. int havelen = 0;
  757. while(havelen < len) {
  758. err = btm_write(bitmain, buf+havelen, len-havelen);
  759. if(err < 0) {
  760. applog(LOG_DEBUG, "%s%i: btm_write got err %d", bitmain->drv->name,
  761. bitmain->device_id, err);
  762. applog(LOG_WARNING, "usb_write error on bitmain_write");
  763. return BTM_SEND_ERROR;
  764. } else {
  765. havelen += err;
  766. }
  767. }
  768. }
  769. return BTM_SEND_OK;
  770. }
  771. static int bitmain_send_data(const uint8_t * data, int datalen, struct cgpu_info *bitmain)
  772. {
  773. int ret;
  774. if(datalen <= 0) {
  775. return 0;
  776. }
  777. //struct bitmain_info *info = bitmain->device_data;
  778. //int delay;
  779. //delay = datalen * 10 * 1000000;
  780. //delay = delay / info->baud;
  781. //delay += 4000;
  782. if(opt_debug) {
  783. char hex[(datalen * 2) + 1];
  784. bin2hex(hex, data, datalen);
  785. applog(LOG_DEBUG, "BitMain: Sent(%d): %s", datalen, hex);
  786. }
  787. //cgtimer_t ts_start;
  788. //cgsleep_prepare_r(&ts_start);
  789. //applog(LOG_DEBUG, "----bitmain_send_data start");
  790. ret = bitmain_write(bitmain, (char *)data, datalen);
  791. applog(LOG_DEBUG, "----bitmain_send_data stop ret=%d datalen=%d", ret, datalen);
  792. //cgsleep_us_r(&ts_start, delay);
  793. //applog(LOG_DEBUG, "BitMain: Sent: Buffer delay: %dus", delay);
  794. return ret;
  795. }
  796. static void bitmain_inc_nvw(struct bitmain_info *info, struct thr_info *thr)
  797. {
  798. applog(LOG_INFO, "%s%d: No matching work - HW error",
  799. thr->cgpu->drv->name, thr->cgpu->device_id);
  800. inc_hw_errors_only(thr);
  801. info->no_matching_work++;
  802. }
  803. static inline void record_temp_fan(struct bitmain_info *info, struct bitmain_rxstatus_data *bm, float *temp)
  804. {
  805. int i = 0;
  806. int maxfan = 0, maxtemp = 0;
  807. int temp_avg = 0;
  808. info->fan_num = bm->fan_num;
  809. for(i = 0; i < bm->fan_num; i++) {
  810. info->fan[i] = bm->fan[i] * BITMAIN_FAN_FACTOR;
  811. if(info->fan[i] > maxfan)
  812. maxfan = info->fan[i];
  813. }
  814. info->temp_num = bm->temp_num;
  815. for(i = 0; i < bm->temp_num; i++) {
  816. info->temp[i] = bm->temp[i];
  817. /*
  818. if(bm->temp[i] & 0x80) {
  819. bm->temp[i] &= 0x7f;
  820. info->temp[i] = 0 - ((~bm->temp[i] & 0x7f) + 1);
  821. }*/
  822. temp_avg += info->temp[i];
  823. if(info->temp[i] > info->temp_max) {
  824. info->temp_max = info->temp[i];
  825. }
  826. if(info->temp[i] > maxtemp)
  827. maxtemp = info->temp[i];
  828. }
  829. if(bm->temp_num > 0) {
  830. temp_avg /= bm->temp_num;
  831. info->temp_avg = temp_avg;
  832. }
  833. *temp = maxtemp;
  834. }
  835. static void bitmain_update_temps(struct cgpu_info *bitmain, struct bitmain_info *info,
  836. struct bitmain_rxstatus_data *bm)
  837. {
  838. char tmp[64] = {0};
  839. char msg[10240] = {0};
  840. int i = 0;
  841. record_temp_fan(info, bm, &(bitmain->temp));
  842. strcpy(msg, "BitMain: ");
  843. for(i = 0; i < bm->fan_num; i++) {
  844. if(i != 0) {
  845. strcat(msg, ", ");
  846. }
  847. sprintf(tmp, "Fan%d: %d/m", i+1, info->fan[i]);
  848. strcat(msg, tmp);
  849. }
  850. strcat(msg, "\t");
  851. for(i = 0; i < bm->temp_num; i++) {
  852. if(i != 0) {
  853. strcat(msg, ", ");
  854. }
  855. sprintf(tmp, "Temp%d: %dC", i+1, info->temp[i]);
  856. strcat(msg, tmp);
  857. }
  858. sprintf(tmp, ", TempMAX: %dC", info->temp_max);
  859. strcat(msg, tmp);
  860. applog(LOG_INFO, "%s", msg);
  861. info->temp_history_index++;
  862. info->temp_sum += bitmain->temp;
  863. applog(LOG_DEBUG, "BitMain: temp_index: %d, temp_count: %d, temp_old: %d",
  864. info->temp_history_index, info->temp_history_count, info->temp_old);
  865. if (info->temp_history_index == info->temp_history_count) {
  866. info->temp_history_index = 0;
  867. info->temp_sum = 0;
  868. }
  869. }
  870. static void bitmain_parse_results(struct cgpu_info *bitmain, struct bitmain_info *info,
  871. struct thr_info *thr, uint8_t *buf, int *offset)
  872. {
  873. int i, j, n, m, r, errordiff, spare = BITMAIN_READ_SIZE;
  874. uint32_t checkbit = 0x00000000;
  875. bool found = false;
  876. struct work *work = NULL;
  877. struct bitmain_packet_head packethead;
  878. int asicnum = 0;
  879. int idiff = 0;
  880. int mod = 0,tmp = 0;
  881. for (i = 0; i <= spare; i++) {
  882. if(buf[i] == 0xa1) {
  883. struct bitmain_rxstatus_data rxstatusdata;
  884. applog(LOG_DEBUG, "bitmain_parse_results RxStatus Data");
  885. if(*offset < 4) {
  886. return;
  887. }
  888. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  889. packethead.length = htole16(packethead.length);
  890. if(packethead.length > 1130) {
  891. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus datalen=%d error", packethead.length+4);
  892. continue;
  893. }
  894. if(*offset < packethead.length + 4) {
  895. return;
  896. }
  897. if(bitmain_parse_rxstatus(buf+i, packethead.length+4, &rxstatusdata) != 0) {
  898. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus error len=%d", packethead.length+4);
  899. } else {
  900. mutex_lock(&info->qlock);
  901. info->chain_num = rxstatusdata.chain_num;
  902. info->fifo_space = rxstatusdata.fifo_space;
  903. info->hw_version[0] = rxstatusdata.hw_version[0];
  904. info->hw_version[1] = rxstatusdata.hw_version[1];
  905. info->hw_version[2] = rxstatusdata.hw_version[2];
  906. info->hw_version[3] = rxstatusdata.hw_version[3];
  907. info->nonce_error = rxstatusdata.nonce_error;
  908. errordiff = info->nonce_error-info->last_nonce_error;
  909. //sprintf(g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  910. applog(LOG_ERR, "bitmain_parse_results v=%d chain=%d fifo=%d hwv1=%d hwv2=%d hwv3=%d hwv4=%d nerr=%d-%d freq=%d chain info:",
  911. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  912. info->last_nonce_error, info->nonce_error, info->frequency);
  913. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  914. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  915. for(n = 0; n < rxstatusdata.chain_num; n++) {
  916. info->chain_asic_num[n] = rxstatusdata.chain_asic_num[n];
  917. memset(info->chain_asic_status_t[n], 0, 320);
  918. j = 0;
  919. mod = 0;
  920. if(info->chain_asic_num[n] <= 0) {
  921. asicnum = 0;
  922. } else {
  923. mod = info->chain_asic_num[n] % 32;
  924. if(mod == 0) {
  925. asicnum = info->chain_asic_num[n] / 32;
  926. } else {
  927. asicnum = info->chain_asic_num[n] / 32 + 1;
  928. }
  929. }
  930. if(asicnum > 0) {
  931. for(m = asicnum-1; m >= 0; m--) {
  932. tmp = mod ? (32-mod): 0;
  933. for(r = tmp;r < 32;r++){
  934. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  935. info->chain_asic_status_t[n][j] = ' ';
  936. j++;
  937. }
  938. checkbit = num2bit(r);
  939. if(rxstatusdata.chain_asic_exist[n*8+m] & checkbit) {
  940. if(rxstatusdata.chain_asic_status[n*8+m] & checkbit) {
  941. info->chain_asic_status_t[n][j] = 'o';
  942. } else {
  943. info->chain_asic_status_t[n][j] = 'x';
  944. }
  945. } else {
  946. info->chain_asic_status_t[n][j] = '-';
  947. }
  948. j++;
  949. }
  950. info->chain_asic_status_t[n][j] = ' ';
  951. j++;
  952. mod = 0;
  953. }
  954. }
  955. applog(LOG_DEBUG, "bitmain_parse_results chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  956. n, info->chain_asic_num[n],
  957. info->chain_asic_exist[n*8+0], info->chain_asic_exist[n*8+1], info->chain_asic_exist[n*8+2], info->chain_asic_exist[n*8+3], info->chain_asic_exist[n*8+4], info->chain_asic_exist[n*8+5], info->chain_asic_exist[n*8+6], info->chain_asic_exist[n*8+7],
  958. info->chain_asic_status[n*8+0], info->chain_asic_status[n*8+1], info->chain_asic_status[n*8+2], info->chain_asic_status[n*8+3], info->chain_asic_status[n*8+4], info->chain_asic_status[n*8+5], info->chain_asic_status[n*8+6], info->chain_asic_status[n*8+7]);
  959. applog(LOG_ERR, "bitmain_parse_results chain(%d) asic_num=%d asic_status=%s", n, info->chain_asic_num[n], info->chain_asic_status_t[n]);
  960. }
  961. mutex_unlock(&info->qlock);
  962. if(errordiff > 0) {
  963. for(j = 0; j < errordiff; j++) {
  964. bitmain_inc_nvw(info, thr);
  965. }
  966. mutex_lock(&info->qlock);
  967. info->last_nonce_error += errordiff;
  968. mutex_unlock(&info->qlock);
  969. }
  970. bitmain_update_temps(bitmain, info, &rxstatusdata);
  971. }
  972. found = true;
  973. spare = packethead.length + 4 + i;
  974. if(spare > *offset) {
  975. applog(LOG_ERR, "bitmain_parse_rxresults space(%d) > offset(%d)", spare, *offset);
  976. spare = *offset;
  977. }
  978. break;
  979. } else if(buf[i] == 0xa2) {
  980. struct bitmain_rxnonce_data rxnoncedata;
  981. int nonce_num = 0;
  982. applog(LOG_DEBUG, "bitmain_parse_results RxNonce Data");
  983. if(*offset < 4) {
  984. return;
  985. }
  986. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  987. packethead.length = htole16(packethead.length);
  988. if(packethead.length > 1030) {
  989. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce datalen=%d error", packethead.length+4);
  990. continue;
  991. }
  992. if(*offset < packethead.length + 4) {
  993. return;
  994. }
  995. if(bitmain_parse_rxnonce(buf+i, packethead.length+4, &rxnoncedata, &nonce_num) != 0) {
  996. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce error len=%d", packethead.length+4);
  997. } else {
  998. for(j = 0; j < nonce_num; j++) {
  999. const int work_id = rxnoncedata.nonces[j].work_id;
  1000. HASH_FIND_INT(bitmain->queued_work, &work_id, work);
  1001. if(work) {
  1002. if(BITMAIN_TEST_PRINT_WORK) {
  1003. applog(LOG_ERR, "bitmain_parse_results nonce find work(%d-%d)(%08x)", work->id, rxnoncedata.nonces[j].work_id, rxnoncedata.nonces[j].nonce);
  1004. char ob_hex[(32 * 2) + 1];
  1005. bin2hex(ob_hex, work->midstate, 32);
  1006. applog(LOG_ERR, "work %d midstate: %s", work->id, ob_hex);
  1007. bin2hex(ob_hex, &work->data[64], 12);
  1008. applog(LOG_ERR, "work %d data2: %s", work->id, ob_hex);
  1009. }
  1010. {
  1011. const uint32_t nonce = rxnoncedata.nonces[j].nonce;
  1012. applog(LOG_DEBUG, "BitMain: submit nonce = %08lx", (unsigned long)nonce);
  1013. if (submit_nonce(thr, work, nonce)) {
  1014. mutex_lock(&info->qlock);
  1015. info->nonces++;
  1016. info->auto_nonces++;
  1017. mutex_unlock(&info->qlock);
  1018. } else {
  1019. //bitmain_inc_nvw(info, thr);
  1020. applog(LOG_ERR, "BitMain: bitmain_decode_nonce error work(%d)", rxnoncedata.nonces[j].work_id);
  1021. }
  1022. }
  1023. } else {
  1024. //bitmain_inc_nvw(info, thr);
  1025. applog(LOG_ERR, "BitMain: Nonce not find work(%d)", rxnoncedata.nonces[j].work_id);
  1026. }
  1027. }
  1028. #ifdef BITMAIN_CALC_DIFF1
  1029. if(opt_bitmain_hwerror) {
  1030. int difftmp = 0;
  1031. difftmp = rxnoncedata.diff;
  1032. idiff = 1;
  1033. while(difftmp > 0) {
  1034. difftmp--;
  1035. idiff = idiff << 1;
  1036. }
  1037. mutex_lock(&info->qlock);
  1038. difftmp = idiff*(rxnoncedata.total_nonce_num-info->total_nonce_num);
  1039. if(difftmp < 0)
  1040. difftmp = 0;
  1041. info->nonces = info->nonces+difftmp;
  1042. info->auto_nonces = info->auto_nonces+difftmp;
  1043. info->total_nonce_num = rxnoncedata.total_nonce_num;
  1044. info->fifo_space = rxnoncedata.fifo_space;
  1045. mutex_unlock(&info->qlock);
  1046. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d diff=%d rxtnn=%"PRIu64" tnn=%"PRIu64, info->fifo_space, idiff, rxnoncedata.total_nonce_num, info->total_nonce_num);
  1047. } else {
  1048. mutex_lock(&info->qlock);
  1049. info->fifo_space = rxnoncedata.fifo_space;
  1050. mutex_unlock(&info->qlock);
  1051. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  1052. }
  1053. #else
  1054. mutex_lock(&info->qlock);
  1055. info->fifo_space = rxnoncedata.fifo_space;
  1056. mutex_unlock(&info->qlock);
  1057. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  1058. #endif
  1059. #ifndef WIN32
  1060. if(nonce_num < BITMAIN_MAX_NONCE_NUM)
  1061. cgsleep_ms(5);
  1062. #endif
  1063. }
  1064. found = true;
  1065. spare = packethead.length + 4 + i;
  1066. if(spare > *offset) {
  1067. applog(LOG_ERR, "bitmain_parse_rxnonce space(%d) > offset(%d)", spare, *offset);
  1068. spare = *offset;
  1069. }
  1070. break;
  1071. } else {
  1072. applog(LOG_ERR, "bitmain_parse_results data type error=%02x", buf[i]);
  1073. }
  1074. }
  1075. if (!found) {
  1076. spare = *offset - BITMAIN_READ_SIZE;
  1077. /* We are buffering and haven't accumulated one more corrupt
  1078. * work result. */
  1079. if (spare < (int)BITMAIN_READ_SIZE)
  1080. return;
  1081. bitmain_inc_nvw(info, thr);
  1082. }
  1083. *offset -= spare;
  1084. memmove(buf, buf + spare, *offset);
  1085. }
  1086. static void bitmain_running_reset(struct cgpu_info *bitmain, struct bitmain_info *info)
  1087. {
  1088. bitmain->results = 0;
  1089. info->reset = false;
  1090. }
  1091. static void *bitmain_get_results(void *userdata)
  1092. {
  1093. struct cgpu_info *bitmain = (struct cgpu_info *)userdata;
  1094. struct bitmain_info *info = bitmain->device_data;
  1095. int offset = 0, ret = 0;
  1096. const int rsize = BITMAIN_FTDI_READSIZE;
  1097. uint8_t readbuf[BITMAIN_READBUF_SIZE];
  1098. struct thr_info *thr = info->thr;
  1099. char threadname[24];
  1100. int errorcount = 0;
  1101. snprintf(threadname, 24, "btm_recv/%d", bitmain->device_id);
  1102. RenameThread(threadname);
  1103. while (likely(!bitmain->shutdown)) {
  1104. unsigned char buf[rsize];
  1105. //applog(LOG_DEBUG, "+++++++bitmain_get_results offset=%d", offset);
  1106. if (offset >= (int)BITMAIN_READ_SIZE) {
  1107. //applog(LOG_DEBUG, "======start bitmain_get_results ");
  1108. bitmain_parse_results(bitmain, info, thr, readbuf, &offset);
  1109. //applog(LOG_DEBUG, "======stop bitmain_get_results ");
  1110. }
  1111. if (unlikely(offset + rsize >= BITMAIN_READBUF_SIZE)) {
  1112. /* This should never happen */
  1113. applog(LOG_DEBUG, "BitMain readbuf overflow, resetting buffer");
  1114. offset = 0;
  1115. }
  1116. if (unlikely(info->reset)) {
  1117. bitmain_running_reset(bitmain, info);
  1118. /* Discard anything in the buffer */
  1119. offset = 0;
  1120. }
  1121. /* As the usb read returns after just 1ms, sleep long enough
  1122. * to leave the interface idle for writes to occur, but do not
  1123. * sleep if we have been receiving data as more may be coming. */
  1124. //if (offset == 0) {
  1125. // cgsleep_ms_r(&ts_start, BITMAIN_READ_TIMEOUT);
  1126. //}
  1127. //cgsleep_prepare_r(&ts_start);
  1128. //applog(LOG_DEBUG, "======start bitmain_get_results bitmain_read");
  1129. ret = bitmain_read(bitmain, buf, rsize, BITMAIN_READ_TIMEOUT);
  1130. //applog(LOG_DEBUG, "======stop bitmain_get_results bitmain_read=%d", ret);
  1131. if ((ret < 1) || (ret == 18)) {
  1132. errorcount++;
  1133. #ifdef WIN32
  1134. if(errorcount > 200) {
  1135. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1136. cgsleep_ms(20);
  1137. errorcount = 0;
  1138. }
  1139. #else
  1140. if(errorcount > 3) {
  1141. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1142. cgsleep_ms(20);
  1143. errorcount = 0;
  1144. }
  1145. #endif
  1146. if(ret < 1)
  1147. continue;
  1148. }
  1149. if (opt_debug) {
  1150. char hex[(ret * 2) + 1];
  1151. bin2hex(hex, buf, ret);
  1152. applog(LOG_DEBUG, "BitMain: get: %s", hex);
  1153. }
  1154. memcpy(readbuf+offset, buf, ret);
  1155. offset += ret;
  1156. }
  1157. return NULL;
  1158. }
  1159. static void bitmain_init(struct cgpu_info *bitmain)
  1160. {
  1161. applog(LOG_INFO, "BitMain: Opened on %s", bitmain->device_path);
  1162. }
  1163. static bool bitmain_prepare(struct thr_info *thr)
  1164. {
  1165. struct cgpu_info *bitmain = thr->cgpu;
  1166. struct bitmain_info *info = bitmain->device_data;
  1167. free(bitmain->works);
  1168. bitmain->works = calloc(BITMAIN_MAX_WORK_NUM * sizeof(struct work *),
  1169. BITMAIN_ARRAY_SIZE);
  1170. if (!bitmain->works)
  1171. quit(1, "Failed to calloc bitmain works in bitmain_prepare");
  1172. info->thr = thr;
  1173. mutex_init(&info->lock);
  1174. mutex_init(&info->qlock);
  1175. if (unlikely(pthread_cond_init(&info->qcond, NULL)))
  1176. quit(1, "Failed to pthread_cond_init bitmain qcond");
  1177. if (pthread_create(&info->read_thr, NULL, bitmain_get_results, (void *)bitmain))
  1178. quit(1, "Failed to create bitmain read_thr");
  1179. bitmain_init(bitmain);
  1180. return true;
  1181. }
  1182. static int bitmain_initialize(struct cgpu_info *bitmain)
  1183. {
  1184. uint8_t data[BITMAIN_READBUF_SIZE];
  1185. struct bitmain_info *info = NULL;
  1186. int ret = 0;
  1187. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1188. int readlen = 0;
  1189. int sendlen = 0;
  1190. int trycount = 3;
  1191. struct timespec p;
  1192. struct bitmain_rxstatus_data rxstatusdata;
  1193. int i = 0, j = 0, m = 0, r = 0, statusok = 0;
  1194. uint32_t checkbit = 0x00000000;
  1195. int hwerror_eft = 0;
  1196. int beeper_ctrl = 1;
  1197. int tempover_ctrl = 1;
  1198. int home_mode = 0;
  1199. struct bitmain_packet_head packethead;
  1200. int asicnum = 0;
  1201. int mod = 0,tmp = 0;
  1202. /* Send reset, then check for result */
  1203. if(!bitmain) {
  1204. applog(LOG_WARNING, "bitmain_initialize cgpu_info is null");
  1205. return -1;
  1206. }
  1207. info = bitmain->device_data;
  1208. /* clear read buf */
  1209. ret = bitmain_read(bitmain, data, BITMAIN_READBUF_SIZE,
  1210. BITMAIN_RESET_TIMEOUT);
  1211. if(ret > 0) {
  1212. if (opt_debug) {
  1213. char hex[(ret * 2) + 1];
  1214. bin2hex(hex, data, ret);
  1215. applog(LOG_DEBUG, "BTM%d Clear Read(%d): %s", bitmain->device_id, ret, hex);
  1216. }
  1217. }
  1218. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *)sendbuf, 0, 1, 0, 0);
  1219. if(sendlen <= 0) {
  1220. applog(LOG_ERR, "bitmain_initialize bitmain_set_rxstatus error(%d)", sendlen);
  1221. return -1;
  1222. }
  1223. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1224. if (unlikely(ret == BTM_SEND_ERROR)) {
  1225. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1226. return -1;
  1227. }
  1228. while(trycount >= 0) {
  1229. ret = bitmain_read(bitmain, data+readlen, BITMAIN_READBUF_SIZE, BITMAIN_RESET_TIMEOUT);
  1230. if(ret > 0) {
  1231. readlen += ret;
  1232. if(readlen > BITMAIN_READ_SIZE) {
  1233. for(i = 0; i < readlen; i++) {
  1234. if(data[i] == 0xa1) {
  1235. if (opt_debug) {
  1236. char hex[(readlen * 2) + 1];
  1237. bin2hex(hex, data, readlen);
  1238. applog(LOG_DEBUG, "%s%d initset: get: %s", bitmain->drv->name, bitmain->device_id, hex);
  1239. }
  1240. memcpy(&packethead, data+i, sizeof(struct bitmain_packet_head));
  1241. packethead.length = htole16(packethead.length);
  1242. if(packethead.length > 1130) {
  1243. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d error", packethead.length+4);
  1244. continue;
  1245. }
  1246. if(readlen-i < packethead.length+4) {
  1247. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d<%d low", readlen-i, packethead.length+4);
  1248. continue;
  1249. }
  1250. if (bitmain_parse_rxstatus(data+i, packethead.length+4, &rxstatusdata) != 0) {
  1251. applog(LOG_ERR, "bitmain_initialize bitmain_parse_rxstatus error");
  1252. continue;
  1253. }
  1254. info->chain_num = rxstatusdata.chain_num;
  1255. info->fifo_space = rxstatusdata.fifo_space;
  1256. info->hw_version[0] = rxstatusdata.hw_version[0];
  1257. info->hw_version[1] = rxstatusdata.hw_version[1];
  1258. info->hw_version[2] = rxstatusdata.hw_version[2];
  1259. info->hw_version[3] = rxstatusdata.hw_version[3];
  1260. info->nonce_error = 0;
  1261. info->last_nonce_error = 0;
  1262. sprintf(info->g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  1263. applog(LOG_ERR, "bitmain_initialize rxstatus v(%d) chain(%d) fifo(%d) hwv1(%d) hwv2(%d) hwv3(%d) hwv4(%d) nerr(%d) freq=%d",
  1264. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  1265. rxstatusdata.nonce_error, info->frequency);
  1266. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  1267. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  1268. for(i = 0; i < rxstatusdata.chain_num; i++) {
  1269. info->chain_asic_num[i] = rxstatusdata.chain_asic_num[i];
  1270. memset(info->chain_asic_status_t[i], 0, 320);
  1271. j = 0;
  1272. mod = 0;
  1273. if(info->chain_asic_num[i] <= 0) {
  1274. asicnum = 0;
  1275. } else {
  1276. mod = info->chain_asic_num[i] % 32;
  1277. if(mod == 0) {
  1278. asicnum = info->chain_asic_num[i] / 32;
  1279. } else {
  1280. asicnum = info->chain_asic_num[i] / 32 + 1;
  1281. }
  1282. }
  1283. if(asicnum > 0) {
  1284. for(m = asicnum-1; m >= 0; m--) {
  1285. tmp = mod ? (32-mod):0;
  1286. for(r = tmp;r < 32;r++){
  1287. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  1288. info->chain_asic_status_t[i][j] = ' ';
  1289. j++;
  1290. }
  1291. checkbit = num2bit(r);
  1292. if(rxstatusdata.chain_asic_exist[i*8+m] & checkbit) {
  1293. if(rxstatusdata.chain_asic_status[i*8+m] & checkbit) {
  1294. info->chain_asic_status_t[i][j] = 'o';
  1295. } else {
  1296. info->chain_asic_status_t[i][j] = 'x';
  1297. }
  1298. } else {
  1299. info->chain_asic_status_t[i][j] = '-';
  1300. }
  1301. j++;
  1302. }
  1303. info->chain_asic_status_t[i][j] = ' ';
  1304. j++;
  1305. mod = 0;
  1306. }
  1307. }
  1308. applog(LOG_DEBUG, "bitmain_initialize chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  1309. i, info->chain_asic_num[i],
  1310. info->chain_asic_exist[i*8+0], info->chain_asic_exist[i*8+1], info->chain_asic_exist[i*8+2], info->chain_asic_exist[i*8+3], info->chain_asic_exist[i*8+4], info->chain_asic_exist[i*8+5], info->chain_asic_exist[i*8+6], info->chain_asic_exist[i*8+7],
  1311. info->chain_asic_status[i*8+0], info->chain_asic_status[i*8+1], info->chain_asic_status[i*8+2], info->chain_asic_status[i*8+3], info->chain_asic_status[i*8+4], info->chain_asic_status[i*8+5], info->chain_asic_status[i*8+6], info->chain_asic_status[i*8+7]);
  1312. applog(LOG_ERR, "bitmain_initialize chain(%d) asic_num=%d asic_status=%s", i, info->chain_asic_num[i], info->chain_asic_status_t[i]);
  1313. }
  1314. bitmain_update_temps(bitmain, info, &rxstatusdata);
  1315. statusok = 1;
  1316. break;
  1317. }
  1318. }
  1319. if(statusok) {
  1320. break;
  1321. }
  1322. }
  1323. }
  1324. trycount--;
  1325. p.tv_sec = 0;
  1326. p.tv_nsec = BITMAIN_RESET_PITCH;
  1327. nanosleep(&p, NULL);
  1328. }
  1329. p.tv_sec = 0;
  1330. p.tv_nsec = BITMAIN_RESET_PITCH;
  1331. nanosleep(&p, NULL);
  1332. cgtime(&info->last_status_time);
  1333. if(statusok) {
  1334. applog(LOG_ERR, "bitmain_initialize start send txconfig");
  1335. if(opt_bitmain_hwerror)
  1336. hwerror_eft = 1;
  1337. else
  1338. hwerror_eft = 0;
  1339. if(opt_bitmain_nobeeper)
  1340. beeper_ctrl = 0;
  1341. else
  1342. beeper_ctrl = 1;
  1343. if(opt_bitmain_notempoverctrl)
  1344. tempover_ctrl = 0;
  1345. else
  1346. tempover_ctrl = 1;
  1347. if(opt_bitmain_homemode)
  1348. home_mode= 1;
  1349. else
  1350. home_mode= 0;
  1351. sendlen = bitmain_set_txconfig((struct bitmain_txconfig_token *)sendbuf, 1, 1, 1, 1, 1, 0, 1, hwerror_eft, beeper_ctrl, tempover_ctrl,home_mode,
  1352. info->chain_num, info->asic_num, BITMAIN_DEFAULT_FAN_MAX_PWM, info->timeout,
  1353. info->frequency, info->voltage, 0, 0, 0x04, info->reg_data);
  1354. if(sendlen <= 0) {
  1355. applog(LOG_ERR, "bitmain_initialize bitmain_set_txconfig error(%d)", sendlen);
  1356. return -1;
  1357. }
  1358. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1359. if (unlikely(ret == BTM_SEND_ERROR)) {
  1360. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1361. return -1;
  1362. }
  1363. applog(LOG_WARNING, "BMM%d: InitSet succeeded", bitmain->device_id);
  1364. } else {
  1365. applog(LOG_WARNING, "BMS%d: InitSet error", bitmain->device_id);
  1366. return -1;
  1367. }
  1368. return 0;
  1369. }
  1370. static bool bitmain_detect_one(const char * devpath)
  1371. {
  1372. struct bitmain_info *info;
  1373. struct cgpu_info *bitmain;
  1374. int ret;
  1375. bitmain = btm_alloc_cgpu(&bitmain_drv, BITMAIN_MINER_THREADS);
  1376. info = bitmain->device_data;
  1377. drv_set_defaults(&bitmain_drv, bitmain_set_device_funcs_init, info, devpath, NULL, 1);
  1378. if (!btm_init(bitmain, devpath))
  1379. goto shin;
  1380. applog(LOG_ERR, "bitmain_detect_one btm init ok");
  1381. info->fan_pwm = BITMAIN_DEFAULT_FAN_MIN_PWM;
  1382. info->temp_max = 0;
  1383. /* This is for check the temp/fan every 3~4s */
  1384. info->temp_history_count = (4 / (float)((float)info->timeout * ((float)1.67/0x32))) + 1;
  1385. if (info->temp_history_count <= 0)
  1386. info->temp_history_count = 1;
  1387. info->temp_history_index = 0;
  1388. info->temp_sum = 0;
  1389. info->temp_old = 0;
  1390. if (!add_cgpu(bitmain))
  1391. goto unshin;
  1392. ret = bitmain_initialize(bitmain);
  1393. applog(LOG_ERR, "bitmain_detect_one stop bitmain_initialize %d", ret);
  1394. if (ret)
  1395. goto unshin;
  1396. info->errorcount = 0;
  1397. applog(LOG_ERR, "BitMain Detected: %s "
  1398. "(chain_num=%d asic_num=%d timeout=%d freq=%d-%s volt=%02x%02x-%s)",
  1399. bitmain->device_path, info->chain_num, info->asic_num, info->timeout,
  1400. info->frequency, info->frequency_t, info->voltage[0], info->voltage[1], info->voltage_t);
  1401. return true;
  1402. unshin:
  1403. btm_uninit(bitmain);
  1404. shin:
  1405. free(bitmain->device_data);
  1406. bitmain->device_data = NULL;
  1407. free(bitmain);
  1408. return false;
  1409. }
  1410. static int bitmain_detect_auto(void)
  1411. {
  1412. const char * const auto_bitmain_dev = "/dev/bitmain-asic";
  1413. applog(LOG_DEBUG, "BTM detect dev: %s", auto_bitmain_dev);
  1414. return bitmain_detect_one(auto_bitmain_dev) ? 1 : 0;
  1415. }
  1416. static void bitmain_detect()
  1417. {
  1418. generic_detect(&bitmain_drv, bitmain_detect_one, bitmain_detect_auto, GDF_REQUIRE_DNAME | GDF_DEFAULT_NOAUTO);
  1419. }
  1420. static void do_bitmain_close(struct thr_info *thr)
  1421. {
  1422. struct cgpu_info *bitmain = thr->cgpu;
  1423. struct bitmain_info *info = bitmain->device_data;
  1424. pthread_join(info->read_thr, NULL);
  1425. bitmain_running_reset(bitmain, info);
  1426. info->no_matching_work = 0;
  1427. }
  1428. /* We use a replacement algorithm to only remove references to work done from
  1429. * the buffer when we need the extra space for new work. */
  1430. static bool bitmain_fill(struct cgpu_info *bitmain)
  1431. {
  1432. struct bitmain_info *info = bitmain->device_data;
  1433. int subid, slot;
  1434. struct work *work;
  1435. bool ret = true;
  1436. int sendret = 0, sendcount = 0, neednum = 0, queuednum = 0, sendnum = 0, sendlen = 0;
  1437. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1438. int senderror = 0;
  1439. struct timeval now;
  1440. int timediff = 0;
  1441. //applog(LOG_DEBUG, "BTM bitmain_fill start--------");
  1442. mutex_lock(&info->qlock);
  1443. if(info->fifo_space <= 0) {
  1444. //applog(LOG_DEBUG, "BTM bitmain_fill fifo space empty--------");
  1445. ret = true;
  1446. goto out_unlock;
  1447. }
  1448. if (bitmain->queued >= BITMAIN_MAX_WORK_QUEUE_NUM) {
  1449. ret = true;
  1450. } else {
  1451. ret = false;
  1452. }
  1453. while(info->fifo_space > 0) {
  1454. neednum = info->fifo_space<BITMAIN_MAX_WORK_NUM?info->fifo_space:BITMAIN_MAX_WORK_NUM;
  1455. queuednum = bitmain->queued;
  1456. applog(LOG_DEBUG, "BTM: Work task queued(%d) fifo space(%d) needsend(%d)", queuednum, info->fifo_space, neednum);
  1457. if(queuednum < neednum) {
  1458. while(true) {
  1459. work = get_queued(bitmain);
  1460. if (unlikely(!work)) {
  1461. break;
  1462. } else {
  1463. applog(LOG_DEBUG, "BTM get work queued number:%d neednum:%d", queuednum, neednum);
  1464. subid = bitmain->queued++;
  1465. work->subid = subid;
  1466. slot = bitmain->work_array + subid;
  1467. if (slot > BITMAIN_ARRAY_SIZE) {
  1468. applog(LOG_DEBUG, "bitmain_fill array cyc %d", BITMAIN_ARRAY_SIZE);
  1469. slot = 0;
  1470. }
  1471. if (likely(bitmain->works[slot])) {
  1472. applog(LOG_DEBUG, "bitmain_fill work_completed %d", slot);
  1473. work_completed(bitmain, bitmain->works[slot]);
  1474. }
  1475. bitmain->works[slot] = work;
  1476. queuednum++;
  1477. if(queuednum >= neednum) {
  1478. break;
  1479. }
  1480. }
  1481. }
  1482. }
  1483. if(queuednum < BITMAIN_MAX_DEAL_QUEUE_NUM) {
  1484. if(queuednum < neednum) {
  1485. applog(LOG_DEBUG, "BTM: No enough work to send, queue num=%d", queuednum);
  1486. break;
  1487. }
  1488. }
  1489. sendnum = queuednum < neednum ? queuednum : neednum;
  1490. sendlen = bitmain_set_txtask(sendbuf, &(info->last_work_block), bitmain->works, BITMAIN_ARRAY_SIZE, bitmain->work_array, sendnum, &sendcount);
  1491. bitmain->queued -= sendnum;
  1492. info->send_full_space += sendnum;
  1493. if (bitmain->queued < 0)
  1494. bitmain->queued = 0;
  1495. if (bitmain->work_array + sendnum > BITMAIN_ARRAY_SIZE) {
  1496. bitmain->work_array = bitmain->work_array + sendnum-BITMAIN_ARRAY_SIZE;
  1497. } else {
  1498. bitmain->work_array += sendnum;
  1499. }
  1500. applog(LOG_DEBUG, "BTM: Send work array %d", bitmain->work_array);
  1501. if (sendlen > 0) {
  1502. info->fifo_space -= sendcount;
  1503. if (info->fifo_space < 0)
  1504. info->fifo_space = 0;
  1505. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1506. if (unlikely(sendret == BTM_SEND_ERROR)) {
  1507. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  1508. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  1509. info->reset = true;
  1510. info->errorcount++;
  1511. senderror = 1;
  1512. if (info->errorcount > 1000) {
  1513. info->errorcount = 0;
  1514. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  1515. bitmain->shutdown = true;
  1516. }
  1517. break;
  1518. } else {
  1519. applog(LOG_DEBUG, "bitmain_send_data send ret=%d", sendret);
  1520. info->errorcount = 0;
  1521. }
  1522. } else {
  1523. applog(LOG_DEBUG, "BTM: Send work bitmain_set_txtask error: %d", sendlen);
  1524. break;
  1525. }
  1526. }
  1527. out_unlock:
  1528. cgtime(&now);
  1529. timediff = now.tv_sec - info->last_status_time.tv_sec;
  1530. if(timediff < 0) timediff = -timediff;
  1531. if (timediff > BITMAIN_SEND_STATUS_TIME) {
  1532. applog(LOG_DEBUG, "BTM: Send RX Status Token fifo_space(%d) timediff(%d)", info->fifo_space, timediff);
  1533. copy_time(&(info->last_status_time), &now);
  1534. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *) sendbuf, 0, 0, 0, 0);
  1535. if (sendlen > 0) {
  1536. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1537. if (unlikely(sendret == BTM_SEND_ERROR)) {
  1538. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  1539. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  1540. info->reset = true;
  1541. info->errorcount++;
  1542. senderror = 1;
  1543. if (info->errorcount > 1000) {
  1544. info->errorcount = 0;
  1545. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  1546. bitmain->shutdown = true;
  1547. }
  1548. } else {
  1549. info->errorcount = 0;
  1550. if (info->fifo_space <= 0) {
  1551. senderror = 1;
  1552. }
  1553. }
  1554. }
  1555. }
  1556. if(info->send_full_space > BITMAIN_SEND_FULL_SPACE) {
  1557. info->send_full_space = 0;
  1558. ret = true;
  1559. cgsleep_ms(1);
  1560. }
  1561. mutex_unlock(&info->qlock);
  1562. if(senderror) {
  1563. ret = true;
  1564. applog(LOG_DEBUG, "bitmain_fill send task sleep");
  1565. //cgsleep_ms(1);
  1566. }
  1567. return ret;
  1568. }
  1569. static int64_t bitmain_scanhash(struct thr_info *thr)
  1570. {
  1571. struct cgpu_info *bitmain = thr->cgpu;
  1572. struct bitmain_info *info = bitmain->device_data;
  1573. const int chain_num = info->chain_num;
  1574. int64_t hash_count;
  1575. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock start");
  1576. mutex_lock(&info->qlock);
  1577. hash_count = 0xffffffffull * (uint64_t)info->nonces;
  1578. bitmain->results += info->nonces + info->idle;
  1579. if (bitmain->results > chain_num)
  1580. bitmain->results = chain_num;
  1581. if (!info->reset)
  1582. bitmain->results--;
  1583. info->nonces = info->idle = 0;
  1584. mutex_unlock(&info->qlock);
  1585. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock stop");
  1586. /* Check for nothing but consecutive bad results or consistently less
  1587. * results than we should be getting and reset the FPGA if necessary */
  1588. //if (bitmain->results < -chain_num && !info->reset) {
  1589. // applog(LOG_ERR, "BTM%d: Result return rate low, resetting!",
  1590. // bitmain->device_id);
  1591. // info->reset = true;
  1592. //}
  1593. /* This hashmeter is just a utility counter based on returned shares */
  1594. return hash_count;
  1595. }
  1596. static void bitmain_flush_work(struct cgpu_info *bitmain)
  1597. {
  1598. struct bitmain_info *info = bitmain->device_data;
  1599. mutex_lock(&info->qlock);
  1600. /* Will overwrite any work queued */
  1601. applog(LOG_ERR, "bitmain_flush_work queued=%d array=%d", bitmain->queued, bitmain->work_array);
  1602. if(bitmain->queued > 0) {
  1603. if (bitmain->work_array + bitmain->queued > BITMAIN_ARRAY_SIZE) {
  1604. bitmain->work_array = bitmain->work_array + bitmain->queued-BITMAIN_ARRAY_SIZE;
  1605. } else {
  1606. bitmain->work_array += bitmain->queued;
  1607. }
  1608. }
  1609. bitmain->queued = 0;
  1610. //bitmain->work_array = 0;
  1611. //for (int i = 0; i < BITMAIN_ARRAY_SIZE; ++i) {
  1612. // bitmain->works[i] = NULL;
  1613. //}
  1614. //pthread_cond_signal(&info->qcond);
  1615. mutex_unlock(&info->qlock);
  1616. }
  1617. static struct api_data *bitmain_api_stats(struct cgpu_info *cgpu)
  1618. {
  1619. struct api_data *root = NULL;
  1620. struct bitmain_info *info = cgpu->device_data;
  1621. double hwp = (cgpu->hw_errors + cgpu->diff1) ?
  1622. (double)(cgpu->hw_errors) / (double)(cgpu->hw_errors + cgpu->diff1) : 0;
  1623. root = api_add_int(root, "baud", &(info->baud), false);
  1624. root = api_add_int(root, "miner_count", &(info->chain_num), false);
  1625. root = api_add_int(root, "asic_count", &(info->asic_num), false);
  1626. root = api_add_int(root, "timeout", &(info->timeout), false);
  1627. root = api_add_string(root, "frequency", info->frequency_t, false);
  1628. root = api_add_string(root, "voltage", info->voltage_t, false);
  1629. root = api_add_int(root, "hwv1", &(info->hw_version[0]), false);
  1630. root = api_add_int(root, "hwv2", &(info->hw_version[1]), false);
  1631. root = api_add_int(root, "hwv3", &(info->hw_version[2]), false);
  1632. root = api_add_int(root, "hwv4", &(info->hw_version[3]), false);
  1633. root = api_add_int(root, "fan_num", &(info->fan_num), false);
  1634. root = api_add_int(root, "fan1", &(info->fan[0]), false);
  1635. root = api_add_int(root, "fan2", &(info->fan[1]), false);
  1636. root = api_add_int(root, "fan3", &(info->fan[2]), false);
  1637. root = api_add_int(root, "fan4", &(info->fan[3]), false);
  1638. root = api_add_int(root, "fan5", &(info->fan[4]), false);
  1639. root = api_add_int(root, "fan6", &(info->fan[5]), false);
  1640. root = api_add_int(root, "fan7", &(info->fan[6]), false);
  1641. root = api_add_int(root, "fan8", &(info->fan[7]), false);
  1642. root = api_add_int(root, "fan9", &(info->fan[8]), false);
  1643. root = api_add_int(root, "fan10", &(info->fan[9]), false);
  1644. root = api_add_int(root, "fan11", &(info->fan[10]), false);
  1645. root = api_add_int(root, "fan12", &(info->fan[11]), false);
  1646. root = api_add_int(root, "fan13", &(info->fan[12]), false);
  1647. root = api_add_int(root, "fan14", &(info->fan[13]), false);
  1648. root = api_add_int(root, "fan15", &(info->fan[14]), false);
  1649. root = api_add_int(root, "fan16", &(info->fan[15]), false);
  1650. root = api_add_int(root, "temp_num", &(info->temp_num), false);
  1651. root = api_add_int(root, "temp1", &(info->temp[0]), false);
  1652. root = api_add_int(root, "temp2", &(info->temp[1]), false);
  1653. root = api_add_int(root, "temp3", &(info->temp[2]), false);
  1654. root = api_add_int(root, "temp4", &(info->temp[3]), false);
  1655. root = api_add_int(root, "temp5", &(info->temp[4]), false);
  1656. root = api_add_int(root, "temp6", &(info->temp[5]), false);
  1657. root = api_add_int(root, "temp7", &(info->temp[6]), false);
  1658. root = api_add_int(root, "temp8", &(info->temp[7]), false);
  1659. root = api_add_int(root, "temp9", &(info->temp[8]), false);
  1660. root = api_add_int(root, "temp10", &(info->temp[9]), false);
  1661. root = api_add_int(root, "temp11", &(info->temp[10]), false);
  1662. root = api_add_int(root, "temp12", &(info->temp[11]), false);
  1663. root = api_add_int(root, "temp13", &(info->temp[12]), false);
  1664. root = api_add_int(root, "temp14", &(info->temp[13]), false);
  1665. root = api_add_int(root, "temp15", &(info->temp[14]), false);
  1666. root = api_add_int(root, "temp16", &(info->temp[15]), false);
  1667. root = api_add_int(root, "temp_avg", &(info->temp_avg), false);
  1668. root = api_add_int(root, "temp_max", &(info->temp_max), false);
  1669. root = api_add_percent(root, "Device Hardware%", &hwp, true);
  1670. root = api_add_int(root, "no_matching_work", &(info->no_matching_work), false);
  1671. /*
  1672. for (int i = 0; i < info->chain_num; ++i) {
  1673. char mcw[24];
  1674. sprintf(mcw, "match_work_count%d", i + 1);
  1675. root = api_add_int(root, mcw, &(info->matching_work[i]), false);
  1676. }*/
  1677. root = api_add_int(root, "chain_acn1", &(info->chain_asic_num[0]), false);
  1678. root = api_add_int(root, "chain_acn2", &(info->chain_asic_num[1]), false);
  1679. root = api_add_int(root, "chain_acn3", &(info->chain_asic_num[2]), false);
  1680. root = api_add_int(root, "chain_acn4", &(info->chain_asic_num[3]), false);
  1681. root = api_add_int(root, "chain_acn5", &(info->chain_asic_num[4]), false);
  1682. root = api_add_int(root, "chain_acn6", &(info->chain_asic_num[5]), false);
  1683. root = api_add_int(root, "chain_acn7", &(info->chain_asic_num[6]), false);
  1684. root = api_add_int(root, "chain_acn8", &(info->chain_asic_num[7]), false);
  1685. root = api_add_int(root, "chain_acn9", &(info->chain_asic_num[8]), false);
  1686. root = api_add_int(root, "chain_acn10", &(info->chain_asic_num[9]), false);
  1687. root = api_add_int(root, "chain_acn11", &(info->chain_asic_num[10]), false);
  1688. root = api_add_int(root, "chain_acn12", &(info->chain_asic_num[11]), false);
  1689. root = api_add_int(root, "chain_acn13", &(info->chain_asic_num[12]), false);
  1690. root = api_add_int(root, "chain_acn14", &(info->chain_asic_num[13]), false);
  1691. root = api_add_int(root, "chain_acn15", &(info->chain_asic_num[14]), false);
  1692. root = api_add_int(root, "chain_acn16", &(info->chain_asic_num[15]), false);
  1693. //applog(LOG_ERR, "chain asic status:%s", info->chain_asic_status_t[0]);
  1694. root = api_add_string(root, "chain_acs1", info->chain_asic_status_t[0], false);
  1695. root = api_add_string(root, "chain_acs2", info->chain_asic_status_t[1], false);
  1696. root = api_add_string(root, "chain_acs3", info->chain_asic_status_t[2], false);
  1697. root = api_add_string(root, "chain_acs4", info->chain_asic_status_t[3], false);
  1698. root = api_add_string(root, "chain_acs5", info->chain_asic_status_t[4], false);
  1699. root = api_add_string(root, "chain_acs6", info->chain_asic_status_t[5], false);
  1700. root = api_add_string(root, "chain_acs7", info->chain_asic_status_t[6], false);
  1701. root = api_add_string(root, "chain_acs8", info->chain_asic_status_t[7], false);
  1702. root = api_add_string(root, "chain_acs9", info->chain_asic_status_t[8], false);
  1703. root = api_add_string(root, "chain_acs10", info->chain_asic_status_t[9], false);
  1704. root = api_add_string(root, "chain_acs11", info->chain_asic_status_t[10], false);
  1705. root = api_add_string(root, "chain_acs12", info->chain_asic_status_t[11], false);
  1706. root = api_add_string(root, "chain_acs13", info->chain_asic_status_t[12], false);
  1707. root = api_add_string(root, "chain_acs14", info->chain_asic_status_t[13], false);
  1708. root = api_add_string(root, "chain_acs15", info->chain_asic_status_t[14], false);
  1709. root = api_add_string(root, "chain_acs16", info->chain_asic_status_t[15], false);
  1710. //root = api_add_int(root, "chain_acs1", &(info->chain_asic_status[0]), false);
  1711. //root = api_add_int(root, "chain_acs2", &(info->chain_asic_status[1]), false);
  1712. //root = api_add_int(root, "chain_acs3", &(info->chain_asic_status[2]), false);
  1713. //root = api_add_int(root, "chain_acs4", &(info->chain_asic_status[3]), false);
  1714. return root;
  1715. }
  1716. static void bitmain_shutdown(struct thr_info *thr)
  1717. {
  1718. do_bitmain_close(thr);
  1719. }
  1720. static
  1721. const char *bitmain_set_baud(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1722. {
  1723. struct bitmain_info *info = proc->device_data;
  1724. const int baud = atoi(newvalue);
  1725. if (!valid_baud(baud))
  1726. return "Invalid baud setting";
  1727. info->baud = baud;
  1728. return NULL;
  1729. }
  1730. static
  1731. const char *bitmain_set_layout(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1732. {
  1733. struct bitmain_info *info = proc->device_data;
  1734. char *endptr, *next_field;
  1735. const long int n_chains = strtol(newvalue, &endptr, 0);
  1736. if (endptr == newvalue || n_chains < 1)
  1737. return "Missing chain count";
  1738. long int n_asics = 0;
  1739. if (endptr[0] == ':' || endptr[1] == ',')
  1740. {
  1741. next_field = &endptr[1];
  1742. n_asics = strtol(next_field, &endptr, 0);
  1743. }
  1744. if (n_asics < 1)
  1745. return "Missing ASIC count";
  1746. if (n_asics > BITMAIN_DEFAULT_ASIC_NUM)
  1747. return "ASIC count too high";
  1748. info->chain_num = n_chains;
  1749. info->asic_num = n_asics;
  1750. return NULL;
  1751. }
  1752. static
  1753. const char *bitmain_set_timeout(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1754. {
  1755. struct bitmain_info *info = proc->device_data;
  1756. const int timeout = atoi(newvalue);
  1757. if (timeout < 0 || timeout > 0xff)
  1758. return "Invalid timeout setting";
  1759. info->timeout = timeout;
  1760. return NULL;
  1761. }
  1762. static
  1763. const char *bitmain_set_clock(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1764. {
  1765. struct bitmain_info *info = proc->device_data;
  1766. const int freq = atoi(newvalue);
  1767. if (freq < BITMAIN_MIN_FREQUENCY || freq > BITMAIN_MAX_FREQUENCY)
  1768. return "Invalid clock frequency";
  1769. info->frequency = freq;
  1770. sprintf(info->frequency_t, "%d", freq);
  1771. return NULL;
  1772. }
  1773. static
  1774. const char *bitmain_set_reg_data(struct cgpu_info * const proc, const char * const optname, const char *newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1775. {
  1776. struct bitmain_info *info = proc->device_data;
  1777. uint8_t reg_data[4] = {0};
  1778. if (newvalue[0] == 'x')
  1779. ++newvalue;
  1780. size_t nvlen = strlen(newvalue);
  1781. if (nvlen > (sizeof(reg_data) * 2) || !nvlen || nvlen % 2)
  1782. return "reg_data must be a hex string of 2-8 digits (1-4 bytes)";
  1783. if (!hex2bin(reg_data, newvalue, nvlen / 2))
  1784. return "Invalid reg data hex";
  1785. memcpy(info->reg_data, reg_data, sizeof(reg_data));
  1786. return NULL;
  1787. }
  1788. static
  1789. const char *bitmain_set_voltage(struct cgpu_info * const proc, const char * const optname, const char *newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1790. {
  1791. struct bitmain_info *info = proc->device_data;
  1792. uint8_t voltage_data[2] = {0};
  1793. if (newvalue[0] == 'x')
  1794. ++newvalue;
  1795. else
  1796. voltage_usage:
  1797. return "voltage must be 'x' followed by a hex string of 1-4 digits (1-2 bytes)";
  1798. size_t nvlen = strlen(newvalue);
  1799. if (nvlen > (sizeof(voltage_data) * 2) || !nvlen || nvlen % 2)
  1800. goto voltage_usage;
  1801. if (!hex2bin(voltage_data, newvalue, nvlen / 2))
  1802. return "Invalid voltage data hex";
  1803. memcpy(info->voltage, voltage_data, sizeof(voltage_data));
  1804. bin2hex(info->voltage_t, voltage_data, 2);
  1805. info->voltage_t[5] = 0;
  1806. info->voltage_t[4] = info->voltage_t[3];
  1807. info->voltage_t[3] = info->voltage_t[2];
  1808. info->voltage_t[2] = info->voltage_t[1];
  1809. info->voltage_t[1] = '.';
  1810. return NULL;
  1811. }
  1812. static const struct bfg_set_device_definition bitmain_set_device_funcs_init[] = {
  1813. {"baud", bitmain_set_baud, "serial baud rate"},
  1814. {"layout", bitmain_set_layout, "number of chains ':' number of ASICs per chain (eg: 32:8)"},
  1815. {"timeout", bitmain_set_timeout, "timeout"},
  1816. {"clock", bitmain_set_clock, "clock frequency"},
  1817. {"reg_data", bitmain_set_reg_data, "reg_data (eg: x0d82)"},
  1818. {"voltage", bitmain_set_voltage, "voltage (must be specified as 'x' and hex data; eg: x0725)"},
  1819. {NULL},
  1820. };
  1821. struct device_drv bitmain_drv = {
  1822. .dname = "bitmain",
  1823. .name = "BTM",
  1824. .drv_detect = bitmain_detect,
  1825. .thread_prepare = bitmain_prepare,
  1826. .minerloop = hash_queued_work,
  1827. .queue_full = bitmain_fill,
  1828. .scanwork = bitmain_scanhash,
  1829. .flush_work = bitmain_flush_work,
  1830. .get_api_stats = bitmain_api_stats,
  1831. .reinit_device = bitmain_init,
  1832. .thread_shutdown = bitmain_shutdown,
  1833. };