driver-hashfast.c 16 KB

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  1. /*
  2. * Copyright 2013 Luke Dashjr
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 3 of the License, or (at your option)
  7. * any later version. See COPYING for more details.
  8. */
  9. #include "config.h"
  10. #include <stdbool.h>
  11. #include <stdint.h>
  12. #include <stdlib.h>
  13. #include <string.h>
  14. #include <unistd.h>
  15. #include <utlist.h>
  16. #include "deviceapi.h"
  17. #include "logging.h"
  18. #include "lowlevel.h"
  19. #include "lowl-vcom.h"
  20. #include "util.h"
  21. BFG_REGISTER_DRIVER(hashfast_ums_drv)
  22. #define HASHFAST_QUEUE_MEMORY 0x20
  23. #define HASHFAST_ALL_CHIPS 0xff
  24. #define HASHFAST_ALL_CORES 0xff
  25. #define HASHFAST_HEADER_SIZE 8
  26. #define HASHFAST_MAX_DATA 0x3fc
  27. #define HASHFAST_HASH_SIZE (0x20 + 0xc + 4 + 4 + 2 + 1 + 1)
  28. enum hashfast_opcode {
  29. HFOP_NULL = 0,
  30. HFOP_ROOT = 1,
  31. HFOP_RESET = 2,
  32. HFOP_PLL_CONFIG = 3,
  33. HFOP_ADDRESS = 4,
  34. HFOP_READDRESS = 5,
  35. HFOP_HIGHEST = 6,
  36. HFOP_BAUD = 7,
  37. HFOP_UNROOT = 8,
  38. HFOP_HASH = 9,
  39. HFOP_NONCE = 0x0a,
  40. HFOP_ABORT = 0x0b,
  41. HFOP_STATUS = 0x0c,
  42. HFOP_GPIO = 0x0d,
  43. HFOP_CONFIG = 0x0e,
  44. HFOP_STATISTICS = 0x0f,
  45. HFOP_GROUP = 0x10,
  46. HFOP_CLOCKGATE = 0x11,
  47. HFOP_USB_INIT = 0x80,
  48. HFOP_GET_TRACE = 0x81,
  49. HFOP_LOOPBACK_USB = 0x82,
  50. HFOP_LOOPBACK_UART = 0x83,
  51. HFOP_DFU = 0x84,
  52. HFOP_USB_SHUTDOWN = 0x85,
  53. HFOP_DIE_STATUS = 0x86,
  54. HFOP_GWQ_STATUS = 0x87,
  55. HFOP_WORK_RESTART = 0x88,
  56. HFOP_USB_STATS1 = 0x89,
  57. HFOP_USB_GWQSTATS = 0x8a,
  58. HFOP_USB_NOTICE = 0x8b,
  59. HFOP_USB_DEBUG = 0xff,
  60. };
  61. typedef unsigned long hashfast_isn_t;
  62. struct hashfast_parsed_msg {
  63. uint8_t opcode;
  64. uint8_t chipaddr;
  65. uint8_t coreaddr;
  66. uint16_t hdata;
  67. uint8_t data[HASHFAST_MAX_DATA];
  68. size_t datalen;
  69. };
  70. static
  71. ssize_t hashfast_write(const int fd, void * const buf, size_t bufsz)
  72. {
  73. const ssize_t rv = write(fd, buf, bufsz);
  74. if (opt_debug && opt_dev_protocol)
  75. {
  76. char hex[(bufsz * 2) + 1];
  77. bin2hex(hex, buf, bufsz);
  78. if (rv < 0)
  79. applog(LOG_DEBUG, "%s fd=%d: SEND (%s) => %d",
  80. "hashfast", fd, hex, (int)rv);
  81. else
  82. if (rv < bufsz)
  83. applog(LOG_DEBUG, "%s fd=%d: SEND %.*s(%s)",
  84. "hashfast", fd, rv * 2, hex, &hex[rv * 2]);
  85. else
  86. if (rv > bufsz)
  87. applog(LOG_DEBUG, "%s fd=%d: SEND %s => +%d",
  88. "hashfast", fd, hex, (int)(rv - bufsz));
  89. else
  90. applog(LOG_DEBUG, "%s fd=%d: SEND %s",
  91. "hashfast", fd, hex);
  92. }
  93. return rv;
  94. }
  95. static
  96. ssize_t hashfast_read(const int fd, void * const buf, size_t bufsz)
  97. {
  98. const ssize_t rv = serial_read(fd, buf, bufsz);
  99. if (opt_debug && opt_dev_protocol && rv)
  100. {
  101. char hex[(rv * 2) + 1];
  102. bin2hex(hex, buf, rv);
  103. applog(LOG_DEBUG, "%s fd=%d: RECV %s",
  104. "hashfast", fd, hex);
  105. }
  106. return rv;
  107. }
  108. static
  109. bool hashfast_prepare_msg(uint8_t * const buf, const uint8_t opcode, const uint8_t chipaddr, const uint8_t coreaddr, const uint16_t hdata, const size_t datalen)
  110. {
  111. buf[0] = '\xaa';
  112. buf[1] = opcode;
  113. buf[2] = chipaddr;
  114. buf[3] = coreaddr;
  115. buf[4] = hdata & 0xff;
  116. buf[5] = hdata >> 8;
  117. if (datalen > 1020 || datalen % 4)
  118. return false;
  119. buf[6] = datalen / 4;
  120. buf[7] = crc8ccitt(&buf[1], 6);
  121. return true;
  122. }
  123. static
  124. bool hashfast_send_msg(const int fd, uint8_t * const buf, const uint8_t opcode, const uint8_t chipaddr, const uint8_t coreaddr, const uint16_t hdata, const size_t datalen)
  125. {
  126. if (!hashfast_prepare_msg(buf, opcode, chipaddr, coreaddr, hdata, datalen))
  127. return false;
  128. const size_t buflen = HASHFAST_HEADER_SIZE + datalen;
  129. return (buflen == hashfast_write(fd, buf, buflen));
  130. }
  131. static
  132. bool hashfast_parse_msg(const int fd, struct hashfast_parsed_msg * const out_msg)
  133. {
  134. uint8_t buf[HASHFAST_HEADER_SIZE];
  135. startover:
  136. if (HASHFAST_HEADER_SIZE != hashfast_read(fd, buf, HASHFAST_HEADER_SIZE))
  137. return false;
  138. uint8_t *p = memchr(buf, '\xaa', HASHFAST_HEADER_SIZE);
  139. if (p != buf)
  140. {
  141. ignoresome:
  142. if (!p)
  143. goto startover;
  144. int moreneeded = p - buf;
  145. int alreadyhave = HASHFAST_HEADER_SIZE - moreneeded;
  146. memmove(buf, p, alreadyhave);
  147. if (moreneeded != hashfast_read(fd, &buf[alreadyhave], moreneeded))
  148. return false;
  149. }
  150. const uint8_t correct_crc8 = crc8ccitt(&buf[1], 6);
  151. if (buf[7] != correct_crc8)
  152. {
  153. p = memchr(&buf[1], '\xaa', HASHFAST_HEADER_SIZE - 1);
  154. goto ignoresome;
  155. }
  156. out_msg->opcode = buf[1];
  157. out_msg->chipaddr = buf[2];
  158. out_msg->coreaddr = buf[3];
  159. out_msg->hdata = (uint16_t)buf[4] | ((uint16_t)buf[5] << 8);
  160. out_msg->datalen = buf[6] * 4;
  161. return (out_msg->datalen == hashfast_read(fd, &out_msg->data[0], out_msg->datalen));
  162. }
  163. static
  164. bool hashfast_lowl_match(const struct lowlevel_device_info * const info)
  165. {
  166. if (!lowlevel_match_id(info, &lowl_vcom, 0, 0))
  167. return false;
  168. return (info->manufacturer && strstr(info->manufacturer, "HashFast"));
  169. }
  170. static
  171. bool hashfast_detect_one(const char * const devpath)
  172. {
  173. uint16_t clock = 550;
  174. uint8_t buf[HASHFAST_HEADER_SIZE];
  175. const int fd = serial_open(devpath, 0, 100, true);
  176. if (fd == -1)
  177. {
  178. applog(LOG_DEBUG, "%s: Failed to open %s", __func__, devpath);
  179. return false;
  180. }
  181. struct hashfast_parsed_msg * const pmsg = malloc(sizeof(*pmsg));
  182. hashfast_send_msg(fd, buf, HFOP_USB_INIT, 0, 0, clock, 0);
  183. do {
  184. if (!hashfast_parse_msg(fd, pmsg))
  185. {
  186. applog(LOG_DEBUG, "%s: Failed to parse response on %s",
  187. __func__, devpath);
  188. serial_close(fd);
  189. goto err;
  190. }
  191. } while (pmsg->opcode != HFOP_USB_INIT);
  192. serial_close(fd);
  193. const int expectlen = 0x20 + (pmsg->chipaddr * pmsg->coreaddr) / 8;
  194. if (pmsg->datalen < expectlen)
  195. {
  196. applog(LOG_DEBUG, "%s: USB_INIT response too short on %s (%d < %d)",
  197. __func__, devpath, (int)pmsg->datalen, expectlen);
  198. goto err;
  199. }
  200. if (pmsg->data[8] != 0)
  201. {
  202. applog(LOG_DEBUG, "%s: USB_INIT failed on %s (err=%d)",
  203. __func__, devpath, pmsg->data[8]);
  204. goto err;
  205. }
  206. struct cgpu_info * const cgpu = malloc(sizeof(*cgpu));
  207. *cgpu = (struct cgpu_info){
  208. .drv = &hashfast_ums_drv,
  209. .device_path = strdup(devpath),
  210. .deven = DEV_ENABLED,
  211. .procs = (pmsg->chipaddr * pmsg->coreaddr),
  212. .threads = 1,
  213. .device_data = pmsg,
  214. };
  215. return add_cgpu(cgpu);
  216. err:
  217. free(pmsg);
  218. return false;
  219. }
  220. static
  221. bool hashfast_lowl_probe(const struct lowlevel_device_info * const info)
  222. {
  223. return vcom_lowl_probe_wrapper(info, hashfast_detect_one);
  224. }
  225. struct hashfast_dev_state {
  226. uint8_t cores_per_chip;
  227. int fd;
  228. struct hashfast_chip_state *chipstates;
  229. };
  230. struct hashfast_chip_state {
  231. struct cgpu_info **coreprocs;
  232. hashfast_isn_t last_isn;
  233. };
  234. struct hashfast_core_state {
  235. uint8_t chipaddr;
  236. uint8_t coreaddr;
  237. int next_device_id;
  238. uint8_t last_seq;
  239. hashfast_isn_t last_isn;
  240. hashfast_isn_t last2_isn;
  241. bool has_pending;
  242. unsigned queued;
  243. };
  244. static
  245. bool hashfast_init(struct thr_info * const master_thr)
  246. {
  247. struct cgpu_info * const dev = master_thr->cgpu, *proc;
  248. struct hashfast_parsed_msg * const pmsg = dev->device_data;
  249. struct hashfast_dev_state * const devstate = malloc(sizeof(*devstate));
  250. struct hashfast_chip_state * const chipstates = malloc(sizeof(*chipstates) * pmsg->chipaddr), *chipstate;
  251. struct hashfast_core_state * const corestates = malloc(sizeof(*corestates) * dev->procs), *cs;
  252. int i;
  253. *devstate = (struct hashfast_dev_state){
  254. .chipstates = chipstates,
  255. .cores_per_chip = pmsg->coreaddr,
  256. .fd = serial_open(dev->device_path, 0, 1, true),
  257. };
  258. for (i = 0; i < pmsg->chipaddr; ++i)
  259. {
  260. chipstate = &chipstates[i];
  261. *chipstate = (struct hashfast_chip_state){
  262. .coreprocs = malloc(sizeof(struct cgpu_info *) * pmsg->coreaddr),
  263. };
  264. }
  265. for ((i = 0), (proc = dev); proc; ++i, (proc = proc->next_proc))
  266. {
  267. struct thr_info * const thr = proc->thr[0];
  268. const bool core_is_working = pmsg->data[0x20 + (i / 8)] & (1 << (i % 8));
  269. if (!core_is_working)
  270. proc->deven = DEV_RECOVER_DRV;
  271. proc->device_data = devstate;
  272. thr->cgpu_data = cs = &corestates[i];
  273. *cs = (struct hashfast_core_state){
  274. .chipaddr = i / pmsg->coreaddr,
  275. .coreaddr = i % pmsg->coreaddr,
  276. };
  277. chipstates[cs->chipaddr].coreprocs[cs->coreaddr] = proc;
  278. }
  279. free(pmsg);
  280. // TODO: actual clock = [12,13]
  281. timer_set_now(&master_thr->tv_poll);
  282. return true;
  283. }
  284. static
  285. bool hashfast_queue_append(struct thr_info * const thr, struct work * const work)
  286. {
  287. struct cgpu_info * const proc = thr->cgpu;
  288. struct hashfast_dev_state * const devstate = proc->device_data;
  289. const int fd = devstate->fd;
  290. struct hashfast_core_state * const cs = thr->cgpu_data;
  291. struct hashfast_chip_state * const chipstate = &devstate->chipstates[cs->chipaddr];
  292. const size_t cmdlen = HASHFAST_HEADER_SIZE + HASHFAST_HASH_SIZE;
  293. uint8_t cmd[cmdlen];
  294. uint8_t * const hashdata = &cmd[HASHFAST_HEADER_SIZE];
  295. hashfast_isn_t isn;
  296. uint8_t seq;
  297. if (cs->has_pending)
  298. {
  299. thr->queue_full = true;
  300. return false;
  301. }
  302. isn = ++chipstate->last_isn;
  303. seq = ++cs->last_seq;
  304. work->device_id = seq;
  305. cs->last2_isn = cs->last_isn;
  306. cs->last_isn = isn;
  307. hashfast_prepare_msg(cmd, HFOP_HASH, cs->chipaddr, cs->coreaddr, (cs->coreaddr << 8) | seq, 56);
  308. memcpy(&hashdata[ 0], work->midstate, 0x20);
  309. memcpy(&hashdata[0x20], &work->data[64], 0xc);
  310. memset(&hashdata[0x2c], '\0', 0xa); // starting_nonce, nonce_loops, ntime_loops
  311. hashdata[0x36] = 32; // search target (number of zero bits)
  312. hashdata[0x37] = 0;
  313. cs->has_pending = true;
  314. if (cmdlen != hashfast_write(fd, cmd, cmdlen))
  315. return false;
  316. DL_APPEND(thr->work, work);
  317. if (cs->queued > HASHFAST_QUEUE_MEMORY)
  318. {
  319. struct work * const old_work = thr->work;
  320. DL_DELETE(thr->work, old_work);
  321. free_work(old_work);
  322. }
  323. else
  324. ++cs->queued;
  325. return true;
  326. }
  327. static
  328. void hashfast_queue_flush(struct thr_info * const thr)
  329. {
  330. struct cgpu_info * const proc = thr->cgpu;
  331. struct hashfast_dev_state * const devstate = proc->device_data;
  332. const int fd = devstate->fd;
  333. struct hashfast_core_state * const cs = thr->cgpu_data;
  334. uint8_t cmd[HASHFAST_HEADER_SIZE];
  335. uint16_t hdata = 2;
  336. if ((!thr->work) || stale_work(thr->work->prev, true))
  337. {
  338. applog(LOG_DEBUG, "%"PRIpreprv": Flushing both active and pending work",
  339. proc->proc_repr);
  340. hdata |= 1;
  341. }
  342. else
  343. applog(LOG_DEBUG, "%"PRIpreprv": Flushing pending work",
  344. proc->proc_repr);
  345. hashfast_send_msg(fd, cmd, HFOP_ABORT, cs->chipaddr, cs->coreaddr, hdata, 0);
  346. }
  347. static
  348. struct cgpu_info *hashfast_find_proc(struct thr_info * const master_thr, int chipaddr, int coreaddr)
  349. {
  350. struct cgpu_info *proc = master_thr->cgpu;
  351. struct hashfast_dev_state * const devstate = proc->device_data;
  352. if (coreaddr >= devstate->cores_per_chip)
  353. return NULL;
  354. const unsigned chip_count = proc->procs / devstate->cores_per_chip;
  355. if (chipaddr >= chip_count)
  356. return NULL;
  357. struct hashfast_chip_state * const chipstate = &devstate->chipstates[chipaddr];
  358. return chipstate->coreprocs[coreaddr];
  359. }
  360. static
  361. hashfast_isn_t hashfast_get_isn(struct hashfast_chip_state * const chipstate, uint16_t hfseq)
  362. {
  363. const uint8_t coreaddr = hfseq >> 8;
  364. const uint8_t seq = hfseq & 0xff;
  365. struct cgpu_info * const proc = chipstate->coreprocs[coreaddr];
  366. struct thr_info * const thr = proc->thr[0];
  367. struct hashfast_core_state * const cs = thr->cgpu_data;
  368. if (cs->last_seq == seq)
  369. return cs->last_isn;
  370. if (cs->last_seq == (uint8_t)(seq + 1))
  371. return cs->last2_isn;
  372. return 0;
  373. }
  374. static
  375. void hashfast_submit_nonce(struct thr_info * const thr, struct work * const work, const uint32_t nonce, const bool searched)
  376. {
  377. struct cgpu_info * const proc = thr->cgpu;
  378. struct hashfast_core_state * const cs = thr->cgpu_data;
  379. applog(LOG_DEBUG, "%"PRIpreprv": Found nonce for seq %02x (last=%02x): %08lx%s",
  380. proc->proc_repr, (unsigned)work->device_id, (unsigned)cs->last_seq,
  381. (unsigned long)nonce, searched ? " (searched)" : "");
  382. submit_nonce(thr, work, nonce);
  383. }
  384. static
  385. bool hashfast_poll_msg(struct thr_info * const master_thr)
  386. {
  387. struct cgpu_info * const dev = master_thr->cgpu;
  388. struct hashfast_dev_state * const devstate = dev->device_data;
  389. const int fd = devstate->fd;
  390. struct hashfast_parsed_msg msg;
  391. if (!hashfast_parse_msg(fd, &msg))
  392. return false;
  393. switch (msg.opcode)
  394. {
  395. case HFOP_NONCE:
  396. {
  397. const uint8_t *data = msg.data;
  398. for (int i = msg.datalen / 8; i; --i, (data = &data[8]))
  399. {
  400. const uint32_t nonce = (data[0] << 0)
  401. | (data[1] << 8)
  402. | (data[2] << 16)
  403. | (data[3] << 24);
  404. const uint8_t seq = data[4];
  405. const uint8_t coreaddr = data[5];
  406. // uint32_t ntime = data[6] | ((data[7] & 0xf) << 8);
  407. const bool search = data[7] & 0x10;
  408. struct cgpu_info * const proc = hashfast_find_proc(master_thr, msg.chipaddr, coreaddr);
  409. if (unlikely(!proc))
  410. {
  411. applog(LOG_ERR, "%s: Unknown chip/core address %u/%u",
  412. dev->dev_repr, (unsigned)msg.chipaddr, (unsigned)coreaddr);
  413. inc_hw_errors_only(master_thr);
  414. continue;
  415. }
  416. struct thr_info * const thr = proc->thr[0];
  417. struct hashfast_core_state * const cs = thr->cgpu_data;
  418. struct work *work;
  419. DL_SEARCH_SCALAR(thr->work, work, device_id, seq);
  420. if (unlikely(!work))
  421. {
  422. applog(LOG_WARNING, "%"PRIpreprv": Unknown seq %02x (last=%02x)",
  423. proc->proc_repr, (unsigned)seq, (unsigned)cs->last_seq);
  424. inc_hw_errors2(thr, NULL, &nonce);
  425. continue;
  426. }
  427. unsigned nonces_found = 1;
  428. hashfast_submit_nonce(thr, work, nonce, false);
  429. if (search)
  430. {
  431. for (int noffset = 1; noffset <= 0x80; ++noffset)
  432. {
  433. const uint32_t nonce2 = nonce + noffset;
  434. if (test_nonce(work, nonce2, false))
  435. {
  436. hashfast_submit_nonce(thr, work, nonce2, true);
  437. ++nonces_found;
  438. }
  439. }
  440. if (!nonces_found)
  441. {
  442. inc_hw_errors_only(thr);
  443. applog(LOG_WARNING, "%"PRIpreprv": search=1, but failed to turn up any additional solutions",
  444. proc->proc_repr);
  445. }
  446. }
  447. hashes_done2(thr, 0x100000000 * nonces_found, NULL);
  448. }
  449. break;
  450. }
  451. case HFOP_STATUS:
  452. {
  453. const uint8_t *data = &msg.data[8];
  454. struct cgpu_info *proc = hashfast_find_proc(master_thr, msg.chipaddr, 0);
  455. if (unlikely(!proc))
  456. {
  457. applog(LOG_ERR, "%s: Unknown chip address %u",
  458. dev->dev_repr, (unsigned)msg.chipaddr);
  459. inc_hw_errors_only(master_thr);
  460. break;
  461. }
  462. struct hashfast_chip_state * const chipstate = &devstate->chipstates[msg.chipaddr];
  463. hashfast_isn_t isn = hashfast_get_isn(chipstate, msg.hdata);
  464. int cores_uptodate, cores_active, cores_pending, cores_transitioned;
  465. cores_uptodate = cores_active = cores_pending = cores_transitioned = 0;
  466. for (int i = 0; i < devstate->cores_per_chip; ++i, (proc = proc->next_proc))
  467. {
  468. struct thr_info * const thr = proc->thr[0];
  469. struct hashfast_core_state * const cs = thr->cgpu_data;
  470. const uint8_t bits = data[i / 4] >> (2 * (i % 4));
  471. const bool has_active = bits & 1;
  472. const bool has_pending = bits & 2;
  473. bool try_transition = true;
  474. if (cs->last_isn <= isn)
  475. ++cores_uptodate;
  476. else
  477. try_transition = false;
  478. if (has_active)
  479. ++cores_active;
  480. if (has_pending)
  481. ++cores_pending;
  482. else
  483. if (try_transition)
  484. {
  485. ++cores_transitioned;
  486. cs->has_pending = false;
  487. thr->queue_full = false;
  488. }
  489. }
  490. applog(LOG_DEBUG, "%s: STATUS from chipaddr=0x%02x with hdata=0x%04x (isn=0x%lx): total=%d uptodate=%d active=%d pending=%d transitioned=%d",
  491. dev->dev_repr, (unsigned)msg.chipaddr, (unsigned)msg.hdata, isn,
  492. devstate->cores_per_chip, cores_uptodate,
  493. cores_active, cores_pending, cores_transitioned);
  494. break;
  495. }
  496. }
  497. return true;
  498. }
  499. static
  500. void hashfast_poll(struct thr_info * const master_thr)
  501. {
  502. struct cgpu_info * const dev = master_thr->cgpu;
  503. struct timeval tv_timeout;
  504. timer_set_delay_from_now(&tv_timeout, 10000);
  505. while (true)
  506. {
  507. if (!hashfast_poll_msg(master_thr))
  508. {
  509. applog(LOG_DEBUG, "%s poll: No more messages", dev->dev_repr);
  510. break;
  511. }
  512. if (timer_passed(&tv_timeout, NULL))
  513. {
  514. applog(LOG_DEBUG, "%s poll: 10ms timeout met", dev->dev_repr);
  515. break;
  516. }
  517. }
  518. timer_set_delay_from_now(&master_thr->tv_poll, 100000);
  519. }
  520. struct device_drv hashfast_ums_drv = {
  521. .dname = "hashfast_ums",
  522. .name = "HFA",
  523. .lowl_match = hashfast_lowl_match,
  524. .lowl_probe = hashfast_lowl_probe,
  525. .thread_init = hashfast_init,
  526. .minerloop = minerloop_queue,
  527. .queue_append = hashfast_queue_append,
  528. .queue_flush = hashfast_queue_flush,
  529. .poll = hashfast_poll,
  530. };