driver-cairnsmore.c 6.0 KB

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  1. /*
  2. * Copyright 2012 Luke Dashjr
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 3 of the License, or (at your option)
  7. * any later version. See COPYING for more details.
  8. */
  9. #include "compat.h"
  10. #include "dynclock.h"
  11. #include "fpgautils.h"
  12. #include "icarus-common.h"
  13. #include "miner.h"
  14. #define CAIRNSMORE1_IO_SPEED 115200
  15. // This is a general ballpark
  16. #define CAIRNSMORE1_HASH_TIME 0.0000000024484
  17. #define CAIRNSMORE1_MINIMUM_CLOCK 50
  18. #define CAIRNSMORE1_DEFAULT_CLOCK 200
  19. #define CAIRNSMORE1_MAXIMUM_CLOCK 210
  20. struct device_api cairnsmore_api;
  21. static void cairnsmore_api_init();
  22. static bool cairnsmore_detect_one(const char *devpath)
  23. {
  24. struct ICARUS_INFO *info = calloc(1, sizeof(struct ICARUS_INFO));
  25. if (unlikely(!info))
  26. quit(1, "Failed to malloc ICARUS_INFO");
  27. info->baud = CAIRNSMORE1_IO_SPEED;
  28. info->work_division = 2;
  29. info->fpga_count = 2;
  30. info->quirk_reopen = false;
  31. info->Hs = CAIRNSMORE1_HASH_TIME;
  32. info->timing_mode = MODE_LONG;
  33. info->do_icarus_timing = true;
  34. if (!icarus_detect_custom(devpath, &cairnsmore_api, info)) {
  35. free(info);
  36. return false;
  37. }
  38. return true;
  39. }
  40. static int cairnsmore_detect_auto(void)
  41. {
  42. return
  43. serial_autodetect_udev (cairnsmore_detect_one, "*Cairnsmore1*") ?:
  44. serial_autodetect_devserial(cairnsmore_detect_one, "Cairnsmore1") ?:
  45. serial_autodetect_ftdi (cairnsmore_detect_one, "Cairnsmore1", NULL) ?:
  46. 0;
  47. }
  48. static void cairnsmore_detect()
  49. {
  50. cairnsmore_api_init();
  51. // Actual serial detection is handled by Icarus driver
  52. serial_detect_auto_byname(&cairnsmore_api, cairnsmore_detect_one, cairnsmore_detect_auto);
  53. }
  54. static bool cairnsmore_send_cmd(int fd, uint8_t cmd, uint8_t data, bool probe)
  55. {
  56. unsigned char pkt[64] =
  57. "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0"
  58. "vdi\xb7"
  59. "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0"
  60. "bfg0" "\xff\xff\xff\xff" "\xb5\0\0\0";
  61. if (unlikely(probe))
  62. pkt[61] = '\x01';
  63. pkt[32] = 0xda ^ cmd ^ data;
  64. pkt[33] = data;
  65. pkt[34] = cmd;
  66. return write(fd, pkt, sizeof(pkt)) == sizeof(pkt);
  67. }
  68. bool cairnsmore_supports_dynclock(int fd)
  69. {
  70. if (!cairnsmore_send_cmd(fd, 0, 1, true))
  71. return false;
  72. if (!cairnsmore_send_cmd(fd, 0, 1, true))
  73. return false;
  74. uint32_t nonce = 0;
  75. {
  76. struct timeval tv_finish;
  77. struct thr_info dummy = {
  78. .work_restart = false,
  79. .work_restart_fd = -1,
  80. };
  81. icarus_gets((unsigned char*)&nonce, fd, &tv_finish, &dummy, 1);
  82. }
  83. applog(LOG_DEBUG, "Cairnsmore dynclock detection... Got %08x", nonce);
  84. switch (nonce) {
  85. case 0x00949a6f: // big endian
  86. case 0x6f9a9400: // little endian
  87. // Hashed the command, so it's not supported
  88. return false;
  89. default:
  90. applog(LOG_WARNING, "Unexpected nonce from dynclock probe: %08x", be32toh(nonce));
  91. return false;
  92. case 0:
  93. return true;
  94. }
  95. }
  96. #define cairnsmore_send_cmd(fd, cmd, data) cairnsmore_send_cmd(fd, cmd, data, false)
  97. static bool cairnsmore_change_clock_func(struct thr_info *thr, int bestM)
  98. {
  99. struct cgpu_info *cm1 = thr->cgpu;
  100. struct ICARUS_INFO *info = cm1->cgpu_data;
  101. if (unlikely(!cairnsmore_send_cmd(cm1->device_fd, 0, bestM)))
  102. return false;
  103. // Adjust Hs expectations for frequency change
  104. info->Hs = info->Hs * (double)bestM / (double)info->dclk.freqM;
  105. char repr[0x10];
  106. sprintf(repr, "%s %u", cm1->api->name, cm1->device_id);
  107. dclk_msg_freqchange(repr, 2.5 * (double)info->dclk.freqM, 2.5 * (double)bestM, NULL);
  108. info->dclk.freqM = bestM;
  109. return true;
  110. }
  111. static bool cairnsmore_init(struct thr_info *thr)
  112. {
  113. struct cgpu_info *cm1 = thr->cgpu;
  114. struct ICARUS_INFO *info = cm1->cgpu_data;
  115. struct icarus_state *state = thr->cgpu_data;
  116. if (cairnsmore_supports_dynclock(cm1->device_fd)) {
  117. info->dclk_change_clock_func = cairnsmore_change_clock_func;
  118. dclk_prepare(&info->dclk);
  119. info->dclk.freqMaxM = CAIRNSMORE1_MAXIMUM_CLOCK / 2.5;
  120. info->dclk.freqM =
  121. info->dclk.freqMDefault = CAIRNSMORE1_DEFAULT_CLOCK / 2.5;
  122. cairnsmore_send_cmd(cm1->device_fd, 0, info->dclk.freqM);
  123. applog(LOG_WARNING, "%s %u: Frequency set to %u MHz (range: %u-%u)",
  124. cm1->api->name, cm1->device_id,
  125. CAIRNSMORE1_DEFAULT_CLOCK, CAIRNSMORE1_MINIMUM_CLOCK, CAIRNSMORE1_MAXIMUM_CLOCK
  126. );
  127. // The dynamic-clocking firmware connects each FPGA as its own device
  128. if (!(info->user_set & 1)) {
  129. info->work_division = 1;
  130. if (!(info->user_set & 2))
  131. info->fpga_count = 1;
  132. }
  133. } else {
  134. applog(LOG_WARNING, "%s %u: Frequency scaling not supported",
  135. cm1->api->name, cm1->device_id
  136. );
  137. }
  138. // Commands corrupt the hash state, so next scanhash is a firstrun
  139. state->firstrun = true;
  140. return true;
  141. }
  142. void convert_icarus_to_cairnsmore(struct cgpu_info *cm1)
  143. {
  144. struct ICARUS_INFO *info = cm1->cgpu_data;
  145. info->Hs = CAIRNSMORE1_HASH_TIME;
  146. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  147. info->timing_mode = MODE_LONG;
  148. info->do_icarus_timing = true;
  149. cm1->api = &cairnsmore_api;
  150. renumber_cgpu(cm1);
  151. cairnsmore_init(cm1->thr[0]);
  152. }
  153. static struct api_data *cairnsmore_api_extra_device_status(struct cgpu_info *cm1)
  154. {
  155. struct ICARUS_INFO *info = cm1->cgpu_data;
  156. struct api_data*root = NULL;
  157. if (info->dclk.freqM) {
  158. double frequency = 2.5 * info->dclk.freqM;
  159. root = api_add_freq(root, "Frequency", &frequency, true);
  160. }
  161. return root;
  162. }
  163. static bool cairnsmore_identify(struct cgpu_info *cm1)
  164. {
  165. struct ICARUS_INFO *info = cm1->cgpu_data;
  166. if (!info->dclk.freqM)
  167. return false;
  168. cairnsmore_send_cmd(cm1->device_fd, 1, 1);
  169. sleep(5);
  170. cairnsmore_send_cmd(cm1->device_fd, 1, 0);
  171. cm1->flash_led = true;
  172. return true;
  173. }
  174. extern struct device_api icarus_api;
  175. static void cairnsmore_api_init()
  176. {
  177. cairnsmore_api = icarus_api;
  178. cairnsmore_api.dname = "cairnsmore";
  179. cairnsmore_api.name = "ECM";
  180. cairnsmore_api.api_detect = cairnsmore_detect;
  181. cairnsmore_api.thread_init = cairnsmore_init;
  182. cairnsmore_api.identify_device = cairnsmore_identify;
  183. cairnsmore_api.get_api_extra_device_status = cairnsmore_api_extra_device_status;
  184. }
  185. struct device_api cairnsmore_api = {
  186. // Needed to get to cairnsmore_api_init at all
  187. .api_detect = cairnsmore_detect,
  188. };