spidevc.c 6.6 KB

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  1. /*
  2. * Copyright 2013 bitfury
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a copy
  5. * of this software and associated documentation files (the "Software"), to deal
  6. * in the Software without restriction, including without limitation the rights
  7. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  8. * copies of the Software, and to permit persons to whom the Software is
  9. * furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  17. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  19. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  20. * THE SOFTWARE.
  21. */
  22. #include "spidevc.h"
  23. #include <stdbool.h>
  24. #include <sys/mman.h>
  25. #include <stdint.h>
  26. #include <unistd.h>
  27. #include <stdio.h>
  28. #include <stdlib.h>
  29. #include <string.h>
  30. #include <getopt.h>
  31. #include <fcntl.h>
  32. #include <sys/ioctl.h>
  33. #include <linux/types.h>
  34. #include <signal.h>
  35. #include <sys/types.h>
  36. #include <linux/spi/spidev.h>
  37. #include <time.h>
  38. #include <unistd.h>
  39. #include <linux/i2c.h>
  40. #include <linux/i2c-dev.h>
  41. #include <sys/stat.h>
  42. static volatile unsigned *gpio;
  43. bool spi_init(void)
  44. {
  45. int fd;
  46. fd = open("/dev/mem",O_RDWR|O_SYNC);
  47. if (fd < 0)
  48. {
  49. perror("/dev/mem trouble");
  50. return false;
  51. }
  52. gpio = mmap(0,4096,PROT_READ|PROT_WRITE,MAP_SHARED,fd,0x20200000);
  53. if (gpio == MAP_FAILED)
  54. {
  55. perror("gpio mmap trouble");
  56. return false;
  57. }
  58. close(fd);
  59. return true;
  60. }
  61. #define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3))
  62. #define OUT_GPIO(g) *(gpio+((g)/10)) |= (1<<(((g)%10)*3))
  63. #define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3))
  64. #define GPIO_SET *(gpio+7) // sets bits which are 1 ignores bits which are 0
  65. #define GPIO_CLR *(gpio+10) // clears bits which are 1 ignores bits which are 0
  66. // Bit-banging reset, to reset more chips in chain - toggle for longer period... Each 3 reset cycles reset first chip in chain
  67. void spi_reset(void)
  68. {
  69. int i;
  70. INP_GPIO(10); OUT_GPIO(10);
  71. INP_GPIO(11); OUT_GPIO(11);
  72. GPIO_SET = 1 << 11; // Set SCK
  73. for (i = 0; i < 16; i++) { // On standard settings this unoptimized code produces 1 Mhz freq.
  74. GPIO_SET = 1 << 10;
  75. GPIO_SET = 1 << 10;
  76. GPIO_SET = 1 << 10;
  77. GPIO_SET = 1 << 10;
  78. GPIO_SET = 1 << 10;
  79. GPIO_SET = 1 << 10;
  80. GPIO_SET = 1 << 10;
  81. GPIO_SET = 1 << 10;
  82. GPIO_SET = 1 << 10;
  83. GPIO_SET = 1 << 10;
  84. GPIO_SET = 1 << 10;
  85. GPIO_SET = 1 << 10;
  86. GPIO_CLR = 1 << 10;
  87. GPIO_CLR = 1 << 10;
  88. GPIO_CLR = 1 << 10;
  89. GPIO_CLR = 1 << 10;
  90. GPIO_CLR = 1 << 10;
  91. GPIO_CLR = 1 << 10;
  92. GPIO_CLR = 1 << 10;
  93. GPIO_CLR = 1 << 10;
  94. GPIO_CLR = 1 << 10;
  95. GPIO_CLR = 1 << 10;
  96. GPIO_CLR = 1 << 10;
  97. GPIO_CLR = 1 << 10;
  98. }
  99. GPIO_CLR = 1 << 10;
  100. GPIO_CLR = 1 << 11;
  101. INP_GPIO(10);
  102. SET_GPIO_ALT(10,0);
  103. INP_GPIO(11);
  104. SET_GPIO_ALT(11,0);
  105. INP_GPIO(9);
  106. SET_GPIO_ALT(9,0);
  107. }
  108. int spi_txrx(const char *wrbuf, char *rdbuf, int bufsz)
  109. {
  110. int fd;
  111. int mode, bits, speed, rv, i, j;
  112. struct timespec tv;
  113. struct spi_ioc_transfer tr[16];
  114. memset(&tr,0,sizeof(tr));
  115. mode = 0; bits = 8; speed = 200000;
  116. spi_reset();
  117. fd = open("/dev/spidev0.0", O_RDWR);
  118. if (fd < 0) { perror("Unable to open SPI device"); exit(1); }
  119. if (ioctl(fd, SPI_IOC_WR_MODE, &mode) < 0) { perror("Unable to set WR MODE"); close(fd); return -1; }
  120. if (ioctl(fd, SPI_IOC_RD_MODE, &mode) < 0) { perror("Unable to set RD MODE"); close(fd); return -1; }
  121. if (ioctl(fd, SPI_IOC_WR_BITS_PER_WORD, &bits) < 0) { perror("Unable to set WR_BITS_PER_WORD"); close(fd); return -1; }
  122. if (ioctl(fd, SPI_IOC_RD_BITS_PER_WORD, &bits) < 0) { perror("Unable to set RD_BITS_PER_WORD"); close(fd); return -1; }
  123. if (ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed) < 0) { perror("Unable to set WR_MAX_SPEED_HZ"); close(fd); return -1; }
  124. if (ioctl(fd, SPI_IOC_RD_MAX_SPEED_HZ, &speed) < 0) { perror("Unable to set RD_MAX_SPEED_HZ"); close(fd); return -1; }
  125. rv = 0;
  126. while (bufsz >= 4096) {
  127. tr[rv].tx_buf = (uintptr_t) wrbuf;
  128. tr[rv].rx_buf = (uintptr_t) rdbuf;
  129. tr[rv].len = 4096;
  130. tr[rv].delay_usecs = 1;
  131. tr[rv].speed_hz = speed;
  132. tr[rv].bits_per_word = bits;
  133. bufsz -= 4096;
  134. wrbuf += 4096; rdbuf += 4096; rv ++;
  135. }
  136. if (bufsz > 0) {
  137. tr[rv].tx_buf = (uintptr_t) wrbuf;
  138. tr[rv].rx_buf = (uintptr_t) rdbuf;
  139. tr[rv].len = (unsigned)bufsz;
  140. tr[rv].delay_usecs = 1;
  141. tr[rv].speed_hz = speed;
  142. tr[rv].bits_per_word = bits;
  143. rv ++;
  144. }
  145. i = rv;
  146. for (j = 0; j < i; j++) {
  147. rv = (int)ioctl(fd, SPI_IOC_MESSAGE(1), (intptr_t)&tr[j]);
  148. if (rv < 0) { perror("WTF!"); close(fd); return -1; }
  149. }
  150. close(fd);
  151. return 0;
  152. }
  153. #define SPIMAXSZ 256*1024
  154. static unsigned char spibuf[SPIMAXSZ], spibuf_rx[SPIMAXSZ];
  155. static unsigned spibufsz;
  156. void spi_clear_buf(void) { spibufsz = 0; }
  157. unsigned char *spi_getrxbuf(void) { return spibuf_rx; }
  158. unsigned char *spi_gettxbuf(void) { return spibuf; }
  159. unsigned spi_getbufsz(void) { return spibufsz; }
  160. void spi_emit_buf_reverse(const char *str, unsigned sz)
  161. {
  162. unsigned i;
  163. if (spibufsz + sz >= SPIMAXSZ) return;
  164. for (i = 0; i < sz; i++) { // Reverse bit order in each byte!
  165. unsigned char p = str[i];
  166. p = ((p & 0xaa)>>1) | ((p & 0x55) << 1);
  167. p = ((p & 0xcc)>>2) | ((p & 0x33) << 2);
  168. p = ((p & 0xf0)>>4) | ((p & 0x0f) << 4);
  169. spibuf[spibufsz+i] = p;
  170. }
  171. spibufsz += sz;
  172. }
  173. void spi_emit_buf(const char *str, unsigned sz)
  174. {
  175. unsigned i;
  176. if (spibufsz + sz >= SPIMAXSZ) return;
  177. memcpy(&spibuf[spibufsz], str, sz); spibufsz += sz;
  178. }
  179. /* TODO: in production, emit just bit-sequences! Eliminate padding to byte! */
  180. void spi_emit_break(void) { spi_emit_buf("\x4", 1); }
  181. void spi_emit_fsync(void) { spi_emit_buf("\x6", 1); }
  182. void spi_emit_fasync(int n) {
  183. int i;
  184. for (i = 0; i < n; i++) {
  185. spi_emit_buf("\x5", 1);
  186. }
  187. }
  188. void spi_emit_data(unsigned addr, const char *buf, unsigned len)
  189. {
  190. unsigned char otmp[3];
  191. if (len < 4 || len > 128) return; /* This cannot be programmed in single frame! */
  192. len /= 4; /* Strip */
  193. otmp[0] = (len - 1) | 0xE0;
  194. otmp[1] = (addr >> 8)&0xFF; otmp[2] = addr & 0xFF;
  195. spi_emit_buf(otmp, 3);
  196. spi_emit_buf_reverse(buf, len*4);
  197. }