driver-avalon.c 22 KB

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  1. /*
  2. * Copyright 2012 Luke Dashjr
  3. * Copyright 2012 2013 Xiangfu <xiangfu@openmobilefree.com>
  4. * Copyright 2012 Andrew Smith
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the Free
  8. * Software Foundation; either version 3 of the License, or (at your option)
  9. * any later version. See COPYING for more details.
  10. */
  11. #include "config.h"
  12. #include <limits.h>
  13. #include <pthread.h>
  14. #include <stdio.h>
  15. #include <sys/time.h>
  16. #include <sys/types.h>
  17. #include <dirent.h>
  18. #include <unistd.h>
  19. #ifndef WIN32
  20. #include <termios.h>
  21. #include <sys/stat.h>
  22. #include <fcntl.h>
  23. #ifndef O_CLOEXEC
  24. #define O_CLOEXEC 0
  25. #endif
  26. #else
  27. #include <windows.h>
  28. #include <io.h>
  29. #endif
  30. #include "elist.h"
  31. #include "miner.h"
  32. #include "fpgautils.h"
  33. #include "driver-avalon.h"
  34. #include "hexdump.c"
  35. static struct timeval history_sec = { HISTORY_SEC, 0 };
  36. static const char *MODE_DEFAULT_STR = "default";
  37. static const char *MODE_SHORT_STR = "short";
  38. static const char *MODE_LONG_STR = "long";
  39. static const char *MODE_VALUE_STR = "value";
  40. static const char *MODE_UNKNOWN_STR = "unknown";
  41. static int option_offset = -1;
  42. static struct AVALON_INFO **avalon_info;
  43. struct device_api avalon_api;
  44. static int avalon_init_task(struct avalon_task *at,
  45. uint8_t reset, uint8_t ff, uint8_t fan,
  46. uint8_t timeout, uint8_t chip_num,
  47. uint8_t miner_num)
  48. {
  49. if (!at)
  50. return -1;
  51. memset(at, 0, sizeof(struct avalon_task));
  52. at->reset = reset ? 1 : 0;
  53. at->flush_fifo = ff ? 1: 0;
  54. at->fan_eft = fan ? 1 : 0; /* 1: fan_pwm_data */
  55. at->fan_pwm_data = fan ? (0xFF & fan) : 0xFF; /* by default: 0xFF */
  56. /* 1: timeout_data miner_num, chip_num */
  57. at->timer_eft = timeout ? 1 : 0;
  58. at->timer_eft = chip_num ? 1 : 0;
  59. at->timer_eft = miner_num ? 1 : 0;
  60. at->timeout_data = timeout ? timeout : 0x27; /* by default: 0x27 */
  61. at->chip_num = chip_num ? chip_num : 0xA; /* by default: 0x0A */
  62. at->miner_num = miner_num ? miner_num : 0x18; /* by default: 0x18 */
  63. /* FIXME: Not support nonce range yet */
  64. at->nonce_elf = 0; /* 1: nonce_range*/
  65. if (opt_debug) {
  66. applog(LOG_DEBUG, "Avalon: Task:");
  67. hexdump((uint8_t *)at, sizeof(struct avalon_task));
  68. }
  69. return 0;
  70. }
  71. static inline void avalon_create_task(struct avalon_task *at, struct work *work)
  72. {
  73. memcpy(at->midstate, work->midstate, 32);
  74. rev((uint8_t *)at->midstate, 32);
  75. memcpy(at->data, work->data + 64, 12);
  76. rev((uint8_t *)at->data, 12);
  77. if (opt_debug) {
  78. applog(LOG_DEBUG, "Avalon: Task + work:");
  79. hexdump((uint8_t *)at, sizeof(struct avalon_task));
  80. }
  81. }
  82. static int avalon_send_task(int fd, const struct avalon_task *at)
  83. {
  84. size_t ret;
  85. struct timespec p;
  86. if (opt_debug) {
  87. applog(LOG_DEBUG, "Avalon: Sent:");
  88. hexdump((uint8_t *)at, sizeof(struct avalon_task));
  89. }
  90. ret = write(fd, (uint8_t *)at, AVALON_WRITE_SIZE);
  91. if (unlikely(ret != AVALON_WRITE_SIZE))
  92. return AVA_SEND_ERROR;
  93. p.tv_sec = 0;
  94. p.tv_nsec = AVALON_SEND_WORK_PITCH;
  95. nanosleep(&p, NULL);
  96. return AVA_SEND_OK;
  97. }
  98. static int avalon_gets(uint8_t *buf, int fd, struct timeval *tv_finish,
  99. struct thr_info *thr, int read_count)
  100. {
  101. ssize_t ret = 0;
  102. int rc = 0;
  103. int read_amount = AVALON_READ_SIZE;
  104. bool first = true;
  105. int full = avalon_buffer_full(fd);
  106. if (opt_debug)
  107. applog(LOG_DEBUG, "Avalon: Buffer full: %s",
  108. full == AVA_BUFFER_FULL? "Yes" : "no");
  109. if (full == AVA_BUFFER_EMPTY) {
  110. if (opt_debug)
  111. applog(LOG_DEBUG, "Avalon: Finished hash!");
  112. return AVA_GETS_DONE;
  113. }
  114. /* Read reply 1 byte at a time to get earliest tv_finish */
  115. while (true) {
  116. ret = read(fd, buf, 1);
  117. if (ret < 0)
  118. return AVA_GETS_ERROR;
  119. if (first && tv_finish != NULL)
  120. gettimeofday(tv_finish, NULL);
  121. if (ret >= read_amount)
  122. return AVA_GETS_OK;
  123. if (ret > 0) {
  124. buf += ret;
  125. read_amount -= ret;
  126. first = false;
  127. continue;
  128. }
  129. rc++;
  130. if (rc >= read_count) {
  131. if (opt_debug) {
  132. applog(LOG_ERR,
  133. "Avalon: No data in %.2f seconds",
  134. (float)rc/(float)TIME_FACTOR);
  135. }
  136. return AVA_GETS_TIMEOUT;
  137. }
  138. if (thr && thr->work_restart) {
  139. if (opt_debug) {
  140. applog(LOG_ERR,
  141. "Avalon: Work restart at %.2f seconds",
  142. (float)(rc)/(float)TIME_FACTOR);
  143. }
  144. return AVA_GETS_RESTART;
  145. }
  146. }
  147. }
  148. static int avalon_get_result(uint8_t *nonce_bin, int fd,
  149. struct timeval *tv_finish, struct thr_info *thr)
  150. {
  151. struct cgpu_info *avalon = thr->cgpu;
  152. struct AVALON_INFO *info = avalon_info[avalon->device_id];
  153. int ret;
  154. memset(nonce_bin, 0, AVALON_READ_SIZE);
  155. ret = avalon_gets(nonce_bin, fd, tv_finish, thr, info->read_count);
  156. return ret;
  157. }
  158. static int avalon_decode_nonce(struct work **work, uint32_t *nonce,
  159. uint8_t *nonce_bin)
  160. {
  161. int i;
  162. /* FIXME: should be modify to avalon data format */
  163. memcpy((uint8_t *)nonce, nonce_bin, AVALON_READ_SIZE);
  164. #if !defined (__BIG_ENDIAN__) && !defined(MIPSEB)
  165. /* FIXME: there should be a rev() not just 32bit */
  166. *nonce = swab32(*nonce);
  167. #endif
  168. for (i = 0; i < AVALON_GET_WORK_COUNT; i++) {
  169. /* TODO: find the nonce work, return index */
  170. if (!memcmp((uint8_t *)nonce,
  171. work[i]->data + 64,
  172. 4/* should be 12 */))
  173. break;
  174. }
  175. i -= 1;
  176. return i;
  177. }
  178. static int avalon_reset(int fd)
  179. {
  180. const char golden_nonce[] = "000187a2";
  181. uint8_t nonce_bin[AVALON_READ_SIZE];
  182. char *nonce_hex;
  183. struct avalon_task at;
  184. avalon_init_task(&at, 1, 0, 0, 0, 0, 0);
  185. avalon_send_task(fd, &at);
  186. memset(nonce_bin, 0, sizeof(nonce_bin));
  187. avalon_gets(nonce_bin, fd, NULL, NULL, 10/* set to 1s now */);
  188. nonce_hex = bin2hex(nonce_bin, sizeof(nonce_bin));
  189. if (strncmp(nonce_hex, golden_nonce, 8)) {
  190. applog(LOG_ERR, "Avalon: Reset failed! not a Avalon?");
  191. free(nonce_hex);
  192. return 1;
  193. }
  194. free(nonce_hex);
  195. /* FIXME: add more avalon info base on return */
  196. applog(LOG_DEBUG, "Avalon: Reset succeeded");
  197. return 0;
  198. }
  199. static void do_avalon_close(struct thr_info *thr)
  200. {
  201. struct cgpu_info *avalon = thr->cgpu;
  202. avalon_close(avalon->device_fd);
  203. avalon->device_fd = -1;
  204. }
  205. static const char *timing_mode_str(enum timing_mode timing_mode)
  206. {
  207. switch(timing_mode) {
  208. case MODE_DEFAULT:
  209. return MODE_DEFAULT_STR;
  210. case MODE_SHORT:
  211. return MODE_SHORT_STR;
  212. case MODE_LONG:
  213. return MODE_LONG_STR;
  214. case MODE_VALUE:
  215. return MODE_VALUE_STR;
  216. default:
  217. return MODE_UNKNOWN_STR;
  218. }
  219. }
  220. static void set_timing_mode(int this_option_offset, struct cgpu_info *avalon)
  221. {
  222. struct AVALON_INFO *info = avalon_info[avalon->device_id];
  223. double Hs;
  224. char buf[BUFSIZ+1];
  225. char *ptr, *comma, *eq;
  226. size_t max;
  227. int i;
  228. if (opt_icarus_timing == NULL)
  229. buf[0] = '\0';
  230. else {
  231. ptr = opt_icarus_timing;
  232. for (i = 0; i < this_option_offset; i++) {
  233. comma = strchr(ptr, ',');
  234. if (comma == NULL)
  235. break;
  236. ptr = comma + 1;
  237. }
  238. comma = strchr(ptr, ',');
  239. if (comma == NULL)
  240. max = strlen(ptr);
  241. else
  242. max = comma - ptr;
  243. if (max > BUFSIZ)
  244. max = BUFSIZ;
  245. strncpy(buf, ptr, max);
  246. buf[max] = '\0';
  247. }
  248. info->Hs = 0;
  249. info->read_count = 0;
  250. if (strcasecmp(buf, MODE_SHORT_STR) == 0) {
  251. info->Hs = AVALON_REV3_HASH_TIME;
  252. info->read_count = AVALON_READ_COUNT_TIMING;
  253. info->timing_mode = MODE_SHORT;
  254. info->do_avalon_timing = true;
  255. } else if (strcasecmp(buf, MODE_LONG_STR) == 0) {
  256. info->Hs = AVALON_REV3_HASH_TIME;
  257. info->read_count = AVALON_READ_COUNT_TIMING;
  258. info->timing_mode = MODE_LONG;
  259. info->do_avalon_timing = true;
  260. } else if ((Hs = atof(buf)) != 0) {
  261. info->Hs = Hs / NANOSEC;
  262. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  263. if ((eq = strchr(buf, '=')) != NULL)
  264. info->read_count = atoi(eq+1);
  265. if (info->read_count < 1)
  266. info->read_count =
  267. (int)(info->fullnonce * TIME_FACTOR) - 1;
  268. if (unlikely(info->read_count < 1))
  269. info->read_count = 1;
  270. info->timing_mode = MODE_VALUE;
  271. info->do_avalon_timing = false;
  272. } else {
  273. // Anything else in buf just uses DEFAULT mode
  274. info->Hs = AVALON_REV3_HASH_TIME;
  275. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  276. if ((eq = strchr(buf, '=')) != NULL)
  277. info->read_count = atoi(eq+1);
  278. if (info->read_count < 1)
  279. info->read_count =
  280. (int)(info->fullnonce * TIME_FACTOR) - 1;
  281. info->timing_mode = MODE_DEFAULT;
  282. info->do_avalon_timing = false;
  283. }
  284. info->min_data_count = MIN_DATA_COUNT;
  285. applog(LOG_DEBUG, "Avalon: Init: %d mode=%s read_count=%d Hs=%e",
  286. avalon->device_id, timing_mode_str(info->timing_mode),
  287. info->read_count, info->Hs);
  288. }
  289. static uint32_t mask(int work_division)
  290. {
  291. char err_buf[BUFSIZ+1];
  292. uint32_t nonce_mask = 0x7fffffff;
  293. // yes we can calculate these,
  294. // but this way it's easy to see what they are
  295. switch (work_division) {
  296. case 1:
  297. nonce_mask = 0xffffffff;
  298. break;
  299. case 2:
  300. nonce_mask = 0x7fffffff;
  301. break;
  302. case 4:
  303. nonce_mask = 0x3fffffff;
  304. break;
  305. case 8:
  306. nonce_mask = 0x1fffffff;
  307. break;
  308. default:
  309. sprintf(err_buf,
  310. "Invalid2 avalon-options for work_division (%d)"
  311. " must be 1, 2, 4 or 8", work_division);
  312. quit(1, err_buf);
  313. }
  314. return nonce_mask;
  315. }
  316. static void get_options(int this_option_offset, int *baud, int *work_division,
  317. int *asic_count)
  318. {
  319. char err_buf[BUFSIZ+1];
  320. char buf[BUFSIZ+1];
  321. char *ptr, *comma, *colon, *colon2;
  322. size_t max;
  323. int i, tmp;
  324. if (opt_icarus_options == NULL)
  325. buf[0] = '\0';
  326. else {
  327. ptr = opt_icarus_options;
  328. for (i = 0; i < this_option_offset; i++) {
  329. comma = strchr(ptr, ',');
  330. if (comma == NULL)
  331. break;
  332. ptr = comma + 1;
  333. }
  334. comma = strchr(ptr, ',');
  335. if (comma == NULL)
  336. max = strlen(ptr);
  337. else
  338. max = comma - ptr;
  339. if (max > BUFSIZ)
  340. max = BUFSIZ;
  341. strncpy(buf, ptr, max);
  342. buf[max] = '\0';
  343. }
  344. *baud = AVALON_IO_SPEED;
  345. *work_division = 2;
  346. *asic_count = 2;
  347. if (*buf) {
  348. colon = strchr(buf, ':');
  349. if (colon)
  350. *(colon++) = '\0';
  351. if (*buf) {
  352. tmp = atoi(buf);
  353. switch (tmp) {
  354. case 115200:
  355. *baud = 115200;
  356. break;
  357. case 57600:
  358. *baud = 57600;
  359. break;
  360. default:
  361. sprintf(err_buf,
  362. "Invalid avalon-options for baud (%s) "
  363. "must be 115200 or 57600", buf);
  364. quit(1, err_buf);
  365. }
  366. }
  367. if (colon && *colon) {
  368. colon2 = strchr(colon, ':');
  369. if (colon2)
  370. *(colon2++) = '\0';
  371. if (*colon) {
  372. tmp = atoi(colon);
  373. if (tmp == 1 || tmp == 2 ||
  374. tmp == 4 || tmp == 8) {
  375. *work_division = tmp;
  376. // default to the same
  377. *asic_count = tmp;
  378. } else {
  379. sprintf(err_buf,
  380. "Invalid avalon-options for "
  381. "work_division (%s) must be 1,"
  382. " 2, 4 or 8", colon);
  383. quit(1, err_buf);
  384. }
  385. }
  386. if (colon2 && *colon2) {
  387. tmp = atoi(colon2);
  388. if (tmp > 0 && tmp <= *work_division)
  389. *asic_count = tmp;
  390. else {
  391. sprintf(err_buf,
  392. "Invalid avalon-options for "
  393. "asic_count (%s) must be >0 "
  394. "and <=work_division (%d)",
  395. colon2, *work_division);
  396. quit(1, err_buf);
  397. }
  398. }
  399. }
  400. }
  401. }
  402. static bool avalon_detect_one(const char *devpath)
  403. {
  404. struct AVALON_INFO *info;
  405. int fd, ret;
  406. int baud, work_division, asic_count;
  407. int this_option_offset = ++option_offset;
  408. get_options(this_option_offset, &baud, &work_division, &asic_count);
  409. applog(LOG_DEBUG, "Avalon Detect: Attempting to open %s", devpath);
  410. fd = avalon_open2(devpath, baud, true);
  411. if (unlikely(fd == -1)) {
  412. applog(LOG_ERR, "Avalon Detect: Failed to open %s", devpath);
  413. return false;
  414. }
  415. ret = avalon_reset(fd);
  416. avalon_close(fd);
  417. if (ret)
  418. return false;
  419. /* We have a real Avalon! */
  420. struct cgpu_info *avalon;
  421. avalon = calloc(1, sizeof(struct cgpu_info));
  422. avalon->api = &avalon_api;
  423. avalon->device_path = strdup(devpath);
  424. avalon->device_fd = -1;
  425. avalon->threads = AVALON_MINER_THREADS;
  426. add_cgpu(avalon);
  427. avalon_info = realloc(avalon_info,
  428. sizeof(struct AVALON_INFO *) *
  429. (total_devices + 1));
  430. applog(LOG_INFO, "Avalon Detect: Found at %s, mark as %d",
  431. devpath, avalon->device_id);
  432. applog(LOG_DEBUG,
  433. "Avalon: Init: %d baud=%d work_division=%d asic_count=%d",
  434. avalon->device_id, baud, work_division, asic_count);
  435. avalon_info[avalon->device_id] = (struct AVALON_INFO *)
  436. malloc(sizeof(struct AVALON_INFO));
  437. if (unlikely(!(avalon_info[avalon->device_id])))
  438. quit(1, "Failed to malloc AVALON_INFO");
  439. info = avalon_info[avalon->device_id];
  440. // Initialise everything to zero for a new device
  441. memset(info, 0, sizeof(struct AVALON_INFO));
  442. info->baud = baud;
  443. info->work_division = work_division;
  444. info->asic_count = asic_count;
  445. info->nonce_mask = mask(work_division);
  446. set_timing_mode(this_option_offset, avalon);
  447. return true;
  448. }
  449. static inline void avalon_detect()
  450. {
  451. serial_detect(&avalon_api, avalon_detect_one);
  452. }
  453. static bool avalon_prepare(struct thr_info *thr)
  454. {
  455. struct cgpu_info *avalon = thr->cgpu;
  456. struct timeval now;
  457. int fd;
  458. avalon->device_fd = -1;
  459. fd = avalon_open(avalon->device_path,
  460. avalon_info[avalon->device_id]->baud);
  461. if (unlikely(fd == -1)) {
  462. applog(LOG_ERR, "Avalon: Failed to open on %s",
  463. avalon->device_path);
  464. return false;
  465. }
  466. avalon->device_fd = fd;
  467. applog(LOG_INFO, "Avalon: Opened on %s", avalon->device_path);
  468. gettimeofday(&now, NULL);
  469. get_datestamp(avalon->init, &now);
  470. return true;
  471. }
  472. static int64_t avalon_scanhash(struct thr_info *thr, struct work **work,
  473. __maybe_unused int64_t max_nonce)
  474. {
  475. struct cgpu_info *avalon;
  476. int fd;
  477. int ret;
  478. struct AVALON_INFO *info;
  479. struct avalon_task at;
  480. uint8_t nonce_bin[AVALON_READ_SIZE];
  481. uint32_t nonce;
  482. int64_t hash_count;
  483. int i, work_i;
  484. int read_count;
  485. int count;
  486. struct timeval tv_start, tv_finish, elapsed;
  487. struct timeval tv_history_start, tv_history_finish;
  488. double Ti, Xi;
  489. int curr_hw_errors;
  490. bool was_hw_error;
  491. struct AVALON_HISTORY *history0, *history;
  492. double Hs, W, fullnonce;
  493. int64_t estimate_hashes;
  494. uint32_t values;
  495. int64_t hash_count_range;
  496. avalon = thr->cgpu;
  497. info = avalon_info[avalon->device_id];
  498. if (avalon->device_fd == -1)
  499. if (!avalon_prepare(thr)) {
  500. applog(LOG_ERR, "AVA%i: Comms error",
  501. avalon->device_id);
  502. dev_error(avalon, REASON_DEV_COMMS_ERROR);
  503. // fail the device if the reopen attempt fails
  504. return -1;
  505. }
  506. fd = avalon->device_fd;
  507. #ifndef WIN32
  508. tcflush(fd, TCOFLUSH);
  509. #endif
  510. /* Write task to device one by one */
  511. for (i = 0; i < AVALON_GET_WORK_COUNT; i++) {
  512. avalon_init_default_task(&at);
  513. avalon_create_task(&at, work[i]);
  514. ret = avalon_send_task(fd, &at);
  515. if (ret == AVA_SEND_ERROR) {
  516. do_avalon_close(thr);
  517. applog(LOG_ERR, "AVA%i: Comms error",
  518. avalon->device_id);
  519. dev_error(avalon, REASON_DEV_COMMS_ERROR);
  520. return 0; /* This should never happen */
  521. }
  522. }
  523. elapsed.tv_sec = elapsed.tv_usec = 0;
  524. gettimeofday(&tv_start, NULL);
  525. /* count may != AVALON_GET_WORK_COUNT */
  526. for (i = 0; i < AVALON_GET_WORK_COUNT; i++) {
  527. ret = avalon_get_result(nonce_bin, fd, &tv_finish, thr);
  528. if (ret == AVA_GETS_ERROR ) {
  529. do_avalon_close(thr);
  530. applog(LOG_ERR, "AVA%i: Comms error", avalon->device_id);
  531. dev_error(avalon, REASON_DEV_COMMS_ERROR);
  532. return 0;
  533. }
  534. work_i = avalon_decode_nonce(work, &nonce, nonce_bin);
  535. /* FIXME: Should be a check on return, no work_i maybe hardware error */
  536. work[work_i]->blk.nonce = 0xffffffff;
  537. // aborted before becoming idle, get new work
  538. if (ret == AVA_GETS_TIMEOUT || ret == AVA_GETS_RESTART) {
  539. timersub(&tv_finish, &tv_start, &elapsed);
  540. // ONLY up to just when it aborted
  541. // We didn't read a reply so we don't subtract AVALON_READ_TIME
  542. estimate_hashes = ((double)(elapsed.tv_sec) +
  543. ((double)(elapsed.tv_usec)) /
  544. ((double)1000000)) / info->Hs;
  545. // If some Serial-USB delay allowed the full nonce range to
  546. // complete it can't have done more than a full nonce
  547. if (unlikely(estimate_hashes > 0xffffffff))
  548. estimate_hashes = 0xffffffff;
  549. if (opt_debug) {
  550. applog(LOG_DEBUG,
  551. "Avalon: no nonce = 0x%08llx hashes "
  552. "(%ld.%06lds)",
  553. estimate_hashes,
  554. elapsed.tv_sec, elapsed.tv_usec);
  555. }
  556. return estimate_hashes;
  557. }
  558. curr_hw_errors = avalon->hw_errors;
  559. submit_nonce(thr, work[work_i], nonce);
  560. was_hw_error = (curr_hw_errors > avalon->hw_errors);
  561. // Force a USB close/reopen on any hw error
  562. if (was_hw_error)
  563. do_avalon_close(thr);
  564. hash_count = (nonce & info->nonce_mask);
  565. hash_count++;
  566. hash_count *= info->asic_count;
  567. }
  568. if (opt_debug || info->do_avalon_timing)
  569. timersub(&tv_finish, &tv_start, &elapsed);
  570. if (opt_debug) {
  571. applog(LOG_DEBUG,
  572. "Avalon: nonce = 0x%08x = 0x%08llx hashes "
  573. "(%ld.%06lds)",
  574. nonce, hash_count, elapsed.tv_sec, elapsed.tv_usec);
  575. }
  576. // ignore possible end condition values ... and hw errors
  577. if (info->do_avalon_timing
  578. && !was_hw_error
  579. && ((nonce & info->nonce_mask) > END_CONDITION)
  580. && ((nonce & info->nonce_mask) <
  581. (info->nonce_mask & ~END_CONDITION))) {
  582. gettimeofday(&tv_history_start, NULL);
  583. history0 = &(info->history[0]);
  584. if (history0->values == 0)
  585. timeradd(&tv_start, &history_sec, &(history0->finish));
  586. Ti = (double)(elapsed.tv_sec)
  587. + ((double)(elapsed.tv_usec))/((double)1000000)
  588. - ((double)AVALON_READ_TIME(info->baud));
  589. Xi = (double)hash_count;
  590. history0->sumXiTi += Xi * Ti;
  591. history0->sumXi += Xi;
  592. history0->sumTi += Ti;
  593. history0->sumXi2 += Xi * Xi;
  594. history0->values++;
  595. if (history0->hash_count_max < hash_count)
  596. history0->hash_count_max = hash_count;
  597. if (history0->hash_count_min > hash_count ||
  598. history0->hash_count_min == 0)
  599. history0->hash_count_min = hash_count;
  600. if (history0->values >= info->min_data_count
  601. && timercmp(&tv_start, &(history0->finish), >)) {
  602. for (i = INFO_HISTORY; i > 0; i--)
  603. memcpy(&(info->history[i]),
  604. &(info->history[i-1]),
  605. sizeof(struct AVALON_HISTORY));
  606. // Initialise history0 to zero for summary calculation
  607. memset(history0, 0, sizeof(struct AVALON_HISTORY));
  608. // We just completed a history data set
  609. // So now recalc read_count based on the
  610. // whole history thus we will
  611. // initially get more accurate until it
  612. // completes INFO_HISTORY
  613. // total data sets
  614. count = 0;
  615. for (i = 1 ; i <= INFO_HISTORY; i++) {
  616. history = &(info->history[i]);
  617. if (history->values >= MIN_DATA_COUNT) {
  618. count++;
  619. history0->sumXiTi += history->sumXiTi;
  620. history0->sumXi += history->sumXi;
  621. history0->sumTi += history->sumTi;
  622. history0->sumXi2 += history->sumXi2;
  623. history0->values += history->values;
  624. if (history0->hash_count_max < history->hash_count_max)
  625. history0->hash_count_max = history->hash_count_max;
  626. if (history0->hash_count_min > history->hash_count_min || history0->hash_count_min == 0)
  627. history0->hash_count_min = history->hash_count_min;
  628. }
  629. }
  630. // All history data
  631. Hs = (history0->values*history0->sumXiTi - history0->sumXi*history0->sumTi)
  632. / (history0->values*history0->sumXi2 - history0->sumXi*history0->sumXi);
  633. W = history0->sumTi/history0->values - Hs*history0->sumXi/history0->values;
  634. hash_count_range = history0->hash_count_max - history0->hash_count_min;
  635. values = history0->values;
  636. // Initialise history0 to zero for next data set
  637. memset(history0, 0, sizeof(struct AVALON_HISTORY));
  638. fullnonce = W + Hs * (((double)0xffffffff) + 1);
  639. read_count = (int)(fullnonce * TIME_FACTOR) - 1;
  640. info->Hs = Hs;
  641. info->read_count = read_count;
  642. info->fullnonce = fullnonce;
  643. info->count = count;
  644. info->W = W;
  645. info->values = values;
  646. info->hash_count_range = hash_count_range;
  647. if (info->min_data_count < MAX_MIN_DATA_COUNT)
  648. info->min_data_count *= 2;
  649. else if (info->timing_mode == MODE_SHORT)
  650. info->do_avalon_timing = false;
  651. // applog(LOG_WARNING, "Avalon %d Re-estimate: read_count=%d fullnonce=%fs history count=%d Hs=%e W=%e values=%d hash range=0x%08lx min data count=%u", avalon->device_id, read_count, fullnonce, count, Hs, W, values, hash_count_range, info->min_data_count);
  652. applog(LOG_WARNING, "Avalon %d Re-estimate: Hs=%e W=%e read_count=%d fullnonce=%.3fs",
  653. avalon->device_id, Hs, W, read_count, fullnonce);
  654. }
  655. info->history_count++;
  656. gettimeofday(&tv_history_finish, NULL);
  657. timersub(&tv_history_finish, &tv_history_start, &tv_history_finish);
  658. timeradd(&tv_history_finish, &(info->history_time), &(info->history_time));
  659. }
  660. return hash_count;
  661. }
  662. static struct api_data *avalon_api_stats(struct cgpu_info *cgpu)
  663. {
  664. struct api_data *root = NULL;
  665. struct AVALON_INFO *info = avalon_info[cgpu->device_id];
  666. // Warning, access to these is not locked - but we don't really
  667. // care since hashing performance is way more important than
  668. // locking access to displaying API debug 'stats'
  669. // If locking becomes an issue for any of them, use copy_data=true also
  670. root = api_add_int(root, "read_count", &(info->read_count), false);
  671. root = api_add_double(root, "fullnonce", &(info->fullnonce), false);
  672. root = api_add_int(root, "count", &(info->count), false);
  673. root = api_add_hs(root, "Hs", &(info->Hs), false);
  674. root = api_add_double(root, "W", &(info->W), false);
  675. root = api_add_uint(root, "total_values", &(info->values), false);
  676. root = api_add_uint64(root, "range", &(info->hash_count_range), false);
  677. root = api_add_uint64(root, "history_count", &(info->history_count),
  678. false);
  679. root = api_add_timeval(root, "history_time", &(info->history_time),
  680. false);
  681. root = api_add_uint(root, "min_data_count", &(info->min_data_count),
  682. false);
  683. root = api_add_uint(root, "timing_values", &(info->history[0].values),
  684. false);
  685. root = api_add_const(root, "timing_mode",
  686. timing_mode_str(info->timing_mode), false);
  687. root = api_add_bool(root, "is_timing", &(info->do_avalon_timing),
  688. false);
  689. root = api_add_int(root, "baud", &(info->baud), false);
  690. root = api_add_int(root, "work_division", &(info->work_division),
  691. false);
  692. root = api_add_int(root, "asic_count", &(info->asic_count), false);
  693. return root;
  694. }
  695. static void avalon_shutdown(struct thr_info *thr)
  696. {
  697. do_avalon_close(thr);
  698. }
  699. struct device_api avalon_api = {
  700. .dname = "avalon",
  701. .name = "AVA",
  702. .api_detect = avalon_detect,
  703. .thread_prepare = avalon_prepare,
  704. .scanhash_queue = avalon_scanhash,
  705. .get_api_stats = avalon_api_stats,
  706. .thread_shutdown = avalon_shutdown,
  707. };