driver-icarus.c 40 KB

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  1. /*
  2. * Copyright 2012-2013 Andrew Smith
  3. * Copyright 2012 Xiangfu <xiangfu@openmobilefree.com>
  4. * Copyright 2013 Con Kolivas <kernel@kolivas.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the Free
  8. * Software Foundation; either version 3 of the License, or (at your option)
  9. * any later version. See COPYING for more details.
  10. */
  11. /*
  12. * Those code should be works fine with V2 and V3 bitstream of Icarus.
  13. * Operation:
  14. * No detection implement.
  15. * Input: 64B = 32B midstate + 20B fill bytes + last 12 bytes of block head.
  16. * Return: send back 32bits immediately when Icarus found a valid nonce.
  17. * no query protocol implemented here, if no data send back in ~11.3
  18. * seconds (full cover time on 32bit nonce range by 380MH/s speed)
  19. * just send another work.
  20. * Notice:
  21. * 1. Icarus will start calculate when you push a work to them, even they
  22. * are busy.
  23. * 2. The 2 FPGAs on Icarus will distribute the job, one will calculate the
  24. * 0 ~ 7FFFFFFF, another one will cover the 80000000 ~ FFFFFFFF.
  25. * 3. It's possible for 2 FPGAs both find valid nonce in the meantime, the 2
  26. * valid nonce will all be send back.
  27. * 4. Icarus will stop work when: a valid nonce has been found or 32 bits
  28. * nonce range is completely calculated.
  29. */
  30. #include <float.h>
  31. #include <limits.h>
  32. #include <pthread.h>
  33. #include <stdint.h>
  34. #include <stdio.h>
  35. #include <strings.h>
  36. #include <sys/time.h>
  37. #include <unistd.h>
  38. #include "config.h"
  39. #ifdef WIN32
  40. #include <windows.h>
  41. #endif
  42. #include "compat.h"
  43. #include "miner.h"
  44. #include "usbutils.h"
  45. // The serial I/O speed - Linux uses a define 'B115200' in bits/termios.h
  46. #define ICARUS_IO_SPEED 115200
  47. // The size of a successful nonce read
  48. #define ICARUS_READ_SIZE 4
  49. // Ensure the sizes are correct for the Serial read
  50. #if (ICARUS_READ_SIZE != 4)
  51. #error ICARUS_READ_SIZE must be 4
  52. #endif
  53. #define ASSERT1(condition) __maybe_unused static char sizeof_uint32_t_must_be_4[(condition)?1:-1]
  54. ASSERT1(sizeof(uint32_t) == 4);
  55. // TODO: USB? Different calculation? - see usbstats to work it out e.g. 1/2 of normal send time
  56. // or even use that number? 1/2
  57. // #define ICARUS_READ_TIME(baud) ((double)ICARUS_READ_SIZE * (double)8.0 / (double)(baud))
  58. // maybe 1ms?
  59. #define ICARUS_READ_TIME(baud) (0.001)
  60. // USB ms timeout to wait - user specified timeouts are multiples of this
  61. #define ICARUS_WAIT_TIMEOUT 100
  62. #define ICARUS_CMR2_TIMEOUT 1
  63. // Defined in multiples of ICARUS_WAIT_TIMEOUT
  64. // Must of course be greater than ICARUS_READ_COUNT_TIMING/ICARUS_WAIT_TIMEOUT
  65. // There's no need to have this bigger, since the overhead/latency of extra work
  66. // is pretty small once you get beyond a 10s nonce range time and 10s also
  67. // means that nothing slower than 429MH/s can go idle so most icarus devices
  68. // will always mine without idling
  69. #define ICARUS_READ_TIME_LIMIT_MAX 100
  70. // In timing mode: Default starting value until an estimate can be obtained
  71. // 5000 ms allows for up to a ~840MH/s device
  72. #define ICARUS_READ_COUNT_TIMING 5000
  73. #define ICARUS_READ_COUNT_MIN ICARUS_WAIT_TIMEOUT
  74. #define SECTOMS(s) ((int)((s) * 1000))
  75. // How many ms below the expected completion time to abort work
  76. // extra in case the last read is delayed
  77. #define ICARUS_READ_REDUCE ((int)(ICARUS_WAIT_TIMEOUT * 1.5))
  78. // For a standard Icarus REV3 (to 5 places)
  79. // Since this rounds up a the last digit - it is a slight overestimate
  80. // Thus the hash rate will be a VERY slight underestimate
  81. // (by a lot less than the displayed accuracy)
  82. // Minor inaccuracy of these numbers doesn't affect the work done,
  83. // only the displayed MH/s
  84. #define ICARUS_REV3_HASH_TIME 0.0000000026316
  85. #define LANCELOT_HASH_TIME 0.0000000025000
  86. #define ASICMINERUSB_HASH_TIME 0.0000000029761
  87. // TODO: What is it?
  88. #define CAIRNSMORE1_HASH_TIME 0.0000000027000
  89. // Per FPGA
  90. #define CAIRNSMORE2_HASH_TIME 0.0000000066600
  91. #define NANOSEC 1000000000.0
  92. #define CAIRNSMORE2_INTS 4
  93. // Icarus Rev3 doesn't send a completion message when it finishes
  94. // the full nonce range, so to avoid being idle we must abort the
  95. // work (by starting a new work item) shortly before it finishes
  96. //
  97. // Thus we need to estimate 2 things:
  98. // 1) How many hashes were done if the work was aborted
  99. // 2) How high can the timeout be before the Icarus is idle,
  100. // to minimise the number of work items started
  101. // We set 2) to 'the calculated estimate' - ICARUS_READ_REDUCE
  102. // to ensure the estimate ends before idle
  103. //
  104. // The simple calculation used is:
  105. // Tn = Total time in seconds to calculate n hashes
  106. // Hs = seconds per hash
  107. // Xn = number of hashes
  108. // W = code/usb overhead per work
  109. //
  110. // Rough but reasonable estimate:
  111. // Tn = Hs * Xn + W (of the form y = mx + b)
  112. //
  113. // Thus:
  114. // Line of best fit (using least squares)
  115. //
  116. // Hs = (n*Sum(XiTi)-Sum(Xi)*Sum(Ti))/(n*Sum(Xi^2)-Sum(Xi)^2)
  117. // W = Sum(Ti)/n - (Hs*Sum(Xi))/n
  118. //
  119. // N.B. W is less when aborting work since we aren't waiting for the reply
  120. // to be transferred back (ICARUS_READ_TIME)
  121. // Calculating the hashes aborted at n seconds is thus just n/Hs
  122. // (though this is still a slight overestimate due to code delays)
  123. //
  124. // Both below must be exceeded to complete a set of data
  125. // Minimum how long after the first, the last data point must be
  126. #define HISTORY_SEC 60
  127. // Minimum how many points a single ICARUS_HISTORY should have
  128. #define MIN_DATA_COUNT 5
  129. // The value MIN_DATA_COUNT used is doubled each history until it exceeds:
  130. #define MAX_MIN_DATA_COUNT 100
  131. static struct timeval history_sec = { HISTORY_SEC, 0 };
  132. // Store the last INFO_HISTORY data sets
  133. // [0] = current data, not yet ready to be included as an estimate
  134. // Each new data set throws the last old set off the end thus
  135. // keeping a ongoing average of recent data
  136. #define INFO_HISTORY 10
  137. struct ICARUS_HISTORY {
  138. struct timeval finish;
  139. double sumXiTi;
  140. double sumXi;
  141. double sumTi;
  142. double sumXi2;
  143. uint32_t values;
  144. uint32_t hash_count_min;
  145. uint32_t hash_count_max;
  146. };
  147. enum timing_mode { MODE_DEFAULT, MODE_SHORT, MODE_LONG, MODE_VALUE };
  148. static const char *MODE_DEFAULT_STR = "default";
  149. static const char *MODE_SHORT_STR = "short";
  150. static const char *MODE_SHORT_STREQ = "short=";
  151. static const char *MODE_LONG_STR = "long";
  152. static const char *MODE_LONG_STREQ = "long=";
  153. static const char *MODE_VALUE_STR = "value";
  154. static const char *MODE_UNKNOWN_STR = "unknown";
  155. struct ICARUS_INFO {
  156. enum sub_ident ident;
  157. int intinfo;
  158. // time to calculate the golden_ob
  159. uint64_t golden_hashes;
  160. struct timeval golden_tv;
  161. struct ICARUS_HISTORY history[INFO_HISTORY+1];
  162. uint32_t min_data_count;
  163. int timeout;
  164. // seconds per Hash
  165. double Hs;
  166. // ms til we abort
  167. int read_time;
  168. // ms limit for (short=/long=) read_time
  169. int read_time_limit;
  170. enum timing_mode timing_mode;
  171. bool do_icarus_timing;
  172. double fullnonce;
  173. int count;
  174. double W;
  175. uint32_t values;
  176. uint64_t hash_count_range;
  177. // Determine the cost of history processing
  178. // (which will only affect W)
  179. uint64_t history_count;
  180. struct timeval history_time;
  181. // icarus-options
  182. int baud;
  183. int work_division;
  184. int fpga_count;
  185. uint32_t nonce_mask;
  186. uint8_t cmr2_speed;
  187. bool speed_next_work;
  188. bool flash_next_work;
  189. };
  190. #define ICARUS_MIDSTATE_SIZE 32
  191. #define ICARUS_UNUSED_SIZE 16
  192. #define ICARUS_WORK_SIZE 12
  193. #define ICARUS_WORK_DATA_OFFSET 64
  194. #define ICARUS_CMR2_SPEED_FACTOR 2.5
  195. #define ICARUS_CMR2_SPEED_MIN_INT 100
  196. #define ICARUS_CMR2_SPEED_DEF_INT 180
  197. #define ICARUS_CMR2_SPEED_MAX_INT 220
  198. #define CMR2_INT_TO_SPEED(_speed) ((uint8_t)((float)_speed / ICARUS_CMR2_SPEED_FACTOR))
  199. #define ICARUS_CMR2_SPEED_MIN CMR2_INT_TO_SPEED(ICARUS_CMR2_SPEED_MIN_INT)
  200. #define ICARUS_CMR2_SPEED_DEF CMR2_INT_TO_SPEED(ICARUS_CMR2_SPEED_DEF_INT)
  201. #define ICARUS_CMR2_SPEED_MAX CMR2_INT_TO_SPEED(ICARUS_CMR2_SPEED_MAX_INT)
  202. #define ICARUS_CMR2_SPEED_INC 1
  203. #define ICARUS_CMR2_SPEED_DEC -1
  204. #define ICARUS_CMR2_SPEED_FAIL -10
  205. #define ICARUS_CMR2_PREFIX ((uint8_t)0xB7)
  206. #define ICARUS_CMR2_CMD_SPEED ((uint8_t)0)
  207. #define ICARUS_CMR2_CMD_FLASH ((uint8_t)1)
  208. #define ICARUS_CMR2_DATA_FLASH_OFF ((uint8_t)0)
  209. #define ICARUS_CMR2_DATA_FLASH_ON ((uint8_t)1)
  210. #define ICARUS_CMR2_CHECK ((uint8_t)0x6D)
  211. struct ICARUS_WORK {
  212. uint8_t midstate[ICARUS_MIDSTATE_SIZE];
  213. // These 4 bytes are for CMR2 bitstreams that handle MHz adjustment
  214. uint8_t check;
  215. uint8_t data;
  216. uint8_t cmd;
  217. uint8_t prefix;
  218. uint8_t unused[ICARUS_UNUSED_SIZE];
  219. uint8_t work[ICARUS_WORK_SIZE];
  220. };
  221. #define END_CONDITION 0x0000ffff
  222. // Looking for options in --icarus-timing and --icarus-options:
  223. //
  224. // Code increments this each time we start to look at a device
  225. // However, this means that if other devices are checked by
  226. // the Icarus code (e.g. Avalon only as at 20130517)
  227. // they will count in the option offset
  228. //
  229. // This, however, is deterministic so that's OK
  230. //
  231. // If we were to increment after successfully finding an Icarus
  232. // that would be random since an Icarus may fail and thus we'd
  233. // not be able to predict the option order
  234. //
  235. // Devices are checked in the order libusb finds them which is ?
  236. //
  237. static int option_offset = -1;
  238. /*
  239. #define ICA_BUFSIZ (0x200)
  240. static void transfer_read(struct cgpu_info *icarus, uint8_t request_type, uint8_t bRequest, uint16_t wValue, uint16_t wIndex, char *buf, int bufsiz, int *amount, enum usb_cmds cmd)
  241. {
  242. int err;
  243. err = usb_transfer_read(icarus, request_type, bRequest, wValue, wIndex, buf, bufsiz, amount, cmd);
  244. applog(LOG_DEBUG, "%s: cgid %d %s got err %d",
  245. icarus->drv->name, icarus->cgminer_id,
  246. usb_cmdname(cmd), err);
  247. }
  248. */
  249. static void _transfer(struct cgpu_info *icarus, uint8_t request_type, uint8_t bRequest, uint16_t wValue, uint16_t wIndex, uint32_t *data, int siz, enum usb_cmds cmd)
  250. {
  251. int err;
  252. err = usb_transfer_data(icarus, request_type, bRequest, wValue, wIndex, data, siz, cmd);
  253. applog(LOG_DEBUG, "%s: cgid %d %s got err %d",
  254. icarus->drv->name, icarus->cgminer_id,
  255. usb_cmdname(cmd), err);
  256. }
  257. #define transfer(icarus, request_type, bRequest, wValue, wIndex, cmd) \
  258. _transfer(icarus, request_type, bRequest, wValue, wIndex, NULL, 0, cmd)
  259. static void icarus_initialise(struct cgpu_info *icarus, int baud)
  260. {
  261. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  262. uint16_t wValue, wIndex;
  263. enum sub_ident ident;
  264. int interface;
  265. if (icarus->usbinfo.nodev)
  266. return;
  267. usb_set_cps(icarus, baud / 10);
  268. usb_enable_cps(icarus);
  269. interface = _usb_interface(icarus, info->intinfo);
  270. ident = usb_ident(icarus);
  271. switch (ident) {
  272. case IDENT_BLT:
  273. case IDENT_LLT:
  274. case IDENT_CMR1:
  275. case IDENT_CMR2:
  276. // Reset
  277. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_RESET, FTDI_VALUE_RESET,
  278. interface, C_RESET);
  279. if (icarus->usbinfo.nodev)
  280. return;
  281. // Latency
  282. _usb_ftdi_set_latency(icarus, info->intinfo);
  283. if (icarus->usbinfo.nodev)
  284. return;
  285. // Set data control
  286. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_DATA, FTDI_VALUE_DATA_BLT,
  287. interface, C_SETDATA);
  288. if (icarus->usbinfo.nodev)
  289. return;
  290. // default to BLT/LLT 115200
  291. wValue = FTDI_VALUE_BAUD_BLT;
  292. wIndex = FTDI_INDEX_BAUD_BLT;
  293. if (ident == IDENT_CMR1 || ident == IDENT_CMR2) {
  294. switch (baud) {
  295. case 115200:
  296. wValue = FTDI_VALUE_BAUD_CMR_115;
  297. wIndex = FTDI_INDEX_BAUD_CMR_115;
  298. break;
  299. case 57600:
  300. wValue = FTDI_VALUE_BAUD_CMR_57;
  301. wIndex = FTDI_INDEX_BAUD_CMR_57;
  302. break;
  303. default:
  304. quit(1, "icarus_intialise() invalid baud (%d) for Cairnsmore1", baud);
  305. break;
  306. }
  307. }
  308. // Set the baud
  309. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_BAUD, wValue,
  310. (wIndex & 0xff00) | interface, C_SETBAUD);
  311. if (icarus->usbinfo.nodev)
  312. return;
  313. // Set Modem Control
  314. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_MODEM, FTDI_VALUE_MODEM,
  315. interface, C_SETMODEM);
  316. if (icarus->usbinfo.nodev)
  317. return;
  318. // Set Flow Control
  319. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_FLOW, FTDI_VALUE_FLOW,
  320. interface, C_SETFLOW);
  321. if (icarus->usbinfo.nodev)
  322. return;
  323. // Clear any sent data
  324. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_RESET, FTDI_VALUE_PURGE_TX,
  325. interface, C_PURGETX);
  326. if (icarus->usbinfo.nodev)
  327. return;
  328. // Clear any received data
  329. transfer(icarus, FTDI_TYPE_OUT, FTDI_REQUEST_RESET, FTDI_VALUE_PURGE_RX,
  330. interface, C_PURGERX);
  331. break;
  332. case IDENT_ICA:
  333. // Set Data Control
  334. transfer(icarus, PL2303_CTRL_OUT, PL2303_REQUEST_CTRL, PL2303_VALUE_CTRL,
  335. interface, C_SETDATA);
  336. if (icarus->usbinfo.nodev)
  337. return;
  338. // Set Line Control
  339. uint32_t ica_data[2] = { PL2303_VALUE_LINE0, PL2303_VALUE_LINE1 };
  340. _transfer(icarus, PL2303_CTRL_OUT, PL2303_REQUEST_LINE, PL2303_VALUE_LINE,
  341. interface, &ica_data[0], PL2303_VALUE_LINE_SIZE, C_SETLINE);
  342. if (icarus->usbinfo.nodev)
  343. return;
  344. // Vendor
  345. transfer(icarus, PL2303_VENDOR_OUT, PL2303_REQUEST_VENDOR, PL2303_VALUE_VENDOR,
  346. interface, C_VENDOR);
  347. break;
  348. case IDENT_AMU:
  349. // Enable the UART
  350. transfer(icarus, CP210X_TYPE_OUT, CP210X_REQUEST_IFC_ENABLE,
  351. CP210X_VALUE_UART_ENABLE,
  352. interface, C_ENABLE_UART);
  353. if (icarus->usbinfo.nodev)
  354. return;
  355. // Set data control
  356. transfer(icarus, CP210X_TYPE_OUT, CP210X_REQUEST_DATA, CP210X_VALUE_DATA,
  357. interface, C_SETDATA);
  358. if (icarus->usbinfo.nodev)
  359. return;
  360. // Set the baud
  361. uint32_t data = CP210X_DATA_BAUD;
  362. _transfer(icarus, CP210X_TYPE_OUT, CP210X_REQUEST_BAUD, 0,
  363. interface, &data, sizeof(data), C_SETBAUD);
  364. break;
  365. default:
  366. quit(1, "icarus_intialise() called with invalid %s cgid %i ident=%d",
  367. icarus->drv->name, icarus->cgminer_id, ident);
  368. }
  369. }
  370. static void rev(unsigned char *s, size_t l)
  371. {
  372. size_t i, j;
  373. unsigned char t;
  374. for (i = 0, j = l - 1; i < j; i++, j--) {
  375. t = s[i];
  376. s[i] = s[j];
  377. s[j] = t;
  378. }
  379. }
  380. #define ICA_NONCE_ERROR -1
  381. #define ICA_NONCE_OK 0
  382. #define ICA_NONCE_RESTART 1
  383. #define ICA_NONCE_TIMEOUT 2
  384. static int icarus_get_nonce(struct cgpu_info *icarus, unsigned char *buf, struct timeval *tv_start,
  385. struct timeval *tv_finish, struct thr_info *thr, int read_time)
  386. {
  387. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  388. int err, amt, rc;
  389. if (icarus->usbinfo.nodev)
  390. return ICA_NONCE_ERROR;
  391. cgtime(tv_start);
  392. err = usb_read_ii_timeout_cancellable(icarus, info->intinfo, (char *)buf,
  393. ICARUS_READ_SIZE, &amt, read_time,
  394. C_GETRESULTS);
  395. cgtime(tv_finish);
  396. if (err < 0 && err != LIBUSB_ERROR_TIMEOUT) {
  397. applog(LOG_ERR, "%s%i: Comms error (rerr=%d amt=%d)", icarus->drv->name,
  398. icarus->device_id, err, amt);
  399. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  400. return ICA_NONCE_ERROR;
  401. }
  402. if (amt >= ICARUS_READ_SIZE)
  403. return ICA_NONCE_OK;
  404. rc = SECTOMS(tdiff(tv_finish, tv_start));
  405. if (thr && thr->work_restart) {
  406. applog(LOG_DEBUG, "Icarus Read: Work restart at %d ms", rc);
  407. return ICA_NONCE_RESTART;
  408. }
  409. if (amt > 0)
  410. applog(LOG_DEBUG, "Icarus Read: Timeout reading for %d ms", rc);
  411. else
  412. applog(LOG_DEBUG, "Icarus Read: No data for %d ms", rc);
  413. return ICA_NONCE_TIMEOUT;
  414. }
  415. static const char *timing_mode_str(enum timing_mode timing_mode)
  416. {
  417. switch(timing_mode) {
  418. case MODE_DEFAULT:
  419. return MODE_DEFAULT_STR;
  420. case MODE_SHORT:
  421. return MODE_SHORT_STR;
  422. case MODE_LONG:
  423. return MODE_LONG_STR;
  424. case MODE_VALUE:
  425. return MODE_VALUE_STR;
  426. default:
  427. return MODE_UNKNOWN_STR;
  428. }
  429. }
  430. static void set_timing_mode(int this_option_offset, struct cgpu_info *icarus)
  431. {
  432. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  433. enum sub_ident ident;
  434. double Hs;
  435. char buf[BUFSIZ+1];
  436. char *ptr, *comma, *eq;
  437. size_t max;
  438. int i;
  439. if (opt_icarus_timing == NULL)
  440. buf[0] = '\0';
  441. else {
  442. ptr = opt_icarus_timing;
  443. for (i = 0; i < this_option_offset; i++) {
  444. comma = strchr(ptr, ',');
  445. if (comma == NULL)
  446. break;
  447. ptr = comma + 1;
  448. }
  449. comma = strchr(ptr, ',');
  450. if (comma == NULL)
  451. max = strlen(ptr);
  452. else
  453. max = comma - ptr;
  454. if (max > BUFSIZ)
  455. max = BUFSIZ;
  456. strncpy(buf, ptr, max);
  457. buf[max] = '\0';
  458. }
  459. ident = usb_ident(icarus);
  460. switch (ident) {
  461. case IDENT_ICA:
  462. info->Hs = ICARUS_REV3_HASH_TIME;
  463. break;
  464. case IDENT_BLT:
  465. case IDENT_LLT:
  466. info->Hs = LANCELOT_HASH_TIME;
  467. break;
  468. case IDENT_AMU:
  469. info->Hs = ASICMINERUSB_HASH_TIME;
  470. break;
  471. case IDENT_CMR1:
  472. info->Hs = CAIRNSMORE1_HASH_TIME;
  473. break;
  474. case IDENT_CMR2:
  475. info->Hs = CAIRNSMORE2_HASH_TIME;
  476. break;
  477. default:
  478. quit(1, "Icarus get_options() called with invalid %s ident=%d",
  479. icarus->drv->name, ident);
  480. }
  481. info->read_time = 0;
  482. info->read_time_limit = 0; // 0 = no limit
  483. if (strcasecmp(buf, MODE_SHORT_STR) == 0) {
  484. // short
  485. info->read_time = ICARUS_READ_COUNT_TIMING;
  486. info->timing_mode = MODE_SHORT;
  487. info->do_icarus_timing = true;
  488. } else if (strncasecmp(buf, MODE_SHORT_STREQ, strlen(MODE_SHORT_STREQ)) == 0) {
  489. // short=limit
  490. info->read_time = ICARUS_READ_COUNT_TIMING;
  491. info->timing_mode = MODE_SHORT;
  492. info->do_icarus_timing = true;
  493. info->read_time_limit = atoi(&buf[strlen(MODE_SHORT_STREQ)]);
  494. if (info->read_time_limit < 0)
  495. info->read_time_limit = 0;
  496. if (info->read_time_limit > ICARUS_READ_TIME_LIMIT_MAX)
  497. info->read_time_limit = ICARUS_READ_TIME_LIMIT_MAX;
  498. } else if (strcasecmp(buf, MODE_LONG_STR) == 0) {
  499. // long
  500. info->read_time = ICARUS_READ_COUNT_TIMING;
  501. info->timing_mode = MODE_LONG;
  502. info->do_icarus_timing = true;
  503. } else if (strncasecmp(buf, MODE_LONG_STREQ, strlen(MODE_LONG_STREQ)) == 0) {
  504. // long=limit
  505. info->read_time = ICARUS_READ_COUNT_TIMING;
  506. info->timing_mode = MODE_LONG;
  507. info->do_icarus_timing = true;
  508. info->read_time_limit = atoi(&buf[strlen(MODE_LONG_STREQ)]);
  509. if (info->read_time_limit < 0)
  510. info->read_time_limit = 0;
  511. if (info->read_time_limit > ICARUS_READ_TIME_LIMIT_MAX)
  512. info->read_time_limit = ICARUS_READ_TIME_LIMIT_MAX;
  513. } else if ((Hs = atof(buf)) != 0) {
  514. // ns[=read_time]
  515. info->Hs = Hs / NANOSEC;
  516. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  517. if ((eq = strchr(buf, '=')) != NULL)
  518. info->read_time = atoi(eq+1) * ICARUS_WAIT_TIMEOUT;
  519. if (info->read_time < ICARUS_READ_COUNT_MIN)
  520. info->read_time = SECTOMS(info->fullnonce) - ICARUS_READ_REDUCE;
  521. if (unlikely(info->read_time < ICARUS_READ_COUNT_MIN))
  522. info->read_time = ICARUS_READ_COUNT_MIN;
  523. info->timing_mode = MODE_VALUE;
  524. info->do_icarus_timing = false;
  525. } else {
  526. // Anything else in buf just uses DEFAULT mode
  527. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  528. if ((eq = strchr(buf, '=')) != NULL)
  529. info->read_time = atoi(eq+1) * ICARUS_WAIT_TIMEOUT;
  530. if (info->read_time < ICARUS_READ_COUNT_MIN)
  531. info->read_time = SECTOMS(info->fullnonce) - ICARUS_READ_REDUCE;
  532. if (unlikely(info->read_time < ICARUS_READ_COUNT_MIN))
  533. info->read_time = ICARUS_READ_COUNT_MIN;
  534. info->timing_mode = MODE_DEFAULT;
  535. info->do_icarus_timing = false;
  536. }
  537. info->min_data_count = MIN_DATA_COUNT;
  538. // All values are in multiples of ICARUS_WAIT_TIMEOUT
  539. info->read_time_limit *= ICARUS_WAIT_TIMEOUT;
  540. applog(LOG_DEBUG, "%s: cgid %d Init: mode=%s read_time=%dms limit=%dms Hs=%e",
  541. icarus->drv->name, icarus->cgminer_id,
  542. timing_mode_str(info->timing_mode),
  543. info->read_time, info->read_time_limit, info->Hs);
  544. }
  545. static uint32_t mask(int work_division)
  546. {
  547. uint32_t nonce_mask = 0x7fffffff;
  548. // yes we can calculate these, but this way it's easy to see what they are
  549. switch (work_division) {
  550. case 1:
  551. nonce_mask = 0xffffffff;
  552. break;
  553. case 2:
  554. nonce_mask = 0x7fffffff;
  555. break;
  556. case 4:
  557. nonce_mask = 0x3fffffff;
  558. break;
  559. case 8:
  560. nonce_mask = 0x1fffffff;
  561. break;
  562. default:
  563. quit(1, "Invalid2 icarus-options for work_division (%d) must be 1, 2, 4 or 8", work_division);
  564. }
  565. return nonce_mask;
  566. }
  567. static void get_options(int this_option_offset, struct cgpu_info *icarus, int *baud, int *work_division, int *fpga_count)
  568. {
  569. char buf[BUFSIZ+1];
  570. char *ptr, *comma, *colon, *colon2;
  571. enum sub_ident ident;
  572. size_t max;
  573. int i, tmp;
  574. if (opt_icarus_options == NULL)
  575. buf[0] = '\0';
  576. else {
  577. ptr = opt_icarus_options;
  578. for (i = 0; i < this_option_offset; i++) {
  579. comma = strchr(ptr, ',');
  580. if (comma == NULL)
  581. break;
  582. ptr = comma + 1;
  583. }
  584. comma = strchr(ptr, ',');
  585. if (comma == NULL)
  586. max = strlen(ptr);
  587. else
  588. max = comma - ptr;
  589. if (max > BUFSIZ)
  590. max = BUFSIZ;
  591. strncpy(buf, ptr, max);
  592. buf[max] = '\0';
  593. }
  594. ident = usb_ident(icarus);
  595. switch (ident) {
  596. case IDENT_ICA:
  597. case IDENT_BLT:
  598. case IDENT_LLT:
  599. *baud = ICARUS_IO_SPEED;
  600. *work_division = 2;
  601. *fpga_count = 2;
  602. break;
  603. case IDENT_AMU:
  604. *baud = ICARUS_IO_SPEED;
  605. *work_division = 1;
  606. *fpga_count = 1;
  607. break;
  608. case IDENT_CMR1:
  609. *baud = ICARUS_IO_SPEED;
  610. *work_division = 2;
  611. *fpga_count = 2;
  612. break;
  613. case IDENT_CMR2:
  614. *baud = ICARUS_IO_SPEED;
  615. *work_division = 1;
  616. *fpga_count = 1;
  617. break;
  618. default:
  619. quit(1, "Icarus get_options() called with invalid %s ident=%d",
  620. icarus->drv->name, ident);
  621. }
  622. if (*buf) {
  623. colon = strchr(buf, ':');
  624. if (colon)
  625. *(colon++) = '\0';
  626. if (*buf) {
  627. tmp = atoi(buf);
  628. switch (tmp) {
  629. case 115200:
  630. *baud = 115200;
  631. break;
  632. case 57600:
  633. *baud = 57600;
  634. break;
  635. default:
  636. quit(1, "Invalid icarus-options for baud (%s) must be 115200 or 57600", buf);
  637. }
  638. }
  639. if (colon && *colon) {
  640. colon2 = strchr(colon, ':');
  641. if (colon2)
  642. *(colon2++) = '\0';
  643. if (*colon) {
  644. tmp = atoi(colon);
  645. if (tmp == 1 || tmp == 2 || tmp == 4 || tmp == 8) {
  646. *work_division = tmp;
  647. *fpga_count = tmp; // default to the same
  648. } else {
  649. quit(1, "Invalid icarus-options for work_division (%s) must be 1, 2, 4 or 8", colon);
  650. }
  651. }
  652. if (colon2 && *colon2) {
  653. tmp = atoi(colon2);
  654. if (tmp > 0 && tmp <= *work_division)
  655. *fpga_count = tmp;
  656. else {
  657. quit(1, "Invalid icarus-options for fpga_count (%s) must be >0 and <=work_division (%d)", colon2, *work_division);
  658. }
  659. }
  660. }
  661. }
  662. }
  663. static bool icarus_detect_one(struct libusb_device *dev, struct usb_find_devices *found)
  664. {
  665. int this_option_offset = ++option_offset;
  666. struct ICARUS_INFO *info;
  667. struct timeval tv_start, tv_finish;
  668. // Block 171874 nonce = (0xa2870100) = 0x000187a2
  669. // N.B. golden_ob MUST take less time to calculate
  670. // than the timeout set in icarus_open()
  671. // This one takes ~0.53ms on Rev3 Icarus
  672. const char golden_ob[] =
  673. "4679ba4ec99876bf4bfe086082b40025"
  674. "4df6c356451471139a3afa71e48f544a"
  675. "00000000000000000000000000000000"
  676. "0000000087320b1a1426674f2fa722ce";
  677. const char golden_nonce[] = "000187a2";
  678. const uint32_t golden_nonce_val = 0x000187a2;
  679. unsigned char nonce_bin[ICARUS_READ_SIZE];
  680. struct ICARUS_WORK workdata;
  681. char *nonce_hex;
  682. int baud, uninitialised_var(work_division), uninitialised_var(fpga_count);
  683. struct cgpu_info *icarus;
  684. int ret, err, amount, tries, i;
  685. bool ok;
  686. bool cmr2_ok[CAIRNSMORE2_INTS];
  687. int cmr2_count;
  688. if ((sizeof(workdata) << 1) != (sizeof(golden_ob) - 1))
  689. quithere(1, "Data and golden_ob sizes don't match");
  690. icarus = usb_alloc_cgpu(&icarus_drv, 1);
  691. if (!usb_init(icarus, dev, found))
  692. goto shin;
  693. get_options(this_option_offset, icarus, &baud, &work_division, &fpga_count);
  694. hex2bin((void *)(&workdata), golden_ob, sizeof(workdata));
  695. info = (struct ICARUS_INFO *)calloc(1, sizeof(struct ICARUS_INFO));
  696. if (unlikely(!info))
  697. quit(1, "Failed to malloc ICARUS_INFO");
  698. icarus->device_data = (void *)info;
  699. info->ident = usb_ident(icarus);
  700. switch (info->ident) {
  701. case IDENT_ICA:
  702. case IDENT_BLT:
  703. case IDENT_LLT:
  704. case IDENT_AMU:
  705. case IDENT_CMR1:
  706. info->timeout = ICARUS_WAIT_TIMEOUT;
  707. break;
  708. case IDENT_CMR2:
  709. if (found->intinfo_count != CAIRNSMORE2_INTS) {
  710. quithere(1, "CMR2 Interface count (%d) isn't expected: %d",
  711. found->intinfo_count,
  712. CAIRNSMORE2_INTS);
  713. }
  714. info->timeout = ICARUS_CMR2_TIMEOUT;
  715. cmr2_count = 0;
  716. for (i = 0; i < CAIRNSMORE2_INTS; i++)
  717. cmr2_ok[i] = false;
  718. break;
  719. default:
  720. quit(1, "%s icarus_detect_one() invalid %s ident=%d",
  721. icarus->drv->dname, icarus->drv->dname, info->ident);
  722. }
  723. // For CMR2 test each USB Interface
  724. cmr2_retry:
  725. tries = 2;
  726. ok = false;
  727. while (!ok && tries-- > 0) {
  728. icarus_initialise(icarus, baud);
  729. err = usb_write_ii(icarus, info->intinfo,
  730. (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  731. if (err != LIBUSB_SUCCESS || amount != sizeof(workdata))
  732. continue;
  733. memset(nonce_bin, 0, sizeof(nonce_bin));
  734. ret = icarus_get_nonce(icarus, nonce_bin, &tv_start, &tv_finish, NULL, 100);
  735. if (ret != ICA_NONCE_OK)
  736. continue;
  737. nonce_hex = bin2hex(nonce_bin, sizeof(nonce_bin));
  738. if (strncmp(nonce_hex, golden_nonce, 8) == 0)
  739. ok = true;
  740. else {
  741. if (tries < 0 && info->ident != IDENT_CMR2) {
  742. applog(LOG_ERR,
  743. "Icarus Detect: "
  744. "Test failed at %s: get %s, should: %s",
  745. icarus->device_path, nonce_hex, golden_nonce);
  746. }
  747. }
  748. free(nonce_hex);
  749. }
  750. if (!ok) {
  751. if (info->ident != IDENT_CMR2)
  752. goto unshin;
  753. if (info->intinfo < CAIRNSMORE2_INTS-1) {
  754. info->intinfo++;
  755. goto cmr2_retry;
  756. }
  757. } else {
  758. if (info->ident == IDENT_CMR2) {
  759. applog(LOG_DEBUG,
  760. "Icarus Detect: "
  761. "Test succeeded at %s i%d: got %s",
  762. icarus->device_path, info->intinfo, golden_nonce);
  763. cmr2_ok[info->intinfo] = true;
  764. cmr2_count++;
  765. if (info->intinfo < CAIRNSMORE2_INTS-1) {
  766. info->intinfo++;
  767. goto cmr2_retry;
  768. }
  769. }
  770. }
  771. if (info->ident == IDENT_CMR2) {
  772. if (cmr2_count == 0) {
  773. applog(LOG_ERR,
  774. "Icarus Detect: Test failed at %s: for all %d CMR2 Interfaces",
  775. icarus->device_path, CAIRNSMORE2_INTS);
  776. goto unshin;
  777. }
  778. // set the interface to the first one that succeeded
  779. for (i = 0; i < CAIRNSMORE2_INTS; i++)
  780. if (cmr2_ok[i]) {
  781. info->intinfo = i;
  782. break;
  783. }
  784. } else {
  785. applog(LOG_DEBUG,
  786. "Icarus Detect: "
  787. "Test succeeded at %s: got %s",
  788. icarus->device_path, golden_nonce);
  789. }
  790. /* We have a real Icarus! */
  791. if (!add_cgpu(icarus))
  792. goto unshin;
  793. update_usb_stats(icarus);
  794. applog(LOG_INFO, "%s%d: Found at %s",
  795. icarus->drv->name, icarus->device_id, icarus->device_path);
  796. if (info->ident == IDENT_CMR2) {
  797. applog(LOG_INFO, "%s%d: with %d Interface%s",
  798. icarus->drv->name, icarus->device_id,
  799. cmr2_count, cmr2_count > 1 ? "s" : "");
  800. // Assume 1 or 2 are running FPGA pairs
  801. if (cmr2_count < 3) {
  802. work_division = fpga_count = 2;
  803. info->Hs /= 2;
  804. }
  805. }
  806. applog(LOG_DEBUG, "%s%d: Init baud=%d work_division=%d fpga_count=%d",
  807. icarus->drv->name, icarus->device_id, baud, work_division, fpga_count);
  808. info->baud = baud;
  809. info->work_division = work_division;
  810. info->fpga_count = fpga_count;
  811. info->nonce_mask = mask(work_division);
  812. info->golden_hashes = (golden_nonce_val & info->nonce_mask) * fpga_count;
  813. timersub(&tv_finish, &tv_start, &(info->golden_tv));
  814. set_timing_mode(this_option_offset, icarus);
  815. if (info->ident == IDENT_CMR2) {
  816. int i;
  817. for (i = info->intinfo + 1; i < icarus->usbdev->found->intinfo_count; i++) {
  818. struct cgpu_info *cgtmp;
  819. struct ICARUS_INFO *intmp;
  820. if (!cmr2_ok[i])
  821. continue;
  822. cgtmp = usb_copy_cgpu(icarus);
  823. if (!cgtmp) {
  824. applog(LOG_ERR, "%s%d: Init failed initinfo %d",
  825. icarus->drv->name, icarus->device_id, i);
  826. continue;
  827. }
  828. cgtmp->usbinfo.usbstat = USB_NOSTAT;
  829. intmp = (struct ICARUS_INFO *)malloc(sizeof(struct ICARUS_INFO));
  830. if (unlikely(!intmp))
  831. quit(1, "Failed2 to malloc ICARUS_INFO");
  832. cgtmp->device_data = (void *)intmp;
  833. // Initialise everything to match
  834. memcpy(intmp, info, sizeof(struct ICARUS_INFO));
  835. intmp->intinfo = i;
  836. icarus_initialise(cgtmp, baud);
  837. if (!add_cgpu(cgtmp)) {
  838. usb_uninit(cgtmp);
  839. free(intmp);
  840. continue;
  841. }
  842. update_usb_stats(cgtmp);
  843. }
  844. }
  845. return true;
  846. unshin:
  847. usb_uninit(icarus);
  848. free(info);
  849. icarus->device_data = NULL;
  850. shin:
  851. icarus = usb_free_cgpu(icarus);
  852. return false;
  853. }
  854. static void icarus_detect(bool __maybe_unused hotplug)
  855. {
  856. usb_detect(&icarus_drv, icarus_detect_one);
  857. }
  858. static bool icarus_prepare(__maybe_unused struct thr_info *thr)
  859. {
  860. // struct cgpu_info *icarus = thr->cgpu;
  861. return true;
  862. }
  863. static void cmr2_command(struct cgpu_info *icarus, uint8_t cmd, uint8_t data)
  864. {
  865. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  866. struct ICARUS_WORK workdata;
  867. int amount;
  868. memset((void *)(&workdata), 0, sizeof(workdata));
  869. workdata.prefix = ICARUS_CMR2_PREFIX;
  870. workdata.cmd = cmd;
  871. workdata.data = data;
  872. workdata.check = workdata.data ^ workdata.cmd ^ workdata.prefix ^ ICARUS_CMR2_CHECK;
  873. usb_write_ii(icarus, info->intinfo, (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  874. }
  875. static void cmr2_commands(struct cgpu_info *icarus)
  876. {
  877. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  878. if (info->speed_next_work) {
  879. info->speed_next_work = false;
  880. cmr2_command(icarus, ICARUS_CMR2_CMD_SPEED, info->cmr2_speed);
  881. return;
  882. }
  883. if (info->flash_next_work) {
  884. info->flash_next_work = false;
  885. cmr2_command(icarus, ICARUS_CMR2_CMD_FLASH, ICARUS_CMR2_DATA_FLASH_ON);
  886. cgsleep_ms(250);
  887. cmr2_command(icarus, ICARUS_CMR2_CMD_FLASH, ICARUS_CMR2_DATA_FLASH_OFF);
  888. cgsleep_ms(250);
  889. cmr2_command(icarus, ICARUS_CMR2_CMD_FLASH, ICARUS_CMR2_DATA_FLASH_ON);
  890. cgsleep_ms(250);
  891. cmr2_command(icarus, ICARUS_CMR2_CMD_FLASH, ICARUS_CMR2_DATA_FLASH_OFF);
  892. return;
  893. }
  894. }
  895. static int64_t icarus_scanwork(struct thr_info *thr)
  896. {
  897. struct cgpu_info *icarus = thr->cgpu;
  898. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(icarus->device_data);
  899. int ret, err, amount;
  900. unsigned char nonce_bin[ICARUS_READ_SIZE];
  901. struct ICARUS_WORK workdata;
  902. char *ob_hex;
  903. uint32_t nonce;
  904. int64_t hash_count = 0;
  905. struct timeval tv_start, tv_finish, elapsed;
  906. struct timeval tv_history_start, tv_history_finish;
  907. double Ti, Xi;
  908. int curr_hw_errors, i;
  909. bool was_hw_error;
  910. struct work *work;
  911. struct ICARUS_HISTORY *history0, *history;
  912. int count;
  913. double Hs, W, fullnonce;
  914. int read_time;
  915. bool limited;
  916. int64_t estimate_hashes;
  917. uint32_t values;
  918. int64_t hash_count_range;
  919. // Device is gone
  920. if (icarus->usbinfo.nodev)
  921. return -1;
  922. elapsed.tv_sec = elapsed.tv_usec = 0;
  923. work = get_work(thr, thr->id);
  924. memset((void *)(&workdata), 0, sizeof(workdata));
  925. memcpy(&(workdata.midstate), work->midstate, ICARUS_MIDSTATE_SIZE);
  926. memcpy(&(workdata.work), work->data + ICARUS_WORK_DATA_OFFSET, ICARUS_WORK_SIZE);
  927. rev((void *)(&(workdata.midstate)), ICARUS_MIDSTATE_SIZE);
  928. rev((void *)(&(workdata.work)), ICARUS_WORK_SIZE);
  929. if (info->speed_next_work || info->flash_next_work)
  930. cmr2_commands(icarus);
  931. // We only want results for the work we are about to send
  932. usb_buffer_clear(icarus);
  933. err = usb_write_ii(icarus, info->intinfo, (char *)(&workdata), sizeof(workdata), &amount, C_SENDWORK);
  934. if (err < 0 || amount != sizeof(workdata)) {
  935. applog(LOG_ERR, "%s%i: Comms error (werr=%d amt=%d)",
  936. icarus->drv->name, icarus->device_id, err, amount);
  937. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  938. icarus_initialise(icarus, info->baud);
  939. goto out;
  940. }
  941. if (opt_debug) {
  942. ob_hex = bin2hex((void *)(&workdata), sizeof(workdata));
  943. applog(LOG_DEBUG, "%s%d: sent %s",
  944. icarus->drv->name, icarus->device_id, ob_hex);
  945. free(ob_hex);
  946. }
  947. /* Icarus will return 4 bytes (ICARUS_READ_SIZE) nonces or nothing */
  948. memset(nonce_bin, 0, sizeof(nonce_bin));
  949. ret = icarus_get_nonce(icarus, nonce_bin, &tv_start, &tv_finish, thr, info->read_time);
  950. if (ret == ICA_NONCE_ERROR)
  951. goto out;
  952. work->blk.nonce = 0xffffffff;
  953. // aborted before becoming idle, get new work
  954. if (ret == ICA_NONCE_TIMEOUT || ret == ICA_NONCE_RESTART) {
  955. timersub(&tv_finish, &tv_start, &elapsed);
  956. // ONLY up to just when it aborted
  957. // We didn't read a reply so we don't subtract ICARUS_READ_TIME
  958. estimate_hashes = ((double)(elapsed.tv_sec)
  959. + ((double)(elapsed.tv_usec))/((double)1000000)) / info->Hs;
  960. // If some Serial-USB delay allowed the full nonce range to
  961. // complete it can't have done more than a full nonce
  962. if (unlikely(estimate_hashes > 0xffffffff))
  963. estimate_hashes = 0xffffffff;
  964. applog(LOG_DEBUG, "%s%d: no nonce = 0x%08lX hashes (%ld.%06lds)",
  965. icarus->drv->name, icarus->device_id,
  966. (long unsigned int)estimate_hashes,
  967. elapsed.tv_sec, elapsed.tv_usec);
  968. hash_count = estimate_hashes;
  969. goto out;
  970. }
  971. memcpy((char *)&nonce, nonce_bin, sizeof(nonce_bin));
  972. nonce = htobe32(nonce);
  973. curr_hw_errors = icarus->hw_errors;
  974. submit_nonce(thr, work, nonce);
  975. was_hw_error = (curr_hw_errors > icarus->hw_errors);
  976. hash_count = (nonce & info->nonce_mask);
  977. hash_count++;
  978. hash_count *= info->fpga_count;
  979. #if 0
  980. // This appears to only return zero nonce values
  981. if (usb_buffer_size(icarus) > 3) {
  982. memcpy((char *)&nonce, icarus->usbdev->buffer, sizeof(nonce_bin));
  983. nonce = htobe32(nonce);
  984. applog(LOG_WARNING, "%s%d: attempting to submit 2nd nonce = 0x%08lX",
  985. icarus->drv->name, icarus->device_id,
  986. (long unsigned int)nonce);
  987. curr_hw_errors = icarus->hw_errors;
  988. submit_nonce(thr, work, nonce);
  989. was_hw_error = (curr_hw_errors > icarus->hw_errors);
  990. }
  991. #endif
  992. if (opt_debug || info->do_icarus_timing)
  993. timersub(&tv_finish, &tv_start, &elapsed);
  994. applog(LOG_DEBUG, "%s%d: nonce = 0x%08x = 0x%08lX hashes (%ld.%06lds)",
  995. icarus->drv->name, icarus->device_id,
  996. nonce, (long unsigned int)hash_count,
  997. elapsed.tv_sec, elapsed.tv_usec);
  998. // Ignore possible end condition values ... and hw errors
  999. // TODO: set limitations on calculated values depending on the device
  1000. // to avoid crap values caused by CPU/Task Switching/Swapping/etc
  1001. if (info->do_icarus_timing
  1002. && !was_hw_error
  1003. && ((nonce & info->nonce_mask) > END_CONDITION)
  1004. && ((nonce & info->nonce_mask) < (info->nonce_mask & ~END_CONDITION))) {
  1005. cgtime(&tv_history_start);
  1006. history0 = &(info->history[0]);
  1007. if (history0->values == 0)
  1008. timeradd(&tv_start, &history_sec, &(history0->finish));
  1009. Ti = (double)(elapsed.tv_sec)
  1010. + ((double)(elapsed.tv_usec))/((double)1000000)
  1011. - ((double)ICARUS_READ_TIME(info->baud));
  1012. Xi = (double)hash_count;
  1013. history0->sumXiTi += Xi * Ti;
  1014. history0->sumXi += Xi;
  1015. history0->sumTi += Ti;
  1016. history0->sumXi2 += Xi * Xi;
  1017. history0->values++;
  1018. if (history0->hash_count_max < hash_count)
  1019. history0->hash_count_max = hash_count;
  1020. if (history0->hash_count_min > hash_count || history0->hash_count_min == 0)
  1021. history0->hash_count_min = hash_count;
  1022. if (history0->values >= info->min_data_count
  1023. && timercmp(&tv_start, &(history0->finish), >)) {
  1024. for (i = INFO_HISTORY; i > 0; i--)
  1025. memcpy(&(info->history[i]),
  1026. &(info->history[i-1]),
  1027. sizeof(struct ICARUS_HISTORY));
  1028. // Initialise history0 to zero for summary calculation
  1029. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  1030. // We just completed a history data set
  1031. // So now recalc read_time based on the whole history thus we will
  1032. // initially get more accurate until it completes INFO_HISTORY
  1033. // total data sets
  1034. count = 0;
  1035. for (i = 1 ; i <= INFO_HISTORY; i++) {
  1036. history = &(info->history[i]);
  1037. if (history->values >= MIN_DATA_COUNT) {
  1038. count++;
  1039. history0->sumXiTi += history->sumXiTi;
  1040. history0->sumXi += history->sumXi;
  1041. history0->sumTi += history->sumTi;
  1042. history0->sumXi2 += history->sumXi2;
  1043. history0->values += history->values;
  1044. if (history0->hash_count_max < history->hash_count_max)
  1045. history0->hash_count_max = history->hash_count_max;
  1046. if (history0->hash_count_min > history->hash_count_min || history0->hash_count_min == 0)
  1047. history0->hash_count_min = history->hash_count_min;
  1048. }
  1049. }
  1050. // All history data
  1051. Hs = (history0->values*history0->sumXiTi - history0->sumXi*history0->sumTi)
  1052. / (history0->values*history0->sumXi2 - history0->sumXi*history0->sumXi);
  1053. W = history0->sumTi/history0->values - Hs*history0->sumXi/history0->values;
  1054. hash_count_range = history0->hash_count_max - history0->hash_count_min;
  1055. values = history0->values;
  1056. // Initialise history0 to zero for next data set
  1057. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  1058. fullnonce = W + Hs * (((double)0xffffffff) + 1);
  1059. read_time = SECTOMS(fullnonce) - ICARUS_READ_REDUCE;
  1060. if (info->read_time_limit > 0 && read_time > info->read_time_limit) {
  1061. read_time = info->read_time_limit;
  1062. limited = true;
  1063. } else
  1064. limited = false;
  1065. info->Hs = Hs;
  1066. info->read_time = read_time;
  1067. info->fullnonce = fullnonce;
  1068. info->count = count;
  1069. info->W = W;
  1070. info->values = values;
  1071. info->hash_count_range = hash_count_range;
  1072. if (info->min_data_count < MAX_MIN_DATA_COUNT)
  1073. info->min_data_count *= 2;
  1074. else if (info->timing_mode == MODE_SHORT)
  1075. info->do_icarus_timing = false;
  1076. applog(LOG_WARNING, "%s%d Re-estimate: Hs=%e W=%e read_time=%dms%s fullnonce=%.3fs",
  1077. icarus->drv->name, icarus->device_id, Hs, W, read_time,
  1078. limited ? " (limited)" : "", fullnonce);
  1079. }
  1080. info->history_count++;
  1081. cgtime(&tv_history_finish);
  1082. timersub(&tv_history_finish, &tv_history_start, &tv_history_finish);
  1083. timeradd(&tv_history_finish, &(info->history_time), &(info->history_time));
  1084. }
  1085. out:
  1086. free_work(work);
  1087. return hash_count;
  1088. }
  1089. static struct api_data *icarus_api_stats(struct cgpu_info *cgpu)
  1090. {
  1091. struct api_data *root = NULL;
  1092. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(cgpu->device_data);
  1093. // Warning, access to these is not locked - but we don't really
  1094. // care since hashing performance is way more important than
  1095. // locking access to displaying API debug 'stats'
  1096. // If locking becomes an issue for any of them, use copy_data=true also
  1097. root = api_add_int(root, "read_time", &(info->read_time), false);
  1098. root = api_add_int(root, "read_time_limit", &(info->read_time_limit), false);
  1099. root = api_add_double(root, "fullnonce", &(info->fullnonce), false);
  1100. root = api_add_int(root, "count", &(info->count), false);
  1101. root = api_add_hs(root, "Hs", &(info->Hs), false);
  1102. root = api_add_double(root, "W", &(info->W), false);
  1103. root = api_add_uint(root, "total_values", &(info->values), false);
  1104. root = api_add_uint64(root, "range", &(info->hash_count_range), false);
  1105. root = api_add_uint64(root, "history_count", &(info->history_count), false);
  1106. root = api_add_timeval(root, "history_time", &(info->history_time), false);
  1107. root = api_add_uint(root, "min_data_count", &(info->min_data_count), false);
  1108. root = api_add_uint(root, "timing_values", &(info->history[0].values), false);
  1109. root = api_add_const(root, "timing_mode", timing_mode_str(info->timing_mode), false);
  1110. root = api_add_bool(root, "is_timing", &(info->do_icarus_timing), false);
  1111. root = api_add_int(root, "baud", &(info->baud), false);
  1112. root = api_add_int(root, "work_division", &(info->work_division), false);
  1113. root = api_add_int(root, "fpga_count", &(info->fpga_count), false);
  1114. return root;
  1115. }
  1116. static void icarus_statline_before(char *buf, size_t bufsiz, struct cgpu_info *cgpu)
  1117. {
  1118. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(cgpu->device_data);
  1119. if (info->ident == IDENT_CMR2 && info->cmr2_speed > 0)
  1120. tailsprintf(buf, bufsiz, "%5.1fMhz", (float)(info->cmr2_speed) * ICARUS_CMR2_SPEED_FACTOR);
  1121. else
  1122. tailsprintf(buf, bufsiz, " ");
  1123. tailsprintf(buf, bufsiz, " | ");
  1124. }
  1125. static void icarus_shutdown(__maybe_unused struct thr_info *thr)
  1126. {
  1127. // TODO: ?
  1128. }
  1129. static void icarus_identify(struct cgpu_info *cgpu)
  1130. {
  1131. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(cgpu->device_data);
  1132. if (info->ident == IDENT_CMR2)
  1133. info->flash_next_work = true;
  1134. }
  1135. static char *icarus_set(struct cgpu_info *cgpu, char *option, char *setting, char *replybuf)
  1136. {
  1137. struct ICARUS_INFO *info = (struct ICARUS_INFO *)(cgpu->device_data);
  1138. int val;
  1139. if (info->ident != IDENT_CMR2) {
  1140. strcpy(replybuf, "no set options available");
  1141. return replybuf;
  1142. }
  1143. if (strcasecmp(option, "help") == 0) {
  1144. sprintf(replybuf, "clock: range %d-%d",
  1145. ICARUS_CMR2_SPEED_MIN_INT, ICARUS_CMR2_SPEED_MAX_INT);
  1146. return replybuf;
  1147. }
  1148. if (strcasecmp(option, "clock") == 0) {
  1149. if (!setting || !*setting) {
  1150. sprintf(replybuf, "missing clock setting");
  1151. return replybuf;
  1152. }
  1153. val = atoi(setting);
  1154. if (val < ICARUS_CMR2_SPEED_MIN_INT || val > ICARUS_CMR2_SPEED_MAX_INT) {
  1155. sprintf(replybuf, "invalid clock: '%s' valid range %d-%d",
  1156. setting,
  1157. ICARUS_CMR2_SPEED_MIN_INT,
  1158. ICARUS_CMR2_SPEED_MAX_INT);
  1159. }
  1160. info->cmr2_speed = CMR2_INT_TO_SPEED(val);
  1161. info->speed_next_work = true;
  1162. return NULL;
  1163. }
  1164. sprintf(replybuf, "Unknown option: %s", option);
  1165. return replybuf;
  1166. }
  1167. struct device_drv icarus_drv = {
  1168. .drv_id = DRIVER_icarus,
  1169. .dname = "Icarus",
  1170. .name = "ICA",
  1171. .drv_detect = icarus_detect,
  1172. .hash_work = &hash_driver_work,
  1173. .get_api_stats = icarus_api_stats,
  1174. .get_statline_before = icarus_statline_before,
  1175. .set_device = icarus_set,
  1176. .identify_device = icarus_identify,
  1177. .thread_prepare = icarus_prepare,
  1178. .scanwork = icarus_scanwork,
  1179. .thread_shutdown = icarus_shutdown,
  1180. };