driver-bab.c 49 KB

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  1. /*
  2. * Copyright 2013 Andrew Smith
  3. * Copyright 2013 bitfury
  4. *
  5. * BitFury GPIO code based on chainminer code:
  6. * https://github.com/bfsb/chainminer
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the Free
  10. * Software Foundation; either version 3 of the License, or (at your option)
  11. * any later version. See COPYING for more details.
  12. */
  13. #include "config.h"
  14. #include "compat.h"
  15. #include "miner.h"
  16. #include "sha2.h"
  17. /*
  18. * Tested on RPi running Raspbian with BlackArrow BitFury V1 16 chip GPIO board
  19. */
  20. #ifndef LINUX
  21. static void bab_detect(__maybe_unused bool hotplug)
  22. {
  23. }
  24. #else
  25. #include <unistd.h>
  26. #include <linux/spi/spidev.h>
  27. #include <sys/mman.h>
  28. #include <sys/ioctl.h>
  29. #include <fcntl.h>
  30. #define BAB_SPI_BUS 0
  31. #define BAB_SPI_CHIP 0
  32. #define BAB_SPI_SPEED 96000
  33. #define BAB_SPI_BUFSIZ 1024
  34. #define BAB_ADDR(_n) (*((babinfo->gpio) + (_n)))
  35. #define BAB_INP_GPIO(_n) BAB_ADDR((_n) / 10) &= (~(7 << (((_n) % 10) * 3)))
  36. #define BAB_OUT_GPIO(_n) BAB_ADDR((_n) / 10) |= (1 << (((_n) % 10) * 3))
  37. #define BAB_OUT_GPIO_V(_n, _v) BAB_ADDR((_n) / 10) |= (((_v) <= 3 ? (_v) + 4 : \
  38. ((_v) == 4 ? 3 : 2)) << (((_n) % 10) * 3))
  39. #define BAB_GPIO_SET BAB_ADDR(7)
  40. #define BAB_GPIO_CLR BAB_ADDR(10)
  41. #define BAB_GPIO_LEVEL BAB_ADDR(13)
  42. #define BAB_MAXCHIPS 256
  43. #define BAB_MAXBUF (BAB_MAXCHIPS * 512)
  44. #define BAB_MAXBANKS 4
  45. #define BAB_CORES 16
  46. #define BAB_X_COORD 21
  47. #define BAB_Y_COORD 36
  48. #define BAB_BREAK ((uint8_t *)"\04")
  49. #define BAB_ASYNC ((uint8_t *)"\05")
  50. #define BAB_SYNC ((uint8_t *)"\06")
  51. #define BAB_FFL " - from %s %s() line %d"
  52. #define BAB_FFL_HERE __FILE__, __func__, __LINE__
  53. #define BAB_FFL_PASS file, func, line
  54. #define bab_reset(_bank, _times) _bab_reset(babcgpu, babinfo, _bank, _times)
  55. #define bab_txrx(_buf, _siz, _det) _bab_txrx(babcgpu, babinfo, _buf, _siz, _det, BAB_FFL_HERE)
  56. #define bab_add_buf(_data) _bab_add_buf(babcgpu, babinfo, _data, sizeof(_data)-1, BAB_FFL_HERE)
  57. #define BAB_ADD_BREAK() _bab_add_buf(babcgpu, babinfo, BAB_BREAK, 1, BAB_FFL_HERE)
  58. #define BAB_ADD_ASYNC() _bab_add_buf(babcgpu, babinfo, BAB_ASYNC, 1, BAB_FFL_HERE)
  59. #define bab_config_reg(_reg, _ena) _bab_config_reg(babcgpu, babinfo, _reg, _ena, BAB_FFL_HERE)
  60. #define bab_add_data(_addr, _data, _siz) _bab_add_data(babcgpu, babinfo, _addr, (const uint8_t *)(_data), _siz, BAB_FFL_HERE)
  61. #define BAB_ADD_MIN 4
  62. #define BAB_ADD_MAX 128
  63. #define BAB_STATE_DONE 0
  64. #define BAB_STATE_READY 1
  65. #define BAB_STATE_SENDING 2
  66. #define BAB_STATE_SENT 3
  67. #define BAB_STATE_READING 4
  68. #define BAB_SPI_BUFFERS 2
  69. #define BAB_BASEA 4
  70. #define BAB_BASEB 61
  71. #define BAB_COUNTERS 16
  72. static const uint8_t bab_counters[BAB_COUNTERS] = {
  73. 64, 64,
  74. BAB_BASEA, BAB_BASEA+4,
  75. BAB_BASEA+2, BAB_BASEA+2+16,
  76. BAB_BASEA, BAB_BASEA+1,
  77. (BAB_BASEB)%65, (BAB_BASEB+1)%65,
  78. (BAB_BASEB+3)%65, (BAB_BASEB+3+16)%65,
  79. (BAB_BASEB+4)%65, (BAB_BASEB+4+4)%65,
  80. (BAB_BASEB+3+3)%65, (BAB_BASEB+3+1+3)%65
  81. };
  82. #define BAB_W1 16
  83. static const uint32_t bab_w1[BAB_W1] = {
  84. 0, 0, 0, 0xffffffff,
  85. 0x80000000, 0, 0, 0,
  86. 0, 0, 0, 0,
  87. 0, 0, 0, 0x00000280
  88. };
  89. #define BAB_W2 8
  90. static const uint32_t bab_w2[BAB_W2] = {
  91. 0x80000000, 0, 0, 0,
  92. 0, 0, 0, 0x00000100
  93. };
  94. #define BAB_TEST_DATA 19
  95. static const uint32_t bab_test_data[BAB_TEST_DATA] = {
  96. 0xb0e72d8e, 0x1dc5b862, 0xe9e7c4a6, 0x3050f1f5,
  97. 0x8a1a6b7e, 0x7ec384e8, 0x42c1c3fc, 0x8ed158a1,
  98. 0x8a1a6b7e, 0x6f484872, 0x4ff0bb9b, 0x12c97f07,
  99. 0xb0e72d8e, 0x55d979bc, 0x39403296, 0x40f09e84,
  100. 0x8a0bb7b7, 0x33af304f, 0x0b290c1a //, 0xf0c4e61f
  101. };
  102. //maximum number of chips on alternative bank
  103. // #define BANKCHIPS 64
  104. /*
  105. * maximum chip speed available for auto tuner
  106. * speed/nrate/hrate/watt
  107. * 53/ 97/ 100/ 84
  108. * 54/ 98/ 107/ 88
  109. * 55/ 99/ 115/ 93
  110. * 56/ 101/ 125/ 99
  111. */
  112. #define BAB_MAXSPEED 57
  113. #define BAB_DEFSPEED 54
  114. #define BAB_MINSPEED 52
  115. #define MIDSTATE_BYTES 32
  116. #define MERKLE_OFFSET 64
  117. #define MERKLE_BYTES 12
  118. #define BLOCK_HEADER_BYTES 80
  119. #define MIDSTATE_UINTS (MIDSTATE_BYTES / sizeof(uint32_t))
  120. #define DATA_UINTS ((BLOCK_HEADER_BYTES / sizeof(uint32_t)) - 1)
  121. // Auto adjust
  122. #define BAB_AUTO_REG 0
  123. #define BAB_AUTO_VAL 0x01
  124. // iclk
  125. #define BAB_ICLK_REG 1
  126. #define BAB_ICLK_VAL 0x02
  127. // No fast clock
  128. #define BAB_FAST_REG 2
  129. #define BAB_FAST_VAL 0x04
  130. // Divide by 2
  131. #define BAB_DIV2_REG 3
  132. #define BAB_DIV2_VAL 0x08
  133. // Slow Clock
  134. #define BAB_SLOW_REG 4
  135. #define BAB_SLOW_VAL 0x10
  136. // No oclk
  137. #define BAB_OCLK_REG 6
  138. #define BAB_OCLK_VAL 0x20
  139. // Has configured
  140. #define BAB_CFGD_VAL 0x40
  141. #define BAB_DEFCONF (BAB_AUTO_VAL | \
  142. BAB_ICLK_VAL | \
  143. BAB_DIV2_VAL | \
  144. BAB_SLOW_VAL)
  145. #define BAB_REG_CLR_FROM 7
  146. #define BAB_REG_CLR_TO 11
  147. #define BAB_AUTO_SET(_c) ((_c) & BAB_AUTO_VAL)
  148. #define BAB_ICLK_SET(_c) ((_c) & BAB_ICLK_VAL)
  149. #define BAB_FAST_SET(_c) ((_c) & BAB_FAST_VAL)
  150. #define BAB_DIV2_SET(_c) ((_c) & BAB_DIV2_VAL)
  151. #define BAB_SLOW_SET(_c) ((_c) & BAB_SLOW_VAL)
  152. #define BAB_OCLK_SET(_c) ((_c) & BAB_OCLK_VAL)
  153. #define BAB_CFGD_SET(_c) ((_c) & BAB_CFGD_VAL)
  154. #define BAB_AUTO_BIT(_c) (BAB_AUTO_SET(_c) ? true : false)
  155. #define BAB_ICLK_BIT(_c) (BAB_ICLK_SET(_c) ? false : true)
  156. #define BAB_FAST_BIT(_c) (BAB_FAST_SET(_c) ? true : false)
  157. #define BAB_DIV2_BIT(_c) (BAB_DIV2_SET(_c) ? false : true)
  158. #define BAB_SLOW_BIT(_c) (BAB_SLOW_SET(_c) ? true : false)
  159. #define BAB_OCLK_BIT(_c) (BAB_OCLK_SET(_c) ? true : false)
  160. #define BAB_COUNT_ADDR 0x0100
  161. #define BAB_W1A_ADDR 0x1000
  162. #define BAB_W1B_ADDR 0x1400
  163. #define BAB_W2_ADDR 0x1900
  164. #define BAB_INP_ADDR 0x3000
  165. #define BAB_OSC_ADDR 0x6000
  166. #define BAB_REG_ADDR 0x7000
  167. /*
  168. * valid: 0x01 0x03 0x07 0x0F 0x1F 0x3F 0x7F 0xFF
  169. * max { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0x00 }
  170. * max { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x3F, 0x00 }
  171. * avg { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00 }
  172. * slo { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x3F, 0x00 }
  173. * min { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
  174. * good: 0x1F (97) 0x3F (104) 0x7F (109) 0xFF (104)
  175. */
  176. #define BAB_OSC 8
  177. static const uint8_t bab_osc_bits[BAB_OSC] =
  178. { 0x01, 0x03, 0x07, 0x0F, 0x1F, 0x3F, 0x7F, 0xFF };
  179. static const uint8_t bab_reg_ena[4] = { 0xc1, 0x6a, 0x59, 0xe3 };
  180. static const uint8_t bab_reg_dis[4] = { 0x00, 0x00, 0x00, 0x00 };
  181. #define BAB_NONCE_OFFSETS 3
  182. static const uint32_t bab_nonce_offsets[] = {-0x800000, 0, -0x400000};
  183. struct bab_work_send {
  184. uint32_t midstate[MIDSTATE_UINTS];
  185. uint32_t ms3steps[MIDSTATE_UINTS];
  186. uint32_t merkle7;
  187. uint32_t ntime;
  188. uint32_t bits;
  189. };
  190. #define BAB_REPLY_NONCES 16
  191. struct bab_work_reply {
  192. uint32_t nonce[BAB_REPLY_NONCES];
  193. uint32_t jobsel;
  194. };
  195. #define MAX_BLISTS 4096
  196. typedef struct blist {
  197. struct blist *prev;
  198. struct blist *next;
  199. struct work *work;
  200. int nonces;
  201. } BLIST;
  202. #define MAX_RLISTS 256
  203. typedef struct rlist {
  204. struct rlist *prev;
  205. struct rlist *next;
  206. int chip;
  207. uint32_t nonce;
  208. bool first_second;
  209. } RLIST;
  210. struct bab_info {
  211. struct thr_info spi_thr;
  212. struct thr_info res_thr;
  213. pthread_mutex_t spi_lock;
  214. pthread_mutex_t res_lock;
  215. pthread_mutex_t did_lock;
  216. cglock_t blist_lock;
  217. // All GPIO goes through this
  218. volatile unsigned *gpio;
  219. int spifd;
  220. int chips;
  221. uint32_t chip_spis[BAB_MAXCHIPS+1];
  222. int buffer;
  223. int buf_status[BAB_SPI_BUFFERS];
  224. uint8_t buf_write[BAB_SPI_BUFFERS][BAB_MAXBUF];
  225. uint8_t buf_read[BAB_SPI_BUFFERS][BAB_MAXBUF];
  226. uint32_t buf_used[BAB_SPI_BUFFERS];
  227. uint32_t chip_off[BAB_SPI_BUFFERS][BAB_MAXCHIPS+1];
  228. uint32_t bank_off[BAB_SPI_BUFFERS][BAB_MAXBANKS+2];
  229. struct bab_work_send chip_input[BAB_MAXCHIPS];
  230. struct bab_work_reply chip_results[BAB_MAXCHIPS];
  231. struct bab_work_reply chip_prev[BAB_MAXCHIPS];
  232. uint8_t chip_fast[BAB_MAXCHIPS];
  233. uint8_t chip_conf[BAB_MAXCHIPS];
  234. uint8_t old_fast[BAB_MAXCHIPS];
  235. uint8_t old_conf[BAB_MAXCHIPS];
  236. uint8_t chip_bank[BAB_MAXCHIPS+1];
  237. uint8_t osc[BAB_OSC];
  238. int fixchip;
  239. /*
  240. * Ignore errors in the first work reply since
  241. * they may be from a previous run or random junk
  242. * There can be >100 with just a 16 chip board
  243. */
  244. uint32_t initial_ignored;
  245. bool nonce_before[BAB_MAXCHIPS];
  246. bool not_first_reply[BAB_MAXCHIPS];
  247. // Stats
  248. struct timeval chip_start[BAB_MAXCHIPS];
  249. int chip_busy[BAB_MAXCHIPS];
  250. uint64_t core_good[BAB_MAXCHIPS][BAB_CORES];
  251. uint64_t core_bad[BAB_MAXCHIPS][BAB_CORES];
  252. uint64_t chip_spie[BAB_MAXCHIPS]; // spi errors
  253. uint64_t chip_miso[BAB_MAXCHIPS]; // msio errors
  254. uint64_t chip_nonces[BAB_MAXCHIPS];
  255. uint64_t chip_good[BAB_MAXCHIPS];
  256. uint64_t chip_bad[BAB_MAXCHIPS];
  257. uint64_t chip_ncore[BAB_MAXCHIPS][BAB_X_COORD][BAB_Y_COORD];
  258. uint64_t untested_nonces;
  259. uint64_t tested_nonces;
  260. uint64_t new_nonces;
  261. uint64_t ok_nonces;
  262. uint64_t nonce_offset_count[BAB_NONCE_OFFSETS];
  263. uint64_t total_tests;
  264. uint64_t max_tests_per_nonce;
  265. uint64_t total_links;
  266. uint64_t max_links;
  267. int blist_count;
  268. int bfree_count;
  269. int work_count;
  270. int chip_count;
  271. BLIST *bfree_list;
  272. BLIST *work_list;
  273. BLIST *chip_list[BAB_MAXCHIPS];
  274. int rlist_count;
  275. int rfree_count;
  276. int res_count;
  277. RLIST *rfree_list;
  278. RLIST *res_list_head;
  279. RLIST *res_list_tail;
  280. struct timeval last_did;
  281. bool initialised;
  282. };
  283. static BLIST *new_blist_set(struct cgpu_info *babcgpu)
  284. {
  285. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  286. BLIST *blist = NULL;
  287. int i;
  288. blist = calloc(MAX_BLISTS, sizeof(*blist));
  289. if (!blist)
  290. quithere(1, "Failed to calloc blist - when old count=%d", babinfo->blist_count);
  291. babinfo->blist_count += MAX_BLISTS;
  292. babinfo->bfree_count = MAX_BLISTS;
  293. blist[0].prev = NULL;
  294. blist[0].next = &(blist[1]);
  295. for (i = 1; i < MAX_BLISTS-1; i++) {
  296. blist[i].prev = &blist[i-1];
  297. blist[i].next = &blist[i+1];
  298. }
  299. blist[MAX_BLISTS-1].prev = &(blist[MAX_BLISTS-2]);
  300. blist[MAX_BLISTS-1].next = NULL;
  301. return blist;
  302. }
  303. static BLIST *next_work(struct cgpu_info *babcgpu, int chip)
  304. {
  305. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  306. BLIST *bitem;
  307. cg_wlock(&babinfo->blist_lock);
  308. bitem = babinfo->work_list;
  309. if (bitem) {
  310. // Unlink it from work
  311. if (bitem->next)
  312. bitem->next->prev = NULL;
  313. babinfo->work_list = bitem->next;
  314. babinfo->work_count--;
  315. // Add it to the chip
  316. bitem->next = babinfo->chip_list[chip];
  317. bitem->prev = NULL;
  318. if (bitem->next)
  319. bitem->next->prev = bitem;
  320. babinfo->chip_list[chip] = bitem;
  321. babinfo->chip_count++;
  322. }
  323. cg_wunlock(&babinfo->blist_lock);
  324. return bitem;
  325. }
  326. static void discard_last(struct cgpu_info *babcgpu, int chip)
  327. {
  328. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  329. BLIST *bitem;
  330. cg_wlock(&babinfo->blist_lock);
  331. bitem = babinfo->chip_list[chip];
  332. if (bitem) {
  333. // Unlink it from the chip
  334. if (bitem->next)
  335. bitem->next->prev = NULL;
  336. babinfo->chip_list[chip] = bitem->next;
  337. babinfo->chip_count--;
  338. // Put it in the free list
  339. bitem->next = babinfo->bfree_list;
  340. bitem->prev = NULL;
  341. if (bitem->next)
  342. bitem->next->prev = bitem;
  343. babinfo->bfree_list = bitem;
  344. babinfo->bfree_count++;
  345. }
  346. cg_wunlock(&babinfo->blist_lock);
  347. }
  348. static BLIST *store_work(struct cgpu_info *babcgpu, struct work *work)
  349. {
  350. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  351. BLIST *bitem = NULL;
  352. int ran_out = 0;
  353. cg_wlock(&babinfo->blist_lock);
  354. if (babinfo->bfree_list == NULL) {
  355. ran_out = babinfo->blist_count;
  356. babinfo->bfree_list = new_blist_set(babcgpu);
  357. }
  358. // unlink from free
  359. bitem = babinfo->bfree_list;
  360. babinfo->bfree_list = babinfo->bfree_list->next;
  361. if (babinfo->bfree_list)
  362. babinfo->bfree_list->prev = NULL;
  363. babinfo->bfree_count--;
  364. // add to work
  365. bitem->next = babinfo->work_list;
  366. bitem->prev = NULL;
  367. if (bitem->next)
  368. bitem->next->prev = bitem;
  369. babinfo->work_list = bitem;
  370. babinfo->work_count++;
  371. bitem->work = work;
  372. bitem->nonces = 0;
  373. cg_wunlock(&babinfo->blist_lock);
  374. if (ran_out > 0) {
  375. applog(LOG_ERR, "%s%i: BLIST used count exceeded %d, now %d (work=%d chip=%d)",
  376. babcgpu->drv->name, babcgpu->device_id,
  377. ran_out, babinfo->blist_count,
  378. babinfo->work_count,
  379. babinfo->chip_count);
  380. }
  381. return bitem;
  382. }
  383. static void free_blist(struct cgpu_info *babcgpu, BLIST *bhead, int chip)
  384. {
  385. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  386. struct work *work;
  387. BLIST *bitem;
  388. if (!bhead)
  389. return;
  390. // Unlink it from the chip
  391. cg_wlock(&babinfo->blist_lock);
  392. if (unlikely(bhead == babinfo->chip_list[chip])) {
  393. // Removing the chip head is an error
  394. bhead = bhead->next;
  395. babinfo->chip_list[chip]->next = NULL;
  396. } else
  397. bhead->prev->next = NULL;
  398. bitem = bhead;
  399. while (bitem) {
  400. babinfo->chip_count--;
  401. bitem = bitem->next;
  402. }
  403. cg_wunlock(&babinfo->blist_lock);
  404. while (bhead) {
  405. bitem = bhead;
  406. bhead = bitem->next;
  407. // add to free
  408. cg_wlock(&babinfo->blist_lock);
  409. bitem->next = babinfo->bfree_list;
  410. if (babinfo->bfree_list)
  411. babinfo->bfree_list->prev = bitem;
  412. bitem->prev = NULL;
  413. babinfo->bfree_list = bitem;
  414. babinfo->bfree_count++;
  415. work = bitem->work;
  416. cg_wunlock(&babinfo->blist_lock);
  417. work_completed(babcgpu, work);
  418. }
  419. }
  420. static RLIST *new_rlist_set(struct cgpu_info *babcgpu)
  421. {
  422. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  423. RLIST *rlist = NULL;
  424. int i;
  425. rlist = calloc(MAX_RLISTS, sizeof(*rlist));
  426. if (!rlist)
  427. quithere(1, "Failed to calloc rlist - when old count=%d", babinfo->rlist_count);
  428. babinfo->rlist_count += MAX_RLISTS;
  429. babinfo->rfree_count = MAX_RLISTS;
  430. rlist[0].prev = NULL;
  431. rlist[0].next = &(rlist[1]);
  432. for (i = 1; i < MAX_RLISTS-1; i++) {
  433. rlist[i].prev = &rlist[i-1];
  434. rlist[i].next = &rlist[i+1];
  435. }
  436. rlist[MAX_RLISTS-1].prev = &(rlist[MAX_RLISTS-2]);
  437. rlist[MAX_RLISTS-1].next = NULL;
  438. return rlist;
  439. }
  440. static RLIST *store_nonce(struct cgpu_info *babcgpu, int chip, uint32_t nonce, bool first_second)
  441. {
  442. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  443. RLIST *ritem = NULL;
  444. int ran_out = 0;
  445. mutex_lock(&(babinfo->res_lock));
  446. if (babinfo->rfree_list == NULL) {
  447. ran_out = babinfo->rlist_count;
  448. babinfo->rfree_list = new_rlist_set(babcgpu);
  449. }
  450. // unlink from rfree
  451. ritem = babinfo->rfree_list;
  452. babinfo->rfree_list = babinfo->rfree_list->next;
  453. if (babinfo->rfree_list)
  454. babinfo->rfree_list->prev = NULL;
  455. babinfo->rfree_count--;
  456. // add to head of results
  457. ritem->next = babinfo->res_list_head;
  458. ritem->prev = NULL;
  459. babinfo->res_list_head = ritem;
  460. if (ritem->next)
  461. ritem->next->prev = ritem;
  462. else
  463. babinfo->res_list_tail = ritem;
  464. babinfo->res_count++;
  465. ritem->chip = chip;
  466. ritem->nonce = nonce;
  467. ritem->first_second = first_second;
  468. mutex_unlock(&(babinfo->res_lock));
  469. if (ran_out > 0) {
  470. applog(LOG_ERR, "%s%i: RLIST used count exceeded %d, now %d (work=%d chip=%d)",
  471. babcgpu->drv->name, babcgpu->device_id,
  472. ran_out, babinfo->rlist_count,
  473. babinfo->work_count,
  474. babinfo->chip_count);
  475. }
  476. return ritem;
  477. }
  478. static bool oldest_nonce(struct cgpu_info *babcgpu, int *chip, uint32_t *nonce, bool *first_second)
  479. {
  480. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  481. RLIST *ritem = NULL;
  482. bool found = false;
  483. mutex_lock(&(babinfo->res_lock));
  484. if (babinfo->res_list_tail) {
  485. // unlink from res
  486. ritem = babinfo->res_list_tail;
  487. if (ritem->prev) {
  488. ritem->prev->next = NULL;
  489. babinfo->res_list_tail = ritem->prev;
  490. } else
  491. babinfo->res_list_head = babinfo->res_list_tail = NULL;
  492. babinfo->res_count--;
  493. found = true;
  494. *chip = ritem->chip;
  495. *nonce = ritem->nonce;
  496. *first_second = ritem->first_second;
  497. // add to rfree
  498. ritem->next = babinfo->rfree_list;
  499. ritem->prev = NULL;
  500. if (ritem->next)
  501. ritem->next->prev = ritem;
  502. babinfo->rfree_list = ritem;
  503. babinfo->rfree_count++;
  504. }
  505. mutex_unlock(&(babinfo->res_lock));
  506. return found;
  507. }
  508. static void _bab_reset(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo, int bank, int times)
  509. {
  510. const int banks[4] = { 18, 23, 24, 25 };
  511. int i;
  512. BAB_INP_GPIO(10);
  513. BAB_OUT_GPIO(10);
  514. BAB_INP_GPIO(11);
  515. BAB_OUT_GPIO(11);
  516. if (bank) {
  517. for (i = 0; i < 4; i++) {
  518. BAB_INP_GPIO(banks[i]);
  519. BAB_OUT_GPIO(banks[i]);
  520. if (bank == i+1)
  521. BAB_GPIO_SET = 1 << banks[i];
  522. else
  523. BAB_GPIO_CLR = 1 << banks[i];
  524. }
  525. cgsleep_us(4096);
  526. } else {
  527. for (i = 0; i < 4; i++)
  528. BAB_INP_GPIO(banks[i]);
  529. }
  530. BAB_GPIO_SET = 1 << 11;
  531. for (i = 0; i < times; i++) { // 1us = 1MHz
  532. BAB_GPIO_SET = 1 << 10;
  533. cgsleep_us(1);
  534. BAB_GPIO_CLR = 1 << 10;
  535. cgsleep_us(1);
  536. }
  537. BAB_GPIO_CLR = 1 << 11;
  538. BAB_INP_GPIO(11);
  539. BAB_INP_GPIO(10);
  540. BAB_INP_GPIO(9);
  541. BAB_OUT_GPIO_V(11, 0);
  542. BAB_OUT_GPIO_V(10, 0);
  543. BAB_OUT_GPIO_V(9, 0);
  544. }
  545. // TODO: handle a false return where this is called?
  546. static bool _bab_txrx(struct cgpu_info *babcgpu, struct bab_info *babinfo, int buf, uint32_t siz, bool detect_ignore, const char *file, const char *func, const int line)
  547. {
  548. int bank, i;
  549. uint32_t pos;
  550. struct spi_ioc_transfer tran;
  551. uintptr_t rbuf, wbuf;
  552. wbuf = (uintptr_t)(babinfo->buf_write[buf]);
  553. rbuf = (uintptr_t)(babinfo->buf_read[buf]);
  554. memset(&tran, 0, sizeof(tran));
  555. tran.delay_usecs = 0;
  556. tran.speed_hz = BAB_SPI_SPEED;
  557. i = 0;
  558. pos = 0;
  559. for (bank = 0; bank <= BAB_MAXBANKS; bank++) {
  560. if (babinfo->bank_off[buf][bank]) {
  561. bab_reset(bank, 64);
  562. break;
  563. }
  564. }
  565. if (unlikely(bank > BAB_MAXBANKS)) {
  566. applog(LOG_ERR, "%s%d: %s() failed to find a bank" BAB_FFL,
  567. babcgpu->drv->name, babcgpu->device_id,
  568. __func__, BAB_FFL_PASS);
  569. return false;
  570. }
  571. while (siz > 0) {
  572. tran.tx_buf = wbuf;
  573. tran.rx_buf = rbuf;
  574. tran.speed_hz = BAB_SPI_SPEED;
  575. if (pos == babinfo->bank_off[buf][bank]) {
  576. for (; ++bank <= BAB_MAXBANKS; ) {
  577. if (babinfo->bank_off[buf][bank] > pos) {
  578. bab_reset(bank, 64);
  579. break;
  580. }
  581. }
  582. }
  583. if (siz < BAB_SPI_BUFSIZ)
  584. tran.len = siz;
  585. else
  586. tran.len = BAB_SPI_BUFSIZ;
  587. if (pos < babinfo->bank_off[buf][bank] &&
  588. babinfo->bank_off[buf][bank] < (pos + tran.len))
  589. tran.len = babinfo->bank_off[buf][bank] - pos;
  590. for (; i < babinfo->chips; i++) {
  591. if (!babinfo->chip_off[buf][i])
  592. continue;
  593. if (babinfo->chip_off[buf][i] >= pos + tran.len) {
  594. tran.speed_hz = babinfo->chip_spis[i];
  595. break;
  596. }
  597. }
  598. if (unlikely(i > babinfo->chips)) {
  599. applog(LOG_ERR, "%s%d: %s() failed to find chip" BAB_FFL,
  600. babcgpu->drv->name, babcgpu->device_id,
  601. __func__, BAB_FFL_PASS);
  602. return false;
  603. }
  604. if (unlikely(babinfo->chip_spis[i] == BAB_SPI_SPEED)) {
  605. applog(LOG_DEBUG, "%s%d: %s() chip[%d] speed %d shouldn't be %d" BAB_FFL,
  606. babcgpu->drv->name, babcgpu->device_id,
  607. __func__, i, (int)babinfo->chip_spis[i],
  608. BAB_SPI_SPEED, BAB_FFL_PASS);
  609. }
  610. if (unlikely(tran.speed_hz == BAB_SPI_SPEED)) {
  611. applog(LOG_DEBUG, "%s%d: %s() transfer speed %d shouldn't be %d" BAB_FFL,
  612. babcgpu->drv->name, babcgpu->device_id,
  613. __func__, (int)tran.speed_hz,
  614. BAB_SPI_SPEED, BAB_FFL_PASS);
  615. }
  616. if (ioctl(babinfo->spifd, SPI_IOC_MESSAGE(1), (void *)&tran) < 0) {
  617. if (!detect_ignore || errno != 110) {
  618. applog(LOG_ERR, "%s%d: ioctl failed err=%d" BAB_FFL,
  619. babcgpu->drv->name, babcgpu->device_id,
  620. errno, BAB_FFL_PASS);
  621. }
  622. return false;
  623. }
  624. siz -= tran.len;
  625. wbuf += tran.len;
  626. rbuf += tran.len;
  627. pos += tran.len;
  628. }
  629. mutex_lock(&(babinfo->did_lock));
  630. cgtime(&(babinfo->last_did));
  631. mutex_unlock(&(babinfo->did_lock));
  632. return true;
  633. }
  634. static void _bab_add_buf_rev(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo, const uint8_t *data, uint32_t siz, const char *file, const char *func, const int line)
  635. {
  636. uint8_t tmp;
  637. uint32_t now_used, i;
  638. int buf;
  639. buf = babinfo->buffer;
  640. now_used = babinfo->buf_used[buf];
  641. if (now_used + siz >= BAB_MAXBUF) {
  642. quitfrom(1, file, func, line,
  643. "%s() buffer %d limit of %d exceeded=%d siz=%d",
  644. __func__, buf, BAB_MAXBUF, now_used + siz, siz);
  645. }
  646. for (i = 0; i < siz; i++) {
  647. tmp = data[i];
  648. tmp = ((tmp & 0xaa)>>1) | ((tmp & 0x55) << 1);
  649. tmp = ((tmp & 0xcc)>>2) | ((tmp & 0x33) << 2);
  650. tmp = ((tmp & 0xf0)>>4) | ((tmp & 0x0f) << 4);
  651. babinfo->buf_write[buf][now_used + i] = tmp;
  652. }
  653. babinfo->buf_used[buf] += siz;
  654. }
  655. static void _bab_add_buf(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo, const uint8_t *data, size_t siz, const char *file, const char *func, const int line)
  656. {
  657. uint32_t now_used;
  658. int buf;
  659. buf = babinfo->buffer;
  660. now_used = babinfo->buf_used[buf];
  661. if (now_used + siz >= BAB_MAXBUF) {
  662. quitfrom(1, file, func, line,
  663. "%s() buffer %d limit of %d exceeded=%d siz=%d",
  664. __func__, buf, BAB_MAXBUF, (int)(now_used + siz), (int)siz);
  665. }
  666. memcpy(&(babinfo->buf_write[buf][now_used]), data, siz);
  667. babinfo->buf_used[buf] += siz;
  668. }
  669. static void _bab_add_data(struct cgpu_info *babcgpu, struct bab_info *babinfo, uint32_t addr, const uint8_t *data, size_t siz, const char *file, const char *func, const int line)
  670. {
  671. uint8_t tmp[3];
  672. int trf_siz;
  673. if (siz < BAB_ADD_MIN || siz > BAB_ADD_MAX) {
  674. quitfrom(1, file, func, line,
  675. "%s() called with invalid siz=%d (min=%d max=%d)",
  676. __func__, (int)siz, BAB_ADD_MIN, BAB_ADD_MAX);
  677. }
  678. trf_siz = siz / 4;
  679. tmp[0] = (trf_siz - 1) | 0xE0;
  680. tmp[1] = (addr >> 8) & 0xff;
  681. tmp[2] = addr & 0xff;
  682. _bab_add_buf(babcgpu, babinfo, tmp, sizeof(tmp), BAB_FFL_PASS);
  683. _bab_add_buf_rev(babcgpu, babinfo, data, siz, BAB_FFL_PASS);
  684. }
  685. static void _bab_config_reg(struct cgpu_info *babcgpu, struct bab_info *babinfo, uint32_t reg, bool enable, const char *file, const char *func, const int line)
  686. {
  687. if (enable) {
  688. _bab_add_data(babcgpu, babinfo, BAB_REG_ADDR + reg*32,
  689. bab_reg_ena, sizeof(bab_reg_ena), BAB_FFL_PASS);
  690. } else {
  691. _bab_add_data(babcgpu, babinfo, BAB_REG_ADDR + reg*32,
  692. bab_reg_dis, sizeof(bab_reg_dis), BAB_FFL_PASS);
  693. }
  694. }
  695. static void bab_set_osc(struct bab_info *babinfo, int chip)
  696. {
  697. int fast, i;
  698. fast = babinfo->chip_fast[chip];
  699. for (i = 0; i < BAB_OSC && fast > BAB_OSC; i++, fast -= BAB_OSC) {
  700. babinfo->osc[i] = 0xff;
  701. }
  702. if (i < BAB_OSC && fast > 0 && fast <= BAB_OSC)
  703. babinfo->osc[i++] = bab_osc_bits[fast - 1];
  704. for (; i < BAB_OSC; i++)
  705. babinfo->osc[i] = 0x00;
  706. applog(LOG_DEBUG, "@osc(chip=%d) fast=%d 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x", chip, fast, babinfo->osc[0], babinfo->osc[1], babinfo->osc[2], babinfo->osc[3], babinfo->osc[4], babinfo->osc[5], babinfo->osc[6], babinfo->osc[7]);
  707. }
  708. static bool bab_put(struct cgpu_info *babcgpu, struct bab_info *babinfo)
  709. {
  710. int buf, i, reg, bank = 0;
  711. babinfo->buffer = -1;
  712. mutex_lock(&(babinfo->spi_lock));
  713. if (babinfo->buf_status[0] == BAB_STATE_DONE) {
  714. babinfo->buffer = 0;
  715. } else if (babinfo->buf_status[1] == BAB_STATE_DONE) {
  716. babinfo->buffer = 1;
  717. } else if (babinfo->buf_status[0] == BAB_STATE_READY) {
  718. babinfo->buf_status[0] = BAB_STATE_DONE;
  719. babinfo->buffer = 0;
  720. } else if (babinfo->buf_status[1] == BAB_STATE_READY) {
  721. babinfo->buf_status[1] = BAB_STATE_DONE;
  722. babinfo->buffer = 1;
  723. }
  724. mutex_unlock(&(babinfo->spi_lock));
  725. if (babinfo->buffer == -1)
  726. return false;
  727. buf = babinfo->buffer;
  728. babinfo->buf_used[buf] = 0;
  729. memset(babinfo->bank_off[buf], 0, sizeof(babinfo->bank_off) / BAB_SPI_BUFFERS);
  730. BAB_ADD_BREAK();
  731. for (i = 0; i < babinfo->chips; i++) {
  732. if (babinfo->chip_bank[i] != bank) {
  733. babinfo->bank_off[buf][bank] = babinfo->buf_used[buf];
  734. bank = babinfo->chip_bank[i];
  735. BAB_ADD_BREAK();
  736. }
  737. if (i == babinfo->fixchip &&
  738. (BAB_CFGD_SET(babinfo->chip_conf[i]) ||
  739. !babinfo->chip_conf[i])) {
  740. bab_set_osc(babinfo, i);
  741. bab_add_data(BAB_OSC_ADDR, babinfo->osc, sizeof(babinfo->osc));
  742. bab_config_reg(BAB_ICLK_REG, BAB_ICLK_BIT(babinfo->chip_conf[i]));
  743. bab_config_reg(BAB_FAST_REG, BAB_FAST_BIT(babinfo->chip_conf[i]));
  744. bab_config_reg(BAB_DIV2_REG, BAB_DIV2_BIT(babinfo->chip_conf[i]));
  745. bab_config_reg(BAB_SLOW_REG, BAB_SLOW_BIT(babinfo->chip_conf[i]));
  746. bab_config_reg(BAB_OCLK_REG, BAB_OCLK_BIT(babinfo->chip_conf[i]));
  747. for (reg = BAB_REG_CLR_FROM; reg <= BAB_REG_CLR_TO; reg++)
  748. bab_config_reg(reg, false);
  749. if (babinfo->chip_conf[i]) {
  750. bab_add_data(BAB_COUNT_ADDR, bab_counters, sizeof(bab_counters));
  751. bab_add_data(BAB_W1A_ADDR, bab_w1, sizeof(bab_w1));
  752. bab_add_data(BAB_W1B_ADDR, bab_w1, sizeof(bab_w1)/2);
  753. bab_add_data(BAB_W2_ADDR, bab_w2, sizeof(bab_w2));
  754. babinfo->chip_conf[i] ^= BAB_CFGD_VAL;
  755. }
  756. babinfo->old_fast[i] = babinfo->chip_fast[i];
  757. babinfo->old_conf[i] = babinfo->chip_conf[i];
  758. } else {
  759. if (babinfo->old_fast[i] != babinfo->chip_fast[i]) {
  760. bab_set_osc(babinfo, i);
  761. bab_add_data(BAB_OSC_ADDR, babinfo->osc, sizeof(babinfo->osc));
  762. babinfo->old_fast[i] = babinfo->chip_fast[i];
  763. }
  764. if (babinfo->old_conf[i] != babinfo->chip_conf[i]) {
  765. if (BAB_ICLK_SET(babinfo->old_conf[i]) !=
  766. BAB_ICLK_SET(babinfo->chip_conf[i]))
  767. bab_config_reg(BAB_ICLK_REG,
  768. BAB_ICLK_BIT(babinfo->chip_conf[i]));
  769. if (BAB_FAST_SET(babinfo->old_conf[i]) !=
  770. BAB_FAST_SET(babinfo->chip_conf[i]))
  771. bab_config_reg(BAB_FAST_REG,
  772. BAB_FAST_BIT(babinfo->chip_conf[i]));
  773. if (BAB_DIV2_SET(babinfo->old_conf[i]) !=
  774. BAB_DIV2_SET(babinfo->chip_conf[i]))
  775. bab_config_reg(BAB_DIV2_REG,
  776. BAB_DIV2_BIT(babinfo->chip_conf[i]));
  777. if (BAB_SLOW_SET(babinfo->old_conf[i]) !=
  778. BAB_SLOW_SET(babinfo->chip_conf[i]))
  779. bab_config_reg(BAB_SLOW_REG,
  780. BAB_SLOW_BIT(babinfo->chip_conf[i]));
  781. if (BAB_OCLK_SET(babinfo->old_conf[i]) !=
  782. BAB_OCLK_SET(babinfo->chip_conf[i]))
  783. bab_config_reg(BAB_OCLK_REG,
  784. BAB_OCLK_BIT(babinfo->chip_conf[i]));
  785. babinfo->old_conf[i] = babinfo->chip_conf[i];
  786. }
  787. }
  788. babinfo->chip_off[buf][i] = babinfo->buf_used[buf] + 3;
  789. if (babinfo->chip_conf[i])
  790. bab_add_data(BAB_INP_ADDR, (uint8_t *)(&(babinfo->chip_input[i])),
  791. sizeof(babinfo->chip_input[i]));
  792. BAB_ADD_ASYNC();
  793. }
  794. babinfo->chip_off[buf][i] = babinfo->buf_used[buf];
  795. babinfo->bank_off[buf][bank] = babinfo->buf_used[buf];
  796. mutex_lock(&(babinfo->spi_lock));
  797. babinfo->buf_status[buf] = BAB_STATE_READY;
  798. mutex_unlock(&(babinfo->spi_lock));
  799. babinfo->fixchip = (babinfo->fixchip + 1) % babinfo->chips;
  800. return true;
  801. }
  802. static bool bab_get(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo)
  803. {
  804. int buf, i;
  805. babinfo->buffer = -1;
  806. mutex_lock(&(babinfo->spi_lock));
  807. if (babinfo->buf_status[0] == BAB_STATE_SENT) {
  808. babinfo->buf_status[0] = BAB_STATE_READING;
  809. babinfo->buffer = 0;
  810. } else if (babinfo->buf_status[1] == BAB_STATE_SENT) {
  811. babinfo->buf_status[1] = BAB_STATE_READING;
  812. babinfo->buffer = 1;
  813. }
  814. mutex_unlock(&(babinfo->spi_lock));
  815. if (babinfo->buffer == -1)
  816. return false;
  817. buf = babinfo->buffer;
  818. for (i = 0; i < babinfo->chips; i++) {
  819. if (babinfo->chip_conf[i] & 0x7f) {
  820. memcpy((void *)&(babinfo->chip_results[i]),
  821. (void *)(babinfo->buf_read[buf] + babinfo->chip_off[buf][i]),
  822. sizeof(babinfo->chip_results[0]));
  823. }
  824. }
  825. mutex_lock(&(babinfo->spi_lock));
  826. babinfo->buf_status[buf] = BAB_STATE_DONE;
  827. mutex_unlock(&(babinfo->spi_lock));
  828. return true;
  829. }
  830. void bab_detect_chips(struct cgpu_info *babcgpu, struct bab_info *babinfo, int bank, int first, int last)
  831. {
  832. int buf, i, reg, j;
  833. if (sizeof(struct bab_work_send) != sizeof(bab_test_data)) {
  834. quithere(1, "struct bab_work_send (%d) and bab_test_data (%d)"
  835. " must be the same size",
  836. (int)sizeof(struct bab_work_send),
  837. (int)sizeof(bab_test_data));
  838. }
  839. memset(babinfo->bank_off, 0, sizeof(babinfo->bank_off));
  840. buf = babinfo->buffer = 0;
  841. babinfo->buf_used[buf] = 0;
  842. BAB_ADD_BREAK();
  843. for (i = first; i < last && i < BAB_MAXCHIPS; i++) {
  844. bab_set_osc(babinfo, i);
  845. bab_add_data(BAB_OSC_ADDR, babinfo->osc, sizeof(babinfo->osc));
  846. bab_config_reg(BAB_ICLK_REG, BAB_ICLK_BIT(babinfo->chip_conf[i]));
  847. bab_config_reg(BAB_FAST_REG, BAB_FAST_BIT(babinfo->chip_conf[i]));
  848. bab_config_reg(BAB_DIV2_REG, BAB_DIV2_BIT(babinfo->chip_conf[i]));
  849. bab_config_reg(BAB_SLOW_REG, BAB_SLOW_BIT(babinfo->chip_conf[i]));
  850. bab_config_reg(BAB_OCLK_REG, BAB_OCLK_BIT(babinfo->chip_conf[i]));
  851. for (reg = BAB_REG_CLR_FROM; reg <= BAB_REG_CLR_TO; reg++)
  852. bab_config_reg(reg, false);
  853. bab_add_data(BAB_COUNT_ADDR, bab_counters, sizeof(bab_counters));
  854. bab_add_data(BAB_W1A_ADDR, bab_w1, sizeof(bab_w1));
  855. bab_add_data(BAB_W1B_ADDR, bab_w1, sizeof(bab_w1)/2);
  856. bab_add_data(BAB_W2_ADDR, bab_w2, sizeof(bab_w2));
  857. babinfo->chip_off[buf][i] = babinfo->buf_used[buf] + 3;
  858. bab_add_data(BAB_INP_ADDR, bab_test_data, sizeof(bab_test_data));
  859. babinfo->chip_off[buf][i+1] = babinfo->buf_used[buf];
  860. babinfo->bank_off[buf][bank] = babinfo->buf_used[buf];
  861. babinfo->chips = i + 1;
  862. bab_txrx(buf, babinfo->buf_used[buf], false);
  863. babinfo->buf_used[buf] = 0;
  864. BAB_ADD_BREAK();
  865. for (j = first; j <= i; j++) {
  866. babinfo->chip_off[buf][j] = babinfo->buf_used[buf] + 3;
  867. BAB_ADD_ASYNC();
  868. }
  869. }
  870. buf = babinfo->buffer = 1;
  871. babinfo->buf_used[buf] = 0;
  872. BAB_ADD_BREAK();
  873. for (i = first; i < last && i < BAB_MAXCHIPS; i++) {
  874. babinfo->chip_off[buf][i] = babinfo->buf_used[buf] + 3;
  875. bab_add_data(BAB_INP_ADDR, bab_test_data, sizeof(bab_test_data));
  876. BAB_ADD_ASYNC();
  877. }
  878. babinfo->chip_off[buf][i] = babinfo->buf_used[buf];
  879. babinfo->bank_off[buf][bank] = babinfo->buf_used[buf];
  880. babinfo->chips = i;
  881. bab_txrx(buf, babinfo->buf_used[buf], true);
  882. babinfo->buf_used[buf] = 0;
  883. babinfo->chips = first;
  884. for (i = first; i < last && i < BAB_MAXCHIPS; i++) {
  885. uint32_t tmp[DATA_UINTS-1];
  886. memcpy(tmp, babinfo->buf_read[buf]+babinfo->chip_off[buf][i], sizeof(tmp));
  887. for (j = 0; j < BAB_SPI_BUFFERS; j++)
  888. babinfo->chip_off[j][i] = 0;
  889. for (j = 0; j < BAB_REPLY_NONCES; j++) {
  890. if (tmp[j] != 0xffffffff && tmp[j] != 0x00000000) {
  891. babinfo->chip_bank[i] = bank;
  892. babinfo->chips = i + 1;
  893. break;
  894. }
  895. }
  896. }
  897. for (i = first ; i < babinfo->chips; i++)
  898. babinfo->chip_bank[i] = bank;
  899. }
  900. static const char *bab_modules[] = {
  901. "i2c-dev",
  902. "i2c-bcm2708",
  903. "spidev",
  904. "spi-bcm2708",
  905. NULL
  906. };
  907. static const char *bab_memory = "/dev/mem";
  908. static int bab_memory_addr = 0x20200000;
  909. static struct {
  910. int request;
  911. int value;
  912. } bab_ioc[] = {
  913. { SPI_IOC_RD_MODE, 0 },
  914. { SPI_IOC_WR_MODE, 0 },
  915. { SPI_IOC_RD_BITS_PER_WORD, 8 },
  916. { SPI_IOC_WR_BITS_PER_WORD, 8 },
  917. { SPI_IOC_RD_MAX_SPEED_HZ, 1000000 },
  918. { SPI_IOC_WR_MAX_SPEED_HZ, 1000000 },
  919. { -1, -1 }
  920. };
  921. static bool bab_init_gpio(struct cgpu_info *babcgpu, struct bab_info *babinfo, int bus, int chip)
  922. {
  923. int i, err, memfd, data;
  924. char buf[64];
  925. for (i = 0; bab_modules[i]; i++) {
  926. snprintf(buf, sizeof(buf), "modprobe %s", bab_modules[i]);
  927. err = system(buf);
  928. if (err) {
  929. applog(LOG_ERR, "%s failed to modprobe %s (%d) - you need to be root?",
  930. babcgpu->drv->dname,
  931. bab_modules[i], err);
  932. goto bad_out;
  933. }
  934. }
  935. memfd = open(bab_memory, O_RDWR | O_SYNC);
  936. if (memfd < 0) {
  937. applog(LOG_ERR, "%s failed open %s (%d)",
  938. babcgpu->drv->dname,
  939. bab_memory, errno);
  940. goto bad_out;
  941. }
  942. babinfo->gpio = (volatile unsigned *)mmap(NULL, BAB_SPI_BUFSIZ,
  943. PROT_READ | PROT_WRITE,
  944. MAP_SHARED, memfd,
  945. bab_memory_addr);
  946. if (babinfo->gpio == MAP_FAILED) {
  947. close(memfd);
  948. applog(LOG_ERR, "%s failed mmap gpio (%d)",
  949. babcgpu->drv->dname,
  950. errno);
  951. goto bad_out;
  952. }
  953. close(memfd);
  954. snprintf(buf, sizeof(buf), "/dev/spidev%d.%d", bus, chip);
  955. babinfo->spifd = open(buf, O_RDWR);
  956. if (babinfo->spifd < 0) {
  957. applog(LOG_ERR, "%s failed to open spidev (%d)",
  958. babcgpu->drv->dname,
  959. errno);
  960. goto map_out;
  961. }
  962. babcgpu->device_path = strdup(buf);
  963. for (i = 0; bab_ioc[i].value != -1; i++) {
  964. data = bab_ioc[i].value;
  965. err = ioctl(babinfo->spifd, bab_ioc[i].request, (void *)&data);
  966. if (err < 0) {
  967. applog(LOG_ERR, "%s failed ioctl (%d) (%d)",
  968. babcgpu->drv->dname,
  969. i, errno);
  970. goto close_out;
  971. }
  972. }
  973. for (i = 0; i < BAB_MAXCHIPS; i++)
  974. babinfo->chip_spis[i] = (int)((1000000.0 / (100.0 + 31.0 * (i + 1))) * 1000);
  975. return true;
  976. close_out:
  977. close(babinfo->spifd);
  978. babinfo->spifd = 0;
  979. free(babcgpu->device_path);
  980. babcgpu->device_path = NULL;
  981. map_out:
  982. munmap((void *)(babinfo->gpio), BAB_SPI_BUFSIZ);
  983. babinfo->gpio = NULL;
  984. bad_out:
  985. return false;
  986. }
  987. static void bab_init_chips(struct cgpu_info *babcgpu, struct bab_info *babinfo)
  988. {
  989. bab_detect_chips(babcgpu, babinfo, 0, 0, BAB_MAXCHIPS);
  990. memcpy(babinfo->old_conf, babinfo->chip_conf, sizeof(babinfo->old_conf));
  991. memcpy(babinfo->old_fast, babinfo->chip_fast, sizeof(babinfo->old_fast));
  992. }
  993. static void bab_detect(bool hotplug)
  994. {
  995. struct cgpu_info *babcgpu = NULL;
  996. struct bab_info *babinfo = NULL;
  997. int i;
  998. if (hotplug)
  999. return;
  1000. babcgpu = calloc(1, sizeof(*babcgpu));
  1001. if (unlikely(!babcgpu))
  1002. quithere(1, "Failed to calloc babcgpu");
  1003. babcgpu->drv = &bab_drv;
  1004. babcgpu->deven = DEV_ENABLED;
  1005. babcgpu->threads = 1;
  1006. babinfo = calloc(1, sizeof(*babinfo));
  1007. if (unlikely(!babinfo))
  1008. quithere(1, "Failed to calloc babinfo");
  1009. babcgpu->device_data = (void *)babinfo;
  1010. for (i = 0; i < BAB_MAXCHIPS; i++) {
  1011. babinfo->chip_conf[i] = BAB_DEFCONF;
  1012. babinfo->chip_fast[i] = BAB_DEFSPEED;
  1013. }
  1014. mutex_init(&babinfo->spi_lock);
  1015. if (!bab_init_gpio(babcgpu, babinfo, BAB_SPI_BUS, BAB_SPI_CHIP))
  1016. goto unalloc;
  1017. applog(LOG_WARNING, "%s V1 testing for %d chips ...", babcgpu->drv->dname, BAB_MAXCHIPS);
  1018. bab_init_chips(babcgpu, babinfo);
  1019. applog(LOG_WARNING, "%s found %d chips", babcgpu->drv->dname, babinfo->chips);
  1020. if (babinfo->chips == 0)
  1021. goto cleanup;
  1022. if (!add_cgpu(babcgpu))
  1023. goto cleanup;
  1024. mutex_init(&babinfo->res_lock);
  1025. mutex_init(&babinfo->did_lock);
  1026. cglock_init(&babinfo->blist_lock);
  1027. babinfo->initialised = true;
  1028. return;
  1029. cleanup:
  1030. close(babinfo->spifd);
  1031. munmap((void *)(babinfo->gpio), BAB_SPI_BUFSIZ);
  1032. unalloc:
  1033. mutex_destroy(&babinfo->spi_lock);
  1034. free(babinfo);
  1035. free(babcgpu);
  1036. }
  1037. static void bab_identify(__maybe_unused struct cgpu_info *babcgpu)
  1038. {
  1039. }
  1040. #define BAB_LONG_WAIT_uS 1200000
  1041. #define BAB_WAIT_MSG_EVERY 10
  1042. #define BAB_LONG_WAIT_SLEEP_uS 100000
  1043. #define BAB_STD_WAIT_uS 3000
  1044. // thread to do spi txrx
  1045. static void *bab_spi(void *userdata)
  1046. {
  1047. struct cgpu_info *babcgpu = (struct cgpu_info *)userdata;
  1048. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1049. struct timeval start, stop;
  1050. double wait;
  1051. int i, buf, msgs;
  1052. applog(LOG_DEBUG, "%s%i: SPIing...",
  1053. babcgpu->drv->name, babcgpu->device_id);
  1054. // Wait until we're ready
  1055. while (babcgpu->shutdown == false) {
  1056. if (babinfo->initialised) {
  1057. break;
  1058. }
  1059. cgsleep_ms(3);
  1060. }
  1061. msgs = 0;
  1062. cgtime(&start);
  1063. while (babcgpu->shutdown == false) {
  1064. buf = -1;
  1065. mutex_lock(&(babinfo->spi_lock));
  1066. for (i = 0; i < BAB_SPI_BUFFERS; i++) {
  1067. if (babinfo->buf_status[i] == BAB_STATE_READY) {
  1068. babinfo->buf_status[i] = BAB_STATE_SENDING;
  1069. buf = i;
  1070. cgtime(&start);
  1071. break;
  1072. }
  1073. }
  1074. mutex_unlock(&(babinfo->spi_lock));
  1075. if (buf == -1) {
  1076. cgtime(&stop);
  1077. wait = us_tdiff(&stop, &start);
  1078. if (wait > BAB_LONG_WAIT_uS) {
  1079. if ((msgs++ % BAB_WAIT_MSG_EVERY) == 0) {
  1080. applog(LOG_WARNING, "%s%i: SPI waiting %.0fus ...",
  1081. babcgpu->drv->name,
  1082. babcgpu->device_id,
  1083. (float)wait);
  1084. }
  1085. }
  1086. cgsleep_us(BAB_LONG_WAIT_SLEEP_uS);
  1087. continue;
  1088. }
  1089. bab_txrx(buf, babinfo->buf_used[buf], false);
  1090. cgtime(&stop);
  1091. wait = us_tdiff(&stop, &start);
  1092. if (wait < BAB_STD_WAIT_uS)
  1093. cgsleep_us((uint64_t)(BAB_STD_WAIT_uS - wait));
  1094. else if (wait > BAB_LONG_WAIT_uS) {
  1095. applog(LOG_DEBUG, "%s%i: SPI waited %.0fus",
  1096. babcgpu->drv->name, babcgpu->device_id,
  1097. (float)wait);
  1098. }
  1099. mutex_lock(&(babinfo->spi_lock));
  1100. babinfo->buf_status[i] = BAB_STATE_SENT;
  1101. mutex_unlock(&(babinfo->spi_lock));
  1102. msgs = 0;
  1103. }
  1104. return NULL;
  1105. }
  1106. static void bab_flush_work(struct cgpu_info *babcgpu)
  1107. {
  1108. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1109. applog(LOG_DEBUG, "%s%i: flushing work",
  1110. babcgpu->drv->name, babcgpu->device_id);
  1111. mutex_lock(&(babinfo->did_lock));
  1112. memset(&(babinfo->last_did), 0, sizeof(babinfo->last_did));
  1113. mutex_unlock(&(babinfo->did_lock));
  1114. }
  1115. static void ms3steps(uint32_t *p)
  1116. {
  1117. uint32_t a, b, c, d, e, f, g, h, new_e, new_a;
  1118. int i;
  1119. a = p[0];
  1120. b = p[1];
  1121. c = p[2];
  1122. d = p[3];
  1123. e = p[4];
  1124. f = p[5];
  1125. g = p[6];
  1126. h = p[7];
  1127. for (i = 0; i < 3; i++) {
  1128. new_e = p[i+16] + sha256_k[i] + h + CH(e,f,g) + SHA256_F2(e) + d;
  1129. new_a = p[i+16] + sha256_k[i] + h + CH(e,f,g) + SHA256_F2(e) +
  1130. SHA256_F1(a) + MAJ(a,b,c);
  1131. d = c;
  1132. c = b;
  1133. b = a;
  1134. a = new_a;
  1135. h = g;
  1136. g = f;
  1137. f = e;
  1138. e = new_e;
  1139. }
  1140. p[15] = a;
  1141. p[14] = b;
  1142. p[13] = c;
  1143. p[12] = d;
  1144. p[11] = e;
  1145. p[10] = f;
  1146. p[9] = g;
  1147. p[8] = h;
  1148. }
  1149. #define DATA_MERKLE7 16
  1150. #define DATA_NTIME 17
  1151. #define DATA_BITS 18
  1152. #define DATA_NONCE 19
  1153. #define WORK_MERKLE7 (16*4)
  1154. #define WORK_NTIME (17*4)
  1155. #define WORK_BITS (18*4)
  1156. #define WORK_NONCE (19*4)
  1157. static uint32_t decnonce(uint32_t in)
  1158. {
  1159. uint32_t out;
  1160. /* First part load */
  1161. out = (in & 0xFF) << 24;
  1162. in >>= 8;
  1163. /* Byte reversal */
  1164. in = (((in & 0xaaaaaaaa) >> 1) | ((in & 0x55555555) << 1));
  1165. in = (((in & 0xcccccccc) >> 2) | ((in & 0x33333333) << 2));
  1166. in = (((in & 0xf0f0f0f0) >> 4) | ((in & 0x0f0f0f0f) << 4));
  1167. out |= (in >> 2) & 0x3FFFFF;
  1168. /* Extraction */
  1169. if (in & 1)
  1170. out |= (1 << 23);
  1171. if (in & 2)
  1172. out |= (1 << 22);
  1173. out -= 0x800004;
  1174. return out;
  1175. }
  1176. /*
  1177. * Find the matching work item by checking the nonce against each work
  1178. * item for the chip
  1179. * Discard any work items older than a match
  1180. */
  1181. static bool oknonce(struct thr_info *thr, struct cgpu_info *babcgpu, int chip, uint32_t nonce)
  1182. {
  1183. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1184. BLIST *bitem;
  1185. unsigned int links, tests;
  1186. int i;
  1187. babinfo->chip_nonces[chip]++;
  1188. nonce = decnonce(nonce);
  1189. /*
  1190. * We can grab the head of the chip work queue and then
  1191. * release the lock and follow it to the end
  1192. * since the other thread will only add items above the
  1193. * head - it wont touch the list->next pointers from the
  1194. * head to the end - only the head->prev pointer may get
  1195. * changed
  1196. */
  1197. cg_rlock(&babinfo->blist_lock);
  1198. bitem = babinfo->chip_list[chip];
  1199. cg_runlock(&babinfo->blist_lock);
  1200. if (!bitem) {
  1201. applog(LOG_ERR, "%s%i: chip %d has no work!",
  1202. babcgpu->drv->name, babcgpu->device_id, chip);
  1203. babinfo->untested_nonces++;
  1204. return false;
  1205. }
  1206. babinfo->tested_nonces++;
  1207. tests = 0;
  1208. links = 0;
  1209. while (bitem) {
  1210. if (!bitem->work) {
  1211. applog(LOG_ERR, "%s%i: chip %d bitem links %d has no work!",
  1212. babcgpu->drv->name,
  1213. babcgpu->device_id,
  1214. chip, links);
  1215. } else {
  1216. for (i = 0; i < BAB_NONCE_OFFSETS; i++) {
  1217. tests++;
  1218. if (test_nonce(bitem->work, nonce + bab_nonce_offsets[i])) {
  1219. submit_tested_work(thr, bitem->work);
  1220. babinfo->nonce_offset_count[i]++;
  1221. babinfo->chip_good[chip]++;
  1222. bitem->nonces++;
  1223. babinfo->new_nonces++;
  1224. babinfo->ok_nonces++;
  1225. free_blist(babcgpu, bitem->next, chip);
  1226. babinfo->total_tests += tests;
  1227. if (babinfo->max_tests_per_nonce < tests)
  1228. babinfo->max_tests_per_nonce = tests;
  1229. babinfo->total_links += links;
  1230. if (babinfo->max_links < links)
  1231. babinfo->max_links = links;
  1232. return true;
  1233. }
  1234. }
  1235. }
  1236. bitem = bitem->next;
  1237. links++;
  1238. }
  1239. if (babinfo->not_first_reply[chip]) {
  1240. babinfo->chip_bad[chip]++;
  1241. inc_hw_errors(thr);
  1242. } else
  1243. babinfo->initial_ignored++;
  1244. return false;
  1245. }
  1246. // Results checking thread
  1247. static void *bab_res(void *userdata)
  1248. {
  1249. struct cgpu_info *babcgpu = (struct cgpu_info *)userdata;
  1250. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1251. struct thr_info *thr = babcgpu->thr[0];
  1252. bool first_second;
  1253. uint32_t nonce;
  1254. int chip;
  1255. applog(LOG_DEBUG, "%s%i: Results...",
  1256. babcgpu->drv->name, babcgpu->device_id);
  1257. // Wait until we're ready
  1258. while (babcgpu->shutdown == false) {
  1259. if (babinfo->initialised) {
  1260. break;
  1261. }
  1262. cgsleep_ms(3);
  1263. }
  1264. while (babcgpu->shutdown == false) {
  1265. if (!oldest_nonce(babcgpu, &chip, &nonce, &first_second)) {
  1266. cgsleep_ms(3);
  1267. continue;
  1268. }
  1269. if (first_second)
  1270. babinfo->not_first_reply[chip] = true;
  1271. oknonce(thr, babcgpu, chip, nonce);
  1272. }
  1273. return NULL;
  1274. }
  1275. static bool bab_do_work(struct cgpu_info *babcgpu)
  1276. {
  1277. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1278. int busy, newbusy, match, work_items = 0;
  1279. int spi, mis, miso;
  1280. int i, j;
  1281. BLIST *bitem;
  1282. bool res, got_a_nonce;
  1283. for (i = 0; i < babinfo->chips; i++) {
  1284. bitem = next_work(babcgpu, i);
  1285. if (!bitem) {
  1286. applog(LOG_ERR, "%s%i: short work list (%i) expected %d - discarded",
  1287. babcgpu->drv->name, babcgpu->device_id,
  1288. i, babinfo->chips);
  1289. for (j = 0; j < i; i++)
  1290. discard_last(babcgpu, j);
  1291. return false;
  1292. }
  1293. memcpy((void *)&(babinfo->chip_input[i].midstate[0]),
  1294. bitem->work->midstate, sizeof(bitem->work->midstate));
  1295. memcpy((void *)&(babinfo->chip_input[i].merkle7),
  1296. (void *)&(bitem->work->data[WORK_MERKLE7]), 12);
  1297. ms3steps((void *)&(babinfo->chip_input[i]));
  1298. work_items++;
  1299. }
  1300. // Send
  1301. res = bab_put(babcgpu, babinfo);
  1302. if (!res) {
  1303. applog(LOG_DEBUG, "%s%i: couldn't put work ...",
  1304. babcgpu->drv->name, babcgpu->device_id);
  1305. }
  1306. // Receive
  1307. res = bab_get(babcgpu, babinfo);
  1308. if (!res) {
  1309. applog(LOG_DEBUG, "%s%i: didn't get work reply ...",
  1310. babcgpu->drv->name, babcgpu->device_id);
  1311. return false;
  1312. }
  1313. applog(LOG_DEBUG, "%s%i: Did get work reply ...",
  1314. babcgpu->drv->name, babcgpu->device_id);
  1315. spi = mis = miso = 0;
  1316. for (i = 0; i < babinfo->chips; i++) {
  1317. match = 0;
  1318. newbusy = busy = babinfo->chip_busy[i];
  1319. if (!babinfo->chip_conf[i])
  1320. continue;
  1321. for (j = 1; j < BAB_REPLY_NONCES; j++) {
  1322. if (babinfo->chip_results[i].nonce[(busy+j) % BAB_REPLY_NONCES] !=
  1323. babinfo->chip_prev[i].nonce[(busy+j) % BAB_REPLY_NONCES])
  1324. newbusy = (busy+j) % BAB_REPLY_NONCES;
  1325. else
  1326. match++;
  1327. }
  1328. if (!match) {
  1329. if (!miso) {
  1330. mis++;
  1331. // ignore for now ... babinfo->chip_miso[i]++;
  1332. }
  1333. miso = 1;
  1334. continue;
  1335. }
  1336. miso = 0;
  1337. if (babinfo->chip_results[i].jobsel != 0xffffffff &&
  1338. babinfo->chip_results[i].jobsel != 0x00000000) {
  1339. spi++;
  1340. babinfo->chip_spie[i]++;
  1341. applog(LOG_DEBUG, "%s%i: SPI ERROR on chip %d (0x%08x)",
  1342. babcgpu->drv->name, babcgpu->device_id,
  1343. i, babinfo->chip_results[i].jobsel);
  1344. }
  1345. // Not used yet
  1346. // if (babinfo->chip_results[i].jobsel != babinfo->chip_prev[i].jobsel) {
  1347. got_a_nonce = false;
  1348. for (; newbusy != busy; busy = (busy + 1) % BAB_REPLY_NONCES) {
  1349. if (babinfo->chip_results[i].nonce[busy] == 0xffffffff ||
  1350. babinfo->chip_results[i].nonce[busy] == 0x00000000) {
  1351. babinfo->chip_results[i].nonce[busy] = babinfo->chip_prev[i].nonce[busy];
  1352. spi = 1;
  1353. continue;
  1354. }
  1355. store_nonce(babcgpu, i,
  1356. babinfo->chip_results[i].nonce[busy],
  1357. babinfo->nonce_before[i]);
  1358. got_a_nonce = true;
  1359. }
  1360. /*
  1361. * We only care about this after the first reply we find a nonce
  1362. * After that, the value has no more effect
  1363. */
  1364. if (got_a_nonce)
  1365. babinfo->nonce_before[i] = true;
  1366. mis += miso;
  1367. babinfo->chip_miso[i] += miso;
  1368. babinfo->chip_busy[i] = busy;
  1369. }
  1370. memcpy((void *)(&(babinfo->chip_prev[0])),
  1371. (void *)(&(babinfo->chip_results[0])),
  1372. sizeof(babinfo->chip_prev));
  1373. applog(LOG_DEBUG, "Work: items:%d spi:%d miso:%d",
  1374. work_items, spi, mis);
  1375. return true;
  1376. }
  1377. static bool bab_thread_prepare(struct thr_info *thr)
  1378. {
  1379. struct cgpu_info *babcgpu = thr->cgpu;
  1380. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1381. if (thr_info_create(&(babinfo->spi_thr), NULL, bab_spi, (void *)babcgpu)) {
  1382. applog(LOG_ERR, "%s%i: SPI thread create failed",
  1383. babcgpu->drv->name, babcgpu->device_id);
  1384. return false;
  1385. }
  1386. pthread_detach(babinfo->spi_thr.pth);
  1387. /*
  1388. * We require a seperate results checking thread since there is a lot
  1389. * of work done checking the results multiple times - thus we don't
  1390. * want that delay affecting sending/receiving work to/from the device
  1391. */
  1392. if (thr_info_create(&(babinfo->res_thr), NULL, bab_res, (void *)babcgpu)) {
  1393. applog(LOG_ERR, "%s%i: Results thread create failed",
  1394. babcgpu->drv->name, babcgpu->device_id);
  1395. return false;
  1396. }
  1397. pthread_detach(babinfo->res_thr.pth);
  1398. return true;
  1399. }
  1400. static void bab_shutdown(struct thr_info *thr)
  1401. {
  1402. struct cgpu_info *babcgpu = thr->cgpu;
  1403. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1404. int i;
  1405. applog(LOG_DEBUG, "%s%i: shutting down",
  1406. babcgpu->drv->name, babcgpu->device_id);
  1407. for (i = 0; i < babinfo->chips; i++)
  1408. // TODO: bab_shutdown(babcgpu, babinfo, i);
  1409. ;
  1410. babcgpu->shutdown = true;
  1411. }
  1412. static bool bab_queue_full(struct cgpu_info *babcgpu)
  1413. {
  1414. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1415. struct work *work;
  1416. bool ret;
  1417. if (babinfo->work_count >= babinfo->chips)
  1418. ret = true;
  1419. else {
  1420. work = get_queued(babcgpu);
  1421. if (work)
  1422. store_work(babcgpu, work);
  1423. else
  1424. // Avoid a hard loop when we can't get work fast enough
  1425. cgsleep_ms(10);
  1426. ret = false;
  1427. }
  1428. return ret;
  1429. }
  1430. /*
  1431. * 1.0s per nonce = 4.2GH/s
  1432. * So anything around 4GH/s or less per chip should be fine
  1433. */
  1434. #define BAB_STD_WORK_uS 1000000
  1435. #define BAB_STD_DELAY_uS 30000
  1436. /*
  1437. * TODO: allow this to run through more than once - the second+
  1438. * time not sending any new work unless a flush occurs since:
  1439. * at the moment we have BAB_STD_WORK_uS latency added to earliest replies
  1440. */
  1441. static int64_t bab_scanwork(__maybe_unused struct thr_info *thr)
  1442. {
  1443. struct cgpu_info *babcgpu = thr->cgpu;
  1444. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1445. int64_t hashcount = 0;
  1446. struct timeval now;
  1447. double delay;
  1448. bab_do_work(babcgpu);
  1449. // Sleep now so we get the work "bab_queue_full()" just before we use it
  1450. while (80085) {
  1451. cgtime(&now);
  1452. mutex_lock(&(babinfo->did_lock));
  1453. delay = us_tdiff(&now, &(babinfo->last_did));
  1454. mutex_unlock(&(babinfo->did_lock));
  1455. if (delay < (BAB_STD_WORK_uS - BAB_STD_DELAY_uS))
  1456. cgsleep_us(BAB_STD_DELAY_uS);
  1457. else
  1458. break;
  1459. }
  1460. if (babinfo->new_nonces) {
  1461. hashcount += 0xffffffffull * babinfo->new_nonces;
  1462. babinfo->new_nonces = 0;
  1463. }
  1464. return hashcount;
  1465. }
  1466. #define CHIPS_PER_STAT 16
  1467. static struct api_data *bab_api_stats(struct cgpu_info *babcgpu)
  1468. {
  1469. struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
  1470. struct api_data *root = NULL;
  1471. char data[2048];
  1472. char buf[32];
  1473. int i, to, j;
  1474. if (babinfo->initialised == false)
  1475. return NULL;
  1476. root = api_add_int(root, "Chips", &(babinfo->chips), true);
  1477. for (i = 0; i < babinfo->chips; i += CHIPS_PER_STAT) {
  1478. to = i + CHIPS_PER_STAT - 1;
  1479. if (to >= babinfo->chips)
  1480. to = babinfo->chips - 1;
  1481. data[0] = '\0';
  1482. for (j = i; j <= to; j++) {
  1483. snprintf(buf, sizeof(buf),
  1484. "%s%"PRIu64,
  1485. j == i ? "" : " ",
  1486. babinfo->chip_nonces[j]);
  1487. strcat(data, buf);
  1488. }
  1489. snprintf(buf, sizeof(buf), "Nonces %d - %d", i, to);
  1490. root = api_add_string(root, buf, data, true);
  1491. data[0] = '\0';
  1492. for (j = i; j <= to; j++) {
  1493. snprintf(buf, sizeof(buf),
  1494. "%s%"PRIu64,
  1495. j == i ? "" : " ",
  1496. babinfo->chip_good[j]);
  1497. strcat(data, buf);
  1498. }
  1499. snprintf(buf, sizeof(buf), "Good %d - %d", i, to);
  1500. root = api_add_string(root, buf, data, true);
  1501. data[0] = '\0';
  1502. for (j = i; j <= to; j++) {
  1503. snprintf(buf, sizeof(buf),
  1504. "%s%"PRIu64,
  1505. j == i ? "" : " ",
  1506. babinfo->chip_bad[j]);
  1507. strcat(data, buf);
  1508. }
  1509. snprintf(buf, sizeof(buf), "Bad %d - %d", i, to);
  1510. root = api_add_string(root, buf, data, true);
  1511. data[0] = '\0';
  1512. for (j = i; j <= to; j++) {
  1513. snprintf(buf, sizeof(buf),
  1514. "%s0x%02x",
  1515. j == i ? "" : " ",
  1516. (int)(babinfo->chip_conf[j]));
  1517. strcat(data, buf);
  1518. }
  1519. snprintf(buf, sizeof(buf), "Conf %d - %d", i, to);
  1520. root = api_add_string(root, buf, data, true);
  1521. data[0] = '\0';
  1522. for (j = i; j <= to; j++) {
  1523. snprintf(buf, sizeof(buf),
  1524. "%s0x%02x",
  1525. j == i ? "" : " ",
  1526. (int)(babinfo->chip_fast[j]));
  1527. strcat(data, buf);
  1528. }
  1529. snprintf(buf, sizeof(buf), "Fast %d - %d", i, to);
  1530. root = api_add_string(root, buf, data, true);
  1531. }
  1532. for (i = 0; i < BAB_NONCE_OFFSETS; i++) {
  1533. snprintf(buf, sizeof(buf), "Nonce Offset 0x%08x", bab_nonce_offsets[i]);
  1534. root = api_add_uint64(root, buf, &(babinfo->nonce_offset_count[i]), true);
  1535. }
  1536. root = api_add_uint64(root, "Tested", &(babinfo->tested_nonces), true);
  1537. root = api_add_uint64(root, "Total Tests", &(babinfo->total_tests), true);
  1538. root = api_add_uint64(root, "Max Tests", &(babinfo->max_tests_per_nonce), true);
  1539. float avg = babinfo->tested_nonces ? (float)(babinfo->total_tests) /
  1540. (float)(babinfo->tested_nonces) : 0;
  1541. // TODO: add a API_AVG which is 3 places - double/float?
  1542. root = api_add_volts(root, "Avg Tests", &avg, true);
  1543. root = api_add_uint64(root, "Untested", &(babinfo->untested_nonces), true);
  1544. root = api_add_uint64(root, "Work Links", &(babinfo->total_links), true);
  1545. root = api_add_uint64(root, "Max Links", &(babinfo->max_links), true);
  1546. avg = babinfo->tested_nonces ? (float)(babinfo->total_links) /
  1547. (float)(babinfo->tested_nonces) : 0;
  1548. root = api_add_volts(root, "Avg Links", &avg, true);
  1549. root = api_add_uint32(root, "Initial Ignored", &(babinfo->initial_ignored), true);
  1550. root = api_add_int(root, "BList Count", &(babinfo->blist_count), true);
  1551. root = api_add_int(root, "BFree Count", &(babinfo->bfree_count), true);
  1552. root = api_add_int(root, "Work Count", &(babinfo->work_count), true);
  1553. root = api_add_int(root, "Chip Count", &(babinfo->chip_count), true);
  1554. root = api_add_int(root, "RList Count", &(babinfo->rlist_count), true);
  1555. root = api_add_int(root, "RFree Count", &(babinfo->rfree_count), true);
  1556. root = api_add_int(root, "Result Count", &(babinfo->res_count), true);
  1557. return root;
  1558. }
  1559. #endif
  1560. struct device_drv bab_drv = {
  1561. .drv_id = DRIVER_bab,
  1562. .dname = "BlackArrowBitFuryGPIO",
  1563. .name = "BaB",
  1564. .drv_detect = bab_detect,
  1565. #ifdef LINUX
  1566. .get_api_stats = bab_api_stats,
  1567. //TODO: .get_statline_before = get_bab_statline_before,
  1568. .identify_device = bab_identify,
  1569. .thread_prepare = bab_thread_prepare,
  1570. .hash_work = hash_queued_work,
  1571. .scanwork = bab_scanwork,
  1572. .queue_full = bab_queue_full,
  1573. .flush_work = bab_flush_work,
  1574. .thread_shutdown = bab_shutdown
  1575. #endif
  1576. };