driver-bitmain.c 77 KB

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  1. /*
  2. * Copyright 2012-2014 Lingchao Xu
  3. * Copyright 2015 Luke Dashjr
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the Free
  7. * Software Foundation; either version 3 of the License, or (at your option)
  8. * any later version. See COPYING for more details.
  9. */
  10. #include "config.h"
  11. #include <limits.h>
  12. #include <math.h>
  13. #include <pthread.h>
  14. #include <stdio.h>
  15. #include <sys/time.h>
  16. #include <sys/types.h>
  17. #include <dirent.h>
  18. #include <unistd.h>
  19. #ifndef WIN32
  20. #include <sys/select.h>
  21. #include <termios.h>
  22. #include <sys/stat.h>
  23. #include <fcntl.h>
  24. #ifndef O_CLOEXEC
  25. #define O_CLOEXEC 0
  26. #endif
  27. #else
  28. #include "compat.h"
  29. #include <windows.h>
  30. #include <io.h>
  31. #endif
  32. #include <uthash.h>
  33. #include "deviceapi.h"
  34. #include "miner.h"
  35. #include "driver-bitmain.h"
  36. #include "util.h"
  37. #warning "FIXME: Make these --set able"
  38. char * const opt_bitmain_dev = "/dev/bitmain-asic";
  39. char * const opt_bitmain_options = "115200:32:8:7:200:0782:0725";
  40. const bool opt_bitmain_hwerror = true;
  41. char * const opt_bitmain_freq = "3:350:0d82";
  42. char * const opt_bitmain_voltage = "0725";
  43. BFG_REGISTER_DRIVER(bitmain_drv)
  44. static inline unsigned int bfg_work_block(struct work * const work)
  45. {
  46. return *((unsigned int*)(&work->data[4]));
  47. }
  48. #define htole8(x) (x)
  49. struct cgpu_info *btm_alloc_cgpu(struct device_drv *drv, int threads)
  50. {
  51. struct cgpu_info *cgpu = calloc(1, sizeof(*cgpu));
  52. if (unlikely(!cgpu))
  53. quit(1, "Failed to calloc cgpu for %s in usb_alloc_cgpu", drv->dname);
  54. cgpu->drv = drv;
  55. cgpu->deven = DEV_ENABLED;
  56. cgpu->threads = threads;
  57. cgpu->device_fd = -1;
  58. return cgpu;
  59. }
  60. struct cgpu_info *btm_free_cgpu(struct cgpu_info *cgpu)
  61. {
  62. if(cgpu->device_path) {
  63. free((char*)cgpu->device_path);
  64. }
  65. free(cgpu);
  66. return NULL;
  67. }
  68. bool btm_init(struct cgpu_info *cgpu, const char * devpath)
  69. {
  70. #ifdef WIN32
  71. int fd = -1;
  72. signed short timeout = 1;
  73. unsigned long baud = 115200;
  74. bool purge = true;
  75. HANDLE hSerial = NULL;
  76. applog(LOG_DEBUG, "btm_init cgpu->device_fd=%d", cgpu->device_fd);
  77. if(cgpu->device_fd >= 0) {
  78. return false;
  79. }
  80. hSerial = CreateFile(devpath, GENERIC_READ | GENERIC_WRITE, 0, NULL, OPEN_EXISTING, 0, NULL);
  81. if (unlikely(hSerial == INVALID_HANDLE_VALUE))
  82. {
  83. DWORD e = GetLastError();
  84. switch (e) {
  85. case ERROR_ACCESS_DENIED:
  86. applog(LOG_DEBUG, "Do not have user privileges required to open %s", devpath);
  87. break;
  88. case ERROR_SHARING_VIOLATION:
  89. applog(LOG_DEBUG, "%s is already in use by another process", devpath);
  90. break;
  91. default:
  92. applog(LOG_DEBUG, "Open %s failed, GetLastError:%d", devpath, (int)e);
  93. break;
  94. }
  95. } else {
  96. // thanks to af_newbie for pointers about this
  97. COMMCONFIG comCfg = {0};
  98. comCfg.dwSize = sizeof(COMMCONFIG);
  99. comCfg.wVersion = 1;
  100. comCfg.dcb.DCBlength = sizeof(DCB);
  101. comCfg.dcb.BaudRate = baud;
  102. comCfg.dcb.fBinary = 1;
  103. comCfg.dcb.fDtrControl = DTR_CONTROL_ENABLE;
  104. comCfg.dcb.fRtsControl = RTS_CONTROL_ENABLE;
  105. comCfg.dcb.ByteSize = 8;
  106. SetCommConfig(hSerial, &comCfg, sizeof(comCfg));
  107. // Code must specify a valid timeout value (0 means don't timeout)
  108. const DWORD ctoms = (timeout * 100);
  109. COMMTIMEOUTS cto = {ctoms, 0, ctoms, 0, ctoms};
  110. SetCommTimeouts(hSerial, &cto);
  111. if (purge) {
  112. PurgeComm(hSerial, PURGE_RXABORT);
  113. PurgeComm(hSerial, PURGE_TXABORT);
  114. PurgeComm(hSerial, PURGE_RXCLEAR);
  115. PurgeComm(hSerial, PURGE_TXCLEAR);
  116. }
  117. fd = _open_osfhandle((intptr_t)hSerial, 0);
  118. }
  119. #else
  120. int fd = -1;
  121. if(cgpu->device_fd >= 0) {
  122. return false;
  123. }
  124. fd = open(devpath, O_RDWR|O_EXCL|O_NONBLOCK);
  125. #endif
  126. if(fd == -1) {
  127. applog(LOG_DEBUG, "%s open %s error %d",
  128. cgpu->drv->dname, devpath, errno);
  129. return false;
  130. }
  131. cgpu->device_path = strdup(devpath);
  132. cgpu->device_fd = fd;
  133. applog(LOG_DEBUG, "btm_init open device fd = %d", cgpu->device_fd);
  134. return true;
  135. }
  136. void btm_uninit(struct cgpu_info *cgpu)
  137. {
  138. applog(LOG_DEBUG, "BTM uninit %s%i", cgpu->drv->name, cgpu->device_fd);
  139. // May have happened already during a failed initialisation
  140. // if release_cgpu() was called due to a USB NODEV(err)
  141. close(cgpu->device_fd);
  142. if(cgpu->device_path) {
  143. free((char*)cgpu->device_path);
  144. cgpu->device_path = NULL;
  145. }
  146. }
  147. void btm_detect(struct device_drv *drv, bool (*device_detect)(const char*))
  148. {
  149. applog(LOG_DEBUG, "BTM scan devices: checking for %s devices", drv->name);
  150. device_detect("asic");
  151. }
  152. int btm_read(struct cgpu_info * const cgpu, void * const buf, const size_t bufsize)
  153. {
  154. int err = 0;
  155. //applog(LOG_DEBUG, "btm_read ----- %d -----", bufsize);
  156. err = read(cgpu->device_fd, buf, bufsize);
  157. return err;
  158. }
  159. int btm_write(struct cgpu_info * const cgpu, void * const buf, const size_t bufsize)
  160. {
  161. int err = 0;
  162. //applog(LOG_DEBUG, "btm_write ----- %d -----", bufsize);
  163. err = write(cgpu->device_fd, buf, bufsize);
  164. return err;
  165. }
  166. #define BITMAIN_CALC_DIFF1 1
  167. #ifdef WIN32
  168. #define BITMAIN_TEST
  169. #endif
  170. #define BITMAIN_TEST_PRINT_WORK 0
  171. #ifdef BITMAIN_TEST
  172. #define BITMAIN_TEST_NUM 19
  173. #define BITMAIN_TEST_USENUM 1
  174. int g_test_index = 0;
  175. const char btm_work_test_data[BITMAIN_TEST_NUM][256] = {
  176. "00000002ddc1ce5579dbec17f17fbb8f31ae218a814b2a0c1900f0d90000000100000000b58aa6ca86546b07a5a46698f736c7ca9c0eedc756d8f28ac33c20cc24d792675276f879190afc85b6888022000000800000000000000000000000000000000000000000000000000000000000000000",
  177. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000eb2d45233c5b02de50ddcb9049ba16040e0ba00e9750a474eec75891571d925b52dfda4a190266667145b02f000000800000000000000000000000000000000000000000000000000000000000000000",
  178. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000090c7d3743e0b0562e4f56d3dd35cece3c5e8275d0abb21bf7e503cb72bd7ed3b52dfda4a190266667bbb58d7000000800000000000000000000000000000000000000000000000000000000000000000",
  179. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000006e0561da06022bfbb42c5ecd74a46bfd91934f201b777e9155cc6c3674724ec652dfda4a19026666a0cd827b000000800000000000000000000000000000000000000000000000000000000000000000",
  180. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000000312f42ce4964cc23f2d8c039f106f25ddd58e10a1faed21b3bba4b0e621807b52dfda4a1902666629c9497d000000800000000000000000000000000000000000000000000000000000000000000000",
  181. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000033093a6540dbe8f7f3d19e3d2af05585ac58dafad890fa9a942e977334a23d6e52dfda4a190266665ae95079000000800000000000000000000000000000000000000000000000000000000000000000",
  182. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000bd7893057d06e69705bddf9a89c7bac6b40c5b32f15e2295fc8c5edf491ea24952dfda4a190266664b89b4d3000000800000000000000000000000000000000000000000000000000000000000000000",
  183. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000075e66f533e53837d14236a793ee4e493985642bc39e016b9e63adf14a584a2aa52dfda4a19026666ab5d638d000000800000000000000000000000000000000000000000000000000000000000000000",
  184. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d936f90c5db5f0fe1d017344443854fbf9e40a07a9b7e74fedc8661c23162bff52dfda4a19026666338e79cb000000800000000000000000000000000000000000000000000000000000000000000000",
  185. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000d2c1a7d279a4355b017bc0a4b0a9425707786729f21ee18add3fda4252a31a4152dfda4a190266669bc90806000000800000000000000000000000000000000000000000000000000000000000000000",
  186. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000ad36d19f33d04ca779942843890bc3b083cec83a4b60b6c45cf7d21fc187746552dfda4a1902666675d81ab7000000800000000000000000000000000000000000000000000000000000000000000000",
  187. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000093b809cf82b76082eacb55bc35b79f31882ed0976fd102ef54783cd24341319b52dfda4a1902666642ab4e42000000800000000000000000000000000000000000000000000000000000000000000000",
  188. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000007411ff315430a7bbf41de8a685d457e82d5177c05640d6a4436a40f39e99667852dfda4a190266662affa4b5000000800000000000000000000000000000000000000000000000000000000000000000",
  189. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000001ad0db5b9e1e2b57c8d3654c160f5a51067521eab7e340a270639d97f00a3fa252dfda4a1902666601a47bb6000000800000000000000000000000000000000000000000000000000000000000000000",
  190. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b19000000000000000022e055c442c46bbe16df68603a26891f6e4cf85b90102b39fd7cadb602b4e34552dfda4a1902666695d33cea000000800000000000000000000000000000000000000000000000000000000000000000",
  191. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b1900000000000000009c8baf5a8a1e16de2d6ae949d5fec3ed751f10dcd4c99810f2ce08040fb9e31d52dfda4a19026666fe78849d000000800000000000000000000000000000000000000000000000000000000000000000",
  192. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000e5655532b414887f35eb4652bc7b11ebac12891f65bc08cbe0ce5b277b9e795152dfda4a19026666fcc0d1d1000000800000000000000000000000000000000000000000000000000000000000000000",
  193. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000f272c5508704e2b62dd1c30ea970372c40bf00f9203f9bf69d456b4a7fbfffe352dfda4a19026666c03d4399000000800000000000000000000000000000000000000000000000000000000000000000",
  194. "0000000256ccc4c8aeae2b1e41490bc352893605f284e4be043f7b190000000000000000fca3b4531ba627ad9b0e23cdd84c888952c23810df196e9c6db0bcecba6a830952dfda4a19026666c14009cb000000800000000000000000000000000000000000000000000000000000000000000000"
  195. };
  196. const char btm_work_test_midstate[BITMAIN_TEST_NUM][256] = {
  197. "2d8738e7f5bcf76dcb8316fec772e20e240cd58c88d47f2d3f5a6a9547ed0a35",
  198. "d31b6ce09c0bfc2af6f3fe3a03475ebefa5aa191fa70a327a354b2c22f9692f1",
  199. "84a8c8224b80d36caeb42eff2a100f634e1ff873e83fd02ef1306a34abef9dbe",
  200. "059882159439b9b32968c79a93c5521e769dbea9d840f56c2a17b9ad87e530b8",
  201. "17fa435d05012574f8f1da26994cc87b6cb9660b5e82072dc6a0881cec150a0d",
  202. "92a28cc5ec4ba6a2688471dfe2032b5fe97c805ca286c503e447d6749796c6af",
  203. "1677a03516d6e9509ac37e273d2482da9af6e077abe8392cdca6a30e916a7ae9",
  204. "50bbe09f1b8ac18c97aeb745d5d2c3b5d669b6ac7803e646f65ac7b763a392d1",
  205. "e46a0022ebdc303a7fb1a0ebfa82b523946c312e745e5b8a116b17ae6b4ce981",
  206. "8f2f61e7f5b4d76d854e6d266acfff4d40347548216838ccc4ef3b9e43d3c9ea",
  207. "0a450588ae99f75d676a08d0326e1ea874a3497f696722c78a80c7b6ee961ea6",
  208. "3c4c0fc2cf040b806c51b46de9ec0dcc678a7cc5cf3eff11c6c03de3bc7818cc",
  209. "f6c7c785ab5daddb8f98e5f854f2cb41879fcaf47289eb2b4196fefc1b28316f",
  210. "005312351ccb0d0794779f5023e4335b5cad221accf0dfa3da7b881266fa9f5a",
  211. "7b26d189c6bba7add54143179aadbba7ccaeff6887bd8d5bec9597d5716126e6",
  212. "a4718f4c801e7ddf913a9474eb71774993525684ffea1915f767ab16e05e6889",
  213. "6b6226a8c18919d0e55684638d33a6892a00d22492cc2f5906ca7a4ac21c74a7",
  214. "383114dccd1cb824b869158aa2984d157fcb02f46234ceca65943e919329e697",
  215. "d4d478df3016852b27cb1ae9e1e98d98617f8d0943bf9dc1217f47f817236222"
  216. };
  217. #endif
  218. bool opt_bitmain_checkall = false;
  219. bool opt_bitmain_nobeeper = false;
  220. bool opt_bitmain_notempoverctrl = false;
  221. bool opt_bitmain_homemode = false;
  222. int opt_bitmain_temp = BITMAIN_TEMP_TARGET;
  223. int opt_bitmain_overheat = BITMAIN_TEMP_OVERHEAT;
  224. int opt_bitmain_fan_min = BITMAIN_DEFAULT_FAN_MIN_PWM;
  225. int opt_bitmain_fan_max = BITMAIN_DEFAULT_FAN_MAX_PWM;
  226. int opt_bitmain_freq_min = BITMAIN_MIN_FREQUENCY;
  227. int opt_bitmain_freq_max = BITMAIN_MAX_FREQUENCY;
  228. bool opt_bitmain_auto;
  229. static int option_offset = -1;
  230. // --------------------------------------------------------------
  231. // CRC16 check table
  232. // --------------------------------------------------------------
  233. const uint8_t chCRCHTalbe[] = // CRC high byte table
  234. {
  235. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  236. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  237. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  238. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  239. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  240. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  241. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  242. 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  243. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  244. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  245. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  246. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  247. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  248. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  249. 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  250. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  251. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  252. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
  253. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  254. 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
  255. 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
  256. 0x00, 0xC1, 0x81, 0x40
  257. };
  258. const uint8_t chCRCLTalbe[] = // CRC low byte table
  259. {
  260. 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7,
  261. 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E,
  262. 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9,
  263. 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC,
  264. 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
  265. 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32,
  266. 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D,
  267. 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38,
  268. 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF,
  269. 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
  270. 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1,
  271. 0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4,
  272. 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB,
  273. 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA,
  274. 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
  275. 0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0,
  276. 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97,
  277. 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E,
  278. 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89,
  279. 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
  280. 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83,
  281. 0x41, 0x81, 0x80, 0x40
  282. };
  283. static uint16_t CRC16(const uint8_t* p_data, uint16_t w_len)
  284. {
  285. uint8_t chCRCHi = 0xFF; // CRC high byte initialize
  286. uint8_t chCRCLo = 0xFF; // CRC low byte initialize
  287. uint16_t wIndex = 0; // CRC cycling index
  288. while (w_len--) {
  289. wIndex = chCRCLo ^ *p_data++;
  290. chCRCLo = chCRCHi ^ chCRCHTalbe[wIndex];
  291. chCRCHi = chCRCLTalbe[wIndex];
  292. }
  293. return ((chCRCHi << 8) | chCRCLo);
  294. }
  295. static uint32_t num2bit(int num) {
  296. switch(num) {
  297. case 0: return 0x80000000;
  298. case 1: return 0x40000000;
  299. case 2: return 0x20000000;
  300. case 3: return 0x10000000;
  301. case 4: return 0x08000000;
  302. case 5: return 0x04000000;
  303. case 6: return 0x02000000;
  304. case 7: return 0x01000000;
  305. case 8: return 0x00800000;
  306. case 9: return 0x00400000;
  307. case 10: return 0x00200000;
  308. case 11: return 0x00100000;
  309. case 12: return 0x00080000;
  310. case 13: return 0x00040000;
  311. case 14: return 0x00020000;
  312. case 15: return 0x00010000;
  313. case 16: return 0x00008000;
  314. case 17: return 0x00004000;
  315. case 18: return 0x00002000;
  316. case 19: return 0x00001000;
  317. case 20: return 0x00000800;
  318. case 21: return 0x00000400;
  319. case 22: return 0x00000200;
  320. case 23: return 0x00000100;
  321. case 24: return 0x00000080;
  322. case 25: return 0x00000040;
  323. case 26: return 0x00000020;
  324. case 27: return 0x00000010;
  325. case 28: return 0x00000008;
  326. case 29: return 0x00000004;
  327. case 30: return 0x00000002;
  328. case 31: return 0x00000001;
  329. default: return 0x00000000;
  330. }
  331. }
  332. static bool get_options(int this_option_offset, int *baud, int *chain_num,
  333. int *asic_num, int *timeout, int *frequency, char * frequency_t, uint8_t * reg_data, uint8_t * voltage, char * voltage_t)
  334. {
  335. char buf[BUFSIZ+1];
  336. char *ptr, *comma, *colon, *colon2, *colon3, *colon4, *colon5, *colon6;
  337. size_t max;
  338. int i, tmp;
  339. if (opt_bitmain_options == NULL)
  340. buf[0] = '\0';
  341. else {
  342. ptr = opt_bitmain_options;
  343. for (i = 0; i < this_option_offset; i++) {
  344. comma = strchr(ptr, ',');
  345. if (comma == NULL)
  346. break;
  347. ptr = comma + 1;
  348. }
  349. comma = strchr(ptr, ',');
  350. if (comma == NULL)
  351. max = strlen(ptr);
  352. else
  353. max = comma - ptr;
  354. if (max > BUFSIZ)
  355. max = BUFSIZ;
  356. strncpy(buf, ptr, max);
  357. buf[max] = '\0';
  358. }
  359. if (!(*buf))
  360. return false;
  361. colon = strchr(buf, ':');
  362. if (colon)
  363. *(colon++) = '\0';
  364. tmp = atoi(buf);
  365. switch (tmp) {
  366. case 115200:
  367. *baud = 115200;
  368. break;
  369. case 57600:
  370. *baud = 57600;
  371. break;
  372. case 38400:
  373. *baud = 38400;
  374. break;
  375. case 19200:
  376. *baud = 19200;
  377. break;
  378. default:
  379. quit(1, "Invalid bitmain-options for baud (%s) "
  380. "must be 115200, 57600, 38400 or 19200", buf);
  381. }
  382. if (colon && *colon) {
  383. colon2 = strchr(colon, ':');
  384. if (colon2)
  385. *(colon2++) = '\0';
  386. if (*colon) {
  387. tmp = atoi(colon);
  388. if (tmp > 0) {
  389. *chain_num = tmp;
  390. } else {
  391. quit(1, "Invalid bitmain-options for "
  392. "chain_num (%s) must be 1 ~ %d",
  393. colon, BITMAIN_DEFAULT_CHAIN_NUM);
  394. }
  395. }
  396. if (colon2 && *colon2) {
  397. colon3 = strchr(colon2, ':');
  398. if (colon3)
  399. *(colon3++) = '\0';
  400. tmp = atoi(colon2);
  401. if (tmp > 0 && tmp <= BITMAIN_DEFAULT_ASIC_NUM)
  402. *asic_num = tmp;
  403. else {
  404. quit(1, "Invalid bitmain-options for "
  405. "asic_num (%s) must be 1 ~ %d",
  406. colon2, BITMAIN_DEFAULT_ASIC_NUM);
  407. }
  408. if (colon3 && *colon3) {
  409. colon4 = strchr(colon3, ':');
  410. if (colon4)
  411. *(colon4++) = '\0';
  412. tmp = atoi(colon3);
  413. if (tmp > 0 && tmp <= 0xff)
  414. *timeout = tmp;
  415. else {
  416. quit(1, "Invalid bitmain-options for "
  417. "timeout (%s) must be 1 ~ %d",
  418. colon3, 0xff);
  419. }
  420. if (colon4 && *colon4) {
  421. colon5 = strchr(colon4, ':');
  422. if(colon5)
  423. *(colon5++) = '\0';
  424. tmp = atoi(colon4);
  425. if (tmp < BITMAIN_MIN_FREQUENCY || tmp > BITMAIN_MAX_FREQUENCY) {
  426. quit(1, "Invalid bitmain-options for frequency, must be %d <= frequency <= %d",
  427. BITMAIN_MIN_FREQUENCY, BITMAIN_MAX_FREQUENCY);
  428. } else {
  429. *frequency = tmp;
  430. strcpy(frequency_t, colon4);
  431. }
  432. if (colon5 && *colon5) {
  433. colon6 = strchr(colon5, ':');
  434. if(colon6)
  435. *(colon6++) = '\0';
  436. if(strlen(colon5) > 8 || strlen(colon5)%2 != 0 || strlen(colon5)/2 == 0) {
  437. quit(1, "Invalid bitmain-options for reg data, must be hex now: %s",
  438. colon5);
  439. }
  440. memset(reg_data, 0, 4);
  441. if(!hex2bin(reg_data, colon5, strlen(colon5)/2)) {
  442. quit(1, "Invalid bitmain-options for reg data, hex2bin error now: %s",
  443. colon5);
  444. }
  445. if (colon6 && *colon6) {
  446. if(strlen(colon6) > 4 || strlen(colon6)%2 != 0 || strlen(colon6)/2 == 0) {
  447. quit(1, "Invalid bitmain-options for voltage data, must be hex now: %s",
  448. colon6);
  449. }
  450. memset(voltage, 0, 2);
  451. if(!hex2bin(voltage, colon6, strlen(colon6)/2)) {
  452. quit(1, "Invalid bitmain-options for voltage data, hex2bin error now: %s",
  453. colon5);
  454. } else {
  455. sprintf(voltage_t, "%02x%02x", voltage[0], voltage[1]);
  456. voltage_t[5] = 0;
  457. voltage_t[4] = voltage_t[3];
  458. voltage_t[3] = voltage_t[2];
  459. voltage_t[2] = voltage_t[1];
  460. voltage_t[1] = '.';
  461. }
  462. }
  463. }
  464. }
  465. }
  466. }
  467. }
  468. return true;
  469. }
  470. static bool get_option_freq(int *timeout, int *frequency, char * frequency_t, uint8_t * reg_data)
  471. {
  472. char buf[BUFSIZ+1];
  473. char *ptr, *comma, *colon, *colon2;
  474. size_t max;
  475. int tmp;
  476. if (opt_bitmain_freq == NULL)
  477. return true;
  478. else {
  479. ptr = opt_bitmain_freq;
  480. comma = strchr(ptr, ',');
  481. if (comma == NULL)
  482. max = strlen(ptr);
  483. else
  484. max = comma - ptr;
  485. if (max > BUFSIZ)
  486. max = BUFSIZ;
  487. strncpy(buf, ptr, max);
  488. buf[max] = '\0';
  489. }
  490. if (!(*buf))
  491. return false;
  492. colon = strchr(buf, ':');
  493. if (colon)
  494. *(colon++) = '\0';
  495. tmp = atoi(buf);
  496. if (tmp > 0 && tmp <= 0xff)
  497. *timeout = tmp;
  498. else {
  499. quit(1, "Invalid bitmain-freq for "
  500. "timeout (%s) must be 1 ~ %d",
  501. buf, 0xff);
  502. }
  503. if (colon && *colon) {
  504. colon2 = strchr(colon, ':');
  505. if (colon2)
  506. *(colon2++) = '\0';
  507. tmp = atoi(colon);
  508. if (tmp < BITMAIN_MIN_FREQUENCY || tmp > BITMAIN_MAX_FREQUENCY) {
  509. quit(1, "Invalid bitmain-freq for frequency, must be %d <= frequency <= %d",
  510. BITMAIN_MIN_FREQUENCY, BITMAIN_MAX_FREQUENCY);
  511. } else {
  512. *frequency = tmp;
  513. strcpy(frequency_t, colon);
  514. }
  515. if (colon2 && *colon2) {
  516. if(strlen(colon2) > 8 || strlen(colon2)%2 != 0 || strlen(colon2)/2 == 0) {
  517. quit(1, "Invalid bitmain-freq for reg data, must be hex now: %s",
  518. colon2);
  519. }
  520. memset(reg_data, 0, 4);
  521. if(!hex2bin(reg_data, colon2, strlen(colon2)/2)) {
  522. quit(1, "Invalid bitmain-freq for reg data, hex2bin error now: %s",
  523. colon2);
  524. }
  525. }
  526. }
  527. return true;
  528. }
  529. static bool get_option_voltage(uint8_t * voltage, char * voltage_t)
  530. {
  531. if(opt_bitmain_voltage) {
  532. if(strlen(opt_bitmain_voltage) > 4 || strlen(opt_bitmain_voltage)%2 != 0 || strlen(opt_bitmain_voltage)/2 == 0) {
  533. applog(LOG_ERR, "Invalid bitmain-voltage for voltage data, must be hex now: %s,set default_volttage",
  534. opt_bitmain_voltage);
  535. return false;
  536. }
  537. memset(voltage, 0, 2);
  538. if(!hex2bin(voltage, opt_bitmain_voltage, strlen(opt_bitmain_voltage)/2)) {
  539. quit(1, "Invalid bitmain-voltage for voltage data, hex2bin error now: %s",
  540. opt_bitmain_voltage);
  541. } else {
  542. sprintf(voltage_t, "%02x%02x", voltage[0], voltage[1]);
  543. voltage_t[5] = 0;
  544. voltage_t[4] = voltage_t[3];
  545. voltage_t[3] = voltage_t[2];
  546. voltage_t[2] = voltage_t[1];
  547. voltage_t[1] = '.';
  548. }
  549. }
  550. return true;
  551. }
  552. static int bitmain_set_txconfig(struct bitmain_txconfig_token *bm,
  553. uint8_t reset, uint8_t fan_eft, uint8_t timeout_eft, uint8_t frequency_eft,
  554. uint8_t voltage_eft, uint8_t chain_check_time_eft, uint8_t chip_config_eft, uint8_t hw_error_eft,
  555. uint8_t beeper_ctrl, uint8_t temp_over_ctrl,uint8_t fan_home_mode,
  556. uint8_t chain_num, uint8_t asic_num, uint8_t fan_pwm_data, uint8_t timeout_data,
  557. uint16_t frequency, uint8_t * voltage, uint8_t chain_check_time,
  558. uint8_t chip_address, uint8_t reg_address, uint8_t * reg_data)
  559. {
  560. uint16_t crc = 0;
  561. int datalen = 0;
  562. uint8_t version = 0;
  563. uint8_t * sendbuf = (uint8_t *)bm;
  564. if (unlikely(!bm)) {
  565. applog(LOG_WARNING, "bitmain_set_txconfig bitmain_txconfig_token is null");
  566. return -1;
  567. }
  568. if (unlikely(timeout_data <= 0 || asic_num <= 0 || chain_num <= 0)) {
  569. applog(LOG_WARNING, "bitmain_set_txconfig parameter invalid timeout_data(%d) asic_num(%d) chain_num(%d)",
  570. timeout_data, asic_num, chain_num);
  571. return -1;
  572. }
  573. datalen = sizeof(struct bitmain_txconfig_token);
  574. memset(bm, 0, datalen);
  575. bm->token_type = BITMAIN_TOKEN_TYPE_TXCONFIG;
  576. bm->version = version;
  577. bm->length = datalen-4;
  578. bm->length = htole16(bm->length);
  579. bm->reset = reset;
  580. bm->fan_eft = fan_eft;
  581. bm->timeout_eft = timeout_eft;
  582. bm->frequency_eft = frequency_eft;
  583. bm->voltage_eft = voltage_eft;
  584. bm->chain_check_time_eft = chain_check_time_eft;
  585. bm->chip_config_eft = chip_config_eft;
  586. bm->hw_error_eft = hw_error_eft;
  587. bm->beeper_ctrl = beeper_ctrl;
  588. bm->temp_over_ctrl = temp_over_ctrl;
  589. bm->fan_home_mode = fan_home_mode;
  590. sendbuf[4] = htole8(sendbuf[4]);
  591. sendbuf[5] = htole8(sendbuf[5]);
  592. bm->chain_num = chain_num;
  593. bm->asic_num = asic_num;
  594. bm->fan_pwm_data = fan_pwm_data;
  595. bm->timeout_data = timeout_data;
  596. bm->frequency = htole16(frequency);
  597. memcpy(bm->voltage, voltage, 2);
  598. bm->chain_check_time = chain_check_time;
  599. memcpy(bm->reg_data, reg_data, 4);
  600. bm->chip_address = chip_address;
  601. bm->reg_address = reg_address;
  602. crc = CRC16((uint8_t *)bm, datalen-2);
  603. bm->crc = htole16(crc);
  604. applog(LOG_ERR, "BTM TxConfigToken:v(%d) reset(%d) fan_e(%d) tout_e(%d) fq_e(%d) vt_e(%d) chainc_e(%d) chipc_e(%d) hw_e(%d) b_c(%d) t_c(%d) f_m(%d) mnum(%d) anum(%d) fanpwmdata(%d) toutdata(%d) freq(%d) volt(%02x%02x) chainctime(%d) regdata(%02x%02x%02x%02x) chipaddr(%02x) regaddr(%02x) crc(%04x)",
  605. version, reset, fan_eft, timeout_eft, frequency_eft, voltage_eft,
  606. chain_check_time_eft, chip_config_eft, hw_error_eft, beeper_ctrl, temp_over_ctrl,fan_home_mode,chain_num, asic_num,
  607. fan_pwm_data, timeout_data, frequency, voltage[0], voltage[1],
  608. chain_check_time, reg_data[0], reg_data[1], reg_data[2], reg_data[3], chip_address, reg_address, crc);
  609. return datalen;
  610. }
  611. static int bitmain_set_txtask(uint8_t * sendbuf,
  612. unsigned int * last_work_block, struct work **works, int work_array_size, int work_array, int sendworkcount, int * sendcount)
  613. {
  614. uint16_t crc = 0;
  615. uint32_t work_id = 0;
  616. uint8_t version = 0;
  617. int datalen = 0;
  618. int i = 0;
  619. int index = work_array;
  620. uint8_t new_block= 0;
  621. struct bitmain_txtask_token *bm = (struct bitmain_txtask_token *)sendbuf;
  622. *sendcount = 0;
  623. int cursendcount = 0;
  624. int diff = 0;
  625. unsigned int difftmp = 0;
  626. unsigned int pooldiff = 0;
  627. int netdiff = 0;
  628. if (unlikely(!bm)) {
  629. applog(LOG_WARNING, "bitmain_set_txtask bitmain_txtask_token is null");
  630. return -1;
  631. }
  632. if (unlikely(!works)) {
  633. applog(LOG_WARNING, "bitmain_set_txtask work is null");
  634. return -1;
  635. }
  636. memset(bm, 0, sizeof(struct bitmain_txtask_token));
  637. bm->token_type = BITMAIN_TOKEN_TYPE_TXTASK;
  638. bm->version = version;
  639. datalen = 10;
  640. applog(LOG_DEBUG, "BTM send work count %d -----", sendworkcount);
  641. pooldiff = 0x100;
  642. unsigned lowest_goal_diff = UINT_MAX;
  643. for (i = 0; i < sendworkcount; ++i) {
  644. if (index > work_array_size) {
  645. index = 0;
  646. }
  647. if (!works[index]) {
  648. continue;
  649. }
  650. struct work * const work = works[index];
  651. if (work->work_difficulty < pooldiff)
  652. pooldiff = work->work_difficulty;
  653. const struct pool * const pool = work->pool;
  654. const struct mining_goal_info * const goal = pool->goal;
  655. if (goal->current_diff < lowest_goal_diff)
  656. lowest_goal_diff = goal->current_diff;
  657. }
  658. {
  659. difftmp = pooldiff;
  660. while(1) {
  661. difftmp = difftmp >> 1;
  662. if(difftmp > 0) {
  663. diff++;
  664. if(diff >= 255) {
  665. break;
  666. }
  667. } else {
  668. break;
  669. }
  670. }
  671. for (uint64_t netdifftmp = lowest_goal_diff; netdifftmp > 0; netdifftmp >>= 1) {
  672. ++netdiff;
  673. }
  674. pooldiff = pow(2, diff);
  675. }
  676. applog(LOG_DEBUG, "bitmain_set_txtask using nonce_diff=%u (log2=%d) and goal_diff=%u (log2=%d)", pooldiff, diff, lowest_goal_diff, netdiff);
  677. for(i = 0; i < sendworkcount; i++) {
  678. if(index > work_array_size) {
  679. index = 0;
  680. }
  681. if(works[index]) {
  682. const unsigned int work_block = bfg_work_block(works[index]);
  683. if(work_block != *last_work_block) {
  684. applog(LOG_ERR, "BTM send task new block %d old(%d)", work_block, *last_work_block);
  685. new_block = 1;
  686. *last_work_block = work_block;
  687. }
  688. #ifdef BITMAIN_TEST
  689. if(!hex2bin(works[index]->data, btm_work_test_data[g_test_index], 128)) {
  690. applog(LOG_DEBUG, "BTM send task set test data error");
  691. }
  692. if(!hex2bin(works[index]->midstate, btm_work_test_midstate[g_test_index], 32)) {
  693. applog(LOG_DEBUG, "BTM send task set test midstate error");
  694. }
  695. g_test_index++;
  696. if(g_test_index >= BITMAIN_TEST_USENUM) {
  697. g_test_index = 0;
  698. }
  699. applog(LOG_DEBUG, "BTM test index = %d", g_test_index);
  700. #endif
  701. work_id = works[index]->id;
  702. bm->works[cursendcount].work_id = htole32(work_id);
  703. applog(LOG_DEBUG, "BTM send task work id:%d %d", bm->works[cursendcount].work_id, work_id);
  704. memcpy(bm->works[cursendcount].midstate, works[index]->midstate, 32);
  705. memcpy(bm->works[cursendcount].data2, works[index]->data + 64, 12);
  706. works[index]->nonce_diff = pooldiff;
  707. if(BITMAIN_TEST_PRINT_WORK) {
  708. char ob_hex[(76 * 2) + 1];
  709. bin2hex(ob_hex, works[index]->data, 76);
  710. applog(LOG_ERR, "work %d data: %s", works[index]->id, ob_hex);
  711. }
  712. cursendcount++;
  713. }
  714. index++;
  715. }
  716. if(cursendcount <= 0) {
  717. applog(LOG_ERR, "BTM send work count %d", cursendcount);
  718. return 0;
  719. }
  720. datalen += 48*cursendcount;
  721. bm->length = datalen-4;
  722. bm->length = htole16(bm->length);
  723. //len = datalen-3;
  724. //len = htole16(len);
  725. //memcpy(sendbuf+1, &len, 2);
  726. bm->new_block = new_block;
  727. bm->diff = diff;
  728. bm->net_diff = htole16(netdiff);
  729. sendbuf[4] = htole8(sendbuf[4]);
  730. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  731. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  732. *sendcount = cursendcount;
  733. crc = CRC16(sendbuf, datalen-2);
  734. crc = htole16(crc);
  735. memcpy(sendbuf+datalen-2, &crc, 2);
  736. applog(LOG_DEBUG, "BitMain TxTask Token: v(%d) new_block(%d) diff(%d pool:%d net:%d) work_num(%d) crc(%04x)",
  737. version, new_block, diff, pooldiff,netdiff, cursendcount, crc);
  738. applog(LOG_DEBUG, "BitMain TxTask Token: %d %d %02x%02x%02x%02x%02x%02x",
  739. datalen, bm->length, sendbuf[0],sendbuf[1],sendbuf[2],sendbuf[3],sendbuf[4],sendbuf[5]);
  740. return datalen;
  741. }
  742. static int bitmain_set_rxstatus(struct bitmain_rxstatus_token *bm,
  743. uint8_t chip_status_eft, uint8_t detect_get, uint8_t chip_address, uint8_t reg_address)
  744. {
  745. uint16_t crc = 0;
  746. uint8_t version = 0;
  747. int datalen = 0;
  748. uint8_t * sendbuf = (uint8_t *)bm;
  749. if (unlikely(!bm)) {
  750. applog(LOG_WARNING, "bitmain_set_rxstatus bitmain_rxstatus_token is null");
  751. return -1;
  752. }
  753. datalen = sizeof(struct bitmain_rxstatus_token);
  754. memset(bm, 0, datalen);
  755. bm->token_type = BITMAIN_TOKEN_TYPE_RXSTATUS;
  756. bm->version = version;
  757. bm->length = datalen-4;
  758. bm->length = htole16(bm->length);
  759. bm->chip_status_eft = chip_status_eft;
  760. bm->detect_get = detect_get;
  761. sendbuf[4] = htole8(sendbuf[4]);
  762. bm->chip_address = chip_address;
  763. bm->reg_address = reg_address;
  764. crc = CRC16((uint8_t *)bm, datalen-2);
  765. bm->crc = htole16(crc);
  766. applog(LOG_ERR, "BitMain RxStatus Token: v(%d) chip_status_eft(%d) detect_get(%d) chip_address(%02x) reg_address(%02x) crc(%04x)",
  767. version, chip_status_eft, detect_get, chip_address, reg_address, crc);
  768. return datalen;
  769. }
  770. static int bitmain_parse_rxstatus(const uint8_t * data, int datalen, struct bitmain_rxstatus_data *bm)
  771. {
  772. uint16_t crc = 0;
  773. uint8_t version = 0;
  774. int i = 0, j = 0;
  775. int asic_num = 0;
  776. int dataindex = 0;
  777. uint8_t tmp = 0x01;
  778. if (unlikely(!bm)) {
  779. applog(LOG_WARNING, "bitmain_parse_rxstatus bitmain_rxstatus_data is null");
  780. return -1;
  781. }
  782. if (unlikely(!data || datalen <= 0)) {
  783. applog(LOG_WARNING, "bitmain_parse_rxstatus parameter invalid data is null or datalen(%d) error", datalen);
  784. return -1;
  785. }
  786. memset(bm, 0, sizeof(struct bitmain_rxstatus_data));
  787. memcpy(bm, data, 28);
  788. if (bm->data_type != BITMAIN_DATA_TYPE_RXSTATUS) {
  789. applog(LOG_ERR, "bitmain_parse_rxstatus datatype(%02x) error", bm->data_type);
  790. return -1;
  791. }
  792. if (bm->version != version) {
  793. applog(LOG_ERR, "bitmain_parse_rxstatus version(%02x) error", bm->version);
  794. return -1;
  795. }
  796. bm->length = htole16(bm->length);
  797. if (bm->length+4 != datalen) {
  798. applog(LOG_ERR, "bitmain_parse_rxstatus length(%d) datalen(%d) error", bm->length, datalen);
  799. return -1;
  800. }
  801. crc = CRC16(data, datalen-2);
  802. memcpy(&(bm->crc), data+datalen-2, 2);
  803. bm->crc = htole16(bm->crc);
  804. if(crc != bm->crc) {
  805. applog(LOG_ERR, "bitmain_parse_rxstatus check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  806. return -1;
  807. }
  808. bm->fifo_space = htole16(bm->fifo_space);
  809. bm->fan_exist = htole16(bm->fan_exist);
  810. bm->temp_exist = htole32(bm->temp_exist);
  811. bm->nonce_error = htole32(bm->nonce_error);
  812. if(bm->chain_num > BITMAIN_MAX_CHAIN_NUM) {
  813. applog(LOG_ERR, "bitmain_parse_rxstatus chain_num=%d error", bm->chain_num);
  814. return -1;
  815. }
  816. dataindex = 28;
  817. if(bm->chain_num > 0) {
  818. memcpy(bm->chain_asic_num, data+datalen-2-bm->chain_num-bm->temp_num-bm->fan_num, bm->chain_num);
  819. }
  820. for(i = 0; i < bm->chain_num; i++) {
  821. asic_num = bm->chain_asic_num[i];
  822. if(asic_num <= 0) {
  823. asic_num = 1;
  824. } else {
  825. if(asic_num % 32 == 0) {
  826. asic_num = asic_num / 32;
  827. } else {
  828. asic_num = asic_num / 32 + 1;
  829. }
  830. }
  831. memcpy((uint8_t *)bm->chain_asic_exist+i*32, data+dataindex, asic_num*4);
  832. dataindex += asic_num*4;
  833. }
  834. for(i = 0; i < bm->chain_num; i++) {
  835. asic_num = bm->chain_asic_num[i];
  836. if(asic_num <= 0) {
  837. asic_num = 1;
  838. } else {
  839. if(asic_num % 32 == 0) {
  840. asic_num = asic_num / 32;
  841. } else {
  842. asic_num = asic_num / 32 + 1;
  843. }
  844. }
  845. memcpy((uint8_t *)bm->chain_asic_status+i*32, data+dataindex, asic_num*4);
  846. dataindex += asic_num*4;
  847. }
  848. dataindex += bm->chain_num;
  849. if(dataindex + bm->temp_num + bm->fan_num + 2 != datalen) {
  850. applog(LOG_ERR, "bitmain_parse_rxstatus dataindex(%d) chain_num(%d) temp_num(%d) fan_num(%d) not match datalen(%d)",
  851. dataindex, bm->chain_num, bm->temp_num, bm->fan_num, datalen);
  852. return -1;
  853. }
  854. for(i = 0; i < bm->chain_num; i++) {
  855. //bm->chain_asic_status[i] = swab32(bm->chain_asic_status[i]);
  856. for(j = 0; j < 8; j++) {
  857. bm->chain_asic_exist[i*8+j] = htole32(bm->chain_asic_exist[i*8+j]);
  858. bm->chain_asic_status[i*8+j] = htole32(bm->chain_asic_status[i*8+j]);
  859. }
  860. }
  861. if(bm->temp_num > 0) {
  862. memcpy(bm->temp, data+dataindex, bm->temp_num);
  863. dataindex += bm->temp_num;
  864. }
  865. if(bm->fan_num > 0) {
  866. memcpy(bm->fan, data+dataindex, bm->fan_num);
  867. dataindex += bm->fan_num;
  868. }
  869. if(!opt_bitmain_checkall){
  870. if(tmp != htole8(tmp)){
  871. applog(LOG_ERR, "BitMain RxStatus byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  872. memcpy(&tmp,data+4,1);
  873. bm->chip_value_eft = tmp >>7;
  874. bm->get_blk_num = tmp >> 4;
  875. bm->reserved1 = ((tmp << 4) & 0xff) >> 5;
  876. }
  877. found_blocks = bm->get_blk_num;
  878. applog(LOG_ERR, "BitMain RxStatus tmp :0x%02x byte4 0x%02x chip_value_eft %d reserved %d get_blk_num %d ",tmp,*((uint8_t* )bm +4),bm->chip_value_eft,bm->reserved1,bm->get_blk_num);
  879. }
  880. applog(LOG_DEBUG, "BitMain RxStatusData: chipv_e(%d) chainnum(%d) fifos(%d) v1(%d) v2(%d) v3(%d) v4(%d) fann(%d) tempn(%d) fanet(%04x) tempet(%08x) ne(%d) regvalue(%d) crc(%04x)",
  881. bm->chip_value_eft, bm->chain_num, bm->fifo_space, bm->hw_version[0], bm->hw_version[1], bm->hw_version[2], bm->hw_version[3], bm->fan_num, bm->temp_num, bm->fan_exist, bm->temp_exist, bm->nonce_error, bm->reg_value, bm->crc);
  882. applog(LOG_DEBUG, "BitMain RxStatus Data chain info:");
  883. for(i = 0; i < bm->chain_num; i++) {
  884. applog(LOG_DEBUG, "BitMain RxStatus Data chain(%d) asic num=%d asic_exist=%08x asic_status=%08x", i+1, bm->chain_asic_num[i], bm->chain_asic_exist[i*8], bm->chain_asic_status[i*8]);
  885. }
  886. applog(LOG_DEBUG, "BitMain RxStatus Data temp info:");
  887. for(i = 0; i < bm->temp_num; i++) {
  888. applog(LOG_DEBUG, "BitMain RxStatus Data temp(%d) temp=%d", i+1, bm->temp[i]);
  889. }
  890. applog(LOG_DEBUG, "BitMain RxStatus Data fan info:");
  891. for(i = 0; i < bm->fan_num; i++) {
  892. applog(LOG_DEBUG, "BitMain RxStatus Data fan(%d) fan=%d", i+1, bm->fan[i]);
  893. }
  894. return 0;
  895. }
  896. static int bitmain_parse_rxnonce(const uint8_t * data, int datalen, struct bitmain_rxnonce_data *bm, int * nonce_num)
  897. {
  898. int i = 0;
  899. uint16_t crc = 0;
  900. uint8_t version = 0;
  901. int curnoncenum = 0;
  902. if (unlikely(!bm)) {
  903. applog(LOG_ERR, "bitmain_parse_rxnonce bitmain_rxstatus_data null");
  904. return -1;
  905. }
  906. if (unlikely(!data || datalen <= 0)) {
  907. applog(LOG_ERR, "bitmain_parse_rxnonce data null or datalen(%d) error", datalen);
  908. return -1;
  909. }
  910. memcpy(bm, data, sizeof(struct bitmain_rxnonce_data));
  911. if (bm->data_type != BITMAIN_DATA_TYPE_RXNONCE) {
  912. applog(LOG_ERR, "bitmain_parse_rxnonce datatype(%02x) error", bm->data_type);
  913. return -1;
  914. }
  915. if (bm->version != version) {
  916. applog(LOG_ERR, "bitmain_parse_rxnonce version(%02x) error", bm->version);
  917. return -1;
  918. }
  919. bm->length = htole16(bm->length);
  920. if (bm->length+4 != datalen) {
  921. applog(LOG_ERR, "bitmain_parse_rxnonce length(%d) error", bm->length);
  922. return -1;
  923. }
  924. crc = CRC16(data, datalen-2);
  925. memcpy(&(bm->crc), data+datalen-2, 2);
  926. bm->crc = htole16(bm->crc);
  927. if(crc != bm->crc) {
  928. applog(LOG_ERR, "bitmain_parse_rxnonce check crc(%d) != bm crc(%d) datalen(%d)", crc, bm->crc, datalen);
  929. return -1;
  930. }
  931. bm->fifo_space = htole16(bm->fifo_space);
  932. bm->diff = htole16(bm->diff);
  933. bm->total_nonce_num = htole64(bm->total_nonce_num);
  934. curnoncenum = (datalen-14)/8;
  935. applog(LOG_DEBUG, "BitMain RxNonce Data: nonce_num(%d) fifo_space(%d) diff(%d) tnn(%"PRIu64")", curnoncenum, bm->fifo_space, bm->diff, bm->total_nonce_num);
  936. for(i = 0; i < curnoncenum; i++) {
  937. bm->nonces[i].work_id = htole32(bm->nonces[i].work_id);
  938. bm->nonces[i].nonce = htole32(bm->nonces[i].nonce);
  939. applog(LOG_DEBUG, "BitMain RxNonce Data %d: work_id(%d) nonce(%08x)(%d)",
  940. i, bm->nonces[i].work_id, bm->nonces[i].nonce, bm->nonces[i].nonce);
  941. }
  942. *nonce_num = curnoncenum;
  943. return 0;
  944. }
  945. static int bitmain_read(struct cgpu_info *bitmain, unsigned char *buf,
  946. size_t bufsize, int timeout)
  947. {
  948. int err = 0;
  949. size_t total = 0;
  950. if(bitmain == NULL || buf == NULL || bufsize <= 0) {
  951. applog(LOG_WARNING, "bitmain_read parameter error bufsize(%llu)", (unsigned long long)bufsize);
  952. return -1;
  953. }
  954. {
  955. err = btm_read(bitmain, buf, bufsize);
  956. total = err;
  957. }
  958. return total;
  959. }
  960. static int bitmain_write(struct cgpu_info *bitmain, char *buf, ssize_t len)
  961. {
  962. int err;
  963. {
  964. int havelen = 0;
  965. while(havelen < len) {
  966. err = btm_write(bitmain, buf+havelen, len-havelen);
  967. if(err < 0) {
  968. applog(LOG_DEBUG, "%s%i: btm_write got err %d", bitmain->drv->name,
  969. bitmain->device_id, err);
  970. applog(LOG_WARNING, "usb_write error on bitmain_write");
  971. return BTM_SEND_ERROR;
  972. } else {
  973. havelen += err;
  974. }
  975. }
  976. }
  977. return BTM_SEND_OK;
  978. }
  979. static int bitmain_send_data(const uint8_t * data, int datalen, struct cgpu_info *bitmain)
  980. {
  981. int ret;
  982. if(datalen <= 0) {
  983. return 0;
  984. }
  985. //struct bitmain_info *info = bitmain->device_data;
  986. //int delay;
  987. //delay = datalen * 10 * 1000000;
  988. //delay = delay / info->baud;
  989. //delay += 4000;
  990. if(opt_debug) {
  991. char hex[(datalen * 2) + 1];
  992. bin2hex(hex, data, datalen);
  993. applog(LOG_DEBUG, "BitMain: Sent(%d): %s", datalen, hex);
  994. }
  995. //cgtimer_t ts_start;
  996. //cgsleep_prepare_r(&ts_start);
  997. //applog(LOG_DEBUG, "----bitmain_send_data start");
  998. ret = bitmain_write(bitmain, (char *)data, datalen);
  999. applog(LOG_DEBUG, "----bitmain_send_data stop ret=%d datalen=%d", ret, datalen);
  1000. //cgsleep_us_r(&ts_start, delay);
  1001. //applog(LOG_DEBUG, "BitMain: Sent: Buffer delay: %dus", delay);
  1002. return ret;
  1003. }
  1004. static bool bitmain_decode_nonce(struct thr_info *thr, struct cgpu_info *bitmain,
  1005. struct bitmain_info *info, uint32_t nonce, struct work *work)
  1006. {
  1007. info = bitmain->device_data;
  1008. //info->matching_work[work->subid]++;
  1009. applog(LOG_DEBUG, "BitMain: submit nonce = %08x", nonce);
  1010. return submit_nonce(thr, work, nonce);
  1011. }
  1012. static void bitmain_inc_nvw(struct bitmain_info *info, struct thr_info *thr)
  1013. {
  1014. applog(LOG_INFO, "%s%d: No matching work - HW error",
  1015. thr->cgpu->drv->name, thr->cgpu->device_id);
  1016. inc_hw_errors_only(thr);
  1017. info->no_matching_work++;
  1018. }
  1019. static inline void record_temp_fan(struct bitmain_info *info, struct bitmain_rxstatus_data *bm, float *temp_avg)
  1020. {
  1021. int i = 0;
  1022. int maxfan = 0, maxtemp = 0;
  1023. *temp_avg = 0;
  1024. info->fan_num = bm->fan_num;
  1025. for(i = 0; i < bm->fan_num; i++) {
  1026. info->fan[i] = bm->fan[i] * BITMAIN_FAN_FACTOR;
  1027. if(info->fan[i] > maxfan)
  1028. maxfan = info->fan[i];
  1029. }
  1030. info->temp_num = bm->temp_num;
  1031. for(i = 0; i < bm->temp_num; i++) {
  1032. info->temp[i] = bm->temp[i];
  1033. /*
  1034. if(bm->temp[i] & 0x80) {
  1035. bm->temp[i] &= 0x7f;
  1036. info->temp[i] = 0 - ((~bm->temp[i] & 0x7f) + 1);
  1037. }*/
  1038. *temp_avg += info->temp[i];
  1039. if(info->temp[i] > info->temp_max) {
  1040. info->temp_max = info->temp[i];
  1041. }
  1042. if(info->temp[i] > maxtemp)
  1043. maxtemp = info->temp[i];
  1044. }
  1045. if(bm->temp_num > 0) {
  1046. *temp_avg = *temp_avg / bm->temp_num;
  1047. info->temp_avg = *temp_avg;
  1048. }
  1049. // inc_dev_status
  1050. mutex_lock(&stats_lock);
  1051. info->g_max_fan = maxfan;
  1052. info->g_max_temp = maxtemp;
  1053. mutex_unlock(&stats_lock);
  1054. }
  1055. static void bitmain_update_temps(struct cgpu_info *bitmain, struct bitmain_info *info,
  1056. struct bitmain_rxstatus_data *bm)
  1057. {
  1058. char tmp[64] = {0};
  1059. char msg[10240] = {0};
  1060. int i = 0;
  1061. record_temp_fan(info, bm, &(bitmain->temp));
  1062. strcpy(msg, "BitMain: ");
  1063. for(i = 0; i < bm->fan_num; i++) {
  1064. if(i != 0) {
  1065. strcat(msg, ", ");
  1066. }
  1067. sprintf(tmp, "Fan%d: %d/m", i+1, info->fan[i]);
  1068. strcat(msg, tmp);
  1069. }
  1070. strcat(msg, "\t");
  1071. for(i = 0; i < bm->temp_num; i++) {
  1072. if(i != 0) {
  1073. strcat(msg, ", ");
  1074. }
  1075. sprintf(tmp, "Temp%d: %dC", i+1, info->temp[i]);
  1076. strcat(msg, tmp);
  1077. }
  1078. sprintf(tmp, ", TempMAX: %dC", info->temp_max);
  1079. strcat(msg, tmp);
  1080. applog(LOG_INFO, "%s", msg);
  1081. info->temp_history_index++;
  1082. info->temp_sum += bitmain->temp;
  1083. applog(LOG_DEBUG, "BitMain: temp_index: %d, temp_count: %d, temp_old: %d",
  1084. info->temp_history_index, info->temp_history_count, info->temp_old);
  1085. if (info->temp_history_index == info->temp_history_count) {
  1086. info->temp_history_index = 0;
  1087. info->temp_sum = 0;
  1088. }
  1089. if (unlikely(info->temp_old >= opt_bitmain_overheat)) {
  1090. applog(LOG_WARNING, "BTM%d overheat! Idling", bitmain->device_id);
  1091. info->overheat = true;
  1092. } else if (info->overheat && info->temp_old <= opt_bitmain_temp) {
  1093. applog(LOG_WARNING, "BTM%d cooled, restarting", bitmain->device_id);
  1094. info->overheat = false;
  1095. }
  1096. }
  1097. extern void cg_logwork_uint32(struct work *work, uint32_t nonce, bool ok);
  1098. static void bitmain_parse_results(struct cgpu_info *bitmain, struct bitmain_info *info,
  1099. struct thr_info *thr, uint8_t *buf, int *offset)
  1100. {
  1101. int i, j, n, m, r, errordiff, spare = BITMAIN_READ_SIZE;
  1102. uint32_t checkbit = 0x00000000;
  1103. bool found = false;
  1104. struct work *work = NULL;
  1105. struct bitmain_packet_head packethead;
  1106. int asicnum = 0;
  1107. int idiff = 0;
  1108. int mod = 0,tmp = 0;
  1109. for (i = 0; i <= spare; i++) {
  1110. if(buf[i] == 0xa1) {
  1111. struct bitmain_rxstatus_data rxstatusdata;
  1112. applog(LOG_DEBUG, "bitmain_parse_results RxStatus Data");
  1113. if(*offset < 4) {
  1114. return;
  1115. }
  1116. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  1117. packethead.length = htole16(packethead.length);
  1118. if(packethead.length > 1130) {
  1119. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus datalen=%d error", packethead.length+4);
  1120. continue;
  1121. }
  1122. if(*offset < packethead.length + 4) {
  1123. return;
  1124. }
  1125. if(bitmain_parse_rxstatus(buf+i, packethead.length+4, &rxstatusdata) != 0) {
  1126. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxstatus error len=%d", packethead.length+4);
  1127. } else {
  1128. mutex_lock(&info->qlock);
  1129. info->chain_num = rxstatusdata.chain_num;
  1130. info->fifo_space = rxstatusdata.fifo_space;
  1131. info->hw_version[0] = rxstatusdata.hw_version[0];
  1132. info->hw_version[1] = rxstatusdata.hw_version[1];
  1133. info->hw_version[2] = rxstatusdata.hw_version[2];
  1134. info->hw_version[3] = rxstatusdata.hw_version[3];
  1135. info->nonce_error = rxstatusdata.nonce_error;
  1136. errordiff = info->nonce_error-info->last_nonce_error;
  1137. //sprintf(g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  1138. applog(LOG_ERR, "bitmain_parse_results v=%d chain=%d fifo=%d hwv1=%d hwv2=%d hwv3=%d hwv4=%d nerr=%d-%d freq=%d chain info:",
  1139. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  1140. info->last_nonce_error, info->nonce_error, info->frequency);
  1141. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  1142. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  1143. for(n = 0; n < rxstatusdata.chain_num; n++) {
  1144. info->chain_asic_num[n] = rxstatusdata.chain_asic_num[n];
  1145. memset(info->chain_asic_status_t[n], 0, 320);
  1146. j = 0;
  1147. mod = 0;
  1148. if(info->chain_asic_num[n] <= 0) {
  1149. asicnum = 0;
  1150. } else {
  1151. mod = info->chain_asic_num[n] % 32;
  1152. if(mod == 0) {
  1153. asicnum = info->chain_asic_num[n] / 32;
  1154. } else {
  1155. asicnum = info->chain_asic_num[n] / 32 + 1;
  1156. }
  1157. }
  1158. if(asicnum > 0) {
  1159. for(m = asicnum-1; m >= 0; m--) {
  1160. tmp = mod ? (32-mod): 0;
  1161. for(r = tmp;r < 32;r++){
  1162. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  1163. info->chain_asic_status_t[n][j] = ' ';
  1164. j++;
  1165. }
  1166. checkbit = num2bit(r);
  1167. if(rxstatusdata.chain_asic_exist[n*8+m] & checkbit) {
  1168. if(rxstatusdata.chain_asic_status[n*8+m] & checkbit) {
  1169. info->chain_asic_status_t[n][j] = 'o';
  1170. } else {
  1171. info->chain_asic_status_t[n][j] = 'x';
  1172. }
  1173. } else {
  1174. info->chain_asic_status_t[n][j] = '-';
  1175. }
  1176. j++;
  1177. }
  1178. info->chain_asic_status_t[n][j] = ' ';
  1179. j++;
  1180. mod = 0;
  1181. }
  1182. }
  1183. applog(LOG_DEBUG, "bitmain_parse_results chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  1184. n, info->chain_asic_num[n],
  1185. info->chain_asic_exist[n*8+0], info->chain_asic_exist[n*8+1], info->chain_asic_exist[n*8+2], info->chain_asic_exist[n*8+3], info->chain_asic_exist[n*8+4], info->chain_asic_exist[n*8+5], info->chain_asic_exist[n*8+6], info->chain_asic_exist[n*8+7],
  1186. info->chain_asic_status[n*8+0], info->chain_asic_status[n*8+1], info->chain_asic_status[n*8+2], info->chain_asic_status[n*8+3], info->chain_asic_status[n*8+4], info->chain_asic_status[n*8+5], info->chain_asic_status[n*8+6], info->chain_asic_status[n*8+7]);
  1187. applog(LOG_ERR, "bitmain_parse_results chain(%d) asic_num=%d asic_status=%s", n, info->chain_asic_num[n], info->chain_asic_status_t[n]);
  1188. }
  1189. mutex_unlock(&info->qlock);
  1190. if(errordiff > 0) {
  1191. for(j = 0; j < errordiff; j++) {
  1192. bitmain_inc_nvw(info, thr);
  1193. }
  1194. mutex_lock(&info->qlock);
  1195. info->last_nonce_error += errordiff;
  1196. mutex_unlock(&info->qlock);
  1197. }
  1198. bitmain_update_temps(bitmain, info, &rxstatusdata);
  1199. }
  1200. found = true;
  1201. spare = packethead.length + 4 + i;
  1202. if(spare > *offset) {
  1203. applog(LOG_ERR, "bitmain_parse_rxresults space(%d) > offset(%d)", spare, *offset);
  1204. spare = *offset;
  1205. }
  1206. break;
  1207. } else if(buf[i] == 0xa2) {
  1208. struct bitmain_rxnonce_data rxnoncedata;
  1209. int nonce_num = 0;
  1210. applog(LOG_DEBUG, "bitmain_parse_results RxNonce Data");
  1211. if(*offset < 4) {
  1212. return;
  1213. }
  1214. memcpy(&packethead, buf+i, sizeof(struct bitmain_packet_head));
  1215. packethead.length = htole16(packethead.length);
  1216. if(packethead.length > 1030) {
  1217. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce datalen=%d error", packethead.length+4);
  1218. continue;
  1219. }
  1220. if(*offset < packethead.length + 4) {
  1221. return;
  1222. }
  1223. if(bitmain_parse_rxnonce(buf+i, packethead.length+4, &rxnoncedata, &nonce_num) != 0) {
  1224. applog(LOG_ERR, "bitmain_parse_results bitmain_parse_rxnonce error len=%d", packethead.length+4);
  1225. } else {
  1226. for(j = 0; j < nonce_num; j++) {
  1227. const int work_id = rxnoncedata.nonces[j].work_id;
  1228. HASH_FIND_INT(bitmain->queued_work, &work_id, work);
  1229. if(work) {
  1230. if(BITMAIN_TEST_PRINT_WORK) {
  1231. applog(LOG_ERR, "bitmain_parse_results nonce find work(%d-%d)(%08x)", work->id, rxnoncedata.nonces[j].work_id, rxnoncedata.nonces[j].nonce);
  1232. char ob_hex[(32 * 2) + 1];
  1233. bin2hex(ob_hex, work->midstate, 32);
  1234. applog(LOG_ERR, "work %d midstate: %s", work->id, ob_hex);
  1235. bin2hex(ob_hex, &work->data[64], 12);
  1236. applog(LOG_ERR, "work %d data2: %s", work->id, ob_hex);
  1237. }
  1238. if(bfg_work_block(work) != info->last_work_block) {
  1239. applog(LOG_ERR, "BitMain: bitmain_parse_rxnonce work(%d) nonce stale", rxnoncedata.nonces[j].work_id);
  1240. } else {
  1241. if (bitmain_decode_nonce(thr, bitmain, info, rxnoncedata.nonces[j].nonce, work)) {
  1242. mutex_lock(&info->qlock);
  1243. info->nonces++;
  1244. info->auto_nonces++;
  1245. mutex_unlock(&info->qlock);
  1246. } else {
  1247. //bitmain_inc_nvw(info, thr);
  1248. applog(LOG_ERR, "BitMain: bitmain_decode_nonce error work(%d)", rxnoncedata.nonces[j].work_id);
  1249. }
  1250. }
  1251. } else {
  1252. //bitmain_inc_nvw(info, thr);
  1253. applog(LOG_ERR, "BitMain: Nonce not find work(%d)", rxnoncedata.nonces[j].work_id);
  1254. }
  1255. }
  1256. #ifdef BITMAIN_CALC_DIFF1
  1257. if(opt_bitmain_hwerror) {
  1258. int difftmp = 0;
  1259. difftmp = rxnoncedata.diff;
  1260. idiff = 1;
  1261. while(difftmp > 0) {
  1262. difftmp--;
  1263. idiff = idiff << 1;
  1264. }
  1265. mutex_lock(&info->qlock);
  1266. difftmp = idiff*(rxnoncedata.total_nonce_num-info->total_nonce_num);
  1267. if(difftmp < 0)
  1268. difftmp = 0;
  1269. info->nonces = info->nonces+difftmp;
  1270. info->auto_nonces = info->auto_nonces+difftmp;
  1271. info->total_nonce_num = rxnoncedata.total_nonce_num;
  1272. info->fifo_space = rxnoncedata.fifo_space;
  1273. mutex_unlock(&info->qlock);
  1274. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d diff=%d rxtnn=%"PRIu64" tnn=%"PRIu64, info->fifo_space, idiff, rxnoncedata.total_nonce_num, info->total_nonce_num);
  1275. } else {
  1276. mutex_lock(&info->qlock);
  1277. info->fifo_space = rxnoncedata.fifo_space;
  1278. mutex_unlock(&info->qlock);
  1279. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  1280. }
  1281. #else
  1282. mutex_lock(&info->qlock);
  1283. info->fifo_space = rxnoncedata.fifo_space;
  1284. mutex_unlock(&info->qlock);
  1285. applog(LOG_DEBUG, "bitmain_parse_rxnonce fifo space=%d", info->fifo_space);
  1286. #endif
  1287. #ifndef WIN32
  1288. if(nonce_num < BITMAIN_MAX_NONCE_NUM)
  1289. cgsleep_ms(5);
  1290. #endif
  1291. }
  1292. found = true;
  1293. spare = packethead.length + 4 + i;
  1294. if(spare > *offset) {
  1295. applog(LOG_ERR, "bitmain_parse_rxnonce space(%d) > offset(%d)", spare, *offset);
  1296. spare = *offset;
  1297. }
  1298. break;
  1299. } else {
  1300. applog(LOG_ERR, "bitmain_parse_results data type error=%02x", buf[i]);
  1301. }
  1302. }
  1303. if (!found) {
  1304. spare = *offset - BITMAIN_READ_SIZE;
  1305. /* We are buffering and haven't accumulated one more corrupt
  1306. * work result. */
  1307. if (spare < (int)BITMAIN_READ_SIZE)
  1308. return;
  1309. bitmain_inc_nvw(info, thr);
  1310. }
  1311. *offset -= spare;
  1312. memmove(buf, buf + spare, *offset);
  1313. }
  1314. static void bitmain_running_reset(struct cgpu_info *bitmain, struct bitmain_info *info)
  1315. {
  1316. bitmain->results = 0;
  1317. info->reset = false;
  1318. }
  1319. static void *bitmain_get_results(void *userdata)
  1320. {
  1321. struct cgpu_info *bitmain = (struct cgpu_info *)userdata;
  1322. struct bitmain_info *info = bitmain->device_data;
  1323. int offset = 0, ret = 0;
  1324. const int rsize = BITMAIN_FTDI_READSIZE;
  1325. uint8_t readbuf[BITMAIN_READBUF_SIZE];
  1326. struct thr_info *thr = info->thr;
  1327. char threadname[24];
  1328. int errorcount = 0;
  1329. snprintf(threadname, 24, "btm_recv/%d", bitmain->device_id);
  1330. RenameThread(threadname);
  1331. while (likely(!bitmain->shutdown)) {
  1332. unsigned char buf[rsize];
  1333. //applog(LOG_DEBUG, "+++++++bitmain_get_results offset=%d", offset);
  1334. if (offset >= (int)BITMAIN_READ_SIZE) {
  1335. //applog(LOG_DEBUG, "======start bitmain_get_results ");
  1336. bitmain_parse_results(bitmain, info, thr, readbuf, &offset);
  1337. //applog(LOG_DEBUG, "======stop bitmain_get_results ");
  1338. }
  1339. if (unlikely(offset + rsize >= BITMAIN_READBUF_SIZE)) {
  1340. /* This should never happen */
  1341. applog(LOG_DEBUG, "BitMain readbuf overflow, resetting buffer");
  1342. offset = 0;
  1343. }
  1344. if (unlikely(info->reset)) {
  1345. bitmain_running_reset(bitmain, info);
  1346. /* Discard anything in the buffer */
  1347. offset = 0;
  1348. }
  1349. /* As the usb read returns after just 1ms, sleep long enough
  1350. * to leave the interface idle for writes to occur, but do not
  1351. * sleep if we have been receiving data as more may be coming. */
  1352. //if (offset == 0) {
  1353. // cgsleep_ms_r(&ts_start, BITMAIN_READ_TIMEOUT);
  1354. //}
  1355. //cgsleep_prepare_r(&ts_start);
  1356. //applog(LOG_DEBUG, "======start bitmain_get_results bitmain_read");
  1357. ret = bitmain_read(bitmain, buf, rsize, BITMAIN_READ_TIMEOUT);
  1358. //applog(LOG_DEBUG, "======stop bitmain_get_results bitmain_read=%d", ret);
  1359. if ((ret < 1) || (ret == 18)) {
  1360. errorcount++;
  1361. #ifdef WIN32
  1362. if(errorcount > 200) {
  1363. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1364. cgsleep_ms(20);
  1365. errorcount = 0;
  1366. }
  1367. #else
  1368. if(errorcount > 3) {
  1369. //applog(LOG_ERR, "bitmain_read errorcount ret=%d", ret);
  1370. cgsleep_ms(20);
  1371. errorcount = 0;
  1372. }
  1373. #endif
  1374. if(ret < 1)
  1375. continue;
  1376. }
  1377. if (opt_debug) {
  1378. char hex[(ret * 2) + 1];
  1379. bin2hex(hex, buf, ret);
  1380. applog(LOG_DEBUG, "BitMain: get: %s", hex);
  1381. }
  1382. memcpy(readbuf+offset, buf, ret);
  1383. offset += ret;
  1384. }
  1385. return NULL;
  1386. }
  1387. static void bitmain_set_timeout(struct bitmain_info *info)
  1388. {
  1389. info->timeout = BITMAIN_TIMEOUT_FACTOR / info->frequency;
  1390. }
  1391. static void bitmain_init(struct cgpu_info *bitmain)
  1392. {
  1393. applog(LOG_INFO, "BitMain: Opened on %s", bitmain->device_path);
  1394. }
  1395. static bool bitmain_prepare(struct thr_info *thr)
  1396. {
  1397. struct cgpu_info *bitmain = thr->cgpu;
  1398. struct bitmain_info *info = bitmain->device_data;
  1399. free(bitmain->works);
  1400. bitmain->works = calloc(BITMAIN_MAX_WORK_NUM * sizeof(struct work *),
  1401. BITMAIN_ARRAY_SIZE);
  1402. if (!bitmain->works)
  1403. quit(1, "Failed to calloc bitmain works in bitmain_prepare");
  1404. info->thr = thr;
  1405. mutex_init(&info->lock);
  1406. mutex_init(&info->qlock);
  1407. if (unlikely(pthread_cond_init(&info->qcond, NULL)))
  1408. quit(1, "Failed to pthread_cond_init bitmain qcond");
  1409. if (pthread_create(&info->read_thr, NULL, bitmain_get_results, (void *)bitmain))
  1410. quit(1, "Failed to create bitmain read_thr");
  1411. bitmain_init(bitmain);
  1412. return true;
  1413. }
  1414. static int bitmain_initialize(struct cgpu_info *bitmain)
  1415. {
  1416. uint8_t data[BITMAIN_READBUF_SIZE];
  1417. struct bitmain_info *info = NULL;
  1418. int ret = 0;
  1419. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1420. int readlen = 0;
  1421. int sendlen = 0;
  1422. int trycount = 3;
  1423. struct timespec p;
  1424. struct bitmain_rxstatus_data rxstatusdata;
  1425. int i = 0, j = 0, m = 0, r = 0, statusok = 0;
  1426. uint32_t checkbit = 0x00000000;
  1427. int hwerror_eft = 0;
  1428. int beeper_ctrl = 1;
  1429. int tempover_ctrl = 1;
  1430. int home_mode = 0;
  1431. struct bitmain_packet_head packethead;
  1432. int asicnum = 0;
  1433. int mod = 0,tmp = 0;
  1434. /* Send reset, then check for result */
  1435. if(!bitmain) {
  1436. applog(LOG_WARNING, "bitmain_initialize cgpu_info is null");
  1437. return -1;
  1438. }
  1439. info = bitmain->device_data;
  1440. /* clear read buf */
  1441. ret = bitmain_read(bitmain, data, BITMAIN_READBUF_SIZE,
  1442. BITMAIN_RESET_TIMEOUT);
  1443. if(ret > 0) {
  1444. if (opt_debug) {
  1445. char hex[(ret * 2) + 1];
  1446. bin2hex(hex, data, ret);
  1447. applog(LOG_DEBUG, "BTM%d Clear Read(%d): %s", bitmain->device_id, ret, hex);
  1448. }
  1449. }
  1450. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *)sendbuf, 0, 1, 0, 0);
  1451. if(sendlen <= 0) {
  1452. applog(LOG_ERR, "bitmain_initialize bitmain_set_rxstatus error(%d)", sendlen);
  1453. return -1;
  1454. }
  1455. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1456. if (unlikely(ret == BTM_SEND_ERROR)) {
  1457. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1458. return -1;
  1459. }
  1460. while(trycount >= 0) {
  1461. ret = bitmain_read(bitmain, data+readlen, BITMAIN_READBUF_SIZE, BITMAIN_RESET_TIMEOUT);
  1462. if(ret > 0) {
  1463. readlen += ret;
  1464. if(readlen > BITMAIN_READ_SIZE) {
  1465. for(i = 0; i < readlen; i++) {
  1466. if(data[i] == 0xa1) {
  1467. if (opt_debug) {
  1468. char hex[(readlen * 2) + 1];
  1469. bin2hex(hex, data, readlen);
  1470. applog(LOG_DEBUG, "%s%d initset: get: %s", bitmain->drv->name, bitmain->device_id, hex);
  1471. }
  1472. memcpy(&packethead, data+i, sizeof(struct bitmain_packet_head));
  1473. packethead.length = htole16(packethead.length);
  1474. if(packethead.length > 1130) {
  1475. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d error", packethead.length+4);
  1476. continue;
  1477. }
  1478. if(readlen-i < packethead.length+4) {
  1479. applog(LOG_ERR, "bitmain_initialize rxstatus datalen=%d<%d low", readlen-i, packethead.length+4);
  1480. continue;
  1481. }
  1482. if (bitmain_parse_rxstatus(data+i, packethead.length+4, &rxstatusdata) != 0) {
  1483. applog(LOG_ERR, "bitmain_initialize bitmain_parse_rxstatus error");
  1484. continue;
  1485. }
  1486. info->chain_num = rxstatusdata.chain_num;
  1487. info->fifo_space = rxstatusdata.fifo_space;
  1488. info->hw_version[0] = rxstatusdata.hw_version[0];
  1489. info->hw_version[1] = rxstatusdata.hw_version[1];
  1490. info->hw_version[2] = rxstatusdata.hw_version[2];
  1491. info->hw_version[3] = rxstatusdata.hw_version[3];
  1492. info->nonce_error = 0;
  1493. info->last_nonce_error = 0;
  1494. sprintf(info->g_miner_version, "%d.%d.%d.%d", info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3]);
  1495. applog(LOG_ERR, "bitmain_initialize rxstatus v(%d) chain(%d) fifo(%d) hwv1(%d) hwv2(%d) hwv3(%d) hwv4(%d) nerr(%d) freq=%d",
  1496. rxstatusdata.version, info->chain_num, info->fifo_space, info->hw_version[0], info->hw_version[1], info->hw_version[2], info->hw_version[3],
  1497. rxstatusdata.nonce_error, info->frequency);
  1498. memcpy(info->chain_asic_exist, rxstatusdata.chain_asic_exist, BITMAIN_MAX_CHAIN_NUM*32);
  1499. memcpy(info->chain_asic_status, rxstatusdata.chain_asic_status, BITMAIN_MAX_CHAIN_NUM*32);
  1500. for(i = 0; i < rxstatusdata.chain_num; i++) {
  1501. info->chain_asic_num[i] = rxstatusdata.chain_asic_num[i];
  1502. memset(info->chain_asic_status_t[i], 0, 320);
  1503. j = 0;
  1504. mod = 0;
  1505. if(info->chain_asic_num[i] <= 0) {
  1506. asicnum = 0;
  1507. } else {
  1508. mod = info->chain_asic_num[i] % 32;
  1509. if(mod == 0) {
  1510. asicnum = info->chain_asic_num[i] / 32;
  1511. } else {
  1512. asicnum = info->chain_asic_num[i] / 32 + 1;
  1513. }
  1514. }
  1515. if(asicnum > 0) {
  1516. for(m = asicnum-1; m >= 0; m--) {
  1517. tmp = mod ? (32-mod):0;
  1518. for(r = tmp;r < 32;r++){
  1519. if((r-tmp)%8 == 0 && (r-tmp) !=0){
  1520. info->chain_asic_status_t[i][j] = ' ';
  1521. j++;
  1522. }
  1523. checkbit = num2bit(r);
  1524. if(rxstatusdata.chain_asic_exist[i*8+m] & checkbit) {
  1525. if(rxstatusdata.chain_asic_status[i*8+m] & checkbit) {
  1526. info->chain_asic_status_t[i][j] = 'o';
  1527. } else {
  1528. info->chain_asic_status_t[i][j] = 'x';
  1529. }
  1530. } else {
  1531. info->chain_asic_status_t[i][j] = '-';
  1532. }
  1533. j++;
  1534. }
  1535. info->chain_asic_status_t[i][j] = ' ';
  1536. j++;
  1537. mod = 0;
  1538. }
  1539. }
  1540. applog(LOG_DEBUG, "bitmain_initialize chain(%d) asic_num=%d asic_exist=%08x%08x%08x%08x%08x%08x%08x%08x asic_status=%08x%08x%08x%08x%08x%08x%08x%08x",
  1541. i, info->chain_asic_num[i],
  1542. info->chain_asic_exist[i*8+0], info->chain_asic_exist[i*8+1], info->chain_asic_exist[i*8+2], info->chain_asic_exist[i*8+3], info->chain_asic_exist[i*8+4], info->chain_asic_exist[i*8+5], info->chain_asic_exist[i*8+6], info->chain_asic_exist[i*8+7],
  1543. info->chain_asic_status[i*8+0], info->chain_asic_status[i*8+1], info->chain_asic_status[i*8+2], info->chain_asic_status[i*8+3], info->chain_asic_status[i*8+4], info->chain_asic_status[i*8+5], info->chain_asic_status[i*8+6], info->chain_asic_status[i*8+7]);
  1544. applog(LOG_ERR, "bitmain_initialize chain(%d) asic_num=%d asic_status=%s", i, info->chain_asic_num[i], info->chain_asic_status_t[i]);
  1545. }
  1546. bitmain_update_temps(bitmain, info, &rxstatusdata);
  1547. statusok = 1;
  1548. break;
  1549. }
  1550. }
  1551. if(statusok) {
  1552. break;
  1553. }
  1554. }
  1555. }
  1556. trycount--;
  1557. p.tv_sec = 0;
  1558. p.tv_nsec = BITMAIN_RESET_PITCH;
  1559. nanosleep(&p, NULL);
  1560. }
  1561. p.tv_sec = 0;
  1562. p.tv_nsec = BITMAIN_RESET_PITCH;
  1563. nanosleep(&p, NULL);
  1564. cgtime(&info->last_status_time);
  1565. if(statusok) {
  1566. applog(LOG_ERR, "bitmain_initialize start send txconfig");
  1567. if(opt_bitmain_hwerror)
  1568. hwerror_eft = 1;
  1569. else
  1570. hwerror_eft = 0;
  1571. if(opt_bitmain_nobeeper)
  1572. beeper_ctrl = 0;
  1573. else
  1574. beeper_ctrl = 1;
  1575. if(opt_bitmain_notempoverctrl)
  1576. tempover_ctrl = 0;
  1577. else
  1578. tempover_ctrl = 1;
  1579. if(opt_bitmain_homemode)
  1580. home_mode= 1;
  1581. else
  1582. home_mode= 0;
  1583. sendlen = bitmain_set_txconfig((struct bitmain_txconfig_token *)sendbuf, 1, 1, 1, 1, 1, 0, 1, hwerror_eft, beeper_ctrl, tempover_ctrl,home_mode,
  1584. info->chain_num, info->asic_num, BITMAIN_DEFAULT_FAN_MAX_PWM, info->timeout,
  1585. info->frequency, info->voltage, 0, 0, 0x04, info->reg_data);
  1586. if(sendlen <= 0) {
  1587. applog(LOG_ERR, "bitmain_initialize bitmain_set_txconfig error(%d)", sendlen);
  1588. return -1;
  1589. }
  1590. ret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1591. if (unlikely(ret == BTM_SEND_ERROR)) {
  1592. applog(LOG_ERR, "bitmain_initialize bitmain_send_data error");
  1593. return -1;
  1594. }
  1595. applog(LOG_WARNING, "BMM%d: InitSet succeeded", bitmain->device_id);
  1596. } else {
  1597. applog(LOG_WARNING, "BMS%d: InitSet error", bitmain->device_id);
  1598. return -1;
  1599. }
  1600. return 0;
  1601. }
  1602. static bool bitmain_detect_one(const char * devpath)
  1603. {
  1604. int baud, chain_num, asic_num, timeout, frequency = 0;
  1605. char frequency_t[256] = {0};
  1606. uint8_t reg_data[4] = {0};
  1607. uint8_t voltage[2] = {0};
  1608. char voltage_t[8] = {0};
  1609. int this_option_offset = ++option_offset;
  1610. struct bitmain_info *info;
  1611. struct cgpu_info *bitmain;
  1612. bool configured;
  1613. int ret;
  1614. if (opt_bitmain_options == NULL)
  1615. return false;
  1616. bitmain = btm_alloc_cgpu(&bitmain_drv, BITMAIN_MINER_THREADS);
  1617. configured = get_options(this_option_offset, &baud, &chain_num,
  1618. &asic_num, &timeout, &frequency, frequency_t, reg_data, voltage, voltage_t);
  1619. get_option_freq(&timeout, &frequency, frequency_t, reg_data);
  1620. get_option_voltage(voltage, voltage_t);
  1621. if (!btm_init(bitmain, opt_bitmain_dev))
  1622. goto shin;
  1623. applog(LOG_ERR, "bitmain_detect_one btm init ok");
  1624. bitmain->device_data = calloc(sizeof(struct bitmain_info), 1);
  1625. /* make sure initialize successfully*/
  1626. memset(bitmain->device_data,0,sizeof(struct bitmain_info));
  1627. if (unlikely(!(bitmain->device_data)))
  1628. quit(1, "Failed to calloc bitmain_info data");
  1629. info = bitmain->device_data;
  1630. if (configured) {
  1631. info->baud = baud;
  1632. info->chain_num = chain_num;
  1633. info->asic_num = asic_num;
  1634. info->timeout = timeout;
  1635. info->frequency = frequency;
  1636. strcpy(info->frequency_t, frequency_t);
  1637. memcpy(info->reg_data, reg_data, 4);
  1638. memcpy(info->voltage, voltage, 2);
  1639. strcpy(info->voltage_t, voltage_t);
  1640. } else {
  1641. info->baud = BITMAIN_IO_SPEED;
  1642. info->chain_num = BITMAIN_DEFAULT_CHAIN_NUM;
  1643. info->asic_num = BITMAIN_DEFAULT_ASIC_NUM;
  1644. info->timeout = BITMAIN_DEFAULT_TIMEOUT;
  1645. info->frequency = BITMAIN_DEFAULT_FREQUENCY;
  1646. sprintf(info->frequency_t, "%d", BITMAIN_DEFAULT_FREQUENCY);
  1647. memset(info->reg_data, 0, 4);
  1648. info->voltage[0] = BITMAIN_DEFAULT_VOLTAGE0;
  1649. info->voltage[1] = BITMAIN_DEFAULT_VOLTAGE1;
  1650. strcpy(info->voltage_t, BITMAIN_DEFAULT_VOLTAGE_T);
  1651. }
  1652. info->fan_pwm = BITMAIN_DEFAULT_FAN_MIN_PWM;
  1653. info->temp_max = 0;
  1654. /* This is for check the temp/fan every 3~4s */
  1655. info->temp_history_count = (4 / (float)((float)info->timeout * ((float)1.67/0x32))) + 1;
  1656. if (info->temp_history_count <= 0)
  1657. info->temp_history_count = 1;
  1658. info->temp_history_index = 0;
  1659. info->temp_sum = 0;
  1660. info->temp_old = 0;
  1661. if (!add_cgpu(bitmain))
  1662. goto unshin;
  1663. ret = bitmain_initialize(bitmain);
  1664. applog(LOG_ERR, "bitmain_detect_one stop bitmain_initialize %d", ret);
  1665. if (ret && !configured)
  1666. goto unshin;
  1667. info->errorcount = 0;
  1668. applog(LOG_ERR, "BitMain Detected: %s "
  1669. "(chain_num=%d asic_num=%d timeout=%d freq=%d-%s volt=%02x%02x-%s)",
  1670. bitmain->device_path, info->chain_num, info->asic_num, info->timeout,
  1671. info->frequency, info->frequency_t, info->voltage[0], info->voltage[1], info->voltage_t);
  1672. return true;
  1673. unshin:
  1674. btm_uninit(bitmain);
  1675. shin:
  1676. free(bitmain->device_data);
  1677. bitmain->device_data = NULL;
  1678. free(bitmain);
  1679. return false;
  1680. }
  1681. static void bitmain_detect()
  1682. {
  1683. applog(LOG_DEBUG, "BTM detect dev: %s", opt_bitmain_dev);
  1684. if (strlen(opt_bitmain_dev) > 0) {
  1685. btm_detect(&bitmain_drv, bitmain_detect_one);
  1686. }
  1687. }
  1688. static void do_bitmain_close(struct thr_info *thr)
  1689. {
  1690. struct cgpu_info *bitmain = thr->cgpu;
  1691. struct bitmain_info *info = bitmain->device_data;
  1692. pthread_join(info->read_thr, NULL);
  1693. bitmain_running_reset(bitmain, info);
  1694. info->no_matching_work = 0;
  1695. }
  1696. /* We use a replacement algorithm to only remove references to work done from
  1697. * the buffer when we need the extra space for new work. */
  1698. static bool bitmain_fill(struct cgpu_info *bitmain)
  1699. {
  1700. struct bitmain_info *info = bitmain->device_data;
  1701. int subid, slot;
  1702. struct work *work;
  1703. bool ret = true;
  1704. int sendret = 0, sendcount = 0, neednum = 0, queuednum = 0, sendnum = 0, sendlen = 0;
  1705. uint8_t sendbuf[BITMAIN_SENDBUF_SIZE];
  1706. int senderror = 0;
  1707. struct timeval now;
  1708. int timediff = 0;
  1709. //applog(LOG_DEBUG, "BTM bitmain_fill start--------");
  1710. mutex_lock(&info->qlock);
  1711. if(info->fifo_space <= 0) {
  1712. //applog(LOG_DEBUG, "BTM bitmain_fill fifo space empty--------");
  1713. ret = true;
  1714. goto out_unlock;
  1715. }
  1716. if (bitmain->queued >= BITMAIN_MAX_WORK_QUEUE_NUM) {
  1717. ret = true;
  1718. } else {
  1719. ret = false;
  1720. }
  1721. while(info->fifo_space > 0) {
  1722. neednum = info->fifo_space<BITMAIN_MAX_WORK_NUM?info->fifo_space:BITMAIN_MAX_WORK_NUM;
  1723. queuednum = bitmain->queued;
  1724. applog(LOG_DEBUG, "BTM: Work task queued(%d) fifo space(%d) needsend(%d)", queuednum, info->fifo_space, neednum);
  1725. if(queuednum < neednum) {
  1726. while(true) {
  1727. work = get_queued(bitmain);
  1728. if (unlikely(!work)) {
  1729. break;
  1730. } else {
  1731. applog(LOG_DEBUG, "BTM get work queued number:%d neednum:%d", queuednum, neednum);
  1732. subid = bitmain->queued++;
  1733. work->subid = subid;
  1734. slot = bitmain->work_array + subid;
  1735. if (slot > BITMAIN_ARRAY_SIZE) {
  1736. applog(LOG_DEBUG, "bitmain_fill array cyc %d", BITMAIN_ARRAY_SIZE);
  1737. slot = 0;
  1738. }
  1739. if (likely(bitmain->works[slot])) {
  1740. applog(LOG_DEBUG, "bitmain_fill work_completed %d", slot);
  1741. work_completed(bitmain, bitmain->works[slot]);
  1742. }
  1743. bitmain->works[slot] = work;
  1744. queuednum++;
  1745. if(queuednum >= neednum) {
  1746. break;
  1747. }
  1748. }
  1749. }
  1750. }
  1751. if(queuednum < BITMAIN_MAX_DEAL_QUEUE_NUM) {
  1752. if(queuednum < neednum) {
  1753. applog(LOG_DEBUG, "BTM: No enough work to send, queue num=%d", queuednum);
  1754. break;
  1755. }
  1756. }
  1757. sendnum = queuednum < neednum ? queuednum : neednum;
  1758. sendlen = bitmain_set_txtask(sendbuf, &(info->last_work_block), bitmain->works, BITMAIN_ARRAY_SIZE, bitmain->work_array, sendnum, &sendcount);
  1759. bitmain->queued -= sendnum;
  1760. info->send_full_space += sendnum;
  1761. if (bitmain->queued < 0)
  1762. bitmain->queued = 0;
  1763. if (bitmain->work_array + sendnum > BITMAIN_ARRAY_SIZE) {
  1764. bitmain->work_array = bitmain->work_array + sendnum-BITMAIN_ARRAY_SIZE;
  1765. } else {
  1766. bitmain->work_array += sendnum;
  1767. }
  1768. applog(LOG_DEBUG, "BTM: Send work array %d", bitmain->work_array);
  1769. if (sendlen > 0) {
  1770. info->fifo_space -= sendcount;
  1771. if (info->fifo_space < 0)
  1772. info->fifo_space = 0;
  1773. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1774. if (unlikely(sendret == BTM_SEND_ERROR)) {
  1775. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  1776. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  1777. info->reset = true;
  1778. info->errorcount++;
  1779. senderror = 1;
  1780. if (info->errorcount > 1000) {
  1781. info->errorcount = 0;
  1782. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  1783. bitmain->shutdown = true;
  1784. }
  1785. break;
  1786. } else {
  1787. applog(LOG_DEBUG, "bitmain_send_data send ret=%d", sendret);
  1788. info->errorcount = 0;
  1789. }
  1790. } else {
  1791. applog(LOG_DEBUG, "BTM: Send work bitmain_set_txtask error: %d", sendlen);
  1792. break;
  1793. }
  1794. }
  1795. out_unlock:
  1796. cgtime(&now);
  1797. timediff = now.tv_sec - info->last_status_time.tv_sec;
  1798. if(timediff < 0) timediff = -timediff;
  1799. if (timediff > BITMAIN_SEND_STATUS_TIME) {
  1800. applog(LOG_DEBUG, "BTM: Send RX Status Token fifo_space(%d) timediff(%d)", info->fifo_space, timediff);
  1801. copy_time(&(info->last_status_time), &now);
  1802. sendlen = bitmain_set_rxstatus((struct bitmain_rxstatus_token *) sendbuf, 0, 0, 0, 0);
  1803. if (sendlen > 0) {
  1804. sendret = bitmain_send_data(sendbuf, sendlen, bitmain);
  1805. if (unlikely(sendret == BTM_SEND_ERROR)) {
  1806. applog(LOG_ERR, "BTM%i: Comms error(buffer)", bitmain->device_id);
  1807. //dev_error(bitmain, REASON_DEV_COMMS_ERROR);
  1808. info->reset = true;
  1809. info->errorcount++;
  1810. senderror = 1;
  1811. if (info->errorcount > 1000) {
  1812. info->errorcount = 0;
  1813. applog(LOG_ERR, "%s%d: Device disappeared, shutting down thread", bitmain->drv->name, bitmain->device_id);
  1814. bitmain->shutdown = true;
  1815. }
  1816. } else {
  1817. info->errorcount = 0;
  1818. if (info->fifo_space <= 0) {
  1819. senderror = 1;
  1820. }
  1821. }
  1822. }
  1823. }
  1824. if(info->send_full_space > BITMAIN_SEND_FULL_SPACE) {
  1825. info->send_full_space = 0;
  1826. ret = true;
  1827. cgsleep_ms(1);
  1828. }
  1829. mutex_unlock(&info->qlock);
  1830. if(senderror) {
  1831. ret = true;
  1832. applog(LOG_DEBUG, "bitmain_fill send task sleep");
  1833. //cgsleep_ms(1);
  1834. }
  1835. return ret;
  1836. }
  1837. static int64_t bitmain_scanhash(struct thr_info *thr)
  1838. {
  1839. struct cgpu_info *bitmain = thr->cgpu;
  1840. struct bitmain_info *info = bitmain->device_data;
  1841. const int chain_num = info->chain_num;
  1842. int64_t hash_count;
  1843. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock start");
  1844. mutex_lock(&info->qlock);
  1845. hash_count = 0xffffffffull * (uint64_t)info->nonces;
  1846. bitmain->results += info->nonces + info->idle;
  1847. if (bitmain->results > chain_num)
  1848. bitmain->results = chain_num;
  1849. if (!info->reset)
  1850. bitmain->results--;
  1851. info->nonces = info->idle = 0;
  1852. mutex_unlock(&info->qlock);
  1853. //applog(LOG_DEBUG, "bitmain_scanhash info->qlock stop");
  1854. /* Check for nothing but consecutive bad results or consistently less
  1855. * results than we should be getting and reset the FPGA if necessary */
  1856. //if (bitmain->results < -chain_num && !info->reset) {
  1857. // applog(LOG_ERR, "BTM%d: Result return rate low, resetting!",
  1858. // bitmain->device_id);
  1859. // info->reset = true;
  1860. //}
  1861. /* This hashmeter is just a utility counter based on returned shares */
  1862. return hash_count;
  1863. }
  1864. static void bitmain_flush_work(struct cgpu_info *bitmain)
  1865. {
  1866. struct bitmain_info *info = bitmain->device_data;
  1867. mutex_lock(&info->qlock);
  1868. /* Will overwrite any work queued */
  1869. applog(LOG_ERR, "bitmain_flush_work queued=%d array=%d", bitmain->queued, bitmain->work_array);
  1870. if(bitmain->queued > 0) {
  1871. if (bitmain->work_array + bitmain->queued > BITMAIN_ARRAY_SIZE) {
  1872. bitmain->work_array = bitmain->work_array + bitmain->queued-BITMAIN_ARRAY_SIZE;
  1873. } else {
  1874. bitmain->work_array += bitmain->queued;
  1875. }
  1876. }
  1877. bitmain->queued = 0;
  1878. //bitmain->work_array = 0;
  1879. //for (int i = 0; i < BITMAIN_ARRAY_SIZE; ++i) {
  1880. // bitmain->works[i] = NULL;
  1881. //}
  1882. //pthread_cond_signal(&info->qcond);
  1883. mutex_unlock(&info->qlock);
  1884. }
  1885. static struct api_data *bitmain_api_stats(struct cgpu_info *cgpu)
  1886. {
  1887. struct api_data *root = NULL;
  1888. struct bitmain_info *info = cgpu->device_data;
  1889. double hwp = (cgpu->hw_errors + cgpu->diff1) ?
  1890. (double)(cgpu->hw_errors) / (double)(cgpu->hw_errors + cgpu->diff1) : 0;
  1891. root = api_add_int(root, "baud", &(info->baud), false);
  1892. root = api_add_int(root, "miner_count", &(info->chain_num), false);
  1893. root = api_add_int(root, "asic_count", &(info->asic_num), false);
  1894. root = api_add_int(root, "timeout", &(info->timeout), false);
  1895. root = api_add_string(root, "frequency", info->frequency_t, false);
  1896. root = api_add_string(root, "voltage", info->voltage_t, false);
  1897. root = api_add_int(root, "hwv1", &(info->hw_version[0]), false);
  1898. root = api_add_int(root, "hwv2", &(info->hw_version[1]), false);
  1899. root = api_add_int(root, "hwv3", &(info->hw_version[2]), false);
  1900. root = api_add_int(root, "hwv4", &(info->hw_version[3]), false);
  1901. root = api_add_int(root, "fan_num", &(info->fan_num), false);
  1902. root = api_add_int(root, "fan1", &(info->fan[0]), false);
  1903. root = api_add_int(root, "fan2", &(info->fan[1]), false);
  1904. root = api_add_int(root, "fan3", &(info->fan[2]), false);
  1905. root = api_add_int(root, "fan4", &(info->fan[3]), false);
  1906. root = api_add_int(root, "fan5", &(info->fan[4]), false);
  1907. root = api_add_int(root, "fan6", &(info->fan[5]), false);
  1908. root = api_add_int(root, "fan7", &(info->fan[6]), false);
  1909. root = api_add_int(root, "fan8", &(info->fan[7]), false);
  1910. root = api_add_int(root, "fan9", &(info->fan[8]), false);
  1911. root = api_add_int(root, "fan10", &(info->fan[9]), false);
  1912. root = api_add_int(root, "fan11", &(info->fan[10]), false);
  1913. root = api_add_int(root, "fan12", &(info->fan[11]), false);
  1914. root = api_add_int(root, "fan13", &(info->fan[12]), false);
  1915. root = api_add_int(root, "fan14", &(info->fan[13]), false);
  1916. root = api_add_int(root, "fan15", &(info->fan[14]), false);
  1917. root = api_add_int(root, "fan16", &(info->fan[15]), false);
  1918. root = api_add_int(root, "temp_num", &(info->temp_num), false);
  1919. root = api_add_int(root, "temp1", &(info->temp[0]), false);
  1920. root = api_add_int(root, "temp2", &(info->temp[1]), false);
  1921. root = api_add_int(root, "temp3", &(info->temp[2]), false);
  1922. root = api_add_int(root, "temp4", &(info->temp[3]), false);
  1923. root = api_add_int(root, "temp5", &(info->temp[4]), false);
  1924. root = api_add_int(root, "temp6", &(info->temp[5]), false);
  1925. root = api_add_int(root, "temp7", &(info->temp[6]), false);
  1926. root = api_add_int(root, "temp8", &(info->temp[7]), false);
  1927. root = api_add_int(root, "temp9", &(info->temp[8]), false);
  1928. root = api_add_int(root, "temp10", &(info->temp[9]), false);
  1929. root = api_add_int(root, "temp11", &(info->temp[10]), false);
  1930. root = api_add_int(root, "temp12", &(info->temp[11]), false);
  1931. root = api_add_int(root, "temp13", &(info->temp[12]), false);
  1932. root = api_add_int(root, "temp14", &(info->temp[13]), false);
  1933. root = api_add_int(root, "temp15", &(info->temp[14]), false);
  1934. root = api_add_int(root, "temp16", &(info->temp[15]), false);
  1935. root = api_add_int(root, "temp_avg", &(info->temp_avg), false);
  1936. root = api_add_int(root, "temp_max", &(info->temp_max), false);
  1937. root = api_add_percent(root, "Device Hardware%", &hwp, true);
  1938. root = api_add_int(root, "no_matching_work", &(info->no_matching_work), false);
  1939. /*
  1940. for (int i = 0; i < info->chain_num; ++i) {
  1941. char mcw[24];
  1942. sprintf(mcw, "match_work_count%d", i + 1);
  1943. root = api_add_int(root, mcw, &(info->matching_work[i]), false);
  1944. }*/
  1945. root = api_add_int(root, "chain_acn1", &(info->chain_asic_num[0]), false);
  1946. root = api_add_int(root, "chain_acn2", &(info->chain_asic_num[1]), false);
  1947. root = api_add_int(root, "chain_acn3", &(info->chain_asic_num[2]), false);
  1948. root = api_add_int(root, "chain_acn4", &(info->chain_asic_num[3]), false);
  1949. root = api_add_int(root, "chain_acn5", &(info->chain_asic_num[4]), false);
  1950. root = api_add_int(root, "chain_acn6", &(info->chain_asic_num[5]), false);
  1951. root = api_add_int(root, "chain_acn7", &(info->chain_asic_num[6]), false);
  1952. root = api_add_int(root, "chain_acn8", &(info->chain_asic_num[7]), false);
  1953. root = api_add_int(root, "chain_acn9", &(info->chain_asic_num[8]), false);
  1954. root = api_add_int(root, "chain_acn10", &(info->chain_asic_num[9]), false);
  1955. root = api_add_int(root, "chain_acn11", &(info->chain_asic_num[10]), false);
  1956. root = api_add_int(root, "chain_acn12", &(info->chain_asic_num[11]), false);
  1957. root = api_add_int(root, "chain_acn13", &(info->chain_asic_num[12]), false);
  1958. root = api_add_int(root, "chain_acn14", &(info->chain_asic_num[13]), false);
  1959. root = api_add_int(root, "chain_acn15", &(info->chain_asic_num[14]), false);
  1960. root = api_add_int(root, "chain_acn16", &(info->chain_asic_num[15]), false);
  1961. //applog(LOG_ERR, "chain asic status:%s", info->chain_asic_status_t[0]);
  1962. root = api_add_string(root, "chain_acs1", info->chain_asic_status_t[0], false);
  1963. root = api_add_string(root, "chain_acs2", info->chain_asic_status_t[1], false);
  1964. root = api_add_string(root, "chain_acs3", info->chain_asic_status_t[2], false);
  1965. root = api_add_string(root, "chain_acs4", info->chain_asic_status_t[3], false);
  1966. root = api_add_string(root, "chain_acs5", info->chain_asic_status_t[4], false);
  1967. root = api_add_string(root, "chain_acs6", info->chain_asic_status_t[5], false);
  1968. root = api_add_string(root, "chain_acs7", info->chain_asic_status_t[6], false);
  1969. root = api_add_string(root, "chain_acs8", info->chain_asic_status_t[7], false);
  1970. root = api_add_string(root, "chain_acs9", info->chain_asic_status_t[8], false);
  1971. root = api_add_string(root, "chain_acs10", info->chain_asic_status_t[9], false);
  1972. root = api_add_string(root, "chain_acs11", info->chain_asic_status_t[10], false);
  1973. root = api_add_string(root, "chain_acs12", info->chain_asic_status_t[11], false);
  1974. root = api_add_string(root, "chain_acs13", info->chain_asic_status_t[12], false);
  1975. root = api_add_string(root, "chain_acs14", info->chain_asic_status_t[13], false);
  1976. root = api_add_string(root, "chain_acs15", info->chain_asic_status_t[14], false);
  1977. root = api_add_string(root, "chain_acs16", info->chain_asic_status_t[15], false);
  1978. //root = api_add_int(root, "chain_acs1", &(info->chain_asic_status[0]), false);
  1979. //root = api_add_int(root, "chain_acs2", &(info->chain_asic_status[1]), false);
  1980. //root = api_add_int(root, "chain_acs3", &(info->chain_asic_status[2]), false);
  1981. //root = api_add_int(root, "chain_acs4", &(info->chain_asic_status[3]), false);
  1982. return root;
  1983. }
  1984. static void bitmain_shutdown(struct thr_info *thr)
  1985. {
  1986. do_bitmain_close(thr);
  1987. }
  1988. char *set_bitmain_dev(char *arg)
  1989. {
  1990. if(arg == NULL || strlen(arg) <= 0) {
  1991. opt_bitmain_dev[0] = '\0';
  1992. } else {
  1993. strncpy(opt_bitmain_dev, arg, 256);
  1994. }
  1995. applog(LOG_DEBUG, "BTM set device: %s", opt_bitmain_dev);
  1996. return NULL;
  1997. }
  1998. char *set_bitmain_fan(char *arg)
  1999. {
  2000. int val1, val2, ret;
  2001. ret = sscanf(arg, "%d-%d", &val1, &val2);
  2002. if (ret < 1)
  2003. return "No values passed to bitmain-fan";
  2004. if (ret == 1)
  2005. val2 = val1;
  2006. if (val1 < 0 || val1 > 100 || val2 < 0 || val2 > 100 || val2 < val1)
  2007. return "Invalid value passed to bitmain-fan";
  2008. opt_bitmain_fan_min = val1 * BITMAIN_PWM_MAX / 100;
  2009. opt_bitmain_fan_max = val2 * BITMAIN_PWM_MAX / 100;
  2010. return NULL;
  2011. }
  2012. char *set_bitmain_freq(char *arg)
  2013. {
  2014. int val1, val2, ret;
  2015. ret = sscanf(arg, "%d-%d", &val1, &val2);
  2016. if (ret < 1)
  2017. return "No values passed to bitmain-freq";
  2018. if (ret == 1)
  2019. val2 = val1;
  2020. if (val1 < BITMAIN_MIN_FREQUENCY || val1 > BITMAIN_MAX_FREQUENCY ||
  2021. val2 < BITMAIN_MIN_FREQUENCY || val2 > BITMAIN_MAX_FREQUENCY ||
  2022. val2 < val1)
  2023. return "Invalid value passed to bitmain-freq";
  2024. opt_bitmain_freq_min = val1;
  2025. opt_bitmain_freq_max = val2;
  2026. return NULL;
  2027. }
  2028. struct device_drv bitmain_drv = {
  2029. .dname = "bitmain",
  2030. .name = "BTM",
  2031. .drv_detect = bitmain_detect,
  2032. .thread_prepare = bitmain_prepare,
  2033. .minerloop = hash_queued_work,
  2034. .queue_full = bitmain_fill,
  2035. .scanwork = bitmain_scanhash,
  2036. .flush_work = bitmain_flush_work,
  2037. .get_api_stats = bitmain_api_stats,
  2038. .reinit_device = bitmain_init,
  2039. .thread_shutdown = bitmain_shutdown,
  2040. };