driver-icarus.c 31 KB

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  1. /*
  2. * Copyright 2012-2013 Luke Dashjr
  3. * Copyright 2012 Xiangfu
  4. * Copyright 2012 Andrew Smith
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the Free
  8. * Software Foundation; either version 3 of the License, or (at your option)
  9. * any later version. See COPYING for more details.
  10. */
  11. /*
  12. * Those code should be works fine with V2 and V3 bitstream of Icarus.
  13. * Operation:
  14. * No detection implement.
  15. * Input: 64B = 32B midstate + 20B fill bytes + last 12 bytes of block head.
  16. * Return: send back 32bits immediately when Icarus found a valid nonce.
  17. * no query protocol implemented here, if no data send back in ~11.3
  18. * seconds (full cover time on 32bit nonce range by 380MH/s speed)
  19. * just send another work.
  20. * Notice:
  21. * 1. Icarus will start calculate when you push a work to them, even they
  22. * are busy.
  23. * 2. The 2 FPGAs on Icarus will distribute the job, one will calculate the
  24. * 0 ~ 7FFFFFFF, another one will cover the 80000000 ~ FFFFFFFF.
  25. * 3. It's possible for 2 FPGAs both find valid nonce in the meantime, the 2
  26. * valid nonce will all be send back.
  27. * 4. Icarus will stop work when: a valid nonce has been found or 32 bits
  28. * nonce range is completely calculated.
  29. */
  30. #include "config.h"
  31. #include "miner.h"
  32. #ifdef WIN32
  33. #include <winsock2.h>
  34. #endif
  35. #include <limits.h>
  36. #include <pthread.h>
  37. #include <stdio.h>
  38. #include <sys/time.h>
  39. #include <sys/types.h>
  40. #include <dirent.h>
  41. #include <unistd.h>
  42. #ifndef WIN32
  43. #include <termios.h>
  44. #include <sys/stat.h>
  45. #include <fcntl.h>
  46. #ifndef O_CLOEXEC
  47. #define O_CLOEXEC 0
  48. #endif
  49. #else
  50. #include <windows.h>
  51. #include <io.h>
  52. #endif
  53. #ifdef HAVE_SYS_EPOLL_H
  54. #include <sys/epoll.h>
  55. #define HAVE_EPOLL
  56. #endif
  57. #include "compat.h"
  58. #include "dynclock.h"
  59. #include "icarus-common.h"
  60. #include "fpgautils.h"
  61. // The serial I/O speed - Linux uses a define 'B115200' in bits/termios.h
  62. #define ICARUS_IO_SPEED 115200
  63. // The size of a successful nonce read
  64. #define ICARUS_READ_SIZE 4
  65. // Ensure the sizes are correct for the Serial read
  66. #if (ICARUS_READ_SIZE != 4)
  67. #error ICARUS_READ_SIZE must be 4
  68. #endif
  69. #define ASSERT1(condition) __maybe_unused static char sizeof_uint32_t_must_be_4[(condition)?1:-1]
  70. ASSERT1(sizeof(uint32_t) == 4);
  71. #define ICARUS_READ_TIME(baud) ((double)ICARUS_READ_SIZE * (double)8.0 / (double)(baud))
  72. // In timing mode: Default starting value until an estimate can be obtained
  73. // 5 seconds allows for up to a ~840MH/s device
  74. #define ICARUS_READ_COUNT_TIMING (5 * TIME_FACTOR)
  75. // For a standard Icarus REV3
  76. #define ICARUS_REV3_HASH_TIME 0.00000000264083
  77. // Icarus Rev3 doesn't send a completion message when it finishes
  78. // the full nonce range, so to avoid being idle we must abort the
  79. // work (by starting a new work) shortly before it finishes
  80. //
  81. // Thus we need to estimate 2 things:
  82. // 1) How many hashes were done if the work was aborted
  83. // 2) How high can the timeout be before the Icarus is idle,
  84. // to minimise the number of work started
  85. // We set 2) to 'the calculated estimate' - 1
  86. // to ensure the estimate ends before idle
  87. //
  88. // The simple calculation used is:
  89. // Tn = Total time in seconds to calculate n hashes
  90. // Hs = seconds per hash
  91. // Xn = number of hashes
  92. // W = code overhead per work
  93. //
  94. // Rough but reasonable estimate:
  95. // Tn = Hs * Xn + W (of the form y = mx + b)
  96. //
  97. // Thus:
  98. // Line of best fit (using least squares)
  99. //
  100. // Hs = (n*Sum(XiTi)-Sum(Xi)*Sum(Ti))/(n*Sum(Xi^2)-Sum(Xi)^2)
  101. // W = Sum(Ti)/n - (Hs*Sum(Xi))/n
  102. //
  103. // N.B. W is less when aborting work since we aren't waiting for the reply
  104. // to be transferred back (ICARUS_READ_TIME)
  105. // Calculating the hashes aborted at n seconds is thus just n/Hs
  106. // (though this is still a slight overestimate due to code delays)
  107. //
  108. // Both below must be exceeded to complete a set of data
  109. // Minimum how long after the first, the last data point must be
  110. #define HISTORY_SEC 60
  111. // Minimum how many points a single ICARUS_HISTORY should have
  112. #define MIN_DATA_COUNT 5
  113. // The value above used is doubled each history until it exceeds:
  114. #define MAX_MIN_DATA_COUNT 100
  115. #if (TIME_FACTOR != 10)
  116. #error TIME_FACTOR must be 10
  117. #endif
  118. static struct timeval history_sec = { HISTORY_SEC, 0 };
  119. static const char *MODE_DEFAULT_STR = "default";
  120. static const char *MODE_SHORT_STR = "short";
  121. static const char *MODE_LONG_STR = "long";
  122. static const char *MODE_VALUE_STR = "value";
  123. static const char *MODE_UNKNOWN_STR = "unknown";
  124. #define END_CONDITION 0x0000ffff
  125. #define DEFAULT_DETECT_THRESHOLD 1
  126. // Looking for options in --icarus-timing and --icarus-options:
  127. //
  128. // Code increments this each time we start to look at a device
  129. // However, this means that if other devices are checked by
  130. // the Icarus code (e.g. BFL) they will count in the option offset
  131. //
  132. // This, however, is deterministic so that's OK
  133. //
  134. // If we were to increment after successfully finding an Icarus
  135. // that would be random since an Icarus may fail and thus we'd
  136. // not be able to predict the option order
  137. //
  138. // This also assumes that serial_detect() checks them sequentially
  139. // and in the order specified on the command line
  140. //
  141. static int option_offset = -1;
  142. struct device_drv icarus_drv;
  143. extern void convert_icarus_to_cairnsmore(struct cgpu_info *);
  144. static void rev(unsigned char *s, size_t l)
  145. {
  146. size_t i, j;
  147. unsigned char t;
  148. for (i = 0, j = l - 1; i < j; i++, j--) {
  149. t = s[i];
  150. s[i] = s[j];
  151. s[j] = t;
  152. }
  153. }
  154. #define icarus_open2(devpath, baud, purge) serial_open(devpath, baud, ICARUS_READ_FAULT_DECISECONDS, purge)
  155. #define icarus_open(devpath, baud) icarus_open2(devpath, baud, false)
  156. #define ICA_GETS_ERROR -1
  157. #define ICA_GETS_OK 0
  158. #define ICA_GETS_RESTART 1
  159. #define ICA_GETS_TIMEOUT 2
  160. int icarus_gets(unsigned char *buf, int fd, struct timeval *tv_finish, struct thr_info *thr, int read_count)
  161. {
  162. ssize_t ret = 0;
  163. int rc = 0;
  164. int epollfd = -1;
  165. int epoll_timeout = ICARUS_READ_FAULT_DECISECONDS * 100;
  166. int read_amount = ICARUS_READ_SIZE;
  167. bool first = true;
  168. #ifdef HAVE_EPOLL
  169. struct epoll_event ev = {
  170. .events = EPOLLIN,
  171. .data.fd = fd,
  172. };
  173. struct epoll_event evr[2];
  174. if (thr && thr->work_restart_notifier[1] != -1) {
  175. epollfd = epoll_create(2);
  176. if (epollfd != -1) {
  177. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, fd, &ev)) {
  178. close(epollfd);
  179. epollfd = -1;
  180. }
  181. {
  182. ev.data.fd = thr->work_restart_notifier[0];
  183. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, thr->work_restart_notifier[0], &ev))
  184. applog(LOG_ERR, "Icarus: Error adding work restart fd to epoll");
  185. else
  186. {
  187. epoll_timeout *= read_count;
  188. read_count = 1;
  189. }
  190. }
  191. }
  192. else
  193. applog(LOG_ERR, "Icarus: Error creating epoll");
  194. }
  195. #endif
  196. // Read reply 1 byte at a time to get earliest tv_finish
  197. while (true) {
  198. #ifdef HAVE_EPOLL
  199. if (epollfd != -1 && (ret = epoll_wait(epollfd, evr, 2, epoll_timeout)) != -1)
  200. {
  201. if (ret == 1 && evr[0].data.fd == fd)
  202. ret = read(fd, buf, 1);
  203. else
  204. {
  205. if (ret)
  206. notifier_read(thr->work_restart_notifier);
  207. ret = 0;
  208. }
  209. }
  210. else
  211. #endif
  212. ret = read(fd, buf, 1);
  213. if (ret < 0)
  214. return ICA_GETS_ERROR;
  215. if (first)
  216. cgtime(tv_finish);
  217. if (ret >= read_amount)
  218. {
  219. if (epollfd != -1)
  220. close(epollfd);
  221. return ICA_GETS_OK;
  222. }
  223. if (ret > 0) {
  224. buf += ret;
  225. read_amount -= ret;
  226. first = false;
  227. continue;
  228. }
  229. if (thr && thr->work_restart) {
  230. if (epollfd != -1)
  231. close(epollfd);
  232. if (opt_debug) {
  233. applog(LOG_DEBUG,
  234. "Icarus Read: Interrupted by work restart");
  235. }
  236. return ICA_GETS_RESTART;
  237. }
  238. rc++;
  239. if (rc >= read_count) {
  240. if (epollfd != -1)
  241. close(epollfd);
  242. if (opt_debug) {
  243. applog(LOG_DEBUG,
  244. "Icarus Read: No data in %.2f seconds",
  245. (float)rc * epoll_timeout / 1000.);
  246. }
  247. return ICA_GETS_TIMEOUT;
  248. }
  249. }
  250. }
  251. static int icarus_write(int fd, const void *buf, size_t bufLen)
  252. {
  253. size_t ret;
  254. ret = write(fd, buf, bufLen);
  255. if (unlikely(ret != bufLen))
  256. return 1;
  257. return 0;
  258. }
  259. #define icarus_close(fd) close(fd)
  260. static void do_icarus_close(struct thr_info *thr)
  261. {
  262. struct cgpu_info *icarus = thr->cgpu;
  263. icarus_close(icarus->device_fd);
  264. icarus->device_fd = -1;
  265. }
  266. static const char *timing_mode_str(enum timing_mode timing_mode)
  267. {
  268. switch(timing_mode) {
  269. case MODE_DEFAULT:
  270. return MODE_DEFAULT_STR;
  271. case MODE_SHORT:
  272. return MODE_SHORT_STR;
  273. case MODE_LONG:
  274. return MODE_LONG_STR;
  275. case MODE_VALUE:
  276. return MODE_VALUE_STR;
  277. default:
  278. return MODE_UNKNOWN_STR;
  279. }
  280. }
  281. static void set_timing_mode(int this_option_offset, struct cgpu_info *icarus)
  282. {
  283. struct ICARUS_INFO *info = icarus->cgpu_data;
  284. double Hs;
  285. char buf[BUFSIZ+1];
  286. char *ptr, *comma, *eq;
  287. size_t max;
  288. int i;
  289. if (opt_icarus_timing == NULL)
  290. buf[0] = '\0';
  291. else {
  292. ptr = opt_icarus_timing;
  293. for (i = 0; i < this_option_offset; i++) {
  294. comma = strchr(ptr, ',');
  295. if (comma == NULL)
  296. break;
  297. ptr = comma + 1;
  298. }
  299. comma = strchr(ptr, ',');
  300. if (comma == NULL)
  301. max = strlen(ptr);
  302. else
  303. max = comma - ptr;
  304. if (max > BUFSIZ)
  305. max = BUFSIZ;
  306. strncpy(buf, ptr, max);
  307. buf[max] = '\0';
  308. }
  309. info->read_count = 0;
  310. if (strcasecmp(buf, MODE_SHORT_STR) == 0) {
  311. info->read_count = ICARUS_READ_COUNT_TIMING;
  312. info->timing_mode = MODE_SHORT;
  313. info->do_icarus_timing = true;
  314. } else if (strcasecmp(buf, MODE_LONG_STR) == 0) {
  315. info->read_count = ICARUS_READ_COUNT_TIMING;
  316. info->timing_mode = MODE_LONG;
  317. info->do_icarus_timing = true;
  318. } else if ((Hs = atof(buf)) != 0) {
  319. info->Hs = Hs / NANOSEC;
  320. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  321. if ((eq = strchr(buf, '=')) != NULL)
  322. info->read_count = atoi(eq+1);
  323. if (info->read_count < 1)
  324. info->read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  325. if (unlikely(info->read_count < 1))
  326. info->read_count = 1;
  327. info->timing_mode = MODE_VALUE;
  328. info->do_icarus_timing = false;
  329. } else {
  330. // Anything else in buf just uses DEFAULT mode
  331. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  332. if ((eq = strchr(buf, '=')) != NULL)
  333. info->read_count = atoi(eq+1);
  334. int def_read_count = ICARUS_READ_COUNT_TIMING;
  335. if (info->timing_mode == MODE_DEFAULT) {
  336. if (icarus->drv == &icarus_drv) {
  337. info->do_default_detection = 0x10;
  338. } else {
  339. def_read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  340. }
  341. info->do_icarus_timing = false;
  342. }
  343. if (info->read_count < 1)
  344. info->read_count = def_read_count;
  345. }
  346. info->min_data_count = MIN_DATA_COUNT;
  347. applog(LOG_DEBUG, "%"PRIpreprv": Init: mode=%s read_count=%d Hs=%e",
  348. icarus->proc_repr,
  349. timing_mode_str(info->timing_mode), info->read_count, info->Hs);
  350. }
  351. static uint32_t mask(int work_division)
  352. {
  353. uint32_t nonce_mask = 0x7fffffff;
  354. // yes we can calculate these, but this way it's easy to see what they are
  355. switch (work_division) {
  356. case 1:
  357. nonce_mask = 0xffffffff;
  358. break;
  359. case 2:
  360. nonce_mask = 0x7fffffff;
  361. break;
  362. case 4:
  363. nonce_mask = 0x3fffffff;
  364. break;
  365. case 8:
  366. nonce_mask = 0x1fffffff;
  367. break;
  368. default:
  369. quit(1, "Invalid2 icarus-options for work_division (%d) must be 1, 2, 4 or 8", work_division);
  370. }
  371. return nonce_mask;
  372. }
  373. static void get_options(int this_option_offset, struct ICARUS_INFO *info)
  374. {
  375. int *baud = &info->baud;
  376. int *work_division = &info->work_division;
  377. int *fpga_count = &info->fpga_count;
  378. char buf[BUFSIZ+1];
  379. char *ptr, *comma, *colon, *colon2;
  380. size_t max;
  381. int i, tmp;
  382. if (opt_icarus_options == NULL)
  383. buf[0] = '\0';
  384. else {
  385. ptr = opt_icarus_options;
  386. for (i = 0; i < this_option_offset; i++) {
  387. comma = strchr(ptr, ',');
  388. if (comma == NULL)
  389. break;
  390. ptr = comma + 1;
  391. }
  392. comma = strchr(ptr, ',');
  393. if (comma == NULL)
  394. max = strlen(ptr);
  395. else
  396. max = comma - ptr;
  397. if (max > BUFSIZ)
  398. max = BUFSIZ;
  399. strncpy(buf, ptr, max);
  400. buf[max] = '\0';
  401. }
  402. if (*buf) {
  403. colon = strchr(buf, ':');
  404. if (colon)
  405. *(colon++) = '\0';
  406. if (*buf) {
  407. tmp = atoi(buf);
  408. switch (tmp) {
  409. case 115200:
  410. *baud = 115200;
  411. break;
  412. case 57600:
  413. *baud = 57600;
  414. break;
  415. default:
  416. quit(1, "Invalid icarus-options for baud (%s) must be 115200 or 57600", buf);
  417. }
  418. }
  419. if (colon && *colon) {
  420. colon2 = strchr(colon, ':');
  421. if (colon2)
  422. *(colon2++) = '\0';
  423. if (*colon) {
  424. info->user_set |= 1;
  425. tmp = atoi(colon);
  426. if (tmp == 1 || tmp == 2 || tmp == 4 || tmp == 8) {
  427. *work_division = tmp;
  428. *fpga_count = tmp; // default to the same
  429. } else {
  430. quit(1, "Invalid icarus-options for work_division (%s) must be 1, 2, 4 or 8", colon);
  431. }
  432. }
  433. if (colon2 && *colon2) {
  434. colon = strchr(colon2, ':');
  435. if (colon)
  436. *(colon++) = '\0';
  437. if (*colon2) {
  438. info->user_set |= 2;
  439. tmp = atoi(colon2);
  440. if (tmp > 0 && tmp <= *work_division)
  441. *fpga_count = tmp;
  442. else {
  443. quit(1, "Invalid icarus-options for fpga_count (%s) must be >0 and <=work_division (%d)", colon2, *work_division);
  444. }
  445. }
  446. if (colon && *colon) {
  447. colon2 = strchr(colon, '-') ?: "";
  448. if (*colon2)
  449. *(colon2++) = '\0';
  450. if (strchr(colon, 'r'))
  451. info->quirk_reopen = 2;
  452. if (strchr(colon2, 'r'))
  453. info->quirk_reopen = 0;
  454. }
  455. }
  456. }
  457. }
  458. }
  459. bool icarus_detect_custom(const char *devpath, struct device_drv *api, struct ICARUS_INFO *info)
  460. {
  461. int this_option_offset = ++option_offset;
  462. struct timeval tv_start, tv_finish;
  463. int fd;
  464. // Block 171874 nonce = (0xa2870100) = 0x000187a2
  465. // N.B. golden_ob MUST take less time to calculate
  466. // than the timeout set in icarus_open()
  467. // This one takes ~0.53ms on Rev3 Icarus
  468. const char golden_ob[] =
  469. "4679ba4ec99876bf4bfe086082b40025"
  470. "4df6c356451471139a3afa71e48f544a"
  471. "00000000000000000000000000000000"
  472. "0000000087320b1a1426674f2fa722ce";
  473. /* NOTE: This gets sent to basically every port specified in --scan-serial,
  474. * even ones that aren't Icarus; be sure they can all handle it, when
  475. * this is changed...
  476. * BitForce: Ignores entirely
  477. * ModMiner: Starts (useless) work, gets back to clean state
  478. */
  479. const char golden_nonce[] = "000187a2";
  480. unsigned char ob_bin[64], nonce_bin[ICARUS_READ_SIZE];
  481. char *nonce_hex;
  482. get_options(this_option_offset, info);
  483. int baud = info->baud;
  484. int work_division = info->work_division;
  485. int fpga_count = info->fpga_count;
  486. applog(LOG_DEBUG, "Icarus Detect: Attempting to open %s", devpath);
  487. fd = icarus_open2(devpath, baud, true);
  488. if (unlikely(fd == -1)) {
  489. applog(LOG_DEBUG, "Icarus Detect: Failed to open %s", devpath);
  490. return false;
  491. }
  492. hex2bin(ob_bin, golden_ob, sizeof(ob_bin));
  493. icarus_write(fd, ob_bin, sizeof(ob_bin));
  494. cgtime(&tv_start);
  495. memset(nonce_bin, 0, sizeof(nonce_bin));
  496. icarus_gets(nonce_bin, fd, &tv_finish, NULL, 1);
  497. icarus_close(fd);
  498. nonce_hex = bin2hex(nonce_bin, sizeof(nonce_bin));
  499. if (strncmp(nonce_hex, golden_nonce, 8)) {
  500. applog(LOG_DEBUG,
  501. "Icarus Detect: "
  502. "Test failed at %s: get %s, should: %s",
  503. devpath, nonce_hex, golden_nonce);
  504. free(nonce_hex);
  505. return false;
  506. }
  507. applog(LOG_DEBUG,
  508. "Icarus Detect: "
  509. "Test succeeded at %s: got %s",
  510. devpath, nonce_hex);
  511. free(nonce_hex);
  512. if (serial_claim(devpath, api)) {
  513. const char *claimedby = serial_claim(devpath, api)->dname;
  514. applog(LOG_DEBUG, "Icarus device %s already claimed by other driver: %s", devpath, claimedby);
  515. return false;
  516. }
  517. /* We have a real Icarus! */
  518. struct cgpu_info *icarus;
  519. icarus = calloc(1, sizeof(struct cgpu_info));
  520. icarus->drv = api;
  521. icarus->device_path = strdup(devpath);
  522. icarus->device_fd = -1;
  523. icarus->threads = 1;
  524. add_cgpu(icarus);
  525. applog(LOG_INFO, "Found %"PRIpreprv" at %s",
  526. icarus->proc_repr,
  527. devpath);
  528. applog(LOG_DEBUG, "%"PRIpreprv": Init: baud=%d work_division=%d fpga_count=%d",
  529. icarus->proc_repr,
  530. baud, work_division, fpga_count);
  531. icarus->cgpu_data = info;
  532. timersub(&tv_finish, &tv_start, &(info->golden_tv));
  533. set_timing_mode(this_option_offset, icarus);
  534. return true;
  535. }
  536. static bool icarus_detect_one(const char *devpath)
  537. {
  538. struct ICARUS_INFO *info = calloc(1, sizeof(struct ICARUS_INFO));
  539. if (unlikely(!info))
  540. quit(1, "Failed to malloc ICARUS_INFO");
  541. info->baud = ICARUS_IO_SPEED;
  542. info->quirk_reopen = 1;
  543. info->Hs = ICARUS_REV3_HASH_TIME;
  544. info->timing_mode = MODE_DEFAULT;
  545. if (!icarus_detect_custom(devpath, &icarus_drv, info)) {
  546. free(info);
  547. return false;
  548. }
  549. return true;
  550. }
  551. static void icarus_detect()
  552. {
  553. serial_detect(&icarus_drv, icarus_detect_one);
  554. }
  555. static bool icarus_prepare(struct thr_info *thr)
  556. {
  557. struct cgpu_info *icarus = thr->cgpu;
  558. struct ICARUS_INFO *info = icarus->cgpu_data;
  559. struct timeval now;
  560. icarus->device_fd = -1;
  561. int fd = icarus_open2(icarus->device_path, info->baud, true);
  562. if (unlikely(-1 == fd)) {
  563. applog(LOG_ERR, "Failed to open Icarus on %s",
  564. icarus->device_path);
  565. return false;
  566. }
  567. icarus->device_fd = fd;
  568. applog(LOG_INFO, "Opened Icarus on %s", icarus->device_path);
  569. cgtime(&now);
  570. get_datestamp(icarus->init, &now);
  571. struct icarus_state *state;
  572. thr->cgpu_data = state = calloc(1, sizeof(*state));
  573. state->firstrun = true;
  574. #ifdef HAVE_EPOLL
  575. int epollfd = epoll_create(2);
  576. if (epollfd != -1)
  577. {
  578. close(epollfd);
  579. notifier_init(thr->work_restart_notifier);
  580. }
  581. #endif
  582. return true;
  583. }
  584. static bool icarus_init(struct thr_info *thr)
  585. {
  586. struct cgpu_info *icarus = thr->cgpu;
  587. struct ICARUS_INFO *info = icarus->cgpu_data;
  588. int fd = icarus->device_fd;
  589. if (!info->work_division)
  590. {
  591. struct timeval tv_finish;
  592. uint32_t res;
  593. applog(LOG_DEBUG, "%"PRIpreprv": Work division not specified - autodetecting", icarus->proc_repr);
  594. // Special packet to probe work_division
  595. unsigned char pkt[64] =
  596. "\x6C\x0E\x85\x6F\xD5\xB7\x0D\x39\xB3\xEB\xCF\x26\x21\x22\xD5\x1F"
  597. "\x7E\x89\x6B\x26\x92\x2A\xD8\xFC\x66\xDF\x8C\x66\xB8\x2C\x37\x7C"
  598. "BFGMiner Probe\0\0"
  599. "BFG\0\xE9\x7F\x01\x1A\x3B\xE1\x91\x51\xD3\x58\xC5\xFF";
  600. icarus_write(fd, pkt, sizeof(pkt));
  601. if (ICA_GETS_OK == icarus_gets((unsigned char*)&res, fd, &tv_finish, NULL, info->read_count))
  602. res = be32toh(res);
  603. else
  604. res = 0;
  605. switch (res) {
  606. case 0x06448360:
  607. info->work_division = 1;
  608. break;
  609. case 0x85C55B5B:
  610. info->work_division = 2;
  611. break;
  612. case 0xC0DC6008:
  613. info->work_division = 4;
  614. break;
  615. default:
  616. applog(LOG_ERR, "%"PRIpreprv": Work division autodetection failed (assuming 2): got %08x", icarus->proc_repr, res);
  617. info->work_division = 2;
  618. }
  619. applog(LOG_DEBUG, "%"PRIpreprv": Work division autodetection got %08x (=%d)", icarus->proc_repr, res, info->work_division);
  620. }
  621. if (!info->fpga_count)
  622. info->fpga_count = info->work_division;
  623. info->nonce_mask = mask(info->work_division);
  624. return true;
  625. }
  626. static bool icarus_reopen(struct cgpu_info *icarus, struct icarus_state *state, int *fdp)
  627. {
  628. struct ICARUS_INFO *info = icarus->cgpu_data;
  629. // Reopen the serial port to workaround a USB-host-chipset-specific issue with the Icarus's buggy USB-UART
  630. icarus_close(icarus->device_fd);
  631. *fdp = icarus->device_fd = icarus_open(icarus->device_path, info->baud);
  632. if (unlikely(-1 == *fdp)) {
  633. applog(LOG_ERR, "%"PRIpreprv": Failed to reopen on %s", icarus->proc_repr, icarus->device_path);
  634. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  635. state->firstrun = true;
  636. return false;
  637. }
  638. return true;
  639. }
  640. static bool icarus_start_work(struct thr_info *thr, const unsigned char *ob_bin)
  641. {
  642. struct cgpu_info *icarus = thr->cgpu;
  643. struct icarus_state *state = thr->cgpu_data;
  644. int fd = icarus->device_fd;
  645. int ret;
  646. char *ob_hex;
  647. cgtime(&state->tv_workstart);
  648. ret = icarus_write(fd, ob_bin, 64);
  649. if (ret) {
  650. do_icarus_close(thr);
  651. applog(LOG_ERR, "ICA%i: Comms error", icarus->device_id);
  652. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  653. return false; /* This should never happen */
  654. }
  655. if (opt_debug) {
  656. ob_hex = bin2hex(ob_bin, 64);
  657. applog(LOG_DEBUG, "%"PRIpreprv" sent: %s",
  658. icarus->proc_repr,
  659. ob_hex);
  660. free(ob_hex);
  661. }
  662. return true;
  663. }
  664. static int64_t icarus_scanhash(struct thr_info *thr, struct work *work,
  665. __maybe_unused int64_t max_nonce)
  666. {
  667. struct cgpu_info *icarus;
  668. int fd;
  669. int ret;
  670. struct ICARUS_INFO *info;
  671. unsigned char ob_bin[64] = {0}, nonce_bin[ICARUS_READ_SIZE] = {0};
  672. uint32_t nonce;
  673. int64_t hash_count;
  674. struct timeval tv_start, elapsed;
  675. struct timeval tv_history_start, tv_history_finish;
  676. double Ti, Xi;
  677. int curr_hw_errors, i;
  678. bool was_hw_error;
  679. struct ICARUS_HISTORY *history0, *history;
  680. int count;
  681. double Hs, W, fullnonce;
  682. int read_count;
  683. int64_t estimate_hashes;
  684. uint32_t values;
  685. int64_t hash_count_range;
  686. elapsed.tv_sec = elapsed.tv_usec = 0;
  687. icarus = thr->cgpu;
  688. struct icarus_state *state = thr->cgpu_data;
  689. // Prepare the next work immediately
  690. memcpy(ob_bin, work->midstate, 32);
  691. memcpy(ob_bin + 52, work->data + 64, 12);
  692. if (!(memcmp(&ob_bin[56], "\xff\xff\xff\xff", 4)
  693. || memcmp(&ob_bin, "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0", 32))) {
  694. // This sequence is used on cairnsmore bitstreams for commands, NEVER send it otherwise
  695. applog(LOG_WARNING, "%"PRIpreprv": Received job attempting to send a command, corrupting it!",
  696. icarus->proc_repr);
  697. ob_bin[56] = 0;
  698. }
  699. rev(ob_bin, 32);
  700. rev(ob_bin + 52, 12);
  701. // Wait for the previous run's result
  702. fd = icarus->device_fd;
  703. info = icarus->cgpu_data;
  704. if (!state->firstrun) {
  705. if (state->changework)
  706. {
  707. state->changework = false;
  708. ret = ICA_GETS_RESTART;
  709. }
  710. else
  711. {
  712. /* Icarus will return 4 bytes (ICARUS_READ_SIZE) nonces or nothing */
  713. ret = icarus_gets(nonce_bin, fd, &state->tv_workfinish, thr, info->read_count);
  714. switch (ret) {
  715. case ICA_GETS_RESTART:
  716. // The prepared work is invalid, and the current work is abandoned
  717. // Go back to the main loop to get the next work, and stuff
  718. // Returning to the main loop will clear work_restart, so use a flag...
  719. state->changework = true;
  720. return 0;
  721. case ICA_GETS_ERROR:
  722. do_icarus_close(thr);
  723. applog(LOG_ERR, "ICA%i: Comms error", icarus->device_id);
  724. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  725. if (!icarus_reopen(icarus, state, &fd))
  726. return -1;
  727. break;
  728. case ICA_GETS_TIMEOUT:
  729. if (info->quirk_reopen == 1 && !icarus_reopen(icarus, state, &fd))
  730. return -1;
  731. case ICA_GETS_OK:
  732. break;
  733. }
  734. }
  735. tv_start = state->tv_workstart;
  736. timersub(&state->tv_workfinish, &tv_start, &elapsed);
  737. }
  738. else
  739. if (fd == -1 && !icarus_reopen(icarus, state, &fd))
  740. return -1;
  741. #ifndef WIN32
  742. tcflush(fd, TCOFLUSH);
  743. #endif
  744. memcpy(&nonce, nonce_bin, sizeof(nonce_bin));
  745. nonce = be32toh(nonce);
  746. // Handle dynamic clocking for "subclass" devices
  747. // This needs to run before sending next job, since it hashes the command too
  748. if (info->dclk.freqM && likely(!state->firstrun)) {
  749. int qsec = ((4 * elapsed.tv_sec) + (elapsed.tv_usec / 250000)) ?: 1;
  750. for (int n = qsec; n; --n)
  751. dclk_gotNonces(&info->dclk);
  752. if (nonce && !test_nonce(&state->last_work, nonce, false))
  753. dclk_errorCount(&info->dclk, qsec);
  754. dclk_preUpdate(&info->dclk);
  755. dclk_updateFreq(&info->dclk, info->dclk_change_clock_func, thr);
  756. }
  757. if (!icarus_start_work(thr, ob_bin))
  758. /* This should never happen */
  759. state->firstrun = true;
  760. if (info->quirk_reopen == 2 && !icarus_reopen(icarus, state, &fd))
  761. state->firstrun = true;
  762. work->blk.nonce = 0xffffffff;
  763. if (state->firstrun) {
  764. state->firstrun = false;
  765. __copy_work(&state->last_work, work);
  766. return 0;
  767. }
  768. // OK, done starting Icarus's next job... now process the last run's result!
  769. // aborted before becoming idle, get new work
  770. if (ret == ICA_GETS_TIMEOUT || ret == ICA_GETS_RESTART) {
  771. __copy_work(&state->last_work, work);
  772. // ONLY up to just when it aborted
  773. // We didn't read a reply so we don't subtract ICARUS_READ_TIME
  774. estimate_hashes = ((double)(elapsed.tv_sec)
  775. + ((double)(elapsed.tv_usec))/((double)1000000)) / info->Hs;
  776. // If some Serial-USB delay allowed the full nonce range to
  777. // complete it can't have done more than a full nonce
  778. if (unlikely(estimate_hashes > 0xffffffff))
  779. estimate_hashes = 0xffffffff;
  780. if (opt_debug) {
  781. applog(LOG_DEBUG, "%"PRIpreprv" no nonce = 0x%08"PRIx64" hashes (%"PRId64".%06lus)",
  782. icarus->proc_repr,
  783. (uint64_t)estimate_hashes,
  784. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  785. }
  786. return estimate_hashes;
  787. }
  788. curr_hw_errors = icarus->hw_errors;
  789. submit_nonce(thr, &state->last_work, nonce);
  790. was_hw_error = (curr_hw_errors > icarus->hw_errors);
  791. __copy_work(&state->last_work, work);
  792. // Force a USB close/reopen on any hw error
  793. if (was_hw_error)
  794. if (info->quirk_reopen != 2) {
  795. if (!icarus_reopen(icarus, state, &fd))
  796. state->firstrun = true;
  797. // Some devices (Cairnsmore1, for example) abort hashing when reopened, so send the job again
  798. if (!icarus_start_work(thr, ob_bin))
  799. state->firstrun = true;
  800. }
  801. hash_count = (nonce & info->nonce_mask);
  802. hash_count++;
  803. hash_count *= info->fpga_count;
  804. if (opt_debug) {
  805. applog(LOG_DEBUG, "%"PRIpreprv" nonce = 0x%08x = 0x%08" PRIx64 " hashes (%"PRId64".%06lus)",
  806. icarus->proc_repr,
  807. nonce,
  808. (uint64_t)hash_count,
  809. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  810. }
  811. if (info->do_default_detection && elapsed.tv_sec >= DEFAULT_DETECT_THRESHOLD) {
  812. int MHs = (double)hash_count / ((double)elapsed.tv_sec * 1e6 + (double)elapsed.tv_usec);
  813. --info->do_default_detection;
  814. applog(LOG_DEBUG, "%"PRIpreprv": Autodetect device speed: %d MH/s", icarus->proc_repr, MHs);
  815. if (MHs <= 370 || MHs > 420) {
  816. // Not a real Icarus: enable short timing
  817. applog(LOG_WARNING, "%"PRIpreprv": Seems too %s to be an Icarus; calibrating with short timing", icarus->proc_repr, MHs>380?"fast":"slow");
  818. info->timing_mode = MODE_SHORT;
  819. info->do_icarus_timing = true;
  820. info->do_default_detection = 0;
  821. }
  822. else
  823. if (MHs <= 380) {
  824. // Real Icarus?
  825. if (!info->do_default_detection) {
  826. applog(LOG_DEBUG, "%"PRIpreprv": Seems to be a real Icarus", icarus->proc_repr);
  827. info->read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  828. }
  829. }
  830. else
  831. if (MHs <= 420) {
  832. // Enterpoint Cairnsmore1
  833. size_t old_repr_len = strlen(icarus->proc_repr);
  834. char old_repr[old_repr_len + 1];
  835. strcpy(old_repr, icarus->proc_repr);
  836. convert_icarus_to_cairnsmore(icarus);
  837. info->do_default_detection = 0;
  838. applog(LOG_WARNING, "%"PRIpreprv": Detected Cairnsmore1 device, upgrading driver to %"PRIpreprv, old_repr, icarus->proc_repr);
  839. }
  840. }
  841. // ignore possible end condition values ... and hw errors
  842. if (info->do_icarus_timing
  843. && !was_hw_error
  844. && ((nonce & info->nonce_mask) > END_CONDITION)
  845. && ((nonce & info->nonce_mask) < (info->nonce_mask & ~END_CONDITION))) {
  846. cgtime(&tv_history_start);
  847. history0 = &(info->history[0]);
  848. if (history0->values == 0)
  849. timeradd(&tv_start, &history_sec, &(history0->finish));
  850. Ti = (double)(elapsed.tv_sec)
  851. + ((double)(elapsed.tv_usec))/((double)1000000)
  852. - ((double)ICARUS_READ_TIME(info->baud));
  853. Xi = (double)hash_count;
  854. history0->sumXiTi += Xi * Ti;
  855. history0->sumXi += Xi;
  856. history0->sumTi += Ti;
  857. history0->sumXi2 += Xi * Xi;
  858. history0->values++;
  859. if (history0->hash_count_max < hash_count)
  860. history0->hash_count_max = hash_count;
  861. if (history0->hash_count_min > hash_count || history0->hash_count_min == 0)
  862. history0->hash_count_min = hash_count;
  863. if (history0->values >= info->min_data_count
  864. && timercmp(&tv_start, &(history0->finish), >)) {
  865. for (i = INFO_HISTORY; i > 0; i--)
  866. memcpy(&(info->history[i]),
  867. &(info->history[i-1]),
  868. sizeof(struct ICARUS_HISTORY));
  869. // Initialise history0 to zero for summary calculation
  870. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  871. // We just completed a history data set
  872. // So now recalc read_count based on the whole history thus we will
  873. // initially get more accurate until it completes INFO_HISTORY
  874. // total data sets
  875. count = 0;
  876. for (i = 1 ; i <= INFO_HISTORY; i++) {
  877. history = &(info->history[i]);
  878. if (history->values >= MIN_DATA_COUNT) {
  879. count++;
  880. history0->sumXiTi += history->sumXiTi;
  881. history0->sumXi += history->sumXi;
  882. history0->sumTi += history->sumTi;
  883. history0->sumXi2 += history->sumXi2;
  884. history0->values += history->values;
  885. if (history0->hash_count_max < history->hash_count_max)
  886. history0->hash_count_max = history->hash_count_max;
  887. if (history0->hash_count_min > history->hash_count_min || history0->hash_count_min == 0)
  888. history0->hash_count_min = history->hash_count_min;
  889. }
  890. }
  891. // All history data
  892. Hs = (history0->values*history0->sumXiTi - history0->sumXi*history0->sumTi)
  893. / (history0->values*history0->sumXi2 - history0->sumXi*history0->sumXi);
  894. W = history0->sumTi/history0->values - Hs*history0->sumXi/history0->values;
  895. hash_count_range = history0->hash_count_max - history0->hash_count_min;
  896. values = history0->values;
  897. // Initialise history0 to zero for next data set
  898. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  899. fullnonce = W + Hs * (((double)0xffffffff) + 1);
  900. read_count = (int)(fullnonce * TIME_FACTOR) - 1;
  901. info->Hs = Hs;
  902. info->read_count = read_count;
  903. info->fullnonce = fullnonce;
  904. info->count = count;
  905. info->W = W;
  906. info->values = values;
  907. info->hash_count_range = hash_count_range;
  908. if (info->min_data_count < MAX_MIN_DATA_COUNT)
  909. info->min_data_count *= 2;
  910. else if (info->timing_mode == MODE_SHORT)
  911. info->do_icarus_timing = false;
  912. // applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: read_count=%d fullnonce=%fs history count=%d Hs=%e W=%e values=%d hash range=0x%08lx min data count=%u", icarus->proc_repr, read_count, fullnonce, count, Hs, W, values, hash_count_range, info->min_data_count);
  913. applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: Hs=%e W=%e read_count=%d fullnonce=%.3fs",
  914. icarus->proc_repr,
  915. Hs, W, read_count, fullnonce);
  916. }
  917. info->history_count++;
  918. cgtime(&tv_history_finish);
  919. timersub(&tv_history_finish, &tv_history_start, &tv_history_finish);
  920. timeradd(&tv_history_finish, &(info->history_time), &(info->history_time));
  921. }
  922. return hash_count;
  923. }
  924. static struct api_data *icarus_drv_stats(struct cgpu_info *cgpu)
  925. {
  926. struct api_data *root = NULL;
  927. struct ICARUS_INFO *info = cgpu->cgpu_data;
  928. // Warning, access to these is not locked - but we don't really
  929. // care since hashing performance is way more important than
  930. // locking access to displaying API debug 'stats'
  931. // If locking becomes an issue for any of them, use copy_data=true also
  932. root = api_add_int(root, "read_count", &(info->read_count), false);
  933. root = api_add_double(root, "fullnonce", &(info->fullnonce), false);
  934. root = api_add_int(root, "count", &(info->count), false);
  935. root = api_add_hs(root, "Hs", &(info->Hs), false);
  936. root = api_add_double(root, "W", &(info->W), false);
  937. root = api_add_uint(root, "total_values", &(info->values), false);
  938. root = api_add_uint64(root, "range", &(info->hash_count_range), false);
  939. root = api_add_uint64(root, "history_count", &(info->history_count), false);
  940. root = api_add_timeval(root, "history_time", &(info->history_time), false);
  941. root = api_add_uint(root, "min_data_count", &(info->min_data_count), false);
  942. root = api_add_uint(root, "timing_values", &(info->history[0].values), false);
  943. root = api_add_const(root, "timing_mode", timing_mode_str(info->timing_mode), false);
  944. root = api_add_bool(root, "is_timing", &(info->do_icarus_timing), false);
  945. root = api_add_int(root, "baud", &(info->baud), false);
  946. root = api_add_int(root, "work_division", &(info->work_division), false);
  947. root = api_add_int(root, "fpga_count", &(info->fpga_count), false);
  948. return root;
  949. }
  950. static void icarus_shutdown(struct thr_info *thr)
  951. {
  952. do_icarus_close(thr);
  953. free(thr->cgpu_data);
  954. }
  955. struct device_drv icarus_drv = {
  956. .dname = "icarus",
  957. .name = "ICA",
  958. .drv_detect = icarus_detect,
  959. .get_api_stats = icarus_drv_stats,
  960. .thread_prepare = icarus_prepare,
  961. .thread_init = icarus_init,
  962. .scanhash = icarus_scanhash,
  963. .thread_shutdown = icarus_shutdown,
  964. };