driver-icarus.c 43 KB

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  1. /*
  2. * Copyright 2012-2015 Luke Dashjr
  3. * Copyright 2012 Xiangfu
  4. * Copyright 2014 Nate Woolls
  5. * Copyright 2012 Andrew Smith
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the Free
  9. * Software Foundation; either version 3 of the License, or (at your option)
  10. * any later version. See COPYING for more details.
  11. */
  12. /*
  13. * Those code should be works fine with V2 and V3 bitstream of Icarus.
  14. * Operation:
  15. * No detection implement.
  16. * Input: 64B = 32B midstate + 20B fill bytes + last 12 bytes of block head.
  17. * Return: send back 32bits immediately when Icarus found a valid nonce.
  18. * no query protocol implemented here, if no data send back in ~11.3
  19. * seconds (full cover time on 32bit nonce range by 380MH/s speed)
  20. * just send another work.
  21. * Notice:
  22. * 1. Icarus will start calculate when you push a work to them, even they
  23. * are busy.
  24. * 2. The 2 FPGAs on Icarus will distribute the job, one will calculate the
  25. * 0 ~ 7FFFFFFF, another one will cover the 80000000 ~ FFFFFFFF.
  26. * 3. It's possible for 2 FPGAs both find valid nonce in the meantime, the 2
  27. * valid nonce will all be send back.
  28. * 4. Icarus will stop work when: a valid nonce has been found or 32 bits
  29. * nonce range is completely calculated.
  30. */
  31. #include "config.h"
  32. #include "miner.h"
  33. #include <limits.h>
  34. #include <pthread.h>
  35. #include <stdbool.h>
  36. #include <stdint.h>
  37. #include <stdio.h>
  38. #include <sys/time.h>
  39. #include <sys/types.h>
  40. #include <dirent.h>
  41. #include <unistd.h>
  42. #ifndef WIN32
  43. #include <termios.h>
  44. #include <sys/stat.h>
  45. #include <fcntl.h>
  46. #ifndef O_CLOEXEC
  47. #define O_CLOEXEC 0
  48. #endif
  49. #else
  50. #include <windows.h>
  51. #include <io.h>
  52. #endif
  53. #ifdef HAVE_SYS_EPOLL_H
  54. #include <sys/epoll.h>
  55. #define HAVE_EPOLL
  56. #endif
  57. #include "compat.h"
  58. #include "dynclock.h"
  59. #include "driver-icarus.h"
  60. #include "lowl-vcom.h"
  61. // The serial I/O speed - Linux uses a define 'B115200' in bits/termios.h
  62. #define ICARUS_IO_SPEED 115200
  63. // The number of bytes in a nonce (always 4)
  64. // This is NOT the read-size for the Icarus driver
  65. // That is defined in ICARUS_INFO->read_size
  66. #define ICARUS_NONCE_SIZE 4
  67. #define ASSERT1(condition) __maybe_unused static char sizeof_uint32_t_must_be_4[(condition)?1:-1]
  68. ASSERT1(sizeof(uint32_t) == 4);
  69. #define ICARUS_READ_TIME(baud, read_size) ((double)read_size * (double)8.0 / (double)(baud))
  70. // Defined in deciseconds
  71. // There's no need to have this bigger, since the overhead/latency of extra work
  72. // is pretty small once you get beyond a 10s nonce range time and 10s also
  73. // means that nothing slower than 429MH/s can go idle so most icarus devices
  74. // will always mine without idling
  75. #define ICARUS_READ_COUNT_LIMIT_MAX 100
  76. // In timing mode: Default starting value until an estimate can be obtained
  77. // 5 seconds allows for up to a ~840MH/s device
  78. #define ICARUS_READ_COUNT_TIMING (5 * TIME_FACTOR)
  79. // For a standard Icarus REV3
  80. #define ICARUS_REV3_HASH_TIME 0.00000000264083
  81. // Icarus Rev3 doesn't send a completion message when it finishes
  82. // the full nonce range, so to avoid being idle we must abort the
  83. // work (by starting a new work) shortly before it finishes
  84. //
  85. // Thus we need to estimate 2 things:
  86. // 1) How many hashes were done if the work was aborted
  87. // 2) How high can the timeout be before the Icarus is idle,
  88. // to minimise the number of work started
  89. // We set 2) to 'the calculated estimate' - 1
  90. // to ensure the estimate ends before idle
  91. //
  92. // The simple calculation used is:
  93. // Tn = Total time in seconds to calculate n hashes
  94. // Hs = seconds per hash
  95. // Xn = number of hashes
  96. // W = code overhead per work
  97. //
  98. // Rough but reasonable estimate:
  99. // Tn = Hs * Xn + W (of the form y = mx + b)
  100. //
  101. // Thus:
  102. // Line of best fit (using least squares)
  103. //
  104. // Hs = (n*Sum(XiTi)-Sum(Xi)*Sum(Ti))/(n*Sum(Xi^2)-Sum(Xi)^2)
  105. // W = Sum(Ti)/n - (Hs*Sum(Xi))/n
  106. //
  107. // N.B. W is less when aborting work since we aren't waiting for the reply
  108. // to be transferred back (ICARUS_READ_TIME)
  109. // Calculating the hashes aborted at n seconds is thus just n/Hs
  110. // (though this is still a slight overestimate due to code delays)
  111. //
  112. // Both below must be exceeded to complete a set of data
  113. // Minimum how long after the first, the last data point must be
  114. #define HISTORY_SEC 60
  115. // Minimum how many points a single ICARUS_HISTORY should have
  116. #define MIN_DATA_COUNT 5
  117. // The value above used is doubled each history until it exceeds:
  118. #define MAX_MIN_DATA_COUNT 100
  119. #if (TIME_FACTOR != 10)
  120. #error TIME_FACTOR must be 10
  121. #endif
  122. static struct timeval history_sec = { HISTORY_SEC, 0 };
  123. static const char *MODE_DEFAULT_STR = "default";
  124. static const char *MODE_SHORT_STR = "short";
  125. static const char *MODE_SHORT_STREQ = "short=";
  126. static const char *MODE_LONG_STR = "long";
  127. static const char *MODE_LONG_STREQ = "long=";
  128. static const char *MODE_VALUE_STR = "value";
  129. static const char *MODE_UNKNOWN_STR = "unknown";
  130. #define END_CONDITION 0x0000ffff
  131. #define DEFAULT_DETECT_THRESHOLD 1
  132. BFG_REGISTER_DRIVER(icarus_drv)
  133. extern const struct bfg_set_device_definition icarus_set_device_funcs[];
  134. extern const struct bfg_set_device_definition icarus_set_device_funcs_live[];
  135. extern void convert_icarus_to_cairnsmore(struct cgpu_info *);
  136. static inline
  137. uint32_t icarus_nonce32toh(const struct ICARUS_INFO * const info, const uint32_t nonce)
  138. {
  139. return info->nonce_littleendian ? le32toh(nonce) : be32toh(nonce);
  140. }
  141. #define icarus_open2(devpath, baud, purge) serial_open(devpath, baud, ICARUS_READ_FAULT_DECISECONDS, purge)
  142. #define icarus_open(devpath, baud) icarus_open2(devpath, baud, false)
  143. static
  144. void icarus_log_protocol(const char * const repr, const void *buf, size_t bufLen, const char *prefix)
  145. {
  146. char hex[(bufLen * 2) + 1];
  147. bin2hex(hex, buf, bufLen);
  148. applog(LOG_DEBUG, "%"PRIpreprv": DEVPROTO: %s %s", repr, prefix, hex);
  149. }
  150. int icarus_gets(const char * const repr, unsigned char *buf, int fd, struct timeval *tv_finish, struct thr_info *thr, int read_count, int read_size)
  151. {
  152. ssize_t ret = 0;
  153. int rc = 0;
  154. int epollfd = -1;
  155. int epoll_timeout = ICARUS_READ_FAULT_DECISECONDS * 100;
  156. int read_amount = read_size;
  157. bool first = true;
  158. #ifdef HAVE_EPOLL
  159. struct epoll_event ev = {
  160. .events = EPOLLIN,
  161. .data.fd = fd,
  162. };
  163. struct epoll_event evr[2];
  164. if (thr && thr->work_restart_notifier[1] != -1) {
  165. epollfd = epoll_create(2);
  166. if (epollfd != -1) {
  167. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, fd, &ev)) {
  168. close(epollfd);
  169. epollfd = -1;
  170. }
  171. {
  172. ev.data.fd = thr->work_restart_notifier[0];
  173. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, thr->work_restart_notifier[0], &ev))
  174. applog(LOG_ERR, "%"PRIpreprv": Error adding work restart fd to epoll", repr);
  175. else
  176. {
  177. epoll_timeout *= read_count;
  178. read_count = 1;
  179. }
  180. }
  181. }
  182. else
  183. applog(LOG_ERR, "%"PRIpreprv": Error creating epoll", repr);
  184. }
  185. #endif
  186. // Read reply 1 byte at a time to get earliest tv_finish
  187. while (true) {
  188. #ifdef HAVE_EPOLL
  189. if (epollfd != -1 && (ret = epoll_wait(epollfd, evr, 2, epoll_timeout)) != -1)
  190. {
  191. if (ret == 1 && evr[0].data.fd == fd)
  192. ret = read(fd, buf, 1);
  193. else
  194. {
  195. if (ret)
  196. notifier_read(thr->work_restart_notifier);
  197. ret = 0;
  198. }
  199. }
  200. else
  201. #endif
  202. ret = read(fd, buf, 1);
  203. if (ret < 0)
  204. return ICA_GETS_ERROR;
  205. if (first)
  206. cgtime(tv_finish);
  207. if (ret >= read_amount)
  208. {
  209. if (epollfd != -1)
  210. close(epollfd);
  211. if (opt_dev_protocol && opt_debug)
  212. icarus_log_protocol(repr, buf, read_size, "RECV");
  213. return ICA_GETS_OK;
  214. }
  215. if (ret > 0) {
  216. buf += ret;
  217. read_amount -= ret;
  218. first = false;
  219. continue;
  220. }
  221. if (thr && thr->work_restart) {
  222. if (epollfd != -1)
  223. close(epollfd);
  224. applog(LOG_DEBUG, "%"PRIpreprv": Interrupted by work restart", repr);
  225. return ICA_GETS_RESTART;
  226. }
  227. rc++;
  228. if (rc >= read_count) {
  229. if (epollfd != -1)
  230. close(epollfd);
  231. applog(LOG_DEBUG, "%"PRIpreprv": No data in %.2f seconds",
  232. repr,
  233. (float)rc * epoll_timeout / 1000.);
  234. return ICA_GETS_TIMEOUT;
  235. }
  236. }
  237. }
  238. int icarus_write(const char * const repr, int fd, const void *buf, size_t bufLen)
  239. {
  240. size_t ret;
  241. if (opt_dev_protocol && opt_debug)
  242. icarus_log_protocol(repr, buf, bufLen, "SEND");
  243. if (unlikely(fd == -1))
  244. return 1;
  245. ret = write(fd, buf, bufLen);
  246. if (unlikely(ret != bufLen))
  247. return 1;
  248. return 0;
  249. }
  250. #define icarus_close(fd) serial_close(fd)
  251. void do_icarus_close(struct thr_info *thr)
  252. {
  253. struct cgpu_info *icarus = thr->cgpu;
  254. const int fd = icarus->device_fd;
  255. if (fd == -1)
  256. return;
  257. icarus_close(fd);
  258. icarus->device_fd = -1;
  259. }
  260. static const char *timing_mode_str(enum timing_mode timing_mode)
  261. {
  262. switch(timing_mode) {
  263. case MODE_DEFAULT:
  264. return MODE_DEFAULT_STR;
  265. case MODE_SHORT:
  266. return MODE_SHORT_STR;
  267. case MODE_LONG:
  268. return MODE_LONG_STR;
  269. case MODE_VALUE:
  270. return MODE_VALUE_STR;
  271. default:
  272. return MODE_UNKNOWN_STR;
  273. }
  274. }
  275. static
  276. const char *_icarus_set_timing(struct ICARUS_INFO * const info, const char * const repr, const struct device_drv * const drv, const char * const buf)
  277. {
  278. double Hs;
  279. char *eq;
  280. if (strcasecmp(buf, MODE_SHORT_STR) == 0) {
  281. // short
  282. info->read_count = ICARUS_READ_COUNT_TIMING;
  283. info->read_count_limit = 0; // 0 = no limit
  284. info->timing_mode = MODE_SHORT;
  285. info->do_icarus_timing = true;
  286. } else if (strncasecmp(buf, MODE_SHORT_STREQ, strlen(MODE_SHORT_STREQ)) == 0) {
  287. // short=limit
  288. info->read_count = ICARUS_READ_COUNT_TIMING;
  289. info->timing_mode = MODE_SHORT;
  290. info->do_icarus_timing = true;
  291. info->read_count_limit = atoi(&buf[strlen(MODE_SHORT_STREQ)]);
  292. if (info->read_count_limit < 0)
  293. info->read_count_limit = 0;
  294. if (info->read_count_limit > ICARUS_READ_COUNT_LIMIT_MAX)
  295. info->read_count_limit = ICARUS_READ_COUNT_LIMIT_MAX;
  296. } else if (strcasecmp(buf, MODE_LONG_STR) == 0) {
  297. // long
  298. info->read_count = ICARUS_READ_COUNT_TIMING;
  299. info->read_count_limit = 0; // 0 = no limit
  300. info->timing_mode = MODE_LONG;
  301. info->do_icarus_timing = true;
  302. } else if (strncasecmp(buf, MODE_LONG_STREQ, strlen(MODE_LONG_STREQ)) == 0) {
  303. // long=limit
  304. info->read_count = ICARUS_READ_COUNT_TIMING;
  305. info->timing_mode = MODE_LONG;
  306. info->do_icarus_timing = true;
  307. info->read_count_limit = atoi(&buf[strlen(MODE_LONG_STREQ)]);
  308. if (info->read_count_limit < 0)
  309. info->read_count_limit = 0;
  310. if (info->read_count_limit > ICARUS_READ_COUNT_LIMIT_MAX)
  311. info->read_count_limit = ICARUS_READ_COUNT_LIMIT_MAX;
  312. } else if ((Hs = atof(buf)) != 0) {
  313. // ns[=read_count]
  314. info->Hs = Hs / NANOSEC;
  315. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  316. info->read_count = 0;
  317. if ((eq = strchr(buf, '=')) != NULL)
  318. info->read_count = atoi(eq+1);
  319. if (info->read_count < 1)
  320. info->read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  321. if (unlikely(info->read_count < 1))
  322. info->read_count = 1;
  323. info->read_count_limit = 0; // 0 = no limit
  324. info->timing_mode = MODE_VALUE;
  325. info->do_icarus_timing = false;
  326. } else {
  327. // Anything else in buf just uses DEFAULT mode
  328. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  329. info->read_count = 0;
  330. if ((eq = strchr(buf, '=')) != NULL)
  331. info->read_count = atoi(eq+1);
  332. int def_read_count = ICARUS_READ_COUNT_TIMING;
  333. if (info->timing_mode == MODE_DEFAULT) {
  334. if (drv == &icarus_drv) {
  335. info->do_default_detection = 0x10;
  336. } else {
  337. def_read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  338. }
  339. info->do_icarus_timing = false;
  340. }
  341. if (info->read_count < 1)
  342. info->read_count = def_read_count;
  343. info->read_count_limit = 0; // 0 = no limit
  344. }
  345. info->min_data_count = MIN_DATA_COUNT;
  346. applog(LOG_DEBUG, "%"PRIpreprv": Init: mode=%s read_count=%d limit=%dms Hs=%e",
  347. repr,
  348. timing_mode_str(info->timing_mode),
  349. info->read_count, info->read_count_limit, info->Hs);
  350. return NULL;
  351. }
  352. const char *icarus_set_timing(struct cgpu_info * const proc, const char * const optname, const char * const buf, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  353. {
  354. struct ICARUS_INFO * const info = proc->device_data;
  355. return _icarus_set_timing(info, proc->proc_repr, proc->drv, buf);
  356. }
  357. static uint32_t mask(int work_division)
  358. {
  359. return 0xffffffff / work_division;
  360. }
  361. // Number of bytes remaining after reading a nonce from Icarus
  362. int icarus_excess_nonce_size(int fd, struct ICARUS_INFO *info)
  363. {
  364. // How big a buffer?
  365. int excess_size = info->read_size - ICARUS_NONCE_SIZE;
  366. // Try to read one more to ensure the device doesn't return
  367. // more than we want for this driver
  368. excess_size++;
  369. unsigned char excess_bin[excess_size];
  370. // Read excess_size from Icarus
  371. struct timeval tv_now;
  372. timer_set_now(&tv_now);
  373. int bytes_read = read(fd, excess_bin, excess_size);
  374. // Number of bytes that were still available
  375. return bytes_read;
  376. }
  377. int icarus_probe_work_division(const int fd, const char * const repr, struct ICARUS_INFO * const info)
  378. {
  379. struct timeval tv_finish;
  380. // For reading the nonce from Icarus
  381. unsigned char res_bin[info->read_size];
  382. // For storing the the 32-bit nonce
  383. uint32_t res;
  384. int work_division = 0;
  385. applog(LOG_DEBUG, "%s: Work division not specified - autodetecting", repr);
  386. // Special packet to probe work_division
  387. unsigned char pkt[64] =
  388. "\x2e\x4c\x8f\x91\xfd\x59\x5d\x2d\x7e\xa2\x0a\xaa\xcb\x64\xa2\xa0"
  389. "\x43\x82\x86\x02\x77\xcf\x26\xb6\xa1\xee\x04\xc5\x6a\x5b\x50\x4a"
  390. "BFGMiner Probe\0\0"
  391. "BFG\0\x64\x61\x01\x1a\xc9\x06\xa9\x51\xfb\x9b\x3c\x73";
  392. icarus_write(repr, fd, pkt, sizeof(pkt));
  393. memset(res_bin, 0, sizeof(res_bin));
  394. if (ICA_GETS_OK == icarus_gets(repr, res_bin, fd, &tv_finish, NULL, info->read_count, info->read_size))
  395. {
  396. memcpy(&res, res_bin, sizeof(res));
  397. res = icarus_nonce32toh(info, res);
  398. }
  399. else
  400. res = 0;
  401. switch (res) {
  402. case 0x04C0FDB4:
  403. work_division = 1;
  404. break;
  405. case 0x82540E46:
  406. work_division = 2;
  407. break;
  408. case 0x417C0F36:
  409. work_division = 4;
  410. break;
  411. case 0x60C994D5:
  412. work_division = 8;
  413. break;
  414. default:
  415. applog(LOG_ERR, "%s: Work division autodetection failed (assuming 2): got %08x", repr, res);
  416. work_division = 2;
  417. }
  418. applog(LOG_DEBUG, "%s: Work division autodetection got %08x (=%d)", repr, res, work_division);
  419. return work_division;
  420. }
  421. struct cgpu_info *icarus_detect_custom(const char *devpath, struct device_drv *api, struct ICARUS_INFO *info)
  422. {
  423. struct timeval tv_start, tv_finish;
  424. int fd;
  425. unsigned char nonce_bin[ICARUS_NONCE_SIZE];
  426. char nonce_hex[(sizeof(nonce_bin) * 2) + 1];
  427. drv_set_defaults(api, icarus_set_device_funcs, info, devpath, detectone_meta_info.serial, 1);
  428. int baud = info->baud;
  429. int work_division = info->work_division;
  430. int fpga_count = info->fpga_count;
  431. applog(LOG_DEBUG, "%s: Attempting to open %s", api->dname, devpath);
  432. fd = icarus_open2(devpath, baud, true);
  433. if (unlikely(fd == -1)) {
  434. applog(LOG_DEBUG, "%s: Failed to open %s", api->dname, devpath);
  435. return NULL;
  436. }
  437. // Set a default so that individual drivers need not specify
  438. // e.g. Cairnsmore
  439. BFGINIT(info->probe_read_count, 1);
  440. if (info->read_size == 0)
  441. info->read_size = ICARUS_DEFAULT_READ_SIZE;
  442. if (!info->golden_ob)
  443. {
  444. // Block 171874 nonce = (0xa2870100) = 0x000187a2
  445. // NOTE: this MUST take less time to calculate
  446. // than the timeout set in icarus_open()
  447. // This one takes ~0.53ms on Rev3 Icarus
  448. info->golden_ob =
  449. "4679ba4ec99876bf4bfe086082b40025"
  450. "4df6c356451471139a3afa71e48f544a"
  451. "00000000000000000000000000000000"
  452. "0000000087320b1a1426674f2fa722ce";
  453. /* NOTE: This gets sent to basically every port specified in --scan-serial,
  454. * even ones that aren't Icarus; be sure they can all handle it, when
  455. * this is changed...
  456. * BitForce: Ignores entirely
  457. * ModMiner: Starts (useless) work, gets back to clean state
  458. */
  459. info->golden_nonce = "000187a2";
  460. }
  461. if (info->detect_init_func)
  462. info->detect_init_func(devpath, fd, info);
  463. int ob_size = strlen(info->golden_ob) / 2;
  464. unsigned char ob_bin[ob_size];
  465. BFGINIT(info->ob_size, ob_size);
  466. if (!info->ignore_golden_nonce)
  467. {
  468. hex2bin(ob_bin, info->golden_ob, sizeof(ob_bin));
  469. icarus_write(devpath, fd, ob_bin, sizeof(ob_bin));
  470. cgtime(&tv_start);
  471. memset(nonce_bin, 0, sizeof(nonce_bin));
  472. // Do not use info->read_size here, instead read exactly ICARUS_NONCE_SIZE
  473. // We will then compare the bytes left in fd with info->read_size to determine
  474. // if this is a valid device
  475. icarus_gets(devpath, nonce_bin, fd, &tv_finish, NULL, info->probe_read_count, ICARUS_NONCE_SIZE);
  476. // How many bytes were left after reading the above nonce
  477. int bytes_left = icarus_excess_nonce_size(fd, info);
  478. icarus_close(fd);
  479. bin2hex(nonce_hex, nonce_bin, sizeof(nonce_bin));
  480. if (strncmp(nonce_hex, info->golden_nonce, 8))
  481. {
  482. applog(LOG_DEBUG,
  483. "%s: "
  484. "Test failed at %s: get %s, should: %s",
  485. api->dname,
  486. devpath, nonce_hex, info->golden_nonce);
  487. return NULL;
  488. }
  489. if (info->read_size - ICARUS_NONCE_SIZE != bytes_left)
  490. {
  491. applog(LOG_DEBUG,
  492. "%s: "
  493. "Test failed at %s: expected %d bytes, got %d",
  494. api->dname,
  495. devpath, info->read_size, ICARUS_NONCE_SIZE + bytes_left);
  496. return NULL;
  497. }
  498. }
  499. else
  500. icarus_close(fd);
  501. applog(LOG_DEBUG,
  502. "%s: "
  503. "Test succeeded at %s: got %s",
  504. api->dname,
  505. devpath, nonce_hex);
  506. if (serial_claim_v(devpath, api))
  507. return NULL;
  508. _icarus_set_timing(info, api->dname, api, "");
  509. if (!info->fpga_count)
  510. {
  511. if (!info->work_division)
  512. {
  513. fd = icarus_open2(devpath, baud, true);
  514. info->work_division = icarus_probe_work_division(fd, api->dname, info);
  515. icarus_close(fd);
  516. }
  517. info->fpga_count = info->work_division;
  518. }
  519. // Lock fpga_count from set_work_division
  520. info->user_set |= IUS_FPGA_COUNT;
  521. /* We have a real Icarus! */
  522. struct cgpu_info *icarus;
  523. icarus = calloc(1, sizeof(struct cgpu_info));
  524. icarus->drv = api;
  525. icarus->device_path = strdup(devpath);
  526. icarus->device_fd = -1;
  527. icarus->threads = 1;
  528. icarus->procs = info->fpga_count;
  529. icarus->device_data = info;
  530. icarus->set_device_funcs = icarus_set_device_funcs_live;
  531. add_cgpu(icarus);
  532. applog(LOG_INFO, "Found %"PRIpreprv" at %s",
  533. icarus->proc_repr,
  534. devpath);
  535. applog(LOG_DEBUG, "%"PRIpreprv": Init: baud=%d work_division=%d fpga_count=%d",
  536. icarus->proc_repr,
  537. baud, work_division, fpga_count);
  538. timersub(&tv_finish, &tv_start, &(info->golden_tv));
  539. return icarus;
  540. }
  541. static bool icarus_detect_one(const char *devpath)
  542. {
  543. struct ICARUS_INFO *info = calloc(1, sizeof(struct ICARUS_INFO));
  544. if (unlikely(!info))
  545. quit(1, "Failed to malloc ICARUS_INFO");
  546. // TODO: try some higher speeds with the Icarus and BFL to see
  547. // if they support them and if setting them makes any difference
  548. // N.B. B3000000 doesn't work on Icarus
  549. info->baud = ICARUS_IO_SPEED;
  550. info->reopen_mode = IRM_TIMEOUT;
  551. info->Hs = ICARUS_REV3_HASH_TIME;
  552. info->timing_mode = MODE_DEFAULT;
  553. info->read_size = ICARUS_DEFAULT_READ_SIZE;
  554. if (!icarus_detect_custom(devpath, &icarus_drv, info)) {
  555. free(info);
  556. return false;
  557. }
  558. return true;
  559. }
  560. static
  561. bool icarus_lowl_probe(const struct lowlevel_device_info * const info)
  562. {
  563. return vcom_lowl_probe_wrapper(info, icarus_detect_one);
  564. }
  565. static bool icarus_prepare(struct thr_info *thr)
  566. {
  567. struct cgpu_info *icarus = thr->cgpu;
  568. struct icarus_state *state;
  569. thr->cgpu_data = state = calloc(1, sizeof(*state));
  570. state->firstrun = true;
  571. #ifdef HAVE_EPOLL
  572. int epollfd = epoll_create(2);
  573. if (epollfd != -1)
  574. {
  575. close(epollfd);
  576. notifier_init(thr->work_restart_notifier);
  577. }
  578. #endif
  579. icarus->status = LIFE_INIT2;
  580. return true;
  581. }
  582. bool icarus_init(struct thr_info *thr)
  583. {
  584. struct cgpu_info *icarus = thr->cgpu;
  585. struct ICARUS_INFO *info = icarus->device_data;
  586. struct icarus_state * const state = thr->cgpu_data;
  587. int fd = icarus_open2(icarus->device_path, info->baud, true);
  588. icarus->device_fd = fd;
  589. if (unlikely(-1 == fd)) {
  590. applog(LOG_ERR, "%s: Failed to open %s",
  591. icarus->dev_repr,
  592. icarus->device_path);
  593. return false;
  594. }
  595. applog(LOG_INFO, "%s: Opened %s", icarus->dev_repr, icarus->device_path);
  596. BFGINIT(info->job_start_func, icarus_job_start);
  597. BFGINIT(state->ob_bin, calloc(1, info->ob_size));
  598. if (!info->work_division)
  599. info->work_division = icarus_probe_work_division(fd, icarus->proc_repr, info);
  600. if (!is_power_of_two(info->work_division))
  601. info->work_division = upper_power_of_two_u32(info->work_division);
  602. info->nonce_mask = mask(info->work_division);
  603. return true;
  604. }
  605. static
  606. struct thr_info *icarus_thread_for_nonce(const struct cgpu_info * const icarus, const uint32_t nonce)
  607. {
  608. struct ICARUS_INFO * const info = icarus->device_data;
  609. unsigned proc_id = 0;
  610. for (int i = info->work_division, j = 0; i /= 2; ++j)
  611. if (nonce & (1 << (31 - j)))
  612. proc_id |= (1 << j);
  613. const struct cgpu_info * const proc = device_proc_by_id(icarus, proc_id) ?: icarus;
  614. return proc->thr[0];
  615. }
  616. static bool icarus_reopen(struct cgpu_info *icarus, struct icarus_state *state, int *fdp)
  617. {
  618. struct ICARUS_INFO *info = icarus->device_data;
  619. // Reopen the serial port to workaround a USB-host-chipset-specific issue with the Icarus's buggy USB-UART
  620. do_icarus_close(icarus->thr[0]);
  621. *fdp = icarus->device_fd = icarus_open(icarus->device_path, info->baud);
  622. if (unlikely(-1 == *fdp)) {
  623. applog(LOG_ERR, "%"PRIpreprv": Failed to reopen on %s", icarus->proc_repr, icarus->device_path);
  624. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  625. state->firstrun = true;
  626. return false;
  627. }
  628. return true;
  629. }
  630. static
  631. bool icarus_job_prepare(struct thr_info *thr, struct work *work, __maybe_unused uint64_t max_nonce)
  632. {
  633. struct cgpu_info * const icarus = thr->cgpu;
  634. struct icarus_state * const state = thr->cgpu_data;
  635. uint8_t * const ob_bin = state->ob_bin;
  636. swab256(ob_bin, work->midstate);
  637. bswap_96p(&ob_bin[0x34], &work->data[0x40]);
  638. if (!(memcmp(&ob_bin[56], "\xff\xff\xff\xff", 4)
  639. || memcmp(&ob_bin, "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0", 32))) {
  640. // This sequence is used on cairnsmore bitstreams for commands, NEVER send it otherwise
  641. applog(LOG_WARNING, "%"PRIpreprv": Received job attempting to send a command, corrupting it!",
  642. icarus->proc_repr);
  643. ob_bin[56] = 0;
  644. }
  645. return true;
  646. }
  647. bool icarus_job_start(struct thr_info *thr)
  648. {
  649. struct cgpu_info *icarus = thr->cgpu;
  650. struct ICARUS_INFO *info = icarus->device_data;
  651. struct icarus_state *state = thr->cgpu_data;
  652. const uint8_t * const ob_bin = state->ob_bin;
  653. int fd = icarus->device_fd;
  654. int ret;
  655. // Handle dynamic clocking for "subclass" devices
  656. // This needs to run before sending next job, since it hashes the command too
  657. if (info->dclk.freqM && likely(!state->firstrun)) {
  658. dclk_preUpdate(&info->dclk);
  659. dclk_updateFreq(&info->dclk, info->dclk_change_clock_func, thr);
  660. }
  661. cgtime(&state->tv_workstart);
  662. ret = icarus_write(icarus->proc_repr, fd, ob_bin, info->ob_size);
  663. if (ret) {
  664. do_icarus_close(thr);
  665. applog(LOG_ERR, "%"PRIpreprv": Comms error (werr=%d)", icarus->proc_repr, ret);
  666. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  667. return false; /* This should never happen */
  668. }
  669. if (opt_debug) {
  670. char ob_hex[(info->ob_size * 2) + 1];
  671. bin2hex(ob_hex, ob_bin, info->ob_size);
  672. applog(LOG_DEBUG, "%"PRIpreprv" sent: %s",
  673. icarus->proc_repr,
  674. ob_hex);
  675. }
  676. return true;
  677. }
  678. static
  679. struct work *icarus_process_worknonce(const struct ICARUS_INFO * const info, struct icarus_state *state, uint32_t *nonce)
  680. {
  681. *nonce = icarus_nonce32toh(info, *nonce);
  682. if (test_nonce(state->last_work, *nonce, false))
  683. return state->last_work;
  684. if (likely(state->last2_work && test_nonce(state->last2_work, *nonce, false)))
  685. return state->last2_work;
  686. return NULL;
  687. }
  688. static
  689. void handle_identify(struct thr_info * const thr, int ret, const bool was_first_run)
  690. {
  691. const struct cgpu_info * const icarus = thr->cgpu;
  692. const struct ICARUS_INFO * const info = icarus->device_data;
  693. struct icarus_state * const state = thr->cgpu_data;
  694. int fd = icarus->device_fd;
  695. struct timeval tv_now;
  696. double delapsed;
  697. // For reading the nonce from Icarus
  698. unsigned char nonce_bin[info->read_size];
  699. // For storing the the 32-bit nonce
  700. uint32_t nonce;
  701. if (fd == -1)
  702. return;
  703. // If identify is requested (block erupters):
  704. // 1. Don't start the next job right away (above)
  705. // 2. Wait for the current job to complete 100%
  706. if (!was_first_run)
  707. {
  708. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Waiting for current job to finish", icarus->proc_repr);
  709. while (true)
  710. {
  711. cgtime(&tv_now);
  712. delapsed = tdiff(&tv_now, &state->tv_workstart);
  713. if (delapsed + 0.1 > info->fullnonce)
  714. break;
  715. // Try to get more nonces (ignoring work restart)
  716. memset(nonce_bin, 0, sizeof(nonce_bin));
  717. ret = icarus_gets(icarus->proc_repr, nonce_bin, fd, &tv_now, NULL, (info->fullnonce - delapsed) * 10, info->read_size);
  718. if (ret == ICA_GETS_OK)
  719. {
  720. memcpy(&nonce, nonce_bin, sizeof(nonce));
  721. nonce = icarus_nonce32toh(info, nonce);
  722. submit_nonce(icarus_thread_for_nonce(icarus, nonce), state->last_work, nonce);
  723. }
  724. }
  725. }
  726. else
  727. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Current job should already be finished", icarus->proc_repr);
  728. // 3. Delay 3 more seconds
  729. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Leaving idle for 3 seconds", icarus->proc_repr);
  730. cgsleep_ms(3000);
  731. // Check for work restart in the meantime
  732. if (thr->work_restart)
  733. {
  734. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Work restart requested during delay", icarus->proc_repr);
  735. goto no_job_start;
  736. }
  737. // 4. Start next job
  738. if (!state->firstrun)
  739. {
  740. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Starting next job", icarus->proc_repr);
  741. if (!info->job_start_func(thr))
  742. no_job_start:
  743. state->firstrun = true;
  744. }
  745. state->identify = false;
  746. }
  747. static
  748. void icarus_transition_work(struct icarus_state *state, struct work *work)
  749. {
  750. if (state->last2_work)
  751. free_work(state->last2_work);
  752. state->last2_work = state->last_work;
  753. state->last_work = copy_work(work);
  754. }
  755. static int64_t icarus_scanhash(struct thr_info *thr, struct work *work,
  756. __maybe_unused int64_t max_nonce)
  757. {
  758. struct cgpu_info *icarus;
  759. int fd;
  760. int ret;
  761. struct ICARUS_INFO *info;
  762. struct work *nonce_work;
  763. int64_t hash_count;
  764. struct timeval tv_start = {.tv_sec=0}, elapsed;
  765. struct timeval tv_history_start, tv_history_finish;
  766. double Ti, Xi;
  767. int i;
  768. bool was_hw_error = false;
  769. bool was_first_run;
  770. struct ICARUS_HISTORY *history0, *history;
  771. int count;
  772. double Hs, W, fullnonce;
  773. int read_count;
  774. bool limited;
  775. uint32_t values;
  776. int64_t hash_count_range;
  777. elapsed.tv_sec = elapsed.tv_usec = 0;
  778. icarus = thr->cgpu;
  779. struct icarus_state *state = thr->cgpu_data;
  780. was_first_run = state->firstrun;
  781. icarus->drv->job_prepare(thr, work, max_nonce);
  782. // Wait for the previous run's result
  783. fd = icarus->device_fd;
  784. info = icarus->device_data;
  785. // For reading the nonce from Icarus
  786. unsigned char nonce_bin[info->read_size];
  787. // For storing the the 32-bit nonce
  788. uint32_t nonce;
  789. if (unlikely(fd == -1) && !icarus_reopen(icarus, state, &fd))
  790. return -1;
  791. if (!state->firstrun) {
  792. if (state->changework)
  793. {
  794. state->changework = false;
  795. ret = ICA_GETS_RESTART;
  796. }
  797. else
  798. {
  799. read_count = info->read_count;
  800. keepwaiting:
  801. /* Icarus will return info->read_size bytes nonces or nothing */
  802. memset(nonce_bin, 0, sizeof(nonce_bin));
  803. ret = icarus_gets(icarus->proc_repr, nonce_bin, fd, &state->tv_workfinish, thr, read_count, info->read_size);
  804. switch (ret) {
  805. case ICA_GETS_RESTART:
  806. // The prepared work is invalid, and the current work is abandoned
  807. // Go back to the main loop to get the next work, and stuff
  808. // Returning to the main loop will clear work_restart, so use a flag...
  809. state->changework = true;
  810. return 0;
  811. case ICA_GETS_ERROR:
  812. do_icarus_close(thr);
  813. applog(LOG_ERR, "%"PRIpreprv": Comms error (rerr)", icarus->proc_repr);
  814. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  815. if (!icarus_reopen(icarus, state, &fd))
  816. return -1;
  817. break;
  818. case ICA_GETS_TIMEOUT:
  819. if (info->reopen_mode == IRM_TIMEOUT && !icarus_reopen(icarus, state, &fd))
  820. return -1;
  821. case ICA_GETS_OK:
  822. break;
  823. }
  824. }
  825. tv_start = state->tv_workstart;
  826. timersub(&state->tv_workfinish, &tv_start, &elapsed);
  827. }
  828. else
  829. {
  830. if (fd == -1 && !icarus_reopen(icarus, state, &fd))
  831. return -1;
  832. // First run; no nonce, no hashes done
  833. ret = ICA_GETS_ERROR;
  834. }
  835. #ifndef WIN32
  836. tcflush(fd, TCOFLUSH);
  837. #endif
  838. if (ret == ICA_GETS_OK)
  839. {
  840. memcpy(&nonce, nonce_bin, sizeof(nonce));
  841. nonce_work = icarus_process_worknonce(info, state, &nonce);
  842. if (likely(nonce_work))
  843. {
  844. if (nonce_work == state->last2_work)
  845. {
  846. // nonce was for the last job; submit and keep processing the current one
  847. submit_nonce(icarus_thread_for_nonce(icarus, nonce), nonce_work, nonce);
  848. goto keepwaiting;
  849. }
  850. if (info->continue_search)
  851. {
  852. read_count = info->read_count - ((timer_elapsed_us(&state->tv_workstart, NULL) / (1000000 / TIME_FACTOR)) + 1);
  853. if (read_count)
  854. {
  855. submit_nonce(icarus_thread_for_nonce(icarus, nonce), nonce_work, nonce);
  856. goto keepwaiting;
  857. }
  858. }
  859. }
  860. else
  861. was_hw_error = true;
  862. }
  863. // Handle dynamic clocking for "subclass" devices
  864. // This needs to run before sending next job, since it hashes the command too
  865. if (info->dclk.freqM && likely(ret == ICA_GETS_OK || ret == ICA_GETS_TIMEOUT)) {
  866. int qsec = ((4 * elapsed.tv_sec) + (elapsed.tv_usec / 250000)) ?: 1;
  867. for (int n = qsec; n; --n)
  868. dclk_gotNonces(&info->dclk);
  869. if (was_hw_error)
  870. dclk_errorCount(&info->dclk, qsec);
  871. }
  872. // Force a USB close/reopen on any hw error (or on request, eg for baud change)
  873. if (was_hw_error || info->reopen_now)
  874. {
  875. info->reopen_now = false;
  876. if (info->reopen_mode == IRM_CYCLE)
  877. {} // Do nothing here, we reopen after sending the job
  878. else
  879. if (!icarus_reopen(icarus, state, &fd))
  880. state->firstrun = true;
  881. }
  882. if (unlikely(state->identify))
  883. {
  884. // Delay job start until later...
  885. }
  886. else
  887. if (unlikely(icarus->deven != DEV_ENABLED || !info->job_start_func(thr)))
  888. state->firstrun = true;
  889. if (info->reopen_mode == IRM_CYCLE && !icarus_reopen(icarus, state, &fd))
  890. state->firstrun = true;
  891. work->blk.nonce = 0xffffffff;
  892. if (ret == ICA_GETS_ERROR) {
  893. state->firstrun = false;
  894. icarus_transition_work(state, work);
  895. hash_count = 0;
  896. goto out;
  897. }
  898. // OK, done starting Icarus's next job... now process the last run's result!
  899. if (ret == ICA_GETS_OK && !was_hw_error)
  900. {
  901. submit_nonce(icarus_thread_for_nonce(icarus, nonce), nonce_work, nonce);
  902. icarus_transition_work(state, work);
  903. hash_count = (nonce & info->nonce_mask);
  904. hash_count++;
  905. hash_count *= info->fpga_count;
  906. applog(LOG_DEBUG, "%"PRIpreprv" nonce = 0x%08x = 0x%08" PRIx64 " hashes (%"PRId64".%06lus)",
  907. icarus->proc_repr,
  908. nonce,
  909. (uint64_t)hash_count,
  910. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  911. }
  912. else
  913. {
  914. double estimate_hashes = elapsed.tv_sec;
  915. estimate_hashes += ((double)elapsed.tv_usec) / 1000000.;
  916. if (ret == ICA_GETS_OK)
  917. {
  918. // We can't be sure which processor got the error, but at least this is a decent guess
  919. inc_hw_errors(icarus_thread_for_nonce(icarus, nonce), state->last_work, nonce);
  920. estimate_hashes -= ICARUS_READ_TIME(info->baud, info->read_size);
  921. }
  922. icarus_transition_work(state, work);
  923. estimate_hashes /= info->Hs;
  924. // If some Serial-USB delay allowed the full nonce range to
  925. // complete it can't have done more than a full nonce
  926. if (unlikely(estimate_hashes > 0xffffffff))
  927. estimate_hashes = 0xffffffff;
  928. if (unlikely(estimate_hashes < 0))
  929. estimate_hashes = 0;
  930. applog(LOG_DEBUG, "%"PRIpreprv" %s nonce = 0x%08"PRIx64" hashes (%"PRId64".%06lus)",
  931. icarus->proc_repr,
  932. (ret == ICA_GETS_OK) ? "bad" : "no",
  933. (uint64_t)estimate_hashes,
  934. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  935. hash_count = estimate_hashes;
  936. if (ret != ICA_GETS_OK)
  937. goto out;
  938. }
  939. // Only ICA_GETS_OK gets here
  940. if (info->do_default_detection && elapsed.tv_sec >= DEFAULT_DETECT_THRESHOLD) {
  941. int MHs = (double)hash_count / ((double)elapsed.tv_sec * 1e6 + (double)elapsed.tv_usec);
  942. --info->do_default_detection;
  943. applog(LOG_DEBUG, "%"PRIpreprv": Autodetect device speed: %d MH/s", icarus->proc_repr, MHs);
  944. if (MHs <= 370 || MHs > 420) {
  945. // Not a real Icarus: enable short timing
  946. applog(LOG_WARNING, "%"PRIpreprv": Seems too %s to be an Icarus; calibrating with short timing", icarus->proc_repr, MHs>380?"fast":"slow");
  947. info->timing_mode = MODE_SHORT;
  948. info->do_icarus_timing = true;
  949. info->do_default_detection = 0;
  950. }
  951. else
  952. if (MHs <= 380) {
  953. // Real Icarus?
  954. if (!info->do_default_detection) {
  955. applog(LOG_DEBUG, "%"PRIpreprv": Seems to be a real Icarus", icarus->proc_repr);
  956. info->read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  957. }
  958. }
  959. else
  960. if (MHs <= 420) {
  961. // Enterpoint Cairnsmore1
  962. size_t old_repr_len = strlen(icarus->proc_repr);
  963. char old_repr[old_repr_len + 1];
  964. strcpy(old_repr, icarus->proc_repr);
  965. convert_icarus_to_cairnsmore(icarus);
  966. info->do_default_detection = 0;
  967. applog(LOG_WARNING, "%"PRIpreprv": Detected Cairnsmore1 device, upgrading driver to %"PRIpreprv, old_repr, icarus->proc_repr);
  968. }
  969. }
  970. // Ignore possible end condition values ... and hw errors
  971. // TODO: set limitations on calculated values depending on the device
  972. // to avoid crap values caused by CPU/Task Switching/Swapping/etc
  973. if (info->do_icarus_timing
  974. && !was_hw_error
  975. && ((nonce & info->nonce_mask) > END_CONDITION)
  976. && ((nonce & info->nonce_mask) < (info->nonce_mask & ~END_CONDITION))) {
  977. cgtime(&tv_history_start);
  978. history0 = &(info->history[0]);
  979. if (history0->values == 0)
  980. timeradd(&tv_start, &history_sec, &(history0->finish));
  981. Ti = (double)(elapsed.tv_sec)
  982. + ((double)(elapsed.tv_usec))/((double)1000000)
  983. - ((double)ICARUS_READ_TIME(info->baud, info->read_size));
  984. Xi = (double)hash_count;
  985. history0->sumXiTi += Xi * Ti;
  986. history0->sumXi += Xi;
  987. history0->sumTi += Ti;
  988. history0->sumXi2 += Xi * Xi;
  989. history0->values++;
  990. if (history0->hash_count_max < hash_count)
  991. history0->hash_count_max = hash_count;
  992. if (history0->hash_count_min > hash_count || history0->hash_count_min == 0)
  993. history0->hash_count_min = hash_count;
  994. if (history0->values >= info->min_data_count
  995. && timercmp(&tv_start, &(history0->finish), >)) {
  996. for (i = INFO_HISTORY; i > 0; i--)
  997. memcpy(&(info->history[i]),
  998. &(info->history[i-1]),
  999. sizeof(struct ICARUS_HISTORY));
  1000. // Initialise history0 to zero for summary calculation
  1001. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  1002. // We just completed a history data set
  1003. // So now recalc read_count based on the whole history thus we will
  1004. // initially get more accurate until it completes INFO_HISTORY
  1005. // total data sets
  1006. count = 0;
  1007. for (i = 1 ; i <= INFO_HISTORY; i++) {
  1008. history = &(info->history[i]);
  1009. if (history->values >= MIN_DATA_COUNT) {
  1010. count++;
  1011. history0->sumXiTi += history->sumXiTi;
  1012. history0->sumXi += history->sumXi;
  1013. history0->sumTi += history->sumTi;
  1014. history0->sumXi2 += history->sumXi2;
  1015. history0->values += history->values;
  1016. if (history0->hash_count_max < history->hash_count_max)
  1017. history0->hash_count_max = history->hash_count_max;
  1018. if (history0->hash_count_min > history->hash_count_min || history0->hash_count_min == 0)
  1019. history0->hash_count_min = history->hash_count_min;
  1020. }
  1021. }
  1022. // All history data
  1023. Hs = (history0->values*history0->sumXiTi - history0->sumXi*history0->sumTi)
  1024. / (history0->values*history0->sumXi2 - history0->sumXi*history0->sumXi);
  1025. W = history0->sumTi/history0->values - Hs*history0->sumXi/history0->values;
  1026. hash_count_range = history0->hash_count_max - history0->hash_count_min;
  1027. values = history0->values;
  1028. // Initialise history0 to zero for next data set
  1029. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  1030. fullnonce = W + Hs * (((double)0xffffffff) + 1);
  1031. read_count = (int)(fullnonce * TIME_FACTOR) - 1;
  1032. if (info->read_count_limit > 0 && read_count > info->read_count_limit) {
  1033. read_count = info->read_count_limit;
  1034. limited = true;
  1035. } else
  1036. limited = false;
  1037. info->Hs = Hs;
  1038. info->read_count = read_count;
  1039. info->fullnonce = fullnonce;
  1040. info->count = count;
  1041. info->W = W;
  1042. info->values = values;
  1043. info->hash_count_range = hash_count_range;
  1044. if (info->min_data_count < MAX_MIN_DATA_COUNT)
  1045. info->min_data_count *= 2;
  1046. else if (info->timing_mode == MODE_SHORT)
  1047. info->do_icarus_timing = false;
  1048. // applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: read_count=%d%s fullnonce=%fs history count=%d Hs=%e W=%e values=%d hash range=0x%08lx min data count=%u", icarus->proc_repr, read_count, limited ? " (limited)" : "", fullnonce, count, Hs, W, values, hash_count_range, info->min_data_count);
  1049. applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: Hs=%e W=%e read_count=%d%s fullnonce=%.3fs",
  1050. icarus->proc_repr,
  1051. Hs, W, read_count,
  1052. limited ? " (limited)" : "", fullnonce);
  1053. }
  1054. info->history_count++;
  1055. cgtime(&tv_history_finish);
  1056. timersub(&tv_history_finish, &tv_history_start, &tv_history_finish);
  1057. timeradd(&tv_history_finish, &(info->history_time), &(info->history_time));
  1058. }
  1059. out:
  1060. if (unlikely(state->identify))
  1061. handle_identify(thr, ret, was_first_run);
  1062. int hash_count_per_proc = hash_count / icarus->procs;
  1063. if (hash_count_per_proc > 0)
  1064. {
  1065. for_each_managed_proc(proc, icarus)
  1066. {
  1067. struct thr_info * const proc_thr = proc->thr[0];
  1068. hashes_done2(proc_thr, hash_count_per_proc, NULL);
  1069. hash_count -= hash_count_per_proc;
  1070. }
  1071. }
  1072. return hash_count;
  1073. }
  1074. static struct api_data *icarus_drv_stats(struct cgpu_info *cgpu)
  1075. {
  1076. struct api_data *root = NULL;
  1077. //use cgpu->device to handle multiple processors
  1078. struct ICARUS_INFO * const info = cgpu->device->device_data;
  1079. // Warning, access to these is not locked - but we don't really
  1080. // care since hashing performance is way more important than
  1081. // locking access to displaying API debug 'stats'
  1082. // If locking becomes an issue for any of them, use copy_data=true also
  1083. root = api_add_int(root, "read_count", &(info->read_count), false);
  1084. root = api_add_int(root, "read_count_limit", &(info->read_count_limit), false);
  1085. root = api_add_double(root, "fullnonce", &(info->fullnonce), false);
  1086. root = api_add_int(root, "count", &(info->count), false);
  1087. root = api_add_hs(root, "Hs", &(info->Hs), false);
  1088. root = api_add_double(root, "W", &(info->W), false);
  1089. root = api_add_uint(root, "total_values", &(info->values), false);
  1090. root = api_add_uint64(root, "range", &(info->hash_count_range), false);
  1091. root = api_add_uint64(root, "history_count", &(info->history_count), false);
  1092. root = api_add_timeval(root, "history_time", &(info->history_time), false);
  1093. root = api_add_uint(root, "min_data_count", &(info->min_data_count), false);
  1094. root = api_add_uint(root, "timing_values", &(info->history[0].values), false);
  1095. root = api_add_const(root, "timing_mode", timing_mode_str(info->timing_mode), false);
  1096. root = api_add_bool(root, "is_timing", &(info->do_icarus_timing), false);
  1097. root = api_add_int(root, "baud", &(info->baud), false);
  1098. root = api_add_int(root, "work_division", &(info->work_division), false);
  1099. root = api_add_int(root, "fpga_count", &(info->fpga_count), false);
  1100. return root;
  1101. }
  1102. const char *icarus_set_baud(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1103. {
  1104. struct ICARUS_INFO * const info = proc->device_data;
  1105. const int baud = atoi(newvalue);
  1106. if (!valid_baud(baud))
  1107. return "Invalid baud setting";
  1108. if (info->baud != baud)
  1109. {
  1110. info->baud = baud;
  1111. info->reopen_now = true;
  1112. }
  1113. return NULL;
  1114. }
  1115. static
  1116. const char *icarus_set_probe_timeout(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1117. {
  1118. struct ICARUS_INFO * const info = proc->device_data;
  1119. info->probe_read_count = atof(newvalue) * 10.0 / ICARUS_READ_FAULT_DECISECONDS;
  1120. return NULL;
  1121. }
  1122. const char *icarus_set_work_division(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1123. {
  1124. struct ICARUS_INFO * const info = proc->device_data;
  1125. const int work_division = atoi(newvalue);
  1126. if (!is_power_of_two(work_division))
  1127. return "Invalid work_division: must be a power of two";
  1128. if (info->user_set & IUS_FPGA_COUNT)
  1129. {
  1130. if (info->fpga_count > work_division)
  1131. return "work_division must be >= fpga_count";
  1132. }
  1133. else
  1134. info->fpga_count = work_division;
  1135. info->user_set |= IUS_WORK_DIVISION;
  1136. info->work_division = work_division;
  1137. info->nonce_mask = mask(work_division);
  1138. return NULL;
  1139. }
  1140. static
  1141. const char *icarus_set_fpga_count(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1142. {
  1143. struct ICARUS_INFO * const info = proc->device_data;
  1144. const int fpga_count = atoi(newvalue);
  1145. if (fpga_count < 1 || (fpga_count > info->work_division && info->work_division))
  1146. return "Invalid fpga_count: must be >0 and <=work_division";
  1147. info->fpga_count = fpga_count;
  1148. return NULL;
  1149. }
  1150. const char *icarus_set_reopen(struct cgpu_info * const proc, const char * const optname, const char * const newvalue, char * const replybuf, enum bfg_set_device_replytype * const out_success)
  1151. {
  1152. struct ICARUS_INFO * const info = proc->device_data;
  1153. if ((!strcasecmp(newvalue, "never")) || !strcasecmp(newvalue, "-r"))
  1154. info->reopen_mode = IRM_NEVER;
  1155. else
  1156. if (!strcasecmp(newvalue, "timeout"))
  1157. info->reopen_mode = IRM_TIMEOUT;
  1158. else
  1159. if ((!strcasecmp(newvalue, "cycle")) || !strcasecmp(newvalue, "r"))
  1160. info->reopen_mode = IRM_CYCLE;
  1161. else
  1162. if (!strcasecmp(newvalue, "now"))
  1163. info->reopen_now = true;
  1164. else
  1165. return "Invalid reopen mode";
  1166. return NULL;
  1167. }
  1168. static void icarus_shutdown(struct thr_info *thr)
  1169. {
  1170. do_icarus_close(thr);
  1171. free(thr->cgpu_data);
  1172. }
  1173. const struct bfg_set_device_definition icarus_set_device_funcs[] = {
  1174. // NOTE: Order of parameters below is important for --icarus-options
  1175. {"baud" , icarus_set_baud , "serial baud rate"},
  1176. {"work_division", icarus_set_work_division, "number of pieces work is split into"},
  1177. {"fpga_count" , icarus_set_fpga_count , "number of chips working on pieces"},
  1178. {"reopen" , icarus_set_reopen , "how often to reopen device: never, timeout, cycle, (or now for a one-shot reopen)"},
  1179. // NOTE: Below here, order is irrelevant
  1180. {"probe_timeout", icarus_set_probe_timeout},
  1181. {"timing" , icarus_set_timing , "timing of device; see README.FPGA"},
  1182. {NULL},
  1183. };
  1184. const struct bfg_set_device_definition icarus_set_device_funcs_live[] = {
  1185. {"baud" , icarus_set_baud , "serial baud rate"},
  1186. {"work_division", icarus_set_work_division, "number of pieces work is split into"},
  1187. {"reopen" , icarus_set_reopen , "how often to reopen device: never, timeout, cycle, (or now for a one-shot reopen)"},
  1188. {"timing" , icarus_set_timing , "timing of device; see README.FPGA"},
  1189. {NULL},
  1190. };
  1191. struct device_drv icarus_drv = {
  1192. .dname = "icarus",
  1193. .name = "ICA",
  1194. .probe_priority = -115,
  1195. .lowl_probe = icarus_lowl_probe,
  1196. .get_api_stats = icarus_drv_stats,
  1197. .thread_prepare = icarus_prepare,
  1198. .thread_init = icarus_init,
  1199. .scanhash = icarus_scanhash,
  1200. .job_prepare = icarus_job_prepare,
  1201. .thread_disable = close_device_fd,
  1202. .thread_shutdown = icarus_shutdown,
  1203. };