driver-icarus.c 33 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197
  1. /*
  2. * Copyright 2012-2013 Luke Dashjr
  3. * Copyright 2012 Xiangfu
  4. * Copyright 2012 Andrew Smith
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the Free
  8. * Software Foundation; either version 3 of the License, or (at your option)
  9. * any later version. See COPYING for more details.
  10. */
  11. /*
  12. * Those code should be works fine with V2 and V3 bitstream of Icarus.
  13. * Operation:
  14. * No detection implement.
  15. * Input: 64B = 32B midstate + 20B fill bytes + last 12 bytes of block head.
  16. * Return: send back 32bits immediately when Icarus found a valid nonce.
  17. * no query protocol implemented here, if no data send back in ~11.3
  18. * seconds (full cover time on 32bit nonce range by 380MH/s speed)
  19. * just send another work.
  20. * Notice:
  21. * 1. Icarus will start calculate when you push a work to them, even they
  22. * are busy.
  23. * 2. The 2 FPGAs on Icarus will distribute the job, one will calculate the
  24. * 0 ~ 7FFFFFFF, another one will cover the 80000000 ~ FFFFFFFF.
  25. * 3. It's possible for 2 FPGAs both find valid nonce in the meantime, the 2
  26. * valid nonce will all be send back.
  27. * 4. Icarus will stop work when: a valid nonce has been found or 32 bits
  28. * nonce range is completely calculated.
  29. */
  30. #include "config.h"
  31. #include "miner.h"
  32. #ifdef WIN32
  33. #include <winsock2.h>
  34. #endif
  35. #include <limits.h>
  36. #include <pthread.h>
  37. #include <stdio.h>
  38. #include <sys/time.h>
  39. #include <sys/types.h>
  40. #include <dirent.h>
  41. #include <unistd.h>
  42. #ifndef WIN32
  43. #include <termios.h>
  44. #include <sys/stat.h>
  45. #include <fcntl.h>
  46. #ifndef O_CLOEXEC
  47. #define O_CLOEXEC 0
  48. #endif
  49. #else
  50. #include <windows.h>
  51. #include <io.h>
  52. #endif
  53. #ifdef HAVE_SYS_EPOLL_H
  54. #include <sys/epoll.h>
  55. #define HAVE_EPOLL
  56. #endif
  57. #include "compat.h"
  58. #include "dynclock.h"
  59. #include "icarus-common.h"
  60. #include "fpgautils.h"
  61. // The serial I/O speed - Linux uses a define 'B115200' in bits/termios.h
  62. #define ICARUS_IO_SPEED 115200
  63. // The size of a successful nonce read
  64. #define ICARUS_READ_SIZE 4
  65. // Ensure the sizes are correct for the Serial read
  66. #if (ICARUS_READ_SIZE != 4)
  67. #error ICARUS_READ_SIZE must be 4
  68. #endif
  69. #define ASSERT1(condition) __maybe_unused static char sizeof_uint32_t_must_be_4[(condition)?1:-1]
  70. ASSERT1(sizeof(uint32_t) == 4);
  71. #define ICARUS_READ_TIME(baud) ((double)ICARUS_READ_SIZE * (double)8.0 / (double)(baud))
  72. // In timing mode: Default starting value until an estimate can be obtained
  73. // 5 seconds allows for up to a ~840MH/s device
  74. #define ICARUS_READ_COUNT_TIMING (5 * TIME_FACTOR)
  75. // For a standard Icarus REV3
  76. #define ICARUS_REV3_HASH_TIME 0.00000000264083
  77. // Icarus Rev3 doesn't send a completion message when it finishes
  78. // the full nonce range, so to avoid being idle we must abort the
  79. // work (by starting a new work) shortly before it finishes
  80. //
  81. // Thus we need to estimate 2 things:
  82. // 1) How many hashes were done if the work was aborted
  83. // 2) How high can the timeout be before the Icarus is idle,
  84. // to minimise the number of work started
  85. // We set 2) to 'the calculated estimate' - 1
  86. // to ensure the estimate ends before idle
  87. //
  88. // The simple calculation used is:
  89. // Tn = Total time in seconds to calculate n hashes
  90. // Hs = seconds per hash
  91. // Xn = number of hashes
  92. // W = code overhead per work
  93. //
  94. // Rough but reasonable estimate:
  95. // Tn = Hs * Xn + W (of the form y = mx + b)
  96. //
  97. // Thus:
  98. // Line of best fit (using least squares)
  99. //
  100. // Hs = (n*Sum(XiTi)-Sum(Xi)*Sum(Ti))/(n*Sum(Xi^2)-Sum(Xi)^2)
  101. // W = Sum(Ti)/n - (Hs*Sum(Xi))/n
  102. //
  103. // N.B. W is less when aborting work since we aren't waiting for the reply
  104. // to be transferred back (ICARUS_READ_TIME)
  105. // Calculating the hashes aborted at n seconds is thus just n/Hs
  106. // (though this is still a slight overestimate due to code delays)
  107. //
  108. // Both below must be exceeded to complete a set of data
  109. // Minimum how long after the first, the last data point must be
  110. #define HISTORY_SEC 60
  111. // Minimum how many points a single ICARUS_HISTORY should have
  112. #define MIN_DATA_COUNT 5
  113. // The value above used is doubled each history until it exceeds:
  114. #define MAX_MIN_DATA_COUNT 100
  115. #if (TIME_FACTOR != 10)
  116. #error TIME_FACTOR must be 10
  117. #endif
  118. static struct timeval history_sec = { HISTORY_SEC, 0 };
  119. static const char *MODE_DEFAULT_STR = "default";
  120. static const char *MODE_SHORT_STR = "short";
  121. static const char *MODE_LONG_STR = "long";
  122. static const char *MODE_VALUE_STR = "value";
  123. static const char *MODE_UNKNOWN_STR = "unknown";
  124. #define END_CONDITION 0x0000ffff
  125. #define DEFAULT_DETECT_THRESHOLD 1
  126. // Looking for options in --icarus-timing and --icarus-options:
  127. //
  128. // Code increments this each time we start to look at a device
  129. // However, this means that if other devices are checked by
  130. // the Icarus code (e.g. BFL) they will count in the option offset
  131. //
  132. // This, however, is deterministic so that's OK
  133. //
  134. // If we were to increment after successfully finding an Icarus
  135. // that would be random since an Icarus may fail and thus we'd
  136. // not be able to predict the option order
  137. //
  138. // This also assumes that serial_detect() checks them sequentially
  139. // and in the order specified on the command line
  140. //
  141. static int option_offset = -1;
  142. struct device_drv icarus_drv;
  143. extern void convert_icarus_to_cairnsmore(struct cgpu_info *);
  144. static void rev(unsigned char *s, size_t l)
  145. {
  146. size_t i, j;
  147. unsigned char t;
  148. for (i = 0, j = l - 1; i < j; i++, j--) {
  149. t = s[i];
  150. s[i] = s[j];
  151. s[j] = t;
  152. }
  153. }
  154. #define icarus_open2(devpath, baud, purge) serial_open(devpath, baud, ICARUS_READ_FAULT_DECISECONDS, purge)
  155. #define icarus_open(devpath, baud) icarus_open2(devpath, baud, false)
  156. #define ICA_GETS_ERROR -1
  157. #define ICA_GETS_OK 0
  158. #define ICA_GETS_RESTART 1
  159. #define ICA_GETS_TIMEOUT 2
  160. int icarus_gets(unsigned char *buf, int fd, struct timeval *tv_finish, struct thr_info *thr, int read_count)
  161. {
  162. ssize_t ret = 0;
  163. int rc = 0;
  164. int epollfd = -1;
  165. int epoll_timeout = ICARUS_READ_FAULT_DECISECONDS * 100;
  166. int read_amount = ICARUS_READ_SIZE;
  167. bool first = true;
  168. #ifdef HAVE_EPOLL
  169. struct epoll_event ev = {
  170. .events = EPOLLIN,
  171. .data.fd = fd,
  172. };
  173. struct epoll_event evr[2];
  174. if (thr && thr->work_restart_notifier[1] != -1) {
  175. epollfd = epoll_create(2);
  176. if (epollfd != -1) {
  177. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, fd, &ev)) {
  178. close(epollfd);
  179. epollfd = -1;
  180. }
  181. {
  182. ev.data.fd = thr->work_restart_notifier[0];
  183. if (-1 == epoll_ctl(epollfd, EPOLL_CTL_ADD, thr->work_restart_notifier[0], &ev))
  184. applog(LOG_ERR, "Icarus: Error adding work restart fd to epoll");
  185. else
  186. {
  187. epoll_timeout *= read_count;
  188. read_count = 1;
  189. }
  190. }
  191. }
  192. else
  193. applog(LOG_ERR, "Icarus: Error creating epoll");
  194. }
  195. #endif
  196. // Read reply 1 byte at a time to get earliest tv_finish
  197. while (true) {
  198. #ifdef HAVE_EPOLL
  199. if (epollfd != -1 && (ret = epoll_wait(epollfd, evr, 2, epoll_timeout)) != -1)
  200. {
  201. if (ret == 1 && evr[0].data.fd == fd)
  202. ret = read(fd, buf, 1);
  203. else
  204. {
  205. if (ret)
  206. notifier_read(thr->work_restart_notifier);
  207. ret = 0;
  208. }
  209. }
  210. else
  211. #endif
  212. ret = read(fd, buf, 1);
  213. if (ret < 0)
  214. return ICA_GETS_ERROR;
  215. if (first)
  216. cgtime(tv_finish);
  217. if (ret >= read_amount)
  218. {
  219. if (epollfd != -1)
  220. close(epollfd);
  221. return ICA_GETS_OK;
  222. }
  223. if (ret > 0) {
  224. buf += ret;
  225. read_amount -= ret;
  226. first = false;
  227. continue;
  228. }
  229. if (thr && thr->work_restart) {
  230. if (epollfd != -1)
  231. close(epollfd);
  232. if (opt_debug) {
  233. applog(LOG_DEBUG,
  234. "Icarus Read: Interrupted by work restart");
  235. }
  236. return ICA_GETS_RESTART;
  237. }
  238. rc++;
  239. if (rc >= read_count) {
  240. if (epollfd != -1)
  241. close(epollfd);
  242. if (opt_debug) {
  243. applog(LOG_DEBUG,
  244. "Icarus Read: No data in %.2f seconds",
  245. (float)rc * epoll_timeout / 1000.);
  246. }
  247. return ICA_GETS_TIMEOUT;
  248. }
  249. }
  250. }
  251. static int icarus_write(int fd, const void *buf, size_t bufLen)
  252. {
  253. size_t ret;
  254. ret = write(fd, buf, bufLen);
  255. if (unlikely(ret != bufLen))
  256. return 1;
  257. return 0;
  258. }
  259. #define icarus_close(fd) close(fd)
  260. static void do_icarus_close(struct thr_info *thr)
  261. {
  262. struct cgpu_info *icarus = thr->cgpu;
  263. icarus_close(icarus->device_fd);
  264. icarus->device_fd = -1;
  265. }
  266. static const char *timing_mode_str(enum timing_mode timing_mode)
  267. {
  268. switch(timing_mode) {
  269. case MODE_DEFAULT:
  270. return MODE_DEFAULT_STR;
  271. case MODE_SHORT:
  272. return MODE_SHORT_STR;
  273. case MODE_LONG:
  274. return MODE_LONG_STR;
  275. case MODE_VALUE:
  276. return MODE_VALUE_STR;
  277. default:
  278. return MODE_UNKNOWN_STR;
  279. }
  280. }
  281. static void set_timing_mode(int this_option_offset, struct cgpu_info *icarus)
  282. {
  283. struct ICARUS_INFO *info = icarus->device_data;
  284. double Hs;
  285. char buf[BUFSIZ+1];
  286. char *ptr, *comma, *eq;
  287. size_t max;
  288. int i;
  289. if (opt_icarus_timing == NULL)
  290. buf[0] = '\0';
  291. else {
  292. ptr = opt_icarus_timing;
  293. for (i = 0; i < this_option_offset; i++) {
  294. comma = strchr(ptr, ',');
  295. if (comma == NULL)
  296. break;
  297. ptr = comma + 1;
  298. }
  299. comma = strchr(ptr, ',');
  300. if (comma == NULL)
  301. max = strlen(ptr);
  302. else
  303. max = comma - ptr;
  304. if (max > BUFSIZ)
  305. max = BUFSIZ;
  306. strncpy(buf, ptr, max);
  307. buf[max] = '\0';
  308. }
  309. info->read_count = 0;
  310. if (strcasecmp(buf, MODE_SHORT_STR) == 0) {
  311. info->read_count = ICARUS_READ_COUNT_TIMING;
  312. info->timing_mode = MODE_SHORT;
  313. info->do_icarus_timing = true;
  314. } else if (strcasecmp(buf, MODE_LONG_STR) == 0) {
  315. info->read_count = ICARUS_READ_COUNT_TIMING;
  316. info->timing_mode = MODE_LONG;
  317. info->do_icarus_timing = true;
  318. } else if ((Hs = atof(buf)) != 0) {
  319. info->Hs = Hs / NANOSEC;
  320. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  321. if ((eq = strchr(buf, '=')) != NULL)
  322. info->read_count = atoi(eq+1);
  323. if (info->read_count < 1)
  324. info->read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  325. if (unlikely(info->read_count < 1))
  326. info->read_count = 1;
  327. info->timing_mode = MODE_VALUE;
  328. info->do_icarus_timing = false;
  329. } else {
  330. // Anything else in buf just uses DEFAULT mode
  331. info->fullnonce = info->Hs * (((double)0xffffffff) + 1);
  332. if ((eq = strchr(buf, '=')) != NULL)
  333. info->read_count = atoi(eq+1);
  334. int def_read_count = ICARUS_READ_COUNT_TIMING;
  335. if (info->timing_mode == MODE_DEFAULT) {
  336. if (icarus->drv == &icarus_drv) {
  337. info->do_default_detection = 0x10;
  338. } else {
  339. def_read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  340. }
  341. info->do_icarus_timing = false;
  342. }
  343. if (info->read_count < 1)
  344. info->read_count = def_read_count;
  345. }
  346. info->min_data_count = MIN_DATA_COUNT;
  347. applog(LOG_DEBUG, "%"PRIpreprv": Init: mode=%s read_count=%d Hs=%e",
  348. icarus->proc_repr,
  349. timing_mode_str(info->timing_mode), info->read_count, info->Hs);
  350. }
  351. static uint32_t mask(int work_division)
  352. {
  353. uint32_t nonce_mask = 0x7fffffff;
  354. // yes we can calculate these, but this way it's easy to see what they are
  355. switch (work_division) {
  356. case 1:
  357. nonce_mask = 0xffffffff;
  358. break;
  359. case 2:
  360. nonce_mask = 0x7fffffff;
  361. break;
  362. case 4:
  363. nonce_mask = 0x3fffffff;
  364. break;
  365. case 8:
  366. nonce_mask = 0x1fffffff;
  367. break;
  368. default:
  369. quit(1, "Invalid2 icarus-options for work_division (%d) must be 1, 2, 4 or 8", work_division);
  370. }
  371. return nonce_mask;
  372. }
  373. static void get_options(int this_option_offset, struct ICARUS_INFO *info)
  374. {
  375. int *baud = &info->baud;
  376. int *work_division = &info->work_division;
  377. int *fpga_count = &info->fpga_count;
  378. char buf[BUFSIZ+1];
  379. char *ptr, *comma, *colon, *colon2;
  380. size_t max;
  381. int i, tmp;
  382. if (opt_icarus_options == NULL)
  383. buf[0] = '\0';
  384. else {
  385. ptr = opt_icarus_options;
  386. for (i = 0; i < this_option_offset; i++) {
  387. comma = strchr(ptr, ',');
  388. if (comma == NULL)
  389. break;
  390. ptr = comma + 1;
  391. }
  392. comma = strchr(ptr, ',');
  393. if (comma == NULL)
  394. max = strlen(ptr);
  395. else
  396. max = comma - ptr;
  397. if (max > BUFSIZ)
  398. max = BUFSIZ;
  399. strncpy(buf, ptr, max);
  400. buf[max] = '\0';
  401. }
  402. if (*buf) {
  403. colon = strchr(buf, ':');
  404. if (colon)
  405. *(colon++) = '\0';
  406. if (*buf) {
  407. tmp = atoi(buf);
  408. if (!valid_baud(*baud = tmp))
  409. quit(1, "Invalid icarus-options for baud (%s)", buf);
  410. }
  411. if (colon && *colon) {
  412. colon2 = strchr(colon, ':');
  413. if (colon2)
  414. *(colon2++) = '\0';
  415. if (*colon) {
  416. info->user_set |= 1;
  417. tmp = atoi(colon);
  418. if (tmp == 1 || tmp == 2 || tmp == 4 || tmp == 8) {
  419. *work_division = tmp;
  420. *fpga_count = tmp; // default to the same
  421. } else {
  422. quit(1, "Invalid icarus-options for work_division (%s) must be 1, 2, 4 or 8", colon);
  423. }
  424. }
  425. if (colon2 && *colon2) {
  426. colon = strchr(colon2, ':');
  427. if (colon)
  428. *(colon++) = '\0';
  429. if (*colon2) {
  430. info->user_set |= 2;
  431. tmp = atoi(colon2);
  432. if (tmp > 0 && tmp <= *work_division)
  433. *fpga_count = tmp;
  434. else {
  435. quit(1, "Invalid icarus-options for fpga_count (%s) must be >0 and <=work_division (%d)", colon2, *work_division);
  436. }
  437. }
  438. if (colon && *colon) {
  439. colon2 = strchr(colon, '-') ?: "";
  440. if (*colon2)
  441. *(colon2++) = '\0';
  442. if (strchr(colon, 'r'))
  443. info->quirk_reopen = 2;
  444. if (strchr(colon2, 'r'))
  445. info->quirk_reopen = 0;
  446. }
  447. }
  448. }
  449. }
  450. }
  451. bool icarus_detect_custom(const char *devpath, struct device_drv *api, struct ICARUS_INFO *info)
  452. {
  453. int this_option_offset = ++option_offset;
  454. struct timeval tv_start, tv_finish;
  455. int fd;
  456. // Block 171874 nonce = (0xa2870100) = 0x000187a2
  457. // N.B. golden_ob MUST take less time to calculate
  458. // than the timeout set in icarus_open()
  459. // This one takes ~0.53ms on Rev3 Icarus
  460. const char golden_ob[] =
  461. "4679ba4ec99876bf4bfe086082b40025"
  462. "4df6c356451471139a3afa71e48f544a"
  463. "00000000000000000000000000000000"
  464. "0000000087320b1a1426674f2fa722ce";
  465. /* NOTE: This gets sent to basically every port specified in --scan-serial,
  466. * even ones that aren't Icarus; be sure they can all handle it, when
  467. * this is changed...
  468. * BitForce: Ignores entirely
  469. * ModMiner: Starts (useless) work, gets back to clean state
  470. */
  471. const char golden_nonce[] = "000187a2";
  472. unsigned char ob_bin[64], nonce_bin[ICARUS_READ_SIZE];
  473. char nonce_hex[(sizeof(nonce_bin) * 2) + 1];
  474. get_options(this_option_offset, info);
  475. int baud = info->baud;
  476. int work_division = info->work_division;
  477. int fpga_count = info->fpga_count;
  478. applog(LOG_DEBUG, "Icarus Detect: Attempting to open %s", devpath);
  479. fd = icarus_open2(devpath, baud, true);
  480. if (unlikely(fd == -1)) {
  481. applog(LOG_DEBUG, "Icarus Detect: Failed to open %s", devpath);
  482. return false;
  483. }
  484. hex2bin(ob_bin, golden_ob, sizeof(ob_bin));
  485. icarus_write(fd, ob_bin, sizeof(ob_bin));
  486. cgtime(&tv_start);
  487. memset(nonce_bin, 0, sizeof(nonce_bin));
  488. icarus_gets(nonce_bin, fd, &tv_finish, NULL, 1);
  489. icarus_close(fd);
  490. bin2hex(nonce_hex, nonce_bin, sizeof(nonce_bin));
  491. if (strncmp(nonce_hex, golden_nonce, 8)) {
  492. applog(LOG_DEBUG,
  493. "Icarus Detect: "
  494. "Test failed at %s: get %s, should: %s",
  495. devpath, nonce_hex, golden_nonce);
  496. return false;
  497. }
  498. applog(LOG_DEBUG,
  499. "Icarus Detect: "
  500. "Test succeeded at %s: got %s",
  501. devpath, nonce_hex);
  502. if (serial_claim_v(devpath, api))
  503. return false;
  504. /* We have a real Icarus! */
  505. struct cgpu_info *icarus;
  506. icarus = calloc(1, sizeof(struct cgpu_info));
  507. icarus->drv = api;
  508. icarus->device_path = strdup(devpath);
  509. icarus->device_fd = -1;
  510. icarus->threads = 1;
  511. add_cgpu(icarus);
  512. applog(LOG_INFO, "Found %"PRIpreprv" at %s",
  513. icarus->proc_repr,
  514. devpath);
  515. applog(LOG_DEBUG, "%"PRIpreprv": Init: baud=%d work_division=%d fpga_count=%d",
  516. icarus->proc_repr,
  517. baud, work_division, fpga_count);
  518. icarus->device_data = info;
  519. timersub(&tv_finish, &tv_start, &(info->golden_tv));
  520. set_timing_mode(this_option_offset, icarus);
  521. return true;
  522. }
  523. static bool icarus_detect_one(const char *devpath)
  524. {
  525. struct ICARUS_INFO *info = calloc(1, sizeof(struct ICARUS_INFO));
  526. if (unlikely(!info))
  527. quit(1, "Failed to malloc ICARUS_INFO");
  528. // TODO: try some higher speeds with the Icarus and BFL to see
  529. // if they support them and if setting them makes any difference
  530. // N.B. B3000000 doesn't work on Icarus
  531. info->baud = ICARUS_IO_SPEED;
  532. info->quirk_reopen = 1;
  533. info->Hs = ICARUS_REV3_HASH_TIME;
  534. info->timing_mode = MODE_DEFAULT;
  535. if (!icarus_detect_custom(devpath, &icarus_drv, info)) {
  536. free(info);
  537. return false;
  538. }
  539. return true;
  540. }
  541. static void icarus_detect()
  542. {
  543. serial_detect(&icarus_drv, icarus_detect_one);
  544. }
  545. static bool icarus_prepare(struct thr_info *thr)
  546. {
  547. struct cgpu_info *icarus = thr->cgpu;
  548. struct ICARUS_INFO *info = icarus->device_data;
  549. icarus->device_fd = -1;
  550. int fd = icarus_open2(icarus->device_path, info->baud, true);
  551. if (unlikely(-1 == fd)) {
  552. applog(LOG_ERR, "Failed to open Icarus on %s",
  553. icarus->device_path);
  554. return false;
  555. }
  556. icarus->device_fd = fd;
  557. applog(LOG_INFO, "Opened Icarus on %s", icarus->device_path);
  558. get_now_datestamp(icarus->init);
  559. struct icarus_state *state;
  560. thr->cgpu_data = state = calloc(1, sizeof(*state));
  561. state->firstrun = true;
  562. #ifdef HAVE_EPOLL
  563. int epollfd = epoll_create(2);
  564. if (epollfd != -1)
  565. {
  566. close(epollfd);
  567. notifier_init(thr->work_restart_notifier);
  568. }
  569. #endif
  570. icarus->status = LIFE_INIT2;
  571. return true;
  572. }
  573. static bool icarus_init(struct thr_info *thr)
  574. {
  575. struct cgpu_info *icarus = thr->cgpu;
  576. struct ICARUS_INFO *info = icarus->device_data;
  577. int fd = icarus->device_fd;
  578. if (!info->work_division)
  579. {
  580. struct timeval tv_finish;
  581. uint32_t res;
  582. applog(LOG_DEBUG, "%"PRIpreprv": Work division not specified - autodetecting", icarus->proc_repr);
  583. // Special packet to probe work_division
  584. unsigned char pkt[64] =
  585. "\x2e\x4c\x8f\x91\xfd\x59\x5d\x2d\x7e\xa2\x0a\xaa\xcb\x64\xa2\xa0"
  586. "\x43\x82\x86\x02\x77\xcf\x26\xb6\xa1\xee\x04\xc5\x6a\x5b\x50\x4a"
  587. "BFGMiner Probe\0\0"
  588. "BFG\0\x64\x61\x01\x1a\xc9\x06\xa9\x51\xfb\x9b\x3c\x73";
  589. icarus_write(fd, pkt, sizeof(pkt));
  590. if (ICA_GETS_OK == icarus_gets((unsigned char*)&res, fd, &tv_finish, NULL, info->read_count))
  591. res = be32toh(res);
  592. else
  593. res = 0;
  594. switch (res) {
  595. case 0x04C0FDB4:
  596. info->work_division = 1;
  597. break;
  598. case 0x82540E46:
  599. info->work_division = 2;
  600. break;
  601. case 0x417C0F36:
  602. info->work_division = 4;
  603. break;
  604. case 0x60C994D5:
  605. info->work_division = 8;
  606. break;
  607. default:
  608. applog(LOG_ERR, "%"PRIpreprv": Work division autodetection failed (assuming 2): got %08x", icarus->proc_repr, res);
  609. info->work_division = 2;
  610. }
  611. applog(LOG_DEBUG, "%"PRIpreprv": Work division autodetection got %08x (=%d)", icarus->proc_repr, res, info->work_division);
  612. }
  613. if (!info->fpga_count)
  614. info->fpga_count = info->work_division;
  615. info->nonce_mask = mask(info->work_division);
  616. return true;
  617. }
  618. static bool icarus_reopen(struct cgpu_info *icarus, struct icarus_state *state, int *fdp)
  619. {
  620. struct ICARUS_INFO *info = icarus->device_data;
  621. // Reopen the serial port to workaround a USB-host-chipset-specific issue with the Icarus's buggy USB-UART
  622. icarus_close(icarus->device_fd);
  623. *fdp = icarus->device_fd = icarus_open(icarus->device_path, info->baud);
  624. if (unlikely(-1 == *fdp)) {
  625. applog(LOG_ERR, "%"PRIpreprv": Failed to reopen on %s", icarus->proc_repr, icarus->device_path);
  626. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  627. state->firstrun = true;
  628. return false;
  629. }
  630. return true;
  631. }
  632. static
  633. bool icarus_job_prepare(struct thr_info *thr, struct work *work, __maybe_unused uint64_t max_nonce)
  634. {
  635. struct cgpu_info * const icarus = thr->cgpu;
  636. struct icarus_state * const state = thr->cgpu_data;
  637. uint8_t * const ob_bin = state->ob_bin;
  638. memcpy(ob_bin, work->midstate, 32);
  639. memcpy(ob_bin + 52, work->data + 64, 12);
  640. if (!(memcmp(&ob_bin[56], "\xff\xff\xff\xff", 4)
  641. || memcmp(&ob_bin, "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0", 32))) {
  642. // This sequence is used on cairnsmore bitstreams for commands, NEVER send it otherwise
  643. applog(LOG_WARNING, "%"PRIpreprv": Received job attempting to send a command, corrupting it!",
  644. icarus->proc_repr);
  645. ob_bin[56] = 0;
  646. }
  647. rev(ob_bin, 32);
  648. rev(ob_bin + 52, 12);
  649. return true;
  650. }
  651. static bool icarus_job_start(struct thr_info *thr)
  652. {
  653. struct cgpu_info *icarus = thr->cgpu;
  654. struct ICARUS_INFO *info = icarus->device_data;
  655. struct icarus_state *state = thr->cgpu_data;
  656. const uint8_t * const ob_bin = state->ob_bin;
  657. int fd = icarus->device_fd;
  658. int ret;
  659. // Handle dynamic clocking for "subclass" devices
  660. // This needs to run before sending next job, since it hashes the command too
  661. if (info->dclk.freqM && likely(!state->firstrun)) {
  662. dclk_preUpdate(&info->dclk);
  663. dclk_updateFreq(&info->dclk, info->dclk_change_clock_func, thr);
  664. }
  665. cgtime(&state->tv_workstart);
  666. ret = icarus_write(fd, ob_bin, 64);
  667. if (ret) {
  668. do_icarus_close(thr);
  669. applog(LOG_ERR, "%"PRIpreprv": Comms error (werr=%d)", icarus->proc_repr, ret);
  670. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  671. return false; /* This should never happen */
  672. }
  673. if (opt_debug) {
  674. char ob_hex[129];
  675. bin2hex(ob_hex, ob_bin, 64);
  676. applog(LOG_DEBUG, "%"PRIpreprv" sent: %s",
  677. icarus->proc_repr,
  678. ob_hex);
  679. }
  680. return true;
  681. }
  682. static int64_t icarus_scanhash(struct thr_info *thr, struct work *work,
  683. __maybe_unused int64_t max_nonce)
  684. {
  685. struct cgpu_info *icarus;
  686. int fd;
  687. int ret;
  688. struct ICARUS_INFO *info;
  689. unsigned char nonce_bin[ICARUS_READ_SIZE] = {0};
  690. uint32_t nonce;
  691. int64_t hash_count;
  692. struct timeval tv_start, elapsed;
  693. struct timeval tv_history_start, tv_history_finish;
  694. double Ti, Xi;
  695. int curr_hw_errors, i;
  696. bool was_hw_error;
  697. bool was_first_run;
  698. struct ICARUS_HISTORY *history0, *history;
  699. int count;
  700. double Hs, W, fullnonce;
  701. int read_count;
  702. int64_t estimate_hashes;
  703. uint32_t values;
  704. int64_t hash_count_range;
  705. elapsed.tv_sec = elapsed.tv_usec = 0;
  706. icarus = thr->cgpu;
  707. struct icarus_state *state = thr->cgpu_data;
  708. was_first_run = state->firstrun;
  709. icarus_job_prepare(thr, work, max_nonce);
  710. // Wait for the previous run's result
  711. fd = icarus->device_fd;
  712. info = icarus->device_data;
  713. if (!state->firstrun) {
  714. if (state->changework)
  715. {
  716. state->changework = false;
  717. ret = ICA_GETS_RESTART;
  718. }
  719. else
  720. {
  721. /* Icarus will return 4 bytes (ICARUS_READ_SIZE) nonces or nothing */
  722. ret = icarus_gets(nonce_bin, fd, &state->tv_workfinish, thr, info->read_count);
  723. switch (ret) {
  724. case ICA_GETS_RESTART:
  725. // The prepared work is invalid, and the current work is abandoned
  726. // Go back to the main loop to get the next work, and stuff
  727. // Returning to the main loop will clear work_restart, so use a flag...
  728. state->changework = true;
  729. return 0;
  730. case ICA_GETS_ERROR:
  731. do_icarus_close(thr);
  732. applog(LOG_ERR, "%"PRIpreprv": Comms error (rerr)", icarus->proc_repr);
  733. dev_error(icarus, REASON_DEV_COMMS_ERROR);
  734. if (!icarus_reopen(icarus, state, &fd))
  735. return -1;
  736. break;
  737. case ICA_GETS_TIMEOUT:
  738. if (info->quirk_reopen == 1 && !icarus_reopen(icarus, state, &fd))
  739. return -1;
  740. case ICA_GETS_OK:
  741. break;
  742. }
  743. }
  744. tv_start = state->tv_workstart;
  745. timersub(&state->tv_workfinish, &tv_start, &elapsed);
  746. }
  747. else
  748. if (fd == -1 && !icarus_reopen(icarus, state, &fd))
  749. return -1;
  750. #ifndef WIN32
  751. tcflush(fd, TCOFLUSH);
  752. #endif
  753. memcpy(&nonce, nonce_bin, sizeof(nonce_bin));
  754. nonce = be32toh(nonce);
  755. // Handle dynamic clocking for "subclass" devices
  756. // This needs to run before sending next job, since it hashes the command too
  757. if (info->dclk.freqM && likely(!was_first_run)) {
  758. int qsec = ((4 * elapsed.tv_sec) + (elapsed.tv_usec / 250000)) ?: 1;
  759. for (int n = qsec; n; --n)
  760. dclk_gotNonces(&info->dclk);
  761. if (nonce && !test_nonce(&state->last_work, nonce, false))
  762. dclk_errorCount(&info->dclk, qsec);
  763. }
  764. if (unlikely(state->identify))
  765. {
  766. // Delay job start until later...
  767. }
  768. else
  769. if (!icarus_job_start(thr))
  770. /* This should never happen */
  771. state->firstrun = true;
  772. if (info->quirk_reopen == 2 && !icarus_reopen(icarus, state, &fd))
  773. state->firstrun = true;
  774. work->blk.nonce = 0xffffffff;
  775. if (was_first_run) {
  776. state->firstrun = false;
  777. __copy_work(&state->last_work, work);
  778. return 0;
  779. }
  780. // OK, done starting Icarus's next job... now process the last run's result!
  781. // aborted before becoming idle, get new work
  782. if (ret == ICA_GETS_TIMEOUT || ret == ICA_GETS_RESTART) {
  783. __copy_work(&state->last_work, work);
  784. // ONLY up to just when it aborted
  785. // We didn't read a reply so we don't subtract ICARUS_READ_TIME
  786. estimate_hashes = ((double)(elapsed.tv_sec)
  787. + ((double)(elapsed.tv_usec))/((double)1000000)) / info->Hs;
  788. // If some Serial-USB delay allowed the full nonce range to
  789. // complete it can't have done more than a full nonce
  790. if (unlikely(estimate_hashes > 0xffffffff))
  791. estimate_hashes = 0xffffffff;
  792. if (opt_debug) {
  793. applog(LOG_DEBUG, "%"PRIpreprv" no nonce = 0x%08"PRIx64" hashes (%"PRId64".%06lus)",
  794. icarus->proc_repr,
  795. (uint64_t)estimate_hashes,
  796. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  797. }
  798. return estimate_hashes;
  799. }
  800. curr_hw_errors = icarus->hw_errors;
  801. submit_nonce(thr, &state->last_work, nonce);
  802. was_hw_error = (curr_hw_errors > icarus->hw_errors);
  803. __copy_work(&state->last_work, work);
  804. // Force a USB close/reopen on any hw error
  805. if (was_hw_error)
  806. if (info->quirk_reopen != 2) {
  807. if (!icarus_reopen(icarus, state, &fd))
  808. state->firstrun = true;
  809. // Some devices (Cairnsmore1, for example) abort hashing when reopened, so send the job again
  810. if (!icarus_job_start(thr))
  811. state->firstrun = true;
  812. }
  813. hash_count = (nonce & info->nonce_mask);
  814. hash_count++;
  815. hash_count *= info->fpga_count;
  816. if (opt_debug) {
  817. applog(LOG_DEBUG, "%"PRIpreprv" nonce = 0x%08x = 0x%08" PRIx64 " hashes (%"PRId64".%06lus)",
  818. icarus->proc_repr,
  819. nonce,
  820. (uint64_t)hash_count,
  821. (int64_t)elapsed.tv_sec, (unsigned long)elapsed.tv_usec);
  822. }
  823. if (info->do_default_detection && elapsed.tv_sec >= DEFAULT_DETECT_THRESHOLD) {
  824. int MHs = (double)hash_count / ((double)elapsed.tv_sec * 1e6 + (double)elapsed.tv_usec);
  825. --info->do_default_detection;
  826. applog(LOG_DEBUG, "%"PRIpreprv": Autodetect device speed: %d MH/s", icarus->proc_repr, MHs);
  827. if (MHs <= 370 || MHs > 420) {
  828. // Not a real Icarus: enable short timing
  829. applog(LOG_WARNING, "%"PRIpreprv": Seems too %s to be an Icarus; calibrating with short timing", icarus->proc_repr, MHs>380?"fast":"slow");
  830. info->timing_mode = MODE_SHORT;
  831. info->do_icarus_timing = true;
  832. info->do_default_detection = 0;
  833. }
  834. else
  835. if (MHs <= 380) {
  836. // Real Icarus?
  837. if (!info->do_default_detection) {
  838. applog(LOG_DEBUG, "%"PRIpreprv": Seems to be a real Icarus", icarus->proc_repr);
  839. info->read_count = (int)(info->fullnonce * TIME_FACTOR) - 1;
  840. }
  841. }
  842. else
  843. if (MHs <= 420) {
  844. // Enterpoint Cairnsmore1
  845. size_t old_repr_len = strlen(icarus->proc_repr);
  846. char old_repr[old_repr_len + 1];
  847. strcpy(old_repr, icarus->proc_repr);
  848. convert_icarus_to_cairnsmore(icarus);
  849. info->do_default_detection = 0;
  850. applog(LOG_WARNING, "%"PRIpreprv": Detected Cairnsmore1 device, upgrading driver to %"PRIpreprv, old_repr, icarus->proc_repr);
  851. }
  852. }
  853. // ignore possible end condition values ... and hw errors
  854. if (info->do_icarus_timing
  855. && !was_hw_error
  856. && ((nonce & info->nonce_mask) > END_CONDITION)
  857. && ((nonce & info->nonce_mask) < (info->nonce_mask & ~END_CONDITION))) {
  858. cgtime(&tv_history_start);
  859. history0 = &(info->history[0]);
  860. if (history0->values == 0)
  861. timeradd(&tv_start, &history_sec, &(history0->finish));
  862. Ti = (double)(elapsed.tv_sec)
  863. + ((double)(elapsed.tv_usec))/((double)1000000)
  864. - ((double)ICARUS_READ_TIME(info->baud));
  865. Xi = (double)hash_count;
  866. history0->sumXiTi += Xi * Ti;
  867. history0->sumXi += Xi;
  868. history0->sumTi += Ti;
  869. history0->sumXi2 += Xi * Xi;
  870. history0->values++;
  871. if (history0->hash_count_max < hash_count)
  872. history0->hash_count_max = hash_count;
  873. if (history0->hash_count_min > hash_count || history0->hash_count_min == 0)
  874. history0->hash_count_min = hash_count;
  875. if (history0->values >= info->min_data_count
  876. && timercmp(&tv_start, &(history0->finish), >)) {
  877. for (i = INFO_HISTORY; i > 0; i--)
  878. memcpy(&(info->history[i]),
  879. &(info->history[i-1]),
  880. sizeof(struct ICARUS_HISTORY));
  881. // Initialise history0 to zero for summary calculation
  882. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  883. // We just completed a history data set
  884. // So now recalc read_count based on the whole history thus we will
  885. // initially get more accurate until it completes INFO_HISTORY
  886. // total data sets
  887. count = 0;
  888. for (i = 1 ; i <= INFO_HISTORY; i++) {
  889. history = &(info->history[i]);
  890. if (history->values >= MIN_DATA_COUNT) {
  891. count++;
  892. history0->sumXiTi += history->sumXiTi;
  893. history0->sumXi += history->sumXi;
  894. history0->sumTi += history->sumTi;
  895. history0->sumXi2 += history->sumXi2;
  896. history0->values += history->values;
  897. if (history0->hash_count_max < history->hash_count_max)
  898. history0->hash_count_max = history->hash_count_max;
  899. if (history0->hash_count_min > history->hash_count_min || history0->hash_count_min == 0)
  900. history0->hash_count_min = history->hash_count_min;
  901. }
  902. }
  903. // All history data
  904. Hs = (history0->values*history0->sumXiTi - history0->sumXi*history0->sumTi)
  905. / (history0->values*history0->sumXi2 - history0->sumXi*history0->sumXi);
  906. W = history0->sumTi/history0->values - Hs*history0->sumXi/history0->values;
  907. hash_count_range = history0->hash_count_max - history0->hash_count_min;
  908. values = history0->values;
  909. // Initialise history0 to zero for next data set
  910. memset(history0, 0, sizeof(struct ICARUS_HISTORY));
  911. fullnonce = W + Hs * (((double)0xffffffff) + 1);
  912. read_count = (int)(fullnonce * TIME_FACTOR) - 1;
  913. info->Hs = Hs;
  914. info->read_count = read_count;
  915. info->fullnonce = fullnonce;
  916. info->count = count;
  917. info->W = W;
  918. info->values = values;
  919. info->hash_count_range = hash_count_range;
  920. if (info->min_data_count < MAX_MIN_DATA_COUNT)
  921. info->min_data_count *= 2;
  922. else if (info->timing_mode == MODE_SHORT)
  923. info->do_icarus_timing = false;
  924. // applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: read_count=%d fullnonce=%fs history count=%d Hs=%e W=%e values=%d hash range=0x%08lx min data count=%u", icarus->proc_repr, read_count, fullnonce, count, Hs, W, values, hash_count_range, info->min_data_count);
  925. applog(LOG_DEBUG, "%"PRIpreprv" Re-estimate: Hs=%e W=%e read_count=%d fullnonce=%.3fs",
  926. icarus->proc_repr,
  927. Hs, W, read_count, fullnonce);
  928. }
  929. info->history_count++;
  930. cgtime(&tv_history_finish);
  931. timersub(&tv_history_finish, &tv_history_start, &tv_history_finish);
  932. timeradd(&tv_history_finish, &(info->history_time), &(info->history_time));
  933. }
  934. if (unlikely(state->identify))
  935. {
  936. struct timeval tv_now;
  937. double delapsed;
  938. // If identify is requested (block erupters):
  939. // 1. Don't start the next job right away (above)
  940. // 2. Wait for the current job to complete 100%
  941. if (!was_first_run)
  942. {
  943. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Waiting for current job to finish", icarus->proc_repr);
  944. while (true)
  945. {
  946. cgtime(&tv_now);
  947. delapsed = tdiff(&tv_now, &state->tv_workstart);
  948. if (delapsed + 0.1 > info->fullnonce)
  949. break;
  950. // Try to get more nonces (ignoring work restart)
  951. ret = icarus_gets(nonce_bin, fd, &tv_now, NULL, (info->fullnonce - delapsed) * 10);
  952. if (ret == ICA_GETS_OK)
  953. {
  954. nonce = be32toh(*(uint32_t*)&nonce_bin[0]);
  955. submit_nonce(thr, &state->last_work, nonce);
  956. }
  957. }
  958. }
  959. else
  960. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Current job should already be finished", icarus->proc_repr);
  961. // 3. Delay 3 more seconds
  962. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Leaving idle for 3 seconds", icarus->proc_repr);
  963. nmsleep(3000);
  964. // 4. Start next job
  965. applog(LOG_DEBUG, "%"PRIpreprv": Identify: Starting next job", icarus->proc_repr);
  966. if (!icarus_job_start(thr))
  967. state->firstrun = true;
  968. state->identify = false;
  969. }
  970. return hash_count;
  971. }
  972. static struct api_data *icarus_drv_stats(struct cgpu_info *cgpu)
  973. {
  974. struct api_data *root = NULL;
  975. struct ICARUS_INFO *info = cgpu->device_data;
  976. // Warning, access to these is not locked - but we don't really
  977. // care since hashing performance is way more important than
  978. // locking access to displaying API debug 'stats'
  979. // If locking becomes an issue for any of them, use copy_data=true also
  980. root = api_add_int(root, "read_count", &(info->read_count), false);
  981. root = api_add_double(root, "fullnonce", &(info->fullnonce), false);
  982. root = api_add_int(root, "count", &(info->count), false);
  983. root = api_add_hs(root, "Hs", &(info->Hs), false);
  984. root = api_add_double(root, "W", &(info->W), false);
  985. root = api_add_uint(root, "total_values", &(info->values), false);
  986. root = api_add_uint64(root, "range", &(info->hash_count_range), false);
  987. root = api_add_uint64(root, "history_count", &(info->history_count), false);
  988. root = api_add_timeval(root, "history_time", &(info->history_time), false);
  989. root = api_add_uint(root, "min_data_count", &(info->min_data_count), false);
  990. root = api_add_uint(root, "timing_values", &(info->history[0].values), false);
  991. root = api_add_const(root, "timing_mode", timing_mode_str(info->timing_mode), false);
  992. root = api_add_bool(root, "is_timing", &(info->do_icarus_timing), false);
  993. root = api_add_int(root, "baud", &(info->baud), false);
  994. root = api_add_int(root, "work_division", &(info->work_division), false);
  995. root = api_add_int(root, "fpga_count", &(info->fpga_count), false);
  996. return root;
  997. }
  998. static void icarus_shutdown(struct thr_info *thr)
  999. {
  1000. do_icarus_close(thr);
  1001. free(thr->cgpu_data);
  1002. }
  1003. struct device_drv icarus_drv = {
  1004. .dname = "icarus",
  1005. .name = "ICA",
  1006. .drv_detect = icarus_detect,
  1007. .get_api_stats = icarus_drv_stats,
  1008. .thread_prepare = icarus_prepare,
  1009. .thread_init = icarus_init,
  1010. .scanhash = icarus_scanhash,
  1011. .thread_shutdown = icarus_shutdown,
  1012. };