libbitfury.c 19 KB

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  1. /*
  2. * Copyright 2013 bitfury
  3. * Copyright 2013 Anatoly Legkodymov
  4. * Copyright 2013 Luke Dashjr
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a copy
  7. * of this software and associated documentation files (the "Software"), to deal
  8. * in the Software without restriction, including without limitation the rights
  9. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10. * copies of the Software, and to permit persons to whom the Software is
  11. * furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  19. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22. * THE SOFTWARE.
  23. */
  24. #include "config.h"
  25. #include <stdbool.h>
  26. #include <stdint.h>
  27. #include <stdio.h>
  28. #include <unistd.h>
  29. #include <string.h>
  30. #include "logging.h"
  31. #include "miner.h"
  32. #include "libbitfury.h"
  33. #include "spidevc.h"
  34. #include "sha2.h"
  35. #include <time.h>
  36. #define BITFURY_REFRESH_DELAY 100
  37. #define BITFURY_DETECT_TRIES 3000 / BITFURY_REFRESH_DELAY
  38. unsigned bitfury_decnonce(unsigned in);
  39. /* Configuration registers - control oscillators and such stuff. PROGRAMMED when magic number is matches, UNPROGRAMMED (default) otherwise */
  40. void config_reg(struct spi_port *port, int cfgreg, int ena)
  41. {
  42. static const uint8_t enaconf[4] = { 0xc1, 0x6a, 0x59, 0xe3 };
  43. static const uint8_t disconf[4] = { 0, 0, 0, 0 };
  44. if (ena) spi_emit_data(port, 0x7000+cfgreg*32, enaconf, 4);
  45. else spi_emit_data(port, 0x7000+cfgreg*32, disconf, 4);
  46. }
  47. #define FIRST_BASE 61
  48. #define SECOND_BASE 4
  49. const int8_t counters[16] = { 64, 64,
  50. SECOND_BASE, SECOND_BASE+4, SECOND_BASE+2, SECOND_BASE+2+16, SECOND_BASE, SECOND_BASE+1,
  51. (FIRST_BASE)%65, (FIRST_BASE+1)%65, (FIRST_BASE+3)%65, (FIRST_BASE+3+16)%65, (FIRST_BASE+4)%65, (FIRST_BASE+4+4)%65, (FIRST_BASE+3+3)%65, (FIRST_BASE+3+1+3)%65};
  52. //char counters[16] = { 64, 64,
  53. // SECOND_BASE, SECOND_BASE+4, SECOND_BASE+2, SECOND_BASE+2+16, SECOND_BASE, SECOND_BASE+1,
  54. // (FIRST_BASE)%65, (FIRST_BASE+1)%65, (FIRST_BASE+3)%65, (FIRST_BASE+3+16)%65, (FIRST_BASE+4)%65, (FIRST_BASE+4+4)%65, (FIRST_BASE+3+3)%65, (FIRST_BASE+3+1+3)%65};
  55. /* Oscillator setup variants (maybe more), values inside of chip ANDed to not allow by programming errors work it at higher speeds */
  56. /* WARNING! no chip temperature control limits, etc. It may self-fry and make fried chips with great ease :-) So if trying to overclock */
  57. /* Do not place chip near flammable objects, provide adequate power protection and better wear eye protection ! */
  58. /* Thermal runaway in this case could produce nice flames of chippy fries */
  59. // Thermometer code from left to right - more ones ==> faster clock!
  60. #define rotrFixed(x,y) (((x) >> (y)) | ((x) << (32-(y))))
  61. #define s0(x) (rotrFixed(x,7)^rotrFixed(x,18)^(x>>3))
  62. #define s1(x) (rotrFixed(x,17)^rotrFixed(x,19)^(x>>10))
  63. #define Ch(x,y,z) (z^(x&(y^z)))
  64. #define Maj(x,y,z) (y^((x^y)&(y^z)))
  65. #define S0(x) (rotrFixed(x,2)^rotrFixed(x,13)^rotrFixed(x,22))
  66. #define S1(x) (rotrFixed(x,6)^rotrFixed(x,11)^rotrFixed(x,25))
  67. /* SHA256 CONSTANTS */
  68. static const unsigned SHA_K[64] = {
  69. 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
  70. 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
  71. 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
  72. 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
  73. 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
  74. 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
  75. 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
  76. 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
  77. };
  78. void ms3_compute(unsigned *p)
  79. {
  80. unsigned a,b,c,d,e,f,g,h, ne, na, i;
  81. a = p[0]; b = p[1]; c = p[2]; d = p[3]; e = p[4]; f = p[5]; g = p[6]; h = p[7];
  82. for (i = 0; i < 3; i++) {
  83. ne = p[i+16] + SHA_K[i] + h + Ch(e,f,g) + S1(e) + d;
  84. na = p[i+16] + SHA_K[i] + h + Ch(e,f,g) + S1(e) + S0(a) + Maj(a,b,c);
  85. d = c; c = b; b = a; a = na;
  86. h = g; g = f; f = e; e = ne;
  87. }
  88. p[15] = a; p[14] = b; p[13] = c; p[12] = d; p[11] = e; p[10] = f; p[9] = g; p[8] = h;
  89. }
  90. void send_conf(struct spi_port *port) {
  91. int i;
  92. for (i = 7; i <= 11; ++i)
  93. config_reg(port, i, 0);
  94. config_reg(port, 6, 0); /* disable OUTSLK */
  95. config_reg(port, 4, 1); /* Enable slow oscillator */
  96. for (i = 1; i <= 3; ++i)
  97. config_reg(port, i, 0);
  98. spi_emit_data(port, 0x0100, counters, 16); /* Program counters correctly for rounds processing, here baby should start consuming power */
  99. }
  100. void send_init(struct spi_port *port) {
  101. /* Prepare internal buffers */
  102. /* PREPARE BUFFERS (INITIAL PROGRAMMING) */
  103. unsigned w[16];
  104. unsigned atrvec[] = {
  105. 0xb0e72d8e, 0x1dc5b862, 0xe9e7c4a6, 0x3050f1f5, 0x8a1a6b7e, 0x7ec384e8, 0x42c1c3fc, 0x8ed158a1, /* MIDSTATE */
  106. 0,0,0,0,0,0,0,0,
  107. 0x8a0bb7b7, 0x33af304f, 0x0b290c1a, 0xf0c4e61f, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  108. };
  109. ms3_compute(&atrvec[0]);
  110. memset(&w, 0, sizeof(w)); w[3] = 0xffffffff; w[4] = 0x80000000; w[15] = 0x00000280;
  111. spi_emit_data(port, 0x1000, w, 16*4);
  112. spi_emit_data(port, 0x1400, w, 8*4);
  113. memset(w, 0, sizeof(w)); w[0] = 0x80000000; w[7] = 0x100;
  114. spi_emit_data(port, 0x1900, &w[0],8*4); /* Prepare MS and W buffers! */
  115. spi_emit_data(port, 0x3000, &atrvec[0], 19*4);
  116. }
  117. void set_freq(struct spi_port *port, int bits) {
  118. uint64_t freq;
  119. const uint8_t *
  120. osc6 = (unsigned char *)&freq;
  121. freq = (1ULL << bits) - 1ULL;
  122. spi_emit_data(port, 0x6000, osc6, 8); /* Program internal on-die slow oscillator frequency */
  123. config_reg(port, 4, 1); /* Enable slow oscillator */
  124. }
  125. void send_reinit(struct spi_port *port, int slot, int chip_n, int n) {
  126. spi_clear_buf(port);
  127. spi_emit_break(port);
  128. spi_emit_fasync(port, chip_n);
  129. set_freq(port, n);
  130. send_conf(port);
  131. send_init(port);
  132. spi_txrx(port);
  133. }
  134. void send_shutdown(struct spi_port *port, int slot, int chip_n) {
  135. spi_clear_buf(port);
  136. spi_emit_break(port);
  137. spi_emit_fasync(port, chip_n);
  138. config_reg(port, 4, 0); /* Disable slow oscillator */
  139. spi_txrx(port);
  140. }
  141. void send_freq(struct spi_port *port, int slot, int chip_n, int bits) {
  142. spi_clear_buf(port);
  143. spi_emit_break(port);
  144. spi_emit_fasync(port, chip_n);
  145. set_freq(port, bits);
  146. spi_txrx(port);
  147. }
  148. unsigned int c_diff(unsigned ocounter, unsigned counter) {
  149. return counter > ocounter ? counter - ocounter : (0x003FFFFF - ocounter) + counter;
  150. }
  151. int get_counter(unsigned int *newbuf, unsigned int *oldbuf) {
  152. int j;
  153. for(j = 0; j < 16; j++) {
  154. if (newbuf[j] != oldbuf[j]) {
  155. unsigned counter = bitfury_decnonce(newbuf[j]);
  156. if ((counter & 0xFFC00000) == 0xdf800000) {
  157. counter -= 0xdf800000;
  158. return counter;
  159. }
  160. }
  161. }
  162. return 0;
  163. }
  164. int get_diff(unsigned int *newbuf, unsigned int *oldbuf) {
  165. int j;
  166. unsigned counter = 0;
  167. for(j = 0; j < 16; j++) {
  168. if (newbuf[j] != oldbuf[j]) {
  169. counter++;
  170. }
  171. }
  172. return counter;
  173. }
  174. int detect_chip(struct spi_port *port, int chip_n) {
  175. /* Test vectors to calculate (using address-translated loads) */
  176. unsigned atrvec[] = {
  177. 0xb0e72d8e, 0x1dc5b862, 0xe9e7c4a6, 0x3050f1f5, 0x8a1a6b7e, 0x7ec384e8, 0x42c1c3fc, 0x8ed158a1, /* MIDSTATE */
  178. 0,0,0,0,0,0,0,0,
  179. 0x8a0bb7b7, 0x33af304f, 0x0b290c1a, 0xf0c4e61f, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  180. 0x9c4dfdc0, 0xf055c9e1, 0xe60f079d, 0xeeada6da, 0xd459883d, 0xd8049a9d, 0xd49f9a96, 0x15972fed, /* MIDSTATE */
  181. 0,0,0,0,0,0,0,0,
  182. 0x048b2528, 0x7acb2d4f, 0x0b290c1a, 0xbe00084a, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  183. 0x0317b3ea, 0x1d227d06, 0x3cca281e, 0xa6d0b9da, 0x1a359fe2, 0xa7287e27, 0x8b79c296, 0xc4d88274, /* MIDSTATE */
  184. 0,0,0,0,0,0,0,0,
  185. 0x328bcd4f, 0x75462d4f, 0x0b290c1a, 0x002c6dbc, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  186. 0xac4e38b6, 0xba0e3b3b, 0x649ad6f8, 0xf72e4c02, 0x93be06fb, 0x366d1126, 0xf4aae554, 0x4ff19c5b, /* MIDSTATE */
  187. 0,0,0,0,0,0,0,0,
  188. 0x72698140, 0x3bd62b4f, 0x3fd40c1a, 0x801e43e9, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  189. 0x9dbf91c9, 0x12e5066c, 0xf4184b87, 0x8060bc4d, 0x18f9c115, 0xf589d551, 0x0f7f18ae, 0x885aca59, /* MIDSTATE */
  190. 0,0,0,0,0,0,0,0,
  191. 0x6f3806c3, 0x41f82a4f, 0x3fd40c1a, 0x00334b39, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
  192. };
  193. int i;
  194. unsigned newbuf[17], oldbuf[17];
  195. unsigned ocounter;
  196. int odiff = 0;
  197. memset(newbuf, 0, 17 * 4);
  198. memset(oldbuf, 0, 17 * 4);
  199. ms3_compute(&atrvec[0]);
  200. ms3_compute(&atrvec[20]);
  201. ms3_compute(&atrvec[40]);
  202. spi_clear_buf(port);
  203. spi_emit_break(port); /* First we want to break chain! Otherwise we'll get all of traffic bounced to output */
  204. spi_emit_fasync(port, chip_n);
  205. set_freq(port, 52); //54 - 3F, 53 - 1F
  206. send_conf(port);
  207. send_init(port);
  208. spi_txrx(port);
  209. ocounter = 0;
  210. for (i = 0; i < BITFURY_DETECT_TRIES; i++) {
  211. int counter;
  212. spi_clear_buf(port);
  213. spi_emit_break(port);
  214. spi_emit_fasync(port, chip_n);
  215. spi_emit_data(port, 0x3000, &atrvec[0], 19*4);
  216. spi_txrx(port);
  217. memcpy(newbuf, spi_getrxbuf(port) + 4 + chip_n, 17*4);
  218. counter = get_counter(newbuf, oldbuf);
  219. if (ocounter) {
  220. unsigned int cdiff = c_diff(ocounter, counter);
  221. if (cdiff > 5000 && cdiff < 100000 && odiff > 5000 && odiff < 100000)
  222. return 1;
  223. odiff = cdiff;
  224. }
  225. ocounter = counter;
  226. if (newbuf[16] != 0 && newbuf[16] != 0xFFFFFFFF) {
  227. return 0;
  228. }
  229. cgsleep_ms(BITFURY_REFRESH_DELAY / 10);
  230. memcpy(oldbuf, newbuf, 17 * 4);
  231. }
  232. return 0;
  233. }
  234. int libbitfury_detectChips1(struct spi_port *port) {
  235. int n;
  236. for (n = 0; detect_chip(port, n); ++n)
  237. {}
  238. return n;
  239. }
  240. // in = 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10 f e d c b a 9 8 7 6 5 4 3 2 1 0
  241. unsigned bitfury_decnonce(unsigned in)
  242. {
  243. unsigned out;
  244. /* First part load */
  245. out = (in & 0xFF) << 24; in >>= 8;
  246. /* Byte reversal */
  247. in = (((in & 0xaaaaaaaa) >> 1) | ((in & 0x55555555) << 1));
  248. in = (((in & 0xcccccccc) >> 2) | ((in & 0x33333333) << 2));
  249. in = (((in & 0xf0f0f0f0) >> 4) | ((in & 0x0f0f0f0f) << 4));
  250. out |= (in >> 2)&0x3FFFFF;
  251. /* Extraction */
  252. if (in & 1) out |= (1 << 23);
  253. if (in & 2) out |= (1 << 22);
  254. // out = 7 6 5 4 3 2 1 0 f e 18 19 1a 1b 1c 1d 1e 1f 10 11 12 13 14 15 16 17 8 9 a b c d
  255. out -= 0x800004;
  256. return out;
  257. }
  258. int rehash(const void *midstate, const uint32_t m7, const uint32_t ntime, const uint32_t nbits, uint32_t nnonce) {
  259. unsigned char in[16];
  260. unsigned int *in32 = (unsigned int *)in;
  261. unsigned int *mid32 = (unsigned int *)midstate;
  262. unsigned out32[8];
  263. unsigned char *out = (unsigned char *) out32;
  264. #ifdef BITFURY_REHASH_DEBUG
  265. static unsigned history[512];
  266. static unsigned history_p;
  267. #endif
  268. sha256_ctx ctx;
  269. memset( &ctx, 0, sizeof( sha256_ctx ) );
  270. memcpy(ctx.h, mid32, 8*4);
  271. ctx.tot_len = 64;
  272. ctx.len = 0;
  273. nnonce = bswap_32(nnonce);
  274. in32[0] = bswap_32(m7);
  275. in32[1] = bswap_32(ntime);
  276. in32[2] = bswap_32(nbits);
  277. in32[3] = nnonce;
  278. sha256_update(&ctx, in, 16);
  279. sha256_final(&ctx, out);
  280. sha256(out, 32, out);
  281. if (out32[7] == 0) {
  282. #ifdef BITFURY_REHASH_DEBUG
  283. char hex[65];
  284. bin2hex(hex, out, 32);
  285. applog(LOG_INFO, "! MS0: %08x, m7: %08x, ntime: %08x, nbits: %08x, nnonce: %08x", mid32[0], m7, ntime, nbits, nnonce);
  286. applog(LOG_INFO, " out: %s", hex);
  287. history[history_p] = nnonce;
  288. history_p++; history_p &= 512 - 1;
  289. #endif
  290. return 1;
  291. }
  292. return 0;
  293. }
  294. bool bitfury_fudge_nonce(const void *midstate, const uint32_t m7, const uint32_t ntime, const uint32_t nbits, uint32_t *nonce_p) {
  295. static const uint32_t offsets[] = {0, 0xffc00000, 0xff800000, 0x02800000, 0x02C00000, 0x00400000};
  296. uint32_t nonce;
  297. int i;
  298. for (i = 0; i < 6; ++i)
  299. {
  300. nonce = *nonce_p + offsets[i];
  301. if (rehash(midstate, m7, ntime, nbits, nonce))
  302. {
  303. *nonce_p = nonce;
  304. return true;
  305. }
  306. }
  307. return false;
  308. }
  309. void work_to_payload(struct bitfury_payload *p, struct work *w) {
  310. unsigned char flipped_data[80];
  311. memset(p, 0, sizeof(struct bitfury_payload));
  312. swap32yes(flipped_data, w->data, 80 / 4);
  313. memcpy(p->midstate, w->midstate, 32);
  314. p->m7 = bswap_32(*(unsigned *)(flipped_data + 64));
  315. p->ntime = bswap_32(*(unsigned *)(flipped_data + 68));
  316. p->nbits = bswap_32(*(unsigned *)(flipped_data + 72));
  317. }
  318. void payload_to_atrvec(uint32_t *atrvec, struct bitfury_payload *p)
  319. {
  320. /* Programming next value */
  321. memcpy(atrvec, p, 20*4);
  322. ms3_compute(atrvec);
  323. }
  324. void libbitfury_sendHashData1(int chip_id, struct bitfury_device *d, struct thr_info *thr)
  325. {
  326. struct spi_port *port = d->spi;
  327. unsigned *newbuf = d->newbuf;
  328. unsigned *oldbuf = d->oldbuf;
  329. struct bitfury_payload *p = &(d->payload);
  330. struct bitfury_payload *op = &(d->opayload);
  331. struct bitfury_payload *o2p = &(d->o2payload);
  332. struct timeval d_time;
  333. struct timeval time;
  334. int smart = 0;
  335. int chip = d->fasync;
  336. int buf_diff;
  337. timer_set_now(&time);
  338. if (!d->second_run) {
  339. d->predict2 = d->predict1 = time;
  340. d->counter1 = d->counter2 = 0;
  341. d->req2_done = 0;
  342. };
  343. timersub(&time, &d->predict1, &d_time);
  344. if (d_time.tv_sec < 0 && (d->req2_done || !smart)) {
  345. d->otimer1 = d->timer1;
  346. d->timer1 = time;
  347. d->ocounter1 = d->counter1;
  348. /* Programming next value */
  349. spi_clear_buf(port);
  350. spi_emit_break(port);
  351. spi_emit_fasync(port, chip);
  352. spi_emit_data(port, 0x3000, &d->atrvec[0], 19*4);
  353. if (smart) {
  354. config_reg(port, 3, 0);
  355. }
  356. timer_set_now(&time);
  357. timersub(&time, &d->predict1, &d_time);
  358. spi_txrx(port);
  359. memcpy(newbuf, spi_getrxbuf(port)+4 + chip, 17*4);
  360. d->counter1 = get_counter(newbuf, oldbuf);
  361. buf_diff = get_diff(newbuf, oldbuf);
  362. if (buf_diff > 4 || (d->counter1 > 0 && d->counter1 < 0x00400000 / 2)) {
  363. if (buf_diff > 4) {
  364. #ifdef BITFURY_SENDHASHDATA_DEBUG
  365. applog(LOG_DEBUG, "AAA chip_id: %d, buf_diff: %d, counter: %08x", chip_id, buf_diff, d->counter1);
  366. #endif
  367. payload_to_atrvec(&d->atrvec[0], p);
  368. spi_clear_buf(port);
  369. spi_emit_break(port);
  370. spi_emit_fasync(port, chip);
  371. spi_emit_data(port, 0x3000, &d->atrvec[0], 19*4);
  372. timer_set_now(&time);
  373. timersub(&time, &d->predict1, &d_time);
  374. spi_txrx(port);
  375. memcpy(newbuf, spi_getrxbuf(port)+4 + chip, 17*4);
  376. buf_diff = get_diff(newbuf, oldbuf);
  377. d->counter1 = get_counter(newbuf, oldbuf);
  378. #ifdef BITFURY_SENDHASHDATA_DEBUG
  379. applog(LOG_DEBUG, "AAA _222__ chip_id: %d, buf_diff: %d, counter: %08x", chip_id, buf_diff, d->counter1);
  380. #endif
  381. }
  382. }
  383. d->job_switched = newbuf[16] != oldbuf[16];
  384. int i;
  385. int results_num = 0;
  386. int found = 0;
  387. unsigned * results = d->results;
  388. d->old_nonce = 0;
  389. d->future_nonce = 0;
  390. for (i = 0; i < 16; i++) {
  391. if (oldbuf[i] != newbuf[i] && op && o2p) {
  392. uint32_t pn; // possible nonce
  393. if ((newbuf[i] & 0xFF) == 0xE0)
  394. continue;
  395. pn = bitfury_decnonce(newbuf[i]);
  396. if (bitfury_fudge_nonce(op->midstate, op->m7, op->ntime, op->nbits, &pn))
  397. {
  398. int k;
  399. int dup = 0;
  400. for (k = 0; k < results_num; k++) {
  401. if (results[k] == bswap_32(pn))
  402. dup = 1;
  403. }
  404. if (!dup) {
  405. results[results_num++] = bswap_32(pn);
  406. found++;
  407. }
  408. }
  409. else
  410. if (bitfury_fudge_nonce(o2p->midstate, o2p->m7, o2p->ntime, o2p->nbits, &pn))
  411. {
  412. d->old_nonce = bswap_32(pn);
  413. found++;
  414. }
  415. else
  416. if (bitfury_fudge_nonce(p->midstate, p->m7, p->ntime, p->nbits, &pn))
  417. {
  418. d->future_nonce = bswap_32(pn);
  419. found++;
  420. }
  421. if (!found) {
  422. inc_hw_errors2(thr, NULL, &pn);
  423. d->strange_counter++;
  424. }
  425. }
  426. }
  427. d->results_n = results_num;
  428. if (smart) {
  429. timersub(&d->timer2, &d->timer1, &d_time);
  430. } else {
  431. timersub(&d->otimer1, &d->timer1, &d_time);
  432. }
  433. d->counter1 = get_counter(newbuf, oldbuf);
  434. if (d->counter2 || !smart) {
  435. int shift;
  436. int cycles;
  437. int req1_cycles;
  438. long long unsigned int period;
  439. double ns;
  440. unsigned full_cycles, half_cycles;
  441. double full_delay, half_delay;
  442. long long unsigned delta;
  443. struct timeval t_delta;
  444. double mhz;
  445. #ifdef BITFURY_SENDHASHDATA_DEBUG
  446. int ccase;
  447. #endif
  448. shift = 800000;
  449. if (smart) {
  450. cycles = d->counter1 < d->counter2 ? 0x00400000 - d->counter2 + d->counter1 : d->counter1 - d->counter2; // + 0x003FFFFF;
  451. } else {
  452. if (d->counter1 > (0x00400000 - shift * 2) && d->ocounter1 > (0x00400000 - shift)) {
  453. cycles = 0x00400000 - d->ocounter1 + d->counter1; // + 0x003FFFFF;
  454. #ifdef BITFURY_SENDHASHDATA_DEBUG
  455. ccase = 1;
  456. #endif
  457. } else {
  458. cycles = d->counter1 > d->ocounter1 ? d->counter1 - d->ocounter1 : 0x00400000 - d->ocounter1 + d->counter1;
  459. #ifdef BITFURY_SENDHASHDATA_DEBUG
  460. ccase = 2;
  461. #endif
  462. }
  463. }
  464. req1_cycles = 0x003FFFFF - d->counter1;
  465. period = timeval_to_us(&d_time) * 1000ULL;
  466. ns = (double)period / (double)(cycles);
  467. mhz = 1.0 / ns * 65.0 * 1000.0;
  468. #ifdef BITFURY_SENDHASHDATA_DEBUG
  469. if (d->counter1 > 0 && d->counter1 < 0x001FFFFF) {
  470. applog(LOG_DEBUG, "//AAA chip_id %2d: %llu ms, req1_cycles: %08u, counter1: %08d, ocounter1: %08d, counter2: %08d, cycles: %08d, ns: %.2f, mhz: %.2f ", chip_id, period / 1000000ULL, req1_cycles, d->counter1, d->ocounter1, d->counter2, cycles, ns, mhz);
  471. }
  472. #endif
  473. if (ns > 2000.0 || ns < 20) {
  474. #ifdef BITFURY_SENDHASHDATA_DEBUG
  475. applog(LOG_DEBUG, "AAA %d!Stupid ns chip_id %2d: %llu ms, req1_cycles: %08u, counter1: %08d, ocounter1: %08d, counter2: %08d, cycles: %08d, ns: %.2f, mhz: %.2f ", ccase, chip_id, period / 1000000ULL, req1_cycles, d->counter1, d->ocounter1, d->counter2, cycles, ns, mhz);
  476. #endif
  477. ns = 200.0;
  478. } else {
  479. d->ns = ns;
  480. d->mhz = mhz;
  481. }
  482. if (smart) {
  483. half_cycles = req1_cycles + shift;
  484. full_cycles = 0x003FFFFF - 2 * shift;
  485. } else {
  486. half_cycles = 0;
  487. full_cycles = req1_cycles > shift ? req1_cycles - shift : req1_cycles + 0x00400000 - shift;
  488. }
  489. half_delay = (double)half_cycles * ns * (1 +0.92);
  490. full_delay = (double)full_cycles * ns;
  491. delta = (long long unsigned)(full_delay + half_delay);
  492. t_delta = TIMEVAL_USECS(delta / 1000ULL);
  493. timeradd(&time, &t_delta, &d->predict1);
  494. if (smart) {
  495. half_cycles = req1_cycles + shift;
  496. full_cycles = 0;
  497. } else {
  498. full_cycles = req1_cycles + shift;
  499. }
  500. half_delay = (double)half_cycles * ns * (1 + 0.92);
  501. full_delay = (double)full_cycles * ns;
  502. delta = (long long unsigned)(full_delay + half_delay);
  503. t_delta = TIMEVAL_USECS(delta / 1000ULL);
  504. timeradd(&time, &t_delta, &d->predict2);
  505. d->req2_done = 0; d->req1_done = 0;
  506. }
  507. if (d->job_switched) {
  508. memcpy(o2p, op, sizeof(struct bitfury_payload));
  509. memcpy(op, p, sizeof(struct bitfury_payload));
  510. memcpy(oldbuf, newbuf, 17 * 4);
  511. }
  512. }
  513. timer_set_now(&time);
  514. timersub(&time, &d->predict2, &d_time);
  515. if (d_time.tv_sec < 0 && !d->req2_done) {
  516. if(smart) {
  517. d->otimer2 = d->timer2;
  518. d->timer2 = time;
  519. spi_clear_buf(port);
  520. spi_emit_break(port);
  521. spi_emit_fasync(port, chip);
  522. spi_emit_data(port, 0x3000, &d->atrvec[0], 19*4);
  523. if (smart) {
  524. config_reg(port, 3, 1);
  525. }
  526. spi_txrx(port);
  527. memcpy(newbuf, spi_getrxbuf(port)+4 + chip, 17*4);
  528. d->counter2 = get_counter(newbuf, oldbuf);
  529. d->req2_done = 1;
  530. } else {
  531. d->req2_done = 1;
  532. }
  533. }
  534. d->second_run = true;
  535. }