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@@ -380,9 +380,11 @@ static bool x6500_fpga_init(struct thr_info *thr)
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thr->cgpu_data = fpga;
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dclk_prepare(&fpga->dclk);
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+ x6500_change_clock(thr, X6500_DEFAULT_CLOCK / 2);
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+ mutex_unlock(&x6500->device_mutex);
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+
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fpga->dclk.minGoodSamples = 3;
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fpga->dclk.freqMaxM = X6500_MAXIMUM_CLOCK / 2;
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- x6500_change_clock(thr, X6500_DEFAULT_CLOCK / 2);
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fpga->dclk.freqMDefault = fpga->dclk.freqM;
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applog(LOG_WARNING, "%s %u.%u: Frequency set to %u Mhz (range: %u-%u)",
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x6500->api->name, x6500->device_id, fpgaid,
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@@ -390,7 +392,6 @@ static bool x6500_fpga_init(struct thr_info *thr)
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X6500_MINIMUM_CLOCK,
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fpga->dclk.freqMaxM * 2);
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- mutex_unlock(&x6500->device_mutex);
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return true;
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}
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