tuning of parameters; fixed cycles calculation

driver-bitfury.c

@@ -172,7 +172,7 @@ static int64_t bitfury_scanHash(struct thr_info *thr)
 			gh[devices[chip].slot][chip & 0x07] = ghash;
 			snprintf(stat_lines[devices[chip].slot] + len, 256 - len, "%.1f-%3.0f ", ghash, devices[chip].mhz);
 
-			if(short_out_t && ghash < 1.0) {
+			if(short_out_t && ghash < 0.5) {
 				applog(LOG_WARNING, "Chip_id %d FREQ CHANGE\n", chip);
 				send_freq(devices[chip].slot, devices[chip].fasync, devices[chip].osc6_bits - 1);
 				nmsleep(1);

libbitfury.c

@@ -334,7 +334,9 @@ int libbitfury_detectChips(struct bitfury_device *devices) {
 		return(1);
 	}
 
-
+	for (i = 0; i < 32; i++) {
+		slot_on[i] = 0;
+	}
 	clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &t1);
 	for (i = 0; i < 32; i++) {
 		int slot_detected = tm_i2c_detect(i) != -1;
@@ -596,7 +598,7 @@ int libbitfury_sendHashData(struct bitfury_device *bf, int chip_n) {
 						cycles = 0x00400000 - d->ocounter1 + d->counter1; // + 0x003FFFFF;
 						ccase = 1;
 					} else {
-						cycles = d->counter1 - d->ocounter1;
+						cycles = d->counter1 > d->ocounter1 ? d->counter1 - d->ocounter1 : 0x00400000 - d->ocounter1 + d->counter1;
 						ccase = 2;
 					}
 				}
@@ -605,8 +607,9 @@ int libbitfury_sendHashData(struct bitfury_device *bf, int chip_n) {
 				ns = (double)period / (double)(cycles);
 				mhz = 1.0 / ns * 65.0 * 1000.0;
 
-				if (d->counter1 > 0 && d->counter1 < 0x001FFFFF)
+				if (d->counter1 > 0 && d->counter1 < 0x001FFFFF) {
 					printf("AAA chip_id %2d: %llu ms, req1_cycles: %08u,  counter1: %08d, ocounter1: %08d, counter2: %08d, cycles: %08d, ns: %.2f, mhz: %.2f \n", chip_id, period / 1000000ULL, req1_cycles, d->counter1, d->ocounter1, d->counter2, cycles, ns, mhz);
+				}
 				if (ns > 2000.0 || ns < 20) {
 					printf("AAA %d!Stupid ns chip_id %2d: %llu ms, req1_cycles: %08u,  counter1: %08d, ocounter1: %08d, counter2: %08d, cycles: %08d, ns: %.2f, mhz: %.2f \n", ccase, chip_id, period / 1000000ULL, req1_cycles, d->counter1, d->ocounter1, d->counter2, cycles, ns, mhz);
 					ns = 200.0;

spidevc.c

@@ -56,14 +56,14 @@ void spi_init(void)
 #define GPIO_CLR *(gpio+10) // clears bits which are 1 ignores bits which are 0
 
 // Bit-banging reset, to reset more chips in chain - toggle for longer period... Each 3 reset cycles reset first chip in chain
-void spi_reset(void)
+int spi_reset(int a)
 {
 	int i,j;
-	int a = 1234, len = 2;
+	int len = 8;
 	INP_GPIO(10); OUT_GPIO(10);
 	INP_GPIO(11); OUT_GPIO(11);
 	GPIO_SET = 1 << 11; // Set SCK
-	for (i = 0; i < 16; i++) { // On standard settings this unoptimized code produces 1 Mhz freq.
+	for (i = 0; i < 32; i++) { // On standard settings this unoptimized code produces 1 Mhz freq.
 		GPIO_SET = 1 << 10;
 		for (j = 0; j < len; j++) {
 			a *= a;
@@ -81,6 +81,8 @@ void spi_reset(void)
 	SET_GPIO_ALT(11,0);
 	INP_GPIO(9);
 	SET_GPIO_ALT(9,0);
+
+	return a;
 }
 
 int spi_txrx(const char *wrbuf, char *rdbuf, int bufsz)
@@ -93,7 +95,7 @@ int spi_txrx(const char *wrbuf, char *rdbuf, int bufsz)
 	memset(&tr,0,sizeof(tr));
 	mode = 0; bits = 8; speed = 2000000;
 
-	spi_reset();
+	spi_reset(1234);
 	fd = open("/dev/spidev0.0", O_RDWR);
 	if (fd < 0) { perror("Unable to open SPI device"); exit(1); }
         if (ioctl(fd, SPI_IOC_WR_MODE, &mode) < 0) { perror("Unable to set WR MODE"); close(fd); return -1; }
@@ -131,7 +133,7 @@ int spi_txrx(const char *wrbuf, char *rdbuf, int bufsz)
         }
 
 	close(fd);
-	spi_reset();
+	spi_reset(4321);
 
 	return 0;
 }