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@@ -0,0 +1,762 @@
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+/*
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+ * cgminer driver for KnCminer devices
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+ *
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+ * Copyright 2013 Con Kolivas <kernel@kolivas.org>
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+ * Copyright 2013 KnCminer
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the Free
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+ * Software Foundation; either version 3 of the License, or (at your option)
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+ * any later version. See COPYING for more details.
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+ */
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+
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+#include <stdlib.h>
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+#include <assert.h>
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+#include <fcntl.h>
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+#include <limits.h>
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+#include <unistd.h>
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+#include <sys/ioctl.h>
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+#include <linux/types.h>
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+#include <linux/spi/spidev.h>
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+
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+#include "logging.h"
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+#include "miner.h"
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+
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+#define MAX_SPIS 1
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+#define MAX_BYTES_IN_SPI_XSFER 4096
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+/* /dev/spidevB.C, where B = bus, C = chipselect */
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+#define SPI_DEVICE_TEMPLATE "/dev/spidev%d.%d"
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+#define SPI_MODE (SPI_CPHA | SPI_CPOL | SPI_CS_HIGH)
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+#define SPI_BITS_PER_WORD 32
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+#define SPI_MAX_SPEED 3000000
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+#define SPI_DELAY_USECS 0
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+/* Max number of ASICs permitted on one SPI device */
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+#define MAX_ASICS 6
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+
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+/* How many hardware errors in a row before disabling the core */
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+#define HW_ERR_LIMIT 10
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+#define DISA_ERR_LIMIT 3
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+
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+#define MAX_ACTIVE_WORKS (192 * 2 * 6 * 2)
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+
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+#define WORK_MIDSTATE_WORDS 8
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+#define WORK_DATA_WORDS 3
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+
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+#define WORK_STALE_US 60000000
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+
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+/* Keep core disabled for no longer than 15 minutes */
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+#define CORE_DISA_PERIOD_US (15 * 60 * 1000000)
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+
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+struct spidev_context {
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+ int fd;
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+ uint32_t speed;
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+ uint16_t delay;
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+ uint8_t mode;
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+ uint8_t bits;
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+};
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+
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+struct spi_request {
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+#define CMD_NOP 0
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+#define CMD_GET_VERSION 1
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+#define CMD_SUBMIT_WORK 2
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+#define CMD_FLUSH_QUEUE 3
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+
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+#define WORK_ID_MASK 0x7FFF
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+
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+#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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+ uint32_t cmd :4;
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+ uint32_t rsvd :1; /* set to zero */
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+ uint32_t queue_id :12;
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+ uint32_t work_id :15;
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+#else
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+ uint32_t work_id :15;
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+ uint32_t queue_id :12;
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+ uint32_t rsvd :1; /* set to zero */
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+ uint32_t cmd :4;
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+#endif
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+ uint32_t midstate[WORK_MIDSTATE_WORDS];
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+ uint32_t data[WORK_DATA_WORDS];
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+};
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+
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+struct spi_response {
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+#define RESPONSE_TYPE_NOP 0
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+#define RESPONSE_TYPE_NONCE_FOUND 1
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+#define RESPONSE_TYPE_WORK_DONE 2
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+#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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+ uint32_t type :2;
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+ uint32_t asic :3;
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+ uint32_t queue_id :12;
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+ uint32_t work_id :15;
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+#else
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+ uint32_t work_id :15;
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+ uint32_t queue_id :12;
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+ uint32_t asic :3;
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+ uint32_t type :2;
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+#endif
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+ uint32_t nonce;
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+ uint32_t core;
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+};
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+
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+#define MAX_REQUESTS_IN_BATCH ( MAX_BYTES_IN_SPI_XSFER / \
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+ sizeof(struct spi_request) \
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+ )
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+
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+static struct spi_request spi_txbuf[MAX_REQUESTS_IN_BATCH];
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+
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+#define MAX_RESPONSES_IN_BATCH ( (sizeof(spi_txbuf) - 12) / \
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+ sizeof(struct spi_response) \
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+ )
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+
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+struct spi_rx_t {
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+#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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+ uint32_t rsvd_1 :31;
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+ uint32_t response_queue_full :1;
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+#else
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+ uint32_t response_queue_full :1;
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+ uint32_t rsvd_1 :31;
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+#endif
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+#if (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
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+ uint32_t rsvd_2 :16;
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+ uint32_t works_accepted :16;
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+#else
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+ uint32_t works_accepted :16;
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+ uint32_t rsvd_2 :16;
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+#endif
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+ uint32_t rsvd_3;
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+ struct spi_response responses[MAX_RESPONSES_IN_BATCH];
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+};
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+
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+static struct spi_rx_t spi_rxbuf;
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+
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+struct active_work {
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+ struct work *work;
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+ uint32_t work_id;
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+ struct timeval begin;
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+};
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+
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+struct core_disa_data {
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+ struct timeval disa_begin;
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+ uint8_t asic;
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+ uint8_t core;
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+};
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+
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+struct knc_state {
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+ struct spidev_context *ctx;
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+ int devices;
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+ uint32_t salt;
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+ uint32_t next_work_id;
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+
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+ /* read - last read item, next is at (read + 1) mod BUFSIZE
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+ * write - next write item, last written at (write - 1) mod BUFSIZE
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+ * When buffer is empty, read + 1 == write
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+ * Buffer full condition: read == write
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+ */
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+ int read_q, write_q;
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+#define KNC_QUEUED_BUFFER_SIZE (MAX_REQUESTS_IN_BATCH + 1)
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+ struct active_work queued_fifo[KNC_QUEUED_BUFFER_SIZE];
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+
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+ int read_a, write_a;
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+#define KNC_ACTIVE_BUFFER_SIZE (MAX_ACTIVE_WORKS + 1)
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+ struct active_work active_fifo[KNC_ACTIVE_BUFFER_SIZE];
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+
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+ uint8_t hwerrs[MAX_ASICS * 256];
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+ uint8_t disa_cnt[MAX_ASICS * 256];
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+ uint32_t hwerr_work_id[MAX_ASICS * 256];
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+ int read_d, write_d;
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+#define KNC_DISA_CORES_SIZE (MAX_ASICS * 256)
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+ struct core_disa_data disa_cores_fifo[KNC_DISA_CORES_SIZE];
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+
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+ pthread_mutex_t lock;
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+};
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+
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+static inline bool knc_queued_fifo_full(struct knc_state *knc)
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+{
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+ return (knc->read_q == knc->write_q);
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+}
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+
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+static inline bool knc_active_fifo_full(struct knc_state *knc)
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+{
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+ return (knc->read_a == knc->write_a);
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+}
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+
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+static inline void knc_queued_fifo_inc_idx(int *idx)
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+{
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+ if (unlikely(*idx >= ((int)KNC_QUEUED_BUFFER_SIZE - 1)))
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+ *idx = 0;
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+ else
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+ ++(*idx);
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+}
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+
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+static inline void knc_active_fifo_inc_idx(int *idx)
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+{
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+ if (unlikely(*idx >= (KNC_ACTIVE_BUFFER_SIZE - 1)))
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+ *idx = 0;
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+ else
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+ ++(*idx);
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+}
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+
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+static inline void knc_disa_cores_fifo_inc_idx(int *idx)
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+{
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+ if (unlikely(*idx >= (KNC_DISA_CORES_SIZE - 1)))
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+ *idx = 0;
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+ else
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+ ++(*idx);
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+}
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+
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+/* Find SPI device with index idx, init it */
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+static struct spidev_context *spi_new(int idx)
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+{
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+ struct spidev_context *ctx;
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+ char dev_fname[PATH_MAX];
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+
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+ if (NULL == (ctx = malloc(sizeof(struct spidev_context)))) {
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+ applog(LOG_ERR, "KnC spi: Out of memory");
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+ goto l_exit_error;
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+ }
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+ ctx->mode = SPI_MODE;
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+ ctx->bits = SPI_BITS_PER_WORD;
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+ ctx->speed = SPI_MAX_SPEED;
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+ ctx->delay = SPI_DELAY_USECS;
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+
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+ ctx->fd = -1;
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+
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+ sprintf(dev_fname, SPI_DEVICE_TEMPLATE,
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+ idx, /* bus */
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+ 0 /* chipselect */
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+ );
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+ if (0 > (ctx->fd = open(dev_fname, O_RDWR))) {
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+ applog(LOG_ERR, "KnC spi: Can not open SPI device %s: %m",
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+ dev_fname);
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+ goto l_free_exit_error;
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+ }
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+
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+ /*
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+ * spi mode
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+ */
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+ if (0 > ioctl(ctx->fd, SPI_IOC_WR_MODE, &ctx->mode))
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+ goto l_ioctl_error;
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+ if (0 > ioctl(ctx->fd, SPI_IOC_RD_MODE, &ctx->mode))
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+ goto l_ioctl_error;
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+
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+ /*
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+ * bits per word
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+ */
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+ if (0 > ioctl(ctx->fd, SPI_IOC_WR_BITS_PER_WORD, &ctx->bits))
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+ goto l_ioctl_error;
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+ if (0 > ioctl(ctx->fd, SPI_IOC_RD_BITS_PER_WORD, &ctx->bits))
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+ goto l_ioctl_error;
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+
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+ /*
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+ * max speed hz
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+ */
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+ if (0 > ioctl(ctx->fd, SPI_IOC_WR_MAX_SPEED_HZ, &ctx->speed))
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+ goto l_ioctl_error;
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+ if (0 > ioctl(ctx->fd, SPI_IOC_RD_MAX_SPEED_HZ, &ctx->speed))
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+ goto l_ioctl_error;
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+
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+ applog(LOG_INFO, "KnC spi: device %s uses mode %hhu, bits %hhu, speed %u",
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+ dev_fname, ctx->mode, ctx->bits, ctx->speed);
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+
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+ return ctx;
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+
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+l_ioctl_error:
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+ applog(LOG_ERR, "KnC spi: ioctl error on SPI device %s: %m", dev_fname);
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+ close(ctx->fd);
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+l_free_exit_error:
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+ free(ctx);
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+l_exit_error:
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+ return NULL;
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+}
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+
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+static void spi_free(struct spidev_context *ctx)
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+{
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+ if (NULL == ctx)
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+ return;
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+
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+ close(ctx->fd);
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+ free(ctx);
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+}
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+
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+static int spi_transfer(struct spidev_context *ctx, uint8_t *txbuf,
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+ uint8_t *rxbuf, int len)
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+{
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+ struct spi_ioc_transfer xfr;
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+ int ret;
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+
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+ memset(rxbuf, 0xff, len);
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+
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+ ret = len;
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+
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+ xfr.tx_buf = (unsigned long)txbuf;
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+ xfr.rx_buf = (unsigned long)rxbuf;
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+ xfr.len = len;
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+ xfr.speed_hz = ctx->speed;
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+ xfr.delay_usecs = ctx->delay;
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+ xfr.bits_per_word = ctx->bits;
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+ xfr.cs_change = 0;
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+ xfr.pad = 0;
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+
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+ if (1 > (ret = ioctl(ctx->fd, SPI_IOC_MESSAGE(1), &xfr)))
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+ applog(LOG_ERR, "KnC spi xfer: ioctl error on SPI device: %m");
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+
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+ return ret;
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+}
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+
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+static void disable_core(uint8_t asic, uint8_t core)
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+{
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+ char str[256];
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+
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+ snprintf(str, sizeof(str), "i2cset -y 2 0x2%hhu %hhu 0", asic, core);
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+ if (0 != WEXITSTATUS(system(str)))
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+ applog(LOG_ERR, "KnC: system call failed");
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+}
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+
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+static void enable_core(uint8_t asic, uint8_t core)
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+{
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+ char str[256];
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+
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+ snprintf(str, sizeof(str), "i2cset -y 2 0x2%hhu %hhu 1", asic, core);
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+ if (0 != WEXITSTATUS(system(str)))
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+ applog(LOG_ERR, "KnC: system call failed");
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+}
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+
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+static int64_t timediff(const struct timeval *a, const struct timeval *b)
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+{
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+ struct timeval diff;
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+
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+ timersub(a, b, &diff);
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+
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+ return diff.tv_sec * 1000000 + diff.tv_usec;
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+}
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+
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+static void knc_check_disabled_cores(struct knc_state *knc)
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+{
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+ struct core_disa_data *core;
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+ int next_read_d, cidx;
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+ struct timeval now;
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+ int64_t us;
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+
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+ next_read_d = knc->read_d;
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+ knc_disa_cores_fifo_inc_idx(&next_read_d);
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+ if (next_read_d == knc->write_d)
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+ return; /* queue empty */
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+
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+ core = &knc->disa_cores_fifo[next_read_d];
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+ gettimeofday(&now, NULL);
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+ us = timediff(&now, &core->disa_begin);
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+ if ((us >= 0) && (us < CORE_DISA_PERIOD_US))
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+ return; /* latest disabled core still not expired */
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+
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+ cidx = core->asic * 256 + core->core;
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+ enable_core(core->asic, core->core);
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+ knc->hwerrs[cidx] = 0;
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+ applog(LOG_NOTICE,
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+ "KnC: core %u-%u was enabled back from disabled state",
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+ core->asic, core->core);
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+ knc->read_d = next_read_d;
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+}
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+
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+static void knc_work_from_queue_to_spi(struct knc_state *knc,
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+ struct active_work *q_work,
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+ struct spi_request *spi_req)
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+{
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+ uint32_t *buf_from, *buf_to;
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+ int i;
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+
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+ spi_req->cmd = CMD_SUBMIT_WORK;
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+ spi_req->queue_id = 0; /* at the moment we have one and only queue #0 */
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+ spi_req->work_id = (knc->next_work_id ^ knc->salt) & WORK_ID_MASK;
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+ q_work->work_id = spi_req->work_id;
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+ ++(knc->next_work_id);
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+ buf_to = spi_req->midstate;
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+ buf_from = (uint32_t *)q_work->work->midstate;
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+
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+ for (i = 0; i < WORK_MIDSTATE_WORDS; ++i)
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+ buf_to[i] = le32toh(buf_from[8 - i - 1]);
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+ buf_to = spi_req->data;
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+ buf_from = (uint32_t *)&(q_work->work->data[16 * 4]);
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+
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+ for (i = 0; i < WORK_DATA_WORDS; ++i)
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+ buf_to[i] = le32toh(buf_from[3 - i - 1]);
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+}
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+
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+static int64_t knc_process_response(struct thr_info *thr, struct cgpu_info *cgpu,
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+ struct spi_rx_t *rxbuf)
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+{
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+ struct knc_state *knc = cgpu->device_data;
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+ int submitted, successful, i, num_sent;
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+ int next_read_q, next_read_a;
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+ struct timeval now;
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+ struct work *work;
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+ int64_t us;
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+
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+ num_sent = knc->write_q - knc->read_q - 1;
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|
|
+ if (knc->write_q <= knc->read_q)
|
|
|
+ num_sent += KNC_QUEUED_BUFFER_SIZE;
|
|
|
+
|
|
|
+ /* Actually process SPI response */
|
|
|
+ if (rxbuf->works_accepted) {
|
|
|
+ applog(LOG_DEBUG, "KnC spi: raw response %08X %08X",
|
|
|
+ ((uint32_t *)rxbuf)[0], ((uint32_t *)rxbuf)[1]);
|
|
|
+ applog(LOG_DEBUG,
|
|
|
+ "KnC spi: response, accepted %u (from %u), full %u",
|
|
|
+ rxbuf->works_accepted, num_sent,
|
|
|
+ rxbuf->response_queue_full);
|
|
|
+ }
|
|
|
+ /* move works_accepted number of items from queued_fifo to active_fifo */
|
|
|
+ gettimeofday(&now, NULL);
|
|
|
+ submitted = 0;
|
|
|
+
|
|
|
+ for (i = 0; i < rxbuf->works_accepted; ++i) {
|
|
|
+ next_read_q = knc->read_q;
|
|
|
+ knc_queued_fifo_inc_idx(&next_read_q);
|
|
|
+ if ((next_read_q == knc->write_q) || knc_active_fifo_full(knc))
|
|
|
+ break;
|
|
|
+
|
|
|
+ memcpy(&knc->active_fifo[knc->write_a],
|
|
|
+ &knc->queued_fifo[next_read_q],
|
|
|
+ sizeof(struct active_work));
|
|
|
+ knc->active_fifo[knc->write_a].begin = now;
|
|
|
+ knc->queued_fifo[next_read_q].work = NULL;
|
|
|
+ knc->read_q = next_read_q;
|
|
|
+ knc_active_fifo_inc_idx(&knc->write_a);
|
|
|
+ ++submitted;
|
|
|
+ }
|
|
|
+ if (submitted != rxbuf->works_accepted) {
|
|
|
+ applog(LOG_ERR,
|
|
|
+ "KnC: accepted by FPGA %u works, but only %d submitted",
|
|
|
+ rxbuf->works_accepted, submitted);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* check for completed works and calculated nonces */
|
|
|
+ gettimeofday(&now, NULL);
|
|
|
+ successful = 0;
|
|
|
+
|
|
|
+ for (i = 0; i < (int)MAX_RESPONSES_IN_BATCH; ++i) {
|
|
|
+ if ((rxbuf->responses[i].type != RESPONSE_TYPE_NONCE_FOUND) &&
|
|
|
+ (rxbuf->responses[i].type != RESPONSE_TYPE_WORK_DONE))
|
|
|
+ continue;
|
|
|
+
|
|
|
+ applog(LOG_DEBUG, "KnC spi: raw response %08X %08X",
|
|
|
+ ((uint32_t *)&rxbuf->responses[i])[0],
|
|
|
+ ((uint32_t *)&rxbuf->responses[i])[1]);
|
|
|
+ applog(LOG_DEBUG, "KnC spi: response, T:%u C:%u-%u Q:%u W:%u",
|
|
|
+ rxbuf->responses[i].type,
|
|
|
+ rxbuf->responses[i].asic, rxbuf->responses[i].core,
|
|
|
+ rxbuf->responses[i].queue_id,
|
|
|
+ rxbuf->responses[i].work_id);
|
|
|
+ /* Find active work with matching ID */
|
|
|
+ next_read_a = knc->read_a;
|
|
|
+ knc_active_fifo_inc_idx(&next_read_a);
|
|
|
+
|
|
|
+ while (next_read_a != knc->write_a) {
|
|
|
+ if (knc->active_fifo[next_read_a].work_id ==
|
|
|
+ rxbuf->responses[i].work_id)
|
|
|
+ break;
|
|
|
+
|
|
|
+ /* check for stale works */
|
|
|
+ us = timediff(&now,
|
|
|
+ &knc->active_fifo[next_read_a].begin);
|
|
|
+ if ((us < 0) || (us >= WORK_STALE_US)) {
|
|
|
+ applog(LOG_DEBUG,
|
|
|
+ "KnC spi: remove stale work %u",
|
|
|
+ knc->active_fifo[next_read_a].work_id);
|
|
|
+ work = knc->active_fifo[next_read_a].work;
|
|
|
+ knc_active_fifo_inc_idx(&knc->read_a);
|
|
|
+ work_completed(cgpu, work);
|
|
|
+ if (next_read_a != knc->read_a) {
|
|
|
+ memcpy(&(knc->active_fifo[next_read_a]),
|
|
|
+ &(knc->active_fifo[knc->read_a]),
|
|
|
+ sizeof(struct active_work));
|
|
|
+ }
|
|
|
+ knc->active_fifo[knc->read_a].work = NULL;
|
|
|
+ }
|
|
|
+
|
|
|
+ knc_active_fifo_inc_idx(&next_read_a);
|
|
|
+ }
|
|
|
+ if (next_read_a == knc->write_a)
|
|
|
+ continue;
|
|
|
+
|
|
|
+ applog(LOG_DEBUG, "KnC spi: response work %u found",
|
|
|
+ rxbuf->responses[i].work_id);
|
|
|
+ work = knc->active_fifo[next_read_a].work;
|
|
|
+
|
|
|
+ if (rxbuf->responses[i].type == RESPONSE_TYPE_NONCE_FOUND) {
|
|
|
+ if (NULL != thr) {
|
|
|
+ int cidx = rxbuf->responses[i].asic * 256 +
|
|
|
+ rxbuf->responses[i].core;
|
|
|
+
|
|
|
+ if (submit_nonce(thr, work,
|
|
|
+ rxbuf->responses[i].nonce)) {
|
|
|
+ if (cidx < (int)sizeof(knc->hwerrs)) {
|
|
|
+ knc->hwerrs[cidx] = 0;
|
|
|
+ knc->disa_cnt[cidx] = 0;
|
|
|
+ knc->hwerr_work_id[cidx] = 0xFFFFFFFF;
|
|
|
+ }
|
|
|
+ successful++;
|
|
|
+ } else {
|
|
|
+ if ((cidx < (int)sizeof(knc->hwerrs)) &&
|
|
|
+ (knc->hwerr_work_id[cidx] != rxbuf->responses[i].work_id)) {
|
|
|
+ knc->hwerr_work_id[cidx] = rxbuf->responses[i].work_id;
|
|
|
+ if (++(knc->hwerrs[cidx]) >= HW_ERR_LIMIT) {
|
|
|
+ struct core_disa_data *core;
|
|
|
+
|
|
|
+ core = &knc->disa_cores_fifo[knc->write_d];
|
|
|
+ core->disa_begin = now;
|
|
|
+ core->asic = rxbuf->responses[i].asic;
|
|
|
+ core->core = rxbuf->responses[i].core;
|
|
|
+ disable_core(core->asic, core->core);
|
|
|
+ if (++(knc->disa_cnt[cidx]) >= DISA_ERR_LIMIT) {
|
|
|
+ applog(LOG_WARNING,
|
|
|
+ "KnC: core %u-%u was disabled permanently", core->asic, core->core);
|
|
|
+ } else {
|
|
|
+ applog(LOG_WARNING,
|
|
|
+ "KnC: core %u-%u was disabled due to %u HW errors in a row",
|
|
|
+ core->asic, core->core, HW_ERR_LIMIT);
|
|
|
+ knc_disa_cores_fifo_inc_idx(&knc->write_d);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+ };
|
|
|
+ }
|
|
|
+ continue;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Work completed */
|
|
|
+ knc_active_fifo_inc_idx(&knc->read_a);
|
|
|
+ work_completed(cgpu, work);
|
|
|
+ if (next_read_a != knc->read_a) {
|
|
|
+ memcpy(&(knc->active_fifo[next_read_a]),
|
|
|
+ &(knc->active_fifo[knc->read_a]),
|
|
|
+ sizeof(struct active_work));
|
|
|
+ }
|
|
|
+ knc->active_fifo[knc->read_a].work = NULL;
|
|
|
+ }
|
|
|
+
|
|
|
+ return ((uint64_t)successful) * 0x100000000UL;
|
|
|
+}
|
|
|
+
|
|
|
+/* Send flush command via SPI */
|
|
|
+static int _internal_knc_flush_fpga(struct knc_state *knc)
|
|
|
+{
|
|
|
+ int len;
|
|
|
+
|
|
|
+ spi_txbuf[0].cmd = CMD_FLUSH_QUEUE;
|
|
|
+ spi_txbuf[0].queue_id = 0; /* at the moment we have one and only queue #0 */
|
|
|
+ len = spi_transfer(knc->ctx, (uint8_t *)spi_txbuf,
|
|
|
+ (uint8_t *)&spi_rxbuf, sizeof(struct spi_request));
|
|
|
+ if (len != sizeof(struct spi_request))
|
|
|
+ return -1;
|
|
|
+
|
|
|
+ len /= sizeof(struct spi_response);
|
|
|
+
|
|
|
+ return len;
|
|
|
+}
|
|
|
+
|
|
|
+static bool knc_detect_one(struct spidev_context *ctx)
|
|
|
+{
|
|
|
+ /* Scan device for ASICs */
|
|
|
+ int chip_id, devices = 0;
|
|
|
+ struct cgpu_info *cgpu;
|
|
|
+ struct knc_state *knc;
|
|
|
+
|
|
|
+ for (chip_id = 0; chip_id < MAX_ASICS; ++chip_id) {
|
|
|
+ /* TODO: perform the ASIC test/detection */
|
|
|
+ ++devices;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (!devices) {
|
|
|
+ applog(LOG_INFO, "SPI detected, but not KnCminer ASICs");
|
|
|
+ return false;
|
|
|
+ }
|
|
|
+
|
|
|
+ applog(LOG_INFO, "Found a KnC miner with %d ASICs", devices);
|
|
|
+
|
|
|
+ cgpu = calloc(1, sizeof(*cgpu));
|
|
|
+ knc = calloc(1, sizeof(*knc));
|
|
|
+ if (!cgpu || !knc) {
|
|
|
+ applog(LOG_ERR, "KnC miner detected, but failed to allocate memory");
|
|
|
+ return false;
|
|
|
+ }
|
|
|
+
|
|
|
+ knc->ctx = ctx;
|
|
|
+ knc->devices = devices;
|
|
|
+ knc->read_q = 0;
|
|
|
+ knc->write_q = 1;
|
|
|
+ knc->read_a = 0;
|
|
|
+ knc->write_a = 1;
|
|
|
+ knc->read_d = 0;
|
|
|
+ knc->write_d = 1;
|
|
|
+ knc->salt = rand();
|
|
|
+ mutex_init(&knc->lock);
|
|
|
+
|
|
|
+ memset(knc->hwerr_work_id, 0xFF, sizeof(knc->hwerr_work_id));
|
|
|
+
|
|
|
+ _internal_knc_flush_fpga(knc);
|
|
|
+
|
|
|
+ cgpu->drv = &knc_drv;
|
|
|
+ cgpu->name = "KnCminer";
|
|
|
+ cgpu->threads = 1; // .. perhaps our number of devices?
|
|
|
+
|
|
|
+ cgpu->device_data = knc;
|
|
|
+ add_cgpu(cgpu);
|
|
|
+
|
|
|
+ return true;
|
|
|
+}
|
|
|
+
|
|
|
+// http://www.concentric.net/~Ttwang/tech/inthash.htm
|
|
|
+static unsigned long mix(unsigned long a, unsigned long b, unsigned long c)
|
|
|
+{
|
|
|
+ a = a - b; a = a - c; a = a ^ (c >> 13);
|
|
|
+ b = b - c; b = b - a; b = b ^ (a << 8);
|
|
|
+ c = c - a; c = c - b; c = c ^ (b >> 13);
|
|
|
+ a = a - b; a = a - c; a = a ^ (c >> 12);
|
|
|
+ b = b - c; b = b - a; b = b ^ (a << 16);
|
|
|
+ c = c - a; c = c - b; c = c ^ (b >> 5);
|
|
|
+ a = a - b; a = a - c; a = a ^ (c >> 3);
|
|
|
+ b = b - c; b = b - a; b = b ^ (a << 10);
|
|
|
+ c = c - a; c = c - b; c = c ^ (b >> 15);
|
|
|
+
|
|
|
+ return c;
|
|
|
+}
|
|
|
+
|
|
|
+/* Probe devices and register with add_cgpu */
|
|
|
+void knc_detect(bool __maybe_unused hotplug)
|
|
|
+{
|
|
|
+ int idx;
|
|
|
+
|
|
|
+ srand(mix(clock(), time(NULL), getpid()));
|
|
|
+
|
|
|
+ /* Loop through all possible SPI interfaces */
|
|
|
+ for (idx = 0; idx < MAX_SPIS; ++idx) {
|
|
|
+ struct spidev_context *ctx = spi_new(idx + 1);
|
|
|
+
|
|
|
+ if (ctx != NULL) {
|
|
|
+ if (!knc_detect_one(ctx))
|
|
|
+ spi_free(ctx);
|
|
|
+ }
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+/* return value is number of nonces that have been checked since
|
|
|
+ * previous call
|
|
|
+ */
|
|
|
+static int64_t knc_scanwork(struct thr_info *thr)
|
|
|
+{
|
|
|
+ struct cgpu_info *cgpu = thr->cgpu;
|
|
|
+ struct knc_state *knc = cgpu->device_data;
|
|
|
+ int len, num, next_read_q;
|
|
|
+ int64_t ret;
|
|
|
+
|
|
|
+ applog(LOG_DEBUG, "KnC running scanwork");
|
|
|
+
|
|
|
+ knc_check_disabled_cores(knc);
|
|
|
+
|
|
|
+ /* Prepare tx buffer */
|
|
|
+ memset(spi_txbuf, 0, sizeof(spi_txbuf));
|
|
|
+ num = 0;
|
|
|
+
|
|
|
+ mutex_lock(&knc->lock);
|
|
|
+ next_read_q = knc->read_q;
|
|
|
+ knc_queued_fifo_inc_idx(&next_read_q);
|
|
|
+
|
|
|
+ while (next_read_q != knc->write_q) {
|
|
|
+ knc_work_from_queue_to_spi(knc, &knc->queued_fifo[next_read_q],
|
|
|
+ &spi_txbuf[num]);
|
|
|
+ knc_queued_fifo_inc_idx(&next_read_q);
|
|
|
+ ++num;
|
|
|
+ }
|
|
|
+ /* knc->read_q is advanced in knc_process_response, not here */
|
|
|
+
|
|
|
+ len = spi_transfer(knc->ctx, (uint8_t *)spi_txbuf,
|
|
|
+ (uint8_t *)&spi_rxbuf, sizeof(spi_txbuf));
|
|
|
+ if (len != sizeof(spi_rxbuf)) {
|
|
|
+ ret = -1;
|
|
|
+ goto out_unlock;
|
|
|
+ }
|
|
|
+
|
|
|
+ applog(LOG_DEBUG, "KnC spi: %d works in request", num);
|
|
|
+
|
|
|
+ ret = knc_process_response(thr, cgpu, &spi_rxbuf);
|
|
|
+out_unlock:
|
|
|
+ mutex_unlock(&knc->lock);
|
|
|
+
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static bool knc_queue_full(struct cgpu_info *cgpu)
|
|
|
+{
|
|
|
+ struct knc_state *knc = cgpu->device_data;
|
|
|
+ int queue_full = false;
|
|
|
+ struct work *work;
|
|
|
+
|
|
|
+ applog(LOG_DEBUG, "KnC running queue full");
|
|
|
+
|
|
|
+ mutex_lock(&knc->lock);
|
|
|
+ if (knc_queued_fifo_full(knc)) {
|
|
|
+ queue_full = true;
|
|
|
+ goto out_unlock;
|
|
|
+ }
|
|
|
+ work = get_queued(cgpu);
|
|
|
+ if (!work)
|
|
|
+ goto out_unlock;
|
|
|
+ knc->queued_fifo[knc->write_q].work = work;
|
|
|
+ knc_queued_fifo_inc_idx(&(knc->write_q));
|
|
|
+ if (knc_queued_fifo_full(knc))
|
|
|
+ queue_full = true;
|
|
|
+out_unlock:
|
|
|
+ mutex_unlock(&knc->lock);
|
|
|
+
|
|
|
+ return queue_full;
|
|
|
+}
|
|
|
+
|
|
|
+static void knc_flush_work(struct cgpu_info *cgpu)
|
|
|
+{
|
|
|
+ struct knc_state *knc = cgpu->device_data;
|
|
|
+ int len, next_read_q, next_read_a;
|
|
|
+ struct work *work;
|
|
|
+
|
|
|
+ applog(LOG_ERR, "KnC running flushwork");
|
|
|
+
|
|
|
+ mutex_lock(&knc->lock);
|
|
|
+ /* Drain queued works */
|
|
|
+ next_read_q = knc->read_q;
|
|
|
+ knc_queued_fifo_inc_idx(&next_read_q);
|
|
|
+
|
|
|
+ while (next_read_q != knc->write_q) {
|
|
|
+ work = knc->queued_fifo[next_read_q].work;
|
|
|
+ work_completed(cgpu, work);
|
|
|
+ knc->queued_fifo[next_read_q].work = NULL;
|
|
|
+ knc->read_q = next_read_q;
|
|
|
+ knc_queued_fifo_inc_idx(&next_read_q);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Drain active works */
|
|
|
+ next_read_a = knc->read_a;
|
|
|
+ knc_active_fifo_inc_idx(&next_read_a);
|
|
|
+
|
|
|
+ while (next_read_a != knc->write_a) {
|
|
|
+ work = knc->active_fifo[next_read_a].work;
|
|
|
+ work_completed(cgpu, work);
|
|
|
+ knc->active_fifo[next_read_a].work = NULL;
|
|
|
+ knc->read_a = next_read_a;
|
|
|
+ knc_active_fifo_inc_idx(&next_read_a);
|
|
|
+ }
|
|
|
+
|
|
|
+ len = _internal_knc_flush_fpga(knc);
|
|
|
+ if (len > 0)
|
|
|
+ knc_process_response(NULL, cgpu, &spi_rxbuf);
|
|
|
+ mutex_unlock(&knc->lock);
|
|
|
+}
|
|
|
+
|
|
|
+struct device_drv knc_drv = {
|
|
|
+ .drv_id = DRIVER_knc,
|
|
|
+ .dname = "KnCminer",
|
|
|
+ .name = "KnC",
|
|
|
+ .drv_detect = knc_detect, // Probe for devices, add with add_cgpu
|
|
|
+
|
|
|
+ .hash_work = hash_queued_work,
|
|
|
+ .scanwork = knc_scanwork,
|
|
|
+ .queue_full = knc_queue_full,
|
|
|
+ .flush_work = knc_flush_work,
|
|
|
+};
|
Con Kolivas