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@@ -200,6 +200,7 @@ x6500_fpga_upload_bitstream(struct cgpu_info *x6500, struct jtag_port *jp1)
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applog(LOG_WARNING, "%s %u: Programming %s...",
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x6500->api->name, x6500->device_id, x6500->device_path);
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+ x6500->status = LIFE_INIT;
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// "Magic" jtag_port configured to access both FPGAs concurrently
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struct jtag_port jpt = {
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@@ -325,8 +326,6 @@ static bool x6500_fpga_init(struct thr_info *thr)
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if (!ftdi)
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return false;
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- thread_reportin(thr); // HACK
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-
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fpga = calloc(1, sizeof(*fpga));
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jp = &fpga->jtag;
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jp->a = x6500->cgpu_data;
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