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@@ -224,7 +224,7 @@ x6500_fpga_upload_bitstream(struct cgpu_info *x6500, struct jtag_port *jp1)
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applog(LOG_WARNING, "%s: Programming %s...",
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x6500->dev_repr, x6500->device_path);
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- x6500->status = LIFE_INIT;
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+ x6500->status = LIFE_INIT2;
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// "Magic" jtag_port configured to access both FPGAs concurrently
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struct jtag_port jpt = {
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@@ -341,6 +341,7 @@ static bool x6500_thread_init(struct thr_info *thr)
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notifier_init(thr->mutex_request);
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pthread_cond_init(&x6500->device_cond, NULL);
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+ // This works because x6500_thread_init is only called for the first processor now that they're all using the same thread
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for ( ; x6500; x6500 = x6500->next_proc)
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{
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thr = x6500->thr[0];
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@@ -360,6 +361,7 @@ static bool x6500_thread_init(struct thr_info *thr)
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jp->a = x6500->device_data;
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x6500_jtag_set(jp, pinoffset);
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thr->cgpu_data = fpga;
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+ x6500->status = LIFE_INIT2;
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if (!jtag_reset(jp)) {
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applog(LOG_ERR, "%s: JTAG reset failed",
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