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@@ -1,5 +1,6 @@
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/*
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* Copyright 2014 Luke Dashjr
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+ * Copyright 2013 Zefir Kurtisi
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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@@ -13,6 +14,7 @@
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#include <stdint.h>
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#include <string.h>
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+#include "deviceapi.h"
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#include "driver-aan.h"
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#include "logging.h"
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#include "lowl-spi.h"
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@@ -20,6 +22,10 @@
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#include "util.h"
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#define AAN_PROBE_TIMEOUT_US 3750000
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+#define AAN_INIT_TIMEOUT_US 5000000
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+#define AAN_READ_INTERVAL_US 100000
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+
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+#define AAN_REGISTER_SIZE 6
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enum aan_cmd {
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AAN_BIST_START = 0x01,
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@@ -94,6 +100,24 @@ bool aan_spi_cmd(struct spi_port * const spi, const uint8_t cmd, const uint8_t c
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return true;
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}
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+static
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+bool aan_read_reg(struct spi_port * const spi, const uint8_t chip, void * const out_buf, const struct timeval * const tvp_timeout)
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+{
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+ if (!aan_spi_cmd_send(spi, AAN_READ_REG, chip, NULL, 0))
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+ return false;
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+ if (!aan_spi_cmd_resp(spi, AAN_READ_REG_RESP, chip, tvp_timeout))
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+ return false;
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+
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+ spi_emit_nop(spi, AAN_REGISTER_SIZE);
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+ if (!spi_txrx(spi))
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+ applogr(false, LOG_DEBUG, "%s: %s failed", __func__, "spi_txrx");
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+
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+ uint8_t * const rx = spi_getrxbuf(spi);
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+ memcpy(out_buf, rx, AAN_REGISTER_SIZE);
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+
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+ return true;
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+}
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+
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int aan_detect_spi(int * const out_chipcount, struct spi_port * const * const spi_a, const int spi_n)
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{
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struct timeval tv_timeout;
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@@ -154,8 +178,292 @@ spifail:
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return completed;
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}
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+bool aan_init(struct thr_info * const master_thr)
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+{
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+ struct cgpu_info * const master_dev = master_thr->cgpu, *dev = NULL;
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+ struct aan_board_data *board;
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+ struct timeval tv_timeout, tv_now;
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+ int chipid;
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+ for_each_managed_proc(proc, master_dev)
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+ {
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+ struct spi_port * const spi = proc->device_data;
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+ struct thr_info * const thr = proc->thr[0];
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+
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+ if (dev != proc->device)
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+ {
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+ dev = proc->device;
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+ chipid = 0;
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+ timer_set_now(&tv_now);
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+ board = malloc(sizeof(*board));
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+ *board = (struct aan_board_data){
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+ .master_dev = master_dev,
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+ .spi = spi,
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+ .tv_next_poll = tv_now,
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+ };
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+ spi->cgpu = dev;
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+
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+ while (true)
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+ {
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+ timer_set_delay(&tv_timeout, &tv_now, AAN_INIT_TIMEOUT_US);
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+ if (aan_spi_cmd(spi, AAN_BIST_FIX, AAN_ALL_CHIPS, NULL, 0, &tv_timeout))
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+ break;
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+ applog(LOG_ERR, "%s: Failed to %s", proc->dev_repr, "BIST_FIX");
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+ }
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+ }
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+
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+ proc->device_data = board;
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+ struct aan_chip_data * const chip = malloc(sizeof(*chip));
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+ thr->cgpu_data = chip;
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+ thr->queue_full = true;
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+ *chip = (struct aan_chip_data){
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+ .chipid = ++chipid,
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+ };
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+ }
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+ master_thr->tv_poll = tv_now;
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+
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+ return true;
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+}
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+
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+static
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+bool aan_spi_send_work(struct spi_port * const spi, const uint8_t chipid, const uint8_t jobid, const struct work * const work)
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+{
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+ uint8_t buf[0x38];
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+
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+ swab256(&buf[0], work->midstate);
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+ swap32yes(&buf[0x20], &work->data[0x40], 3);
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+ memset(&buf[0x2c], 0, 4); // start nonce
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+ pk_u32le(buf, 0x30, 0x1d001fff); // compressed target, pdiff1 + 1
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+ memset(&buf[0x34], 0xff, 4); // end nonce
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+
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+ return aan_spi_cmd_send(spi, AAN_WRITE_JOB | (jobid << 4), chipid, buf, sizeof(buf));
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+}
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+
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+static bool set_work(struct cgpu_info *, uint8_t, struct work *);
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+
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+bool aan_queue_append(struct thr_info * const thr, struct work * const work)
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+{
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+ struct cgpu_info *proc = thr->cgpu;
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+ struct cgpu_info *dev = proc->device;
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+ struct aan_board_data *board = dev->device_data;
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+ struct cgpu_info * const master_dev = board->master_dev;
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+ struct aan_board_data * const master_board = master_dev->device_data;
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+
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+ applog(LOG_DEBUG, "%s: queue_append queues_empty=%d", proc->proc_repr, master_board->queues_empty-1);
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+ work->nonce_diff = 8; // FIXME
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+ if (set_work(dev, proc->proc_id + 1, work))
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+ hashes_done2(thr, 0x100000000, NULL);
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+
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+ thr->queue_full = true;
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+ if (!--master_board->queues_empty)
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+ {
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+ struct thr_info * const master_thr = master_dev->thr[0];
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+
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+ // Reactivate polling
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+ dev = NULL;
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+ for_each_managed_proc(proc, master_dev)
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+ {
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+ if (dev == proc->device)
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+ continue;
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+ dev = proc->device;
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+ board = dev->device_data;
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+
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+ reduce_timeout_to(&master_thr->tv_poll, &board->tv_next_poll);
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+ }
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+ }
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+ return true;
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+}
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+
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+void aan_queue_flush(struct thr_info * const thr)
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+{
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+ // TODO
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+}
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+
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+static
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+struct cgpu_info *aan_proc_for_chipid(struct cgpu_info * const dev, const int chipid)
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+{
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+ struct cgpu_info *proc = dev;
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+ for (int i = 1; i < chipid; ++i)
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+ {
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+ proc = proc->next_proc;
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+ if (unlikely((!proc) || proc->device != dev))
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+ {
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+badchipid:
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+ inc_hw_errors_only(dev->thr[0]);
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+ applogr(NULL, LOG_ERR, "%s: Chip number %d out of range", dev->dev_repr, chipid);
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+ }
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+ }
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+ if (unlikely(!chipid))
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+ goto badchipid;
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+ return proc;
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+}
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+
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static
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void aan_spi_parse_rx(struct spi_port * const spi)
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{
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spi_clear_buf(spi);
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}
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+
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+#define MAX_POLL_NUM 20
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+
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+/* set work for given chip, returns true if a nonce range was finished */
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+static
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+bool set_work(struct cgpu_info * const dev, const uint8_t chip_id, struct work * const work)
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+{
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+ struct aan_board_data * const board = dev->device_data;
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+ struct spi_port * const spi = board->spi;
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+
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+ struct cgpu_info * const proc = aan_proc_for_chipid(dev, chip_id);
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+ struct thr_info * const thr = proc->thr[0];
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+ struct aan_chip_data * const chip = thr->cgpu_data;
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+ bool retval = false;
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+
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+ ++chip->last_jobid;
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+ chip->last_jobid &= 3;
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+
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+ if (chip->works[chip->last_jobid] != NULL)
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+ {
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+ free_work(chip->works[chip->last_jobid]);
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+ chip->works[chip->last_jobid] = NULL;
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+ retval = true;
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+ }
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+
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+ if (!aan_spi_send_work(spi, chip_id, chip->last_jobid + 1, work))
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+ {
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+ free_work(work);
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+ applog(LOG_ERR, "%"PRIpreprv": Failed to set work %d", proc->proc_repr, chip->last_jobid + 1);
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+ }
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+ else
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+ chip->works[chip->last_jobid] = work;
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+ spi_clear_buf(spi);
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+
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+ return retval;
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+}
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+
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+/* check for pending results in a chain, returns false if output queue empty */
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+static
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+bool get_nonce(struct cgpu_info * const dev, uint8_t * const nonce, uint8_t * const chip, uint8_t * const job_id)
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+{
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+ struct aan_board_data * const board = dev->device_data;
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+ struct spi_port * const spi = board->spi;
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+
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+ int pollLen = MAX_POLL_NUM * dev->procs;
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+ if (pollLen <= 0)
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+ pollLen = MAX_POLL_NUM;
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+
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+ if (!aan_spi_cmd_send(spi, AAN_READ_RESULT, AAN_ALL_CHIPS, NULL, 0))
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+ return false;
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+
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+ for (int i = 0; i < pollLen; ++i)
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+ {
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+ spi_clear_buf(spi);
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+ spi_emit_nop(spi, 2);
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+ if (!spi_txrx(spi))
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+ applogr(false, LOG_ERR, "%s: SPI error in get_nonce", dev->dev_repr);
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+ uint8_t * const spi_rx = spi_getrxbuf(spi);
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+ if (spi_rx[0] == AAN_READ_RESULT && spi_rx[1] == 0x00)
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+ applogr(false, LOG_DEBUG, "%s: Output queue empty", dev->dev_repr);
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+ if ((spi_rx[0] & 0x0f) == AAN_READ_RESULT && spi_rx[1] != 0)
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+ {
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+ *job_id = spi_rx[0] >> 4;
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+ *chip = spi_rx[1];
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+
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+ spi_emit_nop(spi, 2);
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+ if (!spi_txrx(spi))
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+ applogr(false, LOG_ERR, "SPI Err(%s):get_nonce", dev->dev_repr);
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+ memcpy(nonce, spi_rx, 4);
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+
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+ applog(LOG_DEBUG, "%s: Got nonce for chip %d / job_id %d", dev->dev_repr, *chip, *job_id);
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+
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+ return true;
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+ }
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+ }
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+
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+ return false;
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+}
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+
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+static
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+void aan_scanwork(struct cgpu_info * const dev, struct thr_info * const master_thr)
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+{
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+ struct aan_board_data * const board = dev->device_data;
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+ struct spi_port * const spi = board->spi;
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+
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+ uint32_t nonce;
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+ uint8_t chip_id;
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+ uint8_t job_id;
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+ bool work_updated = false;
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+
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+ if (!timer_passed(&board->tv_next_poll, NULL))
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+ goto out;
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+
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+ while (get_nonce(dev, (uint8_t*)&nonce, &chip_id, &job_id))
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+ {
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+ nonce = bswap_32(nonce);
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+ work_updated = true;
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+ struct cgpu_info * const proc = aan_proc_for_chipid(dev, chip_id);
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+ if (!proc)
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+ continue;
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+ struct thr_info * const thr = proc->thr[0];
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+ struct aan_chip_data * const chip = thr->cgpu_data;
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+ if (job_id < 1 || job_id > 4)
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+ {
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+badjob:
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+ inc_hw_errors3(thr, NULL, &nonce, 8./*FIXME*/);
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+ continue;
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+ }
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+ struct work * const work = chip->works[job_id - 1];
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+ if (!work)
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+ goto badjob;
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+ submit_nonce(thr, work, nonce);
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+ }
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+
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+ /* check for completed works */
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+ for_each_logical_proc(proc, dev)
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+ {
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+ struct thr_info * const thr = proc->thr[0];
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+ const int i = proc->proc_id;
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+ uint8_t spi_rx[8];
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+
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+ if (!aan_read_reg(spi, i + 1, &spi_rx[2], NULL))
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+ {
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+ applog(LOG_ERR, "%"PRIpreprv": Failed to read reg", proc->proc_repr);
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+ continue;
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+ }
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+ if ((spi_rx[5] & 2) != 2)
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+ {
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+ struct cgpu_info * const master_dev = board->master_dev;
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+ struct aan_board_data * const master_board = master_dev->device_data;
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+
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+ work_updated = true;
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+ thr->queue_full = false;
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+ ++master_board->queues_empty;
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+ applog(LOG_DEBUG, "%s: queue_full=false queues_empty=%d", proc->proc_repr, master_board->queues_empty);
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+ }
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+ }
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+
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+ if (!work_updated)
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+ timer_set_delay_from_now(&board->tv_next_poll, AAN_READ_INTERVAL_US);
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+
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+out:
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+ reduce_timeout_to(&master_thr->tv_poll, &board->tv_next_poll);
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+}
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+
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+void aan_poll(struct thr_info * const master_thr)
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+{
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+ struct cgpu_info * const master_dev = master_thr->cgpu, *dev = NULL;
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+ struct aan_board_data * const master_board = master_dev->device_data;
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+
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+ timer_unset(&master_thr->tv_poll);
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+
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+ for_each_managed_proc(proc, master_dev)
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+ {
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+ if (dev == proc->device)
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+ continue;
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+ dev = proc->device;
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+
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+ aan_scanwork(dev, master_thr);
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+ }
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+
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+ if (master_board->queues_empty)
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+ // Avoid polling when we have queues to fill
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+ timer_unset(&master_thr->tv_poll);
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+}
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