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@@ -216,7 +216,7 @@ x6500_fpga_upload_bitstream(struct cgpu_info *x6500, struct jtag_port *jp1)
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applog(LOG_WARNING, "%s %u: Programming %s...",
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x6500->api->name, x6500->device_id, x6500->device_path);
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- x6500->status = LIFE_INIT;
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+ x6500->status = LIFE_INIT2;
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// "Magic" jtag_port configured to access both FPGAs concurrently
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struct jtag_port jpt = {
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@@ -349,6 +349,7 @@ static bool x6500_fpga_init(struct thr_info *thr)
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jp->a = x6500->cgpu_data;
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x6500_jtag_set(jp, pinoffset);
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thr->cgpu_data = fpga;
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+ x6500->status = LIFE_INIT2;
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mutex_lock(&x6500->device_mutex);
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if (!jtag_reset(jp)) {
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@@ -382,7 +383,7 @@ static bool x6500_fpga_init(struct thr_info *thr)
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x6500->api->name, x6500->device_id, fpgaid);
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if (!x6500_fpga_upload_bitstream(x6500, jp))
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return false;
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- } else if (opt_force_dev_init && x6500->status == LIFE_INIT) {
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+ } else if (opt_force_dev_init && x6500->status == LIFE_INIT2) {
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applog(LOG_DEBUG, "%s %u.%u: FPGA is already programmed, but --force-dev-init is set",
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x6500->api->name, x6500->device_id, fpgaid);
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if (!x6500_fpga_upload_bitstream(x6500, jp))
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