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@@ -269,8 +269,8 @@ static int avalon_reset(struct cgpu_info *avalon, int fd)
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{
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struct avalon_result ar;
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struct avalon_task at;
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- uint8_t *buf;
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- int ret, i = 0;
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+ uint8_t *buf, *tmp;
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+ int ret, i, spare;
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struct timespec p;
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/* Send reset, then check for result */
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@@ -294,12 +294,17 @@ static int avalon_reset(struct cgpu_info *avalon, int fd)
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p.tv_nsec = AVALON_RESET_PITCH;
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nanosleep(&p, NULL);
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- buf = (uint8_t *)&ar;
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- /* We may also get 0x00 and 0x18 first */
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- if (buf[0] != 0xAA)
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- buf = &buf[1];
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- if (buf[0] != 0xAA)
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- buf = &buf[1];
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+ /* Look for the first occurrence of 0xAA, the reset response should be:
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+ * AA 55 AA 55 00 00 00 00 00 00 */
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+ spare = AVALON_READ_SIZE - 10;
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+ tmp = (uint8_t *)&ar;
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+ for (i = 0; i <= spare; i++) {
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+ buf = &tmp[i];
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+ if (buf[0] == 0xAA)
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+ break;
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+ }
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+ i = 0;
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+
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if (buf[0] == 0xAA && buf[1] == 0x55 &&
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buf[2] == 0xAA && buf[3] == 0x55) {
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for (i = 4; i < 11; i++)
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